XTR115 XTR116 XTR116 XTR115 SBOS124A – JANUARY 2000 – REVISED NOVEMBER 2003 4-20mA CURRENT LOOP TRANSMITTERS FEATURES APPLICATIONS (cid:1) LOW QUIESCENT CURRENT: 200µA (cid:1) 2-WIRE, 4-20mA CURRENT LOOP (cid:1) 5V REGULATOR FOR EXTERNAL CIRCUITS TRANSMITTER (cid:1) V FOR SENSOR EXCITATION: (cid:1) SMART TRANSMITTER REF XTR115: 2.5V (cid:1) INDUSTRIAL PROCESS CONTROL XTR116: 4.096V (cid:1) TEST SYSTEMS (cid:1) LOW SPAN ERROR: 0.05% (cid:1) COMPATIBLE WITH HART MODEM (cid:1) LOW NONLINEARITY ERROR: 0.003% (cid:1) CURRENT AMPLIFIER (cid:1) WIDE LOOP SUPPLY RANGE: 7.5V to 36V (cid:1) VOLTAGE-TO-CURRENT AMPLIFIER (cid:1) SO-8 PACKAGE DESCRIPTION used for offsetting or to excite transducers. A current return pin (I ) senses any current used in external RET The XTR115 and XTR116 are precision current out- circuitry to assure an accurate control of the output put converters designed to transmit analog 4-to-20mA current. signals over an industry standard current loop. They The XTR115 is a fundamental building block of provide accurate current scaling and output current smart sensors using 4-to-20mA current transmission. limit functions. The XTR115 and XTR116 are specified for opera- The on-chip voltage regulator (5V) can be used to tion over the extended industrial temperature range, power external circuitry. A precision on-chip V REF –40°C to +85°C. (2.5V for XTR115 and 4.096V for XTR116) can be XTR115 XTR116 VREG +5V V+ +5V 8 Regulator 7 XTR115: 2.5V VREF Voltage XTR116: 4.096V 1 Reference V LOOP B R IN IIN 6 + 2 A1 RL V E IN – 5 R 3 LIM IRET 2.4R751kΩ 2R52Ω IO = 10R0I NVIN 4 I = 100• I IN Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Copyright © 2000-2003, Texas Instruments Incorporated Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. www.ti.com

SPECIFICATIONS At T = +25°C, V+= 24V, R = 20kΩ, and TIP29C external transistor, unless otherwise noted. A IN XTR115U XTR115UA XTR116U XTR116UA PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS OUTPUT Output Current Equation I I = I • 100 ✻ O O IN Output Current, Linear Range 0.25 25 ✻ ✻ mA Over-Scale Limit I 32 ✻ mA LIM Under-Scale Limit I I = 0, I = 0 0.2 0.25 ✻ ✻ mA MIN REG REF SPAN Span (Current Gain) S 100 ✻ A/A Error(1) I = 250µA to 25mA ±0.05 ±0.2 ✻ ±0.4 % IN vs Temperature T = –40°C to +85°C ±3 ±20 ✻ ✻ ppm/°C A Nonlinearity I = 250µA to 25mA ±0.003 ±0.01 ✻ ±0.02 % IN INPUT Offset Voltage (Op Amp) V I = 40µA ±100 ±250 ✻ ±500 µV OS IN vs Temperature T = –40°C to +85°C ±0.7 ±3 ✻ ±6 µV/°C A vs Supply Voltage, V+ V+ = 7.5V to 36V ±0.1 ±2 ✻ ✻ µV/V Bias Current I –35 ✻ nA B vs Temperature 150 ✻ pA/°C Noise: 0.1Hz to 10Hz e 0.6 ✻ µVp-p n DYNAMIC RESPONSE Small Signal Bandwidth C = 0, R = 0 380 ✻ kHz LOOP L Slew Rate 3.2 ✻ mA/µs V (2) REF XTR115 2.5 ✻ V XTR116 4.096 ✻ V Voltage Accuracy I = 0 ±0.05 ±0.25 ✻ ±0.5 % REF vs Temperature T = –40°C to +85°C ±20 ±35 ✻ ±75 ppm/°C A vs Supply Voltage, V+ V+ = 7.5V to 36V ±1 ±10 ✻ ✻ ppm/V vs Load I = 0mA to 2.5mA ±100 ✻ ppm/mA REF Noise: 0.1Hz to 10Hz 10 ✻ µVp-p Short-Circuit Current 16 ✻ mA V (2) REG Voltage 5 ✻ V Voltage Accuracy I = 0 ±0.05 ±0.1 ✻ ✻ V REG vs Temperature T = –40°C to +85°C ±0.1 ✻ mV/°C A vs Supply Voltage, V+ V+ = 7.5V to 36V 1 ✻ mV/V vs Output Current See Typical Curves Short-Circuit Current 12 ✻ mA POWER SUPPLY V+ Specified +24 ✻ V Voltage Range +7.5 +36 ✻ ✻ V Quiescent Current 200 250 ✻ ✻ µA Over Temperature, –40°C to +85°C 240 300 ✻ ✻ µA TEMPERATURE RANGE Specification –40 +85 ✻ ✻ °C Operating –55 +125 ✻ ✻ °C Storage –55 +125 ✻ ✻ °C Thermal Resistance θ 150 ✻ °C/W JA ✻ Specifications the same as XTR115U and XTR116U. NOTES: (1) Does not include initial error or TCR of R . (2) Voltage measured with respect to I pin. IN RET XTR115, XTR116 2 www.ti.com SBOS124A

PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS(1) Top View SO-8 Power Supply, V+ (referenced to IO pin)..........................................40V Input Voltage (referenced to I pin)........................................0V to V+ RET Output Current Limit...............................................................Continuous V , Short-Circuit..................................................................Continuous REG V , Short-Circuit..................................................................Continuous V 1 8 V REF REF REG Operating Temperature................................................–55°C to +125°C I 2 7 V+ Storage Temperature Range.......................................–55°C to +125°C IN Lead Temperature (soldering, 10s)..............................................+300°C I 3 6 B (Base) Junction Temperature...................................................................+165°C RET I 4 5 E (Emitter) NOTE: (1) Stresses above these ratings may cause permanent damage. O Exposure to absolute maximum conditions for extended periods may degrade device reliability. ELECTROSTATIC DISCHARGE SENSITIVITY PACKAGE/ORDERING INFORMATION For the most current package and ordering information, see This integrated circuit can be damaged by ESD. Texas Instru- the Package Option Addendum located at the end of this ments recommends that all integrated circuits be handled with data sheet. appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degrada- tion to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. XTR115, XTR116 3 SBOS124A www.ti.com

TYPICAL PERFORMANCE CURVES At T = +25°C, V+= 24V, R = 20kΩ, and TIP29C external transistor, unless otherwise noted. A IN CURRENT GAIN vs FREQUENCY QUIESCENT CURRENT vs TEMPERATURE 260 40 240 A) Gain (dB) 30 CROLU =T 0=Ω 0 µent Current ( 222000 (V+) = 36V (V+) = 24V c 20 CROLU T= =2 5100ΩnF Quies (V+) = 7.5V 180 10 160 10k 100k 1M –75 –50 –25 0 25 50 75 100 125 Frequency (Hz) Temperature (°C) REFERENCE VOLTAGE vs TEMPERATURE OVER-SCALE CURRENT vs TEMPERATURE 0.1 34 With External Transistor 33 %) 0 A) Voltage ( urrent (m 32 V+ = 36V erence –0.1 Scale C 3310 V+ = 7.5V ∆ Ref –0.2 Over- V+ = 24V 29 –0.3 28 –75 –50 –25 0 25 50 75 100 125 –75 –50 –25 0 25 50 75 100 125 Temperature (°C) Temperature (°C) V VOLTAGE vs V CURRENT REG REG 5.5 +125°C –55°C V) ge ( +25°C –55°C a olt 5.0 V +25°C G E R V Sinking Sourcing Current Current +125°C 4.5 –1 0 1 2 3 4 I Current (mA) REG XTR115, XTR116 4 www.ti.com SBOS124A

APPLICATIONS INFORMATION and upward. Full-scale inputs greater than 0.5V are recom- mend to minimize the effect of offset voltage and drift of A1. The XTR115 and XTR116 are identical devices except for the reference voltage output, pin 1. This voltage is available EXTERNAL TRANSISTOR for external circuitry and is not used internally. Further discussions that apply to both devices will refer to the The external transistor, Q1, conducts the majority of the full- “XTR115/6.” scale output current. Power dissipation in this transistor can approach 0.8W with high loop voltage (40V) and 20mA Figure 1 shows basic circuit connections with representative output current. The XTR115/6 is designed to use an external simplified input circuitry. The XTR115/6 is a two-wire transistor to avoid on-chip thermal-induced errors. Heat current transmitter. Its input signal (pin 2) controls the output produced by Q1 will still cause ambient temperature changes current. A portion of this current flows into the V+ power that can affect the XTR115/6. To minimize these effects, supply, pin 7. The remaining current flows in Q1. External locate Q1 away from sensitive analog circuitry, including input circuitry connected to the XTR115/6 can be powered XTR115/6. Mount Q1 so that heat is conducted to the from V or V . Current drawn from these terminals REG REF outside of the transducer housing. must be returned to I , pin 3. This I pin is a “local RET RET ground” for input circuitry driving the XTR115/6. The XTR115/6 is designed to use virtually any NPN transis- tor with sufficient voltage, current and power rating. Case The XTR115/6 is a current-input device with a gain of 100. style and thermal mounting considerations often influence A current flowing into pin 2 produces I = 100 • I . The O IN the choice for any given application. Several possible choices input voltage at the I pin is zero (referred to the I pin). IN RET are listed in Figure 1. A MOSFET transistor will not improve A voltage input is created with an external input resistor, as the accuracy of the XTR115/6 and is not recommended. shown. Common full-scale input voltages range from 1V XTR115 XTR116 I I REG 5V VREG +5V V+ O XTR115: 2.5V 8 Regulator 7 XTR116: 4.096V I REF VREF(1) Voltage 1 Reference V LOOP RIN B Input VIN 20kΩ IIN IIN 6 Q1 10nF Circuitry 2 A1 RL E 5 3 RLIM I All return current RET R1 R2 from IREG and IREF 2.475kΩ 25Ω IO 4 For IO = 4mA to 20mA I = 100 • IIN I = 40µA to 200µA IN With R = 20kΩ NOTE: (1) See also Figure 5. IN VIN = 0.8V to 4V Possible choices for Q1 (see text). TYPE PACKAGE 2N4922 TO-225 TIP29C TO-220 TIP31B TO-220 FIGURE 1. Basic Circuit Connections. XTR115, XTR116 5 SBOS124A www.ti.com

MINIMUM-SCALE CURRENT MAXIMUM OUTPUT CURRENT The quiescent current of the XTR115/6 (typically 200µA) The XTR115/6 provides accurate, linear output up to 25mA. is the lower limit of its output current. Zero input current Internal circuitry limits the output current to approximately (I = 0) will produce an I equal to the quiescent current. 32mA to protect the transmitter and loop power/measure- IN O Output current will not begin to increase until I > I /100. ment circuitry. IN Q Current drawn from V or V will add to this minimum REF REG It is possible to extend the output current range of the output current. This means that more than 3.7mA is avail- XTR115/6 by connecting an external resistor from pin 3 to able to power external circuitry while still allowing the pin 5, to change the current limit value. Since all output output current to go below 4mA. current must flow through internal resistors, it is possible to damage with excessive current. Output currents greater than OFFSETTING THE INPUT 45mA may cause permanent damage. A low scale of 4mA is produced by creating a 40µA input current. This can be created with the proper value resistor from V (Figure 2), or by generating offset in the input REF drive circuitry. V XTR115 REG XTR116 V REF R IN V O D/A XTR115 V REG V XTR115 REG 2.5V VREF Voltage XTR116 40µA Reference VREF R0 Digital ≈ IO IIN 62.5kΩ Control D/A Optical IIN Isolation IRET A1 0 to 160µA 5V V XTR115 REG XTR116 Filter RIN IRET R1 CDoignittraoll ≈ µC POWuMt 2.475kΩ Optical Isolation I RET FIGURE 2. Creating Low-Scale Offset. FIGURE 3. Digital Control Methods. XTR115, XTR116 6 www.ti.com SBOS124A

REVERSE-VOLTAGE PROTECTION Most surge protection zener diodes have a diode character- istic in the forward direction that will conduct excessive The XTR115/6 low compliance voltage rating (7.5V) per- current, possibly damaging receiving-side circuitry if the mits the use of various voltage protection methods without loop connections are reversed. If a surge protection diode is compromising operating range. Figure 4 shows a diode used, a series diode or diode bridge should be used for bridge circuit which allows normal operation even when the protection against reversed connections. voltage connection lines are reversed. The bridge causes a two diode drop (approximately 1.4V) loss in loop supply voltage. This results in a compliance voltage of approxi- RADIO FREQUENCY INTERFERENCE mately 9V—satisfactory for most applications. A diode can The long wire lengths of current loops invite radio frequency be inserted in series with the loop supply voltage and the V+ interference. RF can be rectified by the input circuitry of the pin to protect against reverse output connection lines with XTR115/6 or preceding circuitry. This generally appears as only a 0.7V loss in loop supply voltage. an unstable output current that varies with the position of loop supply or input wiring. OVER-VOLTAGE SURGE PROTECTION Interference may also enter at the input terminals. For Remote connections to current transmitters can sometimes be integrated transmitter assemblies with short connection to subjected to voltage surges. It is prudent to limit the maximum the sensor, the interference more likely comes from the surge voltage applied to the XTR115/6 to as low as practical. current loop connections. Various zener diode and surge clamping diodes are specially designed for this purpose. Select a clamp diode with as low a voltage rating as possible for best protection. For example, a 36V protection diode will assure proper transmitter operation at normal loop voltages, yet will provide an appropriate level of protection against voltage surges. Characterization tests on several production lots showed no damage with loop supply voltages up to 65V. 8 VREG V+ 7 Mleassxi muthma nV PSm minuismt ubme 1 voltage rating of zener V REF diode. R IN 2 XTR115 6 0.01µF IIN XTR116 B Q1 D1(1) 1DNio4d1e4s8 VIN E 5 R V L PS 3 IRET IO 4 The diode bridge causes a 1.4V loss in loop supply voltage. NOTE: (1) Zener Diode 36V: 1N4753A or Motorola P6KE39A. Use lower voltage zener diodes with loop power supply voltages less than 30V for increased protection. See “Over-Voltage Surge Protection.” FIGURE 4. Reverse Voltage Operation and Over-Voltage Surge Protection. XTR115, XTR116 7 SBOS124A www.ti.com

If capacitive loading must be placed on the V pin, one of the compensation schemes shown below must be used to ensure stable operation. REF Values of capacitance must remain within the given ranges. XTR115 R1IS0OΩ(1) VREG XTR116 +5V V+ IO 8 Regulator 7 ILOAD CHF + CLF (0-2.5mA) (10pF to 0.5µF) (2.2µF to 22µF) VREF Voltage 1 Reference V OR LOOP B IIN 6 2 A1 RL E + CLF(1) 5 (2.2µF to 22µF) 3 RLIM (0-2.5ILmOAAD) C(1H0FpF to 0.5µF) R50CΩOMP(1) IRET 2.4R751kΩ 2R52Ω IO=10R0 INVIN 4 I = 100• I IN NOTE: (1) Required compensation components. FIGURE 5. Stable Operation with Capacitive Load on V . REF XTR115, XTR116 8 www.ti.com SBOS124A

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) XTR115U ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 XTR & no Sb/Br) 115U XTR115U/2K5 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 XTR & no Sb/Br) 115U XTR115UA ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 XTR & no Sb/Br) 115U A XTR115UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 XTR & no Sb/Br) 115U A XTR116U ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 XTR & no Sb/Br) 116U XTR116U/2K5 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 XTR & no Sb/Br) 116U XTR116U/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 XTR & no Sb/Br) 116U XTR116UA ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 XTR & no Sb/Br) 116U A XTR116UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 XTR & no Sb/Br) 116U A XTR116UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 XTR & no Sb/Br) 116U A (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2013 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) XTR115U/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 XTR115UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 XTR116U/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2013 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) XTR115U/2K5 SOIC D 8 2500 367.0 367.0 35.0 XTR115UA/2K5 SOIC D 8 2500 367.0 367.0 35.0 XTR116U/2K5 SOIC D 8 2500 367.0 367.0 35.0 PackMaterials-Page2

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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