DATASHEET X9116 FN8160 Low Noise, Low Power, Low Cost Digitally Controlled Potentiometer (XDCP™) Rev 3.00 February 3, 2011 The Intersil X9116 is a digitally controlled nonvolatile Features potentiometer designed to be used in trimmer applications. • Solid-state nonvolatile The pot consists of 15 equal resistor segments that connect to the wiper pin through programmable CMOS switches. The • 16 wiper taps tap position is programmed through a 3-wire up/down serial • 3-wire up/down serial interface port. The last position of the wiper is stored in a nonvolatile memory location which is recalled at the time of power up of • VCC = 2.7V and 5V the device. • Active current < 50µA max. The wiper moves through sequential tap positions with • Standby current < 5µA max. inputs on the serial port. A falling edge on INC (bar) causes • RTOTAL = 10k the tap position to increment one position up or down based on whether the U/D (bar) pin is held high or low. • Packages: 8LdMSOP, 8LdSOIC The X9116 can be used in many applications requiring a • Pb-free plus anneal available (RoHS compliant) variable resistance. In many cases it can replace a Pinout mechanical trimmer and offers many advantages such as SOIC/MSOP temperature and time stability as well as the reliability of a solid state solution. INC 1 8 VCC U/D 2 7 CS X9116 VH/RH 3 6 VL/RL VSS 4 5 VW/RW Block Diagram VCC (Supply Voltage) Up/Down RH/VH (U/D) Control Increment (INC) and RW/VW Memory Device Select (CS) RL/VL RW-RL Resistance VSS (Ground) 15 General RH 10k 14 9.34k 13 8.68k * * k 3 2.08k 2 1.42k 1 760 RL 0 100 FN8160 Rev 3.00 Page 1 of 9 February 3, 2011

X9116 Ordering Information PART NUMBER VCC LIMITS RTOTAL TEMP. RANGE PACKAGE PKG. (BRAND) (Notes 1, 2, 3) PART MARKING (V) (k) (°C) (Pb-free) DWG. # X9116WM8Z AKY 5V ±10% 10 0 to +70 8 Ld MSOP M8.118 X9116WM8IZ DCG -40 to +85 8 Ld MSOP M8.118 X9116WS8Z X9116W Z 0 to +70 8 Ld SOIC M8.15 X9116WS8IZ X9116W ZI -40 to +85 8 Ld SOIC M8.15 X9116WM8Z-2.7 AOJ 2.7-5.5 0 to +70 8 Ld MSOP M8.118 X9116WM8IZ-2.7 AKS -40 to +85 8 Ld MSOP M8.118 X9116WS8Z-2.7 X9116W ZF 0 to +70 8 Ld SOIC M8.15 X9116WS8IZ-2.7 X9116W G -40 to +85 8 Ld SOIC M8.15 NOTES: 1. Add “T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for X9116. For more information on MSL please see techbrief TB363. Pin Descriptions Pin Descriptions V /R and V /R SYMBOL DESCRIPTION H H L L The high (VH/RH) and low (VL/RL) terminals of the X9116 are VW/RW Wiper Terminal equivalent to the fixed terminals of a mechanical VL/RL Low Terminal potentiometer. The minimum voltage is VSS and the maximum is VCC. VSS Ground V /R VCC Supply Voltage W W Rw/Rw is the wiper terminal and is equivalent to the movable U/D Up/Down Control Input terminal of a mechanical potentiometer. The position of the INC Increment Control Input wiper within the array is determined by the control inputs. The CS Chip Select Input wiper terminal series resistance is typically 200 to 400 depending upon VCC. Up/Down (U/D) The U/D input controls the direction of the wiper movement and whether the counter is incremented (up) or decremented (down). Increment (INC) The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the U/D input. Chip Select (CS) The device is selected when the CS input is LOW. The current counter value is stored in nonvolatile memory when CS is returned HIGH while the INC input is also HIGH. After the store operation is complete the X9116 will be placed in the low power standby mode until the device is selected once again. Pin Descriptions SYMBOL DESCRIPTION VH/RH High Terminal FN8160 Rev 3.00 Page 2 of 9 February 3, 2011

X9116 Principles of Operation This procedure allows the system to always power-up to a preset value stored in nonvolatile memory; then during system There are three sections of the X9116: the input control, operation, minor adjustments could be made. The adjustments counter and decode section; the nonvolatile memory; and the might be based on user preference, system parameter resistor array. The input control section operates just like an changes due to temperature drift, etc. up/down counter. The output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor The state of U/D may be changed while CS remains LOW. This array to the wiper output. Under the proper conditions the allows the host system to enable the device and then move the contents of the counter can be stored in nonvolatile memory wiper up and down until the proper trim is attained. and retained for future use. The resistor array is comprised of Mode Selection 15 individual resistors connected in series. At either end of the array and between each resistor is an electronic switch that CS INC U/D MODE transfers the potential at that point to the wiper pin. L H Wiper Up The wiper, when at either fixed terminal, acts like its L L Wiper Down mechanical equivalent and does not move beyond the last position. That is, the counter does not wrap around when H X Store Wiper Position clocked to either extreme. H X X Standby Current The electronic switches on the device operate in a “make L X No Store, Return to Standby before break” mode when the wiper changes tap positions. If the wiper is moved several positions, multiple taps are Symbol Table connected to the wiper for tIW (INC to VW change). The RTOTAL value for the device can temporarily be reduced by a WAVEFORM INPUTS OUTPUTS significant amount if the wiper is moved several positions. Must be Will be When the device is powered-down, the last wiper position steady steady stored will be maintained in the nonvolatile memory. When power is restored, the contents of the memory are recalled and May change Will change from Low to from Low to the wiper is set to the value last stored. High High May change Will change Instructions and Programming from High to from High to Low Low The INC, U/D and CS inputs control the movement of the wiper Don’t Care: Changing: along the resistor array. With CS set LOW, the device is Changes State Not selected and enabled to respond to the U/D and INC inputs. Allowed Known HIGH to LOW transitions on INC will increment or decrement N/A Center Line is High (depending on the state of the U/D input) a four bit counter. Impedance The output of this counter is decoded to select one of 16 wiper positions along the resistive array. The value of the counter is stored in nonvolatile memory whenever CS transitions HIGH while the INC input is also HIGH. The system may select the X9116, move the wiper, and deselect the device without having to store the latest wiper position in nonvolatile memory. After the wiper movement is performed as described above and once the new position is reached, the system must keep INC LOW while taking CS HIGH. The new wiper position will be maintained until changed by the system or until a power-up/down cycle recalls the previously stored data. FN8160 Rev 3.00 Page 3 of 9 February 3, 2011

X9116 Absolute Maximum Ratings Recommended Operating Conditions Temperature Under Bias . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C Temperature Range Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C Voltage on CS, INC, U/D, VH/RH, VL/RL Industrial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C and VCC with Respect to VSS . . . . . . . . . . . . . . . . . . . -1V to +7V Supply Voltage (VCC) Limits V = |VH/RH-VL/RL|. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V X9116. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V ± 10% Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . see link below X9116-2.7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.7V to 5.5V http://www.intersil.com/pbfree/Pb-FreeReflow.asp IW (10 seconds). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±10.0mA CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. Potentiometer Specifications Over recommended operating conditions unless otherwise stated. Boldface limits apply over the operating temperature range, -40°C to +85°C or 0°C to +70°C. MIN MAX SYMBOL PARAMETER TEST CONDITIONS/NOTES (Note 10) TYP (Note 10) UNIT RTOTAL End to end resistance variation -20 +20 % VVH VH/RH terminal voltage VSS =0V VSS VCC V VVL VL/RL terminal voltage VSS = 0V VSS VCC V Power rating RTOTAL = 10k 10 mW RW Wiper resistance IW = 1mA, VCC = 5V 200 400  RW Wiper resistance IW = 1mA, VCC = 2.7V 400 1000  IW Wiper current -5.0 +5.0 mA Noise Ref: 1kHz -120 dBV Resolution 6 % Absolute linearity (Note 4) Vw(n)(actual) - Vw(n)(expected) -1 +1 MI (Note 6) Relative linearity (Note 5) Vw(n+1) - [Vw(n) + MI] -0.2 +0.2 MI (Note 6) RTOTAL temperature coefficient ±300 ppm/°C Ratiometric temperature coefficient ±20 ppm/°C CH/CL/CW Potentiometer capacitances See “Circuit #3 SPICE Macro Model” 10/10/25 pF on page5 NOTES: 4. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = (Vw(n)(actual) - Vw(n)(expected)) = ±1 MlMaximum. 5. Relative linearity is a measure of the error in step size between taps = VW(n+1 ) -[Vw(n) + Ml] = ±0.2 Ml. 6. 1 Ml = Minimum Increment = RTOT/15. © Copyright Intersil Americas LLC 2005-2011. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN8160 Rev 3.00 Page 4 of 9 February 3, 2011

X9116 DC Electrical Specifications Over recommended operating conditions unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +85°C or 0°C to +70°C. MIN TYP MAX SYMBOL PARAMETER TEST CONDITIONS (Note 10) (Note 7) (Note 10) UNIT ICC1 VCC active current (Increment) CS = VIL, U/D = VIL or VIH and 150 µA INC=0.4V/2.4V @ max tCYC ICC2 VCC active current (Store) (EEPROM Store) CS = VIH, U/D = VIL or VIH and 400 µA INC=VIH @ max tWR ISB Standby supply current CS = VCC–0.3V, U/D and INC=VSS or 5 µA VCC–0.3V ILI CS, INC, U/D input leakage current VIN = VSS to VCC ±10 µA VIH CS, INC, U/D input HIGH voltage 2V VCC + 0.5 V VIL CS, INC, U/D input LOW voltage -0.5 0.8 V CIN CS, INC, U/D input capacitance VCC = 5V, VIN = VSS, TA=+25°C, 10 pF f=1MHz NOTES: 7. Typical values are for TA = +25°C and nominal supply voltage. Endurance and Data Retention PARAMETER MIN UNIT Minimum endurance 100,000 Data changes per bit Data retention 100 Years Test Circuit #1 Test Circuit #2 Circuit #3 SPICE Macro Model VH/RH VH/RH RTOTAL RH RL VS VW/TReWst Point VWV/RWW Test Point CH CW 10CpFL Force 25pF VL/RL VVLL/RL Current 10pF RW A.C. Conditions of Test Input pulse levels 0V to 3V Input rise and fall times 10ns Input reference levels 1.5V FN8160 Rev 3.00 Page 5 of 9 February 3, 2011

X9116 DC Electrical Specifications Over recommended operating conditions unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +85°C or 0°C to +70°C. MIN TYP MAX SYMBOL PARAMETER (Note 10) (NOTE 8) (Note 10) UNIT tCl CS to INC setup 100 ns tlD INC HIGH to U/D change 100 ns tDI U/D to INC setup 2.9 µs tlL INC LOW period 1 µs tlH INC HIGH period 1 µs tlC INC inactive to CS inactive 1 µs tCPH CS deselect time (STORE) 10 ms tIW INC to Vw change 1 5 µs tCYC INC cycle time 4 µs tR, tF INC input rise and fall time 500 µs tPU Power up to wiper stable 5 µs tR VCC VCC Power-up rate 15 50 mV/µs tWR Store cycle 5 10 ms Power Up and Down Requirements There are no restrictions on the power-up or power-down conditions of VCC and the voltages applied to the potentiometer pins provided that VCC is always more positive than or equal to VH, VL, and VW, i.e., VCC  VH, VL, VW. The VCC ramp rate spec is always in effect. A.C. Timing CS tCYC (store) tCI tIL tIH tIC tCPH 90% 90% INC 10% tID tDI tF tR U/D tIW (NOTE 9) VW MI NOTES: 8. Typical values are for TA = +25°C and nominal supply voltage. 9. MI in the A.C. timing diagram refers to the minimum incremental change in the VW output due to a change in the wiper position. 10. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. FN8160 Rev 3.00 Page 6 of 9 February 3, 2011

X9116 Basic Configurations of Electronic Potentiometers VR VR VH VW/RW VL I THREE-TERMINAL POTENTIOMETER; TWO-TERMINAL VARIABLE RESISTOR; VARIABLE VOLTAGE DIVIDER VARIABLE CURRENT Basic Circuits BUFFERED REFERENCE VOLTAGE CASCADING TECHNIQUES NONINVERTING AMPLIFIER R1 +V +V +5V +V VS + LM308A +5V VO – VW OP-07 VREF –+ VOUT VW/RW X -5V +V R2 –5V R1 VOUT = VW/RW VW (a) (b) VO = (1+R2/R1)VS VOLTAGE REGULATOR COMPARATOR WITH HYSTERESIS VIN 317 VO (REG) LT311A VS – R1 + VO Iadj R2 } } R1 R2 VUL = {R1/(R1+R2)} VO(max) VLL = {R1/(R1+R2)} VO(min) VO (REG) = 1.25V (1+R2/R1)+Iadj R2 (FOR ADDITIONAL CIRCUITS, SEE AN115) FN8160 Rev 3.00 Page 7 of 9 February 3, 2011

X9116 Package Outline Drawing M8.15 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 2, 11/10 DETAIL "A" 1.27 (0.050) 0.40 (0.016) INDEX 6.20 (0.244) AREA 5.80 (0.228) 0.50 (0.20) x 45° 4.00 (0.157) 0.25 (0.01) 3.80 (0.150) 8° 1 2 3 0° 0.25 (0.010) 0.19 (0.008) TOP VIEW SIDE VIEW “B” 2.41 (0.095) 1 8 SEATING PLANE 0.76 (0.030) 5.00 (0.197) 1.75 (0.069) 2 7 4.80 (0.189) 1.35 (0.053) 1.27 (0.050) 3 6 -C- 4 5 1.27 (0.050) 0.25(0.010) 0.10(0.004) 0.51(0.020) 0.200 0.33(0.013) SIDE VIEW “A TYPICAL RECOMMENDED LAND PATTERN NOTES: 1. Dimensioning and tolerancing per ANSI Y14.5M-1982. 2. Package length does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 3. Package width does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 4. The chamfer on the body is optional. If it is not present, a visual index fea- ture must be located within the crosshatched area. 5. Terminal numbers are shown for reference only. 6. The lead width as measured 0.36mm (0.014 inch) or greater above the seat- ing plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 7. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 8. This outline conforms to JEDEC publication MS-012-AA ISSUE C. FN8160 Rev 3.00 Page 8 of 9 February 3, 2011

X9116 Package Outline Drawing M8.118 8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE Rev 3, 3/10 5 3.0±0.05 A DETAIL "X" D 8 1.10 MAX SIDE VIEW 2 0.09 - 0.20 4.9±0.15 3.0±0.05 5 0.95 REF PIN# 1 ID 1 2 B 0.65 BSC GAUGE TOP VIEW PLANE 0.25 3°±3° 0.55 ± 0.15 0.85±010 H DETAIL "X" C SEATING PLANE 0.25 - 0.036 0.08MCA-BD 0.10 ± 0.05 0.10C SIDE VIEW 1 (5.80) NOTES: (4.40) (3.00) 1. Dimensions are in millimeters. 2. Dimensioning and tolerancing conform to JEDEC MO-187-AA and AMSEY14.5m-1994. 3. Plastic or metal protrusions of 0.15mm max per side are not included. (0.65) 4. Plastic interlead protrusions of 0.15mm max per side are not (0.40) included. (1.40) 5. Dimensions are measured at Datum Plane "H". 6. Dimensions in ( ) are for reference only. TYPICAL RECOMMENDED LAND PATTERN FN8160 Rev 3.00 Page 9 of 9 February 3, 2011