VNN7NV04P-E, VNS7NV04P-E OMNIFET II fully autoprotected Power MOSFET Features 2 Type R I V DS(on) lim clamp 3 VNN7NV04P-E 2 60mΩ 6A 40V 1 VNS7NV04P-E SOT-223 SO-8 ■ Linear current limitation ■ Thermal shutdown Description ■ Short circuit protection The VNN7NV04P-E, VNS7NV04P-E, are ■ Integrated clamp monolithic devices designed in ■ Low current drawn from input pin STMicroelectronics VIPower™ M0-3 Technology, ■ Diagnostic feedback through input pin intended for replacement of standard Power MOSFETs from DC up to 50kHz applications. ■ ESD protection Built in thermal shutdown, linear current limitation ■ Direct access to the gate of the Power and overvoltage clamp protect the chip in harsh MOSFET (analog driving) environments. ■ Compatible with standard Power MOSFET in Fault feedback can be detected by monitoring the compliance with the 2002/95/EC European voltage at the input pin. Directive T able 1. Device summary Order codes Package Tube Tape and reel SOT-223 - VNN7NV04PTR-E SO-8 VNS7NV04P-E VNS7NV04PTR-E September 2013 Doc ID 15632 Rev 4 1/29 www.st.com 1

Contents VNN7NV04P-E, VNS7NV04P-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.2 SO-8 maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.3 SOT-223 maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . 17 4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.1 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.2 SOT-223 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.1 SOT-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.2 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.3 SOT-223 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.4 SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 2/29 Doc ID 15632 Rev 4

VNN7NV04P-E, VNS7NV04P-E List of tables List of tables Table 1. Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Absolute maximum ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 3. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 4. Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 5. SO-8 thermal parameter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 6. SOT-223 thermal parameter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 7. SOT-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Table 8. SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 9. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Doc ID 15632 Rev 4 3/29

List of figures VNN7NV04P-E, VNS7NV04P-E List of figures Figure 1. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 4. Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 5. Test circuit for diode recovery times. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 6. Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 7. Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 8. Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 9. Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 10. Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 11. Static drain-source on resistance vs input voltage (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 12. Static drain-source on resistance vs input voltage (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 13. Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 14. Static drain source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 15. Turn-on current slope (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 16. Turn-on current slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 17. Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 18. Static drain-source on resistance vs Id. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 19. Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 20. Turn-off drain source voltage slope (part 1/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 21. Turn-off drain source voltage slope (part 2/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 22. Capacitance variations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 23. Output characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 24. Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 25. Switching time resistive load (part 1/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 26. Switching time resistive load (part 2/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 27. Normalized input threshold voltage vs temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 28. Normalized current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 29. Step response current limit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 30. SO-8 maximum turn-off current versus load inductance. . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 31. SO-8 demagnetization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 32. SOT-223 maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 33. SOT-223 demagnetization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 34. SO-8 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 35. Rthj-amb vs PCB copper area in open box free air condition. . . . . . . . . . . . . . . . . . . . . . . 18 Figure 36. SO-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 37. Thermal fitting model of an OMNIFET II in SO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 38. SOT-223 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 39. Rthj-amb vs PCB copper area in open box free air condition. . . . . . . . . . . . . . . . . . . . . . . 20 Figure 40. SOT-223 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 41. Thermal fitting model of an OMNIFET II in SOT-223 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 42. SOT-223 package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 43. SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 44. SOT-223 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 45. SO-8 tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 46. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4/29 Doc ID 15632 Rev 4

VNN7NV04P-E, VNS7NV04P-E Block diagram and pin description 1 Block diagram and pin description Figure 1. Block diagram DRAIN 2 Overvoltage Clamp INPUT Gate 1 Control Linear Current Over Limiter Temperature 3 SOURCE FC01000 Figure 2. Configuration diagram (top view) SO-8 Package(1) SOURCE 1 8 DRAIN SOURCE DRAIN SOURCE DRAIN INPUT 4 5 DRAIN 1. For the pins configuration related to SOT-223 see outlines at page 1. Doc ID 15632 Rev 4 5/29

Electrical specifications VNN7NV04P-E, VNS7NV04P-E 2 Electrical specifications Figure 3. Current and voltage conventions I D V DS DRAIN IIN RIN INPUT SOURCE V IN 2.1 Absolute maximum ratings T able 2. Absolute maximum ratings Value Symbol Parameter Unit SOT-223 SO-8 V Drain-source voltage (V =0V) Internally clamped V DS IN V Input voltage Internally clamped V IN I Input current +/-20 mA IN R Minimum input series impedance 150 Ω IN MIN I Drain current Internally limited A D I Reverse DC output current -10.5 A R Electrostatic discharge (R=1.5KΩ, V 4000 V ESD1 C=100pF) Electrostatic discharge on output pin only V 16500 V ESD2 (R=330Ω, C=150pF) P Total dissipation at T =25°C 7 4.6 W tot c Maximum switching energy (L=0.7mH; E R =0Ω; V =13.5V; T =150°C; 40 mJ MAX L bat jstart I =9A) L Maximum switching energy (L=0.6mH; E R =0Ω; V =13.5V; T =150°C; 37 mJ MAX L bat jstart I =9A) L T Operating junction temperature Internally limited °C j T Case operating temperature Internally limited °C c T Storage temperature -55 to 150 °C stg 6/29 Doc ID 15632 Rev 4

VNN7NV04P-E, VNS7NV04P-E Electrical specifications 2.2 Thermal data T able 3. Thermal data Value Symbol Parameter Unit SOT-223 SO-8 R Thermal resistance junction-case max 18 °C/W thj-case R Thermal resistance junction-lead max 27 °C/W thj-lead R Thermal resistance junction-ambient max 96(1) 90(1) °C/W thj-amb 1. When mounted on a standard single-sided FR4 board with 0.5mm2 of Cu (at least 35µm thick) connected to all DRAIN pins. 2.3 Electrical characteristics -40°C < T < 150°C, unless otherwise specified. j Table 4. E lectrical characteristics Symbol Parameter Test conditions Min Typ Max Unit Off Drain-source clamp V V =0V; I =3.5A 40 45 55 V CLAMP voltage IN D Drain-source clamp V V =0V; I =2mA 36 V CLTH threshold voltage IN D V Input threshold voltage V =V ; I =1mA 0.5 2.5 V INTH DS IN D Supply current from input I V =0V; V =5V 100 150 µA ISS pin DS IN Input-source clamp IIN=1mA 6 6.8 8 V V INCL voltage I =-1mA -1.0 -0.3 V IN Zero input voltage drain VDS=13V; VIN=0V; Tj=25°C 30 µA I DSS current (VIN=0V) VDS=25V; VIN=0V 75 µA On Static drain-source on VIN=5V; ID=3.5A; Tj=25°C 65 mΩ R DS(on) resistance V =5V; I =3.5A 130 mΩ IN D Dynamic (T =25°C, unless otherwise specified) j Forward g (1) V =13V; I =3.5A 9 S fs transconductance DD D C Output capacitance V =13V; f=1MHz; V =0V 220 pF OSS DS IN Doc ID 15632 Rev 4 7/29

Electrical specifications VNN7NV04P-E, VNS7NV04P-E Table 4. Electrical characteristics (continued) Symbol Parameter Test conditions Min Typ Max Unit Switching (Tj=25°C, unless otherwise specified) t Turn-on delay time 100 300 ns d(on) V =15V; I =3.5A; t Rise time DD D 470 1500 ns r V =5V; R =R =150Ω; gen gen IN MIN t Turn-off delay time 500 1500 ns d(off) (see figure Figure4) t Fall time 350 1000 ns f t Turn-on delay time 0.75 2.3 µs d(on) V =15V; I =3.5A; t Rise time DD D 4.6 14.0 µs r V =5V; R =2.2KΩ; gen gen t Turn-off delay time 5.4 16.0 µs d(off) (see figure Figure4) t Fall time 3.6 11.0 µs f V =15V; I =3.5A; V =5V; (dI/dt) Turn-on current slope DD D gen 6.5 A/µs on R =R =150Ω gen IN MIN V =12V; I =3.5A; V =5V; Q Total input charge DD D IN 18 nC i I =2.13mA (see figure Figure7) gen Source drain diode (T =25°C, unless otherwise specified) j V (1) Forward on voltage I =3.5A; V =0V 0.8 V SD SD IN t Reverse recovery time 220 ns rr I =3.5A; dI/dt=20A/µs; SD Q Reverse recovery charge V =30V; L=200µH; 0.28 µC rr DD (see test circuit, figure Figure5) I Reverse recovery current 2.5 A RRM Protections (-40°C < T < 150°C, unless otherwise specified) j I Drain current limit V =5V; V =13V 6 9 12 A lim IN DS Step response current t V =5V; V =13V 4.0 µs dlim limit IN DS Overtemperature T 150 175 200 °C jsh shutdown T Overtemperature reset 135 °C jrs I Fault sink current V =5V; V =13V; T =T 15 mA gf IN DS j jsh starting T =25°C; V =24V; V =5V; Single pulse avalanche j DD IN E R =R =150Ω; L=24mH; 200 mJ as energy gen IN MIN (see Figure6 and Figure8) 1. Pulsed: Pulse duration = 300µs, duty cycle 1.5% 8/29 Doc ID 15632 Rev 4

VNN7NV04P-E, VNS7NV04P-E Protection features 3 Protection features During normal operation, the input pin is electrically connected to the gate of the internal Power MOSFET through a low impedance path. The device then behaves like a standard Power MOSFET and can be used as a switch from DC up to 50kHz. The only difference from the user’s standpoint is that a small DC current I (typ. 100µA) flows into the input pin in order to supply the internal circuitry. ISS The device integrates: ● Overvoltage clamp protection: internally set at 45V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. ● Linear current limiter circuit: limits the drain current I to I whatever the input pin D lim voltages. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold T . jsh ● Overtemperature and short circuit protection: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs in the range 150 to 190°C, a typical value being 170°C. The device is automatically restarted when the chip temperature falls of about 15°C below shutdown temperature. ● Status feedback: in the case of an overtemperature fault condition (T > T ), the device j jsh tries to sink a diagnostic current I through the input pin in order to indicate fault gf condition. If driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. If the drive impedance is high enough so that the input pin driver is not able to supply the current I , the input pin falls to 0V. This gf however not affects the device operation: no requirement is put on the current capability of the input pin driver except to be able to supply the normal operation drive current I . ISS Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL logic circuit. Doc ID 15632 Rev 4 9/29

Protection features VNN7NV04P-E, VNS7NV04P-E Figure 4. Switching time test circuit for resistive load I D 90% tr 10% tf t V td(on) td(off) gen t Figure 5. Test circuit for diode recovery times A A D I OMNIFET FDAIOSDTE L=100uH S B B 150Ω D Rgen VDD I OMNIFET Vgen S 8.5 Ω 10/29 Doc ID 15632 Rev 4

VNN7NV04P-E, VNS7NV04P-E Protection features Figure 6. Unclamped inductive load test Figure 7. Input charge test circuit circuits VIN RGEN VIN PW Figure 8. Unclamped inductive waveforms Doc ID 15632 Rev 4 11/29

Protection features VNN7NV04P-E, VNS7NV04P-E 3.1 Electrical characteristics curves Figure 9. Derating curve Figure 10. Transconductance Gfs (S) 20 18 Vds=13V 16 Tj=-40ºC 14 Tj=25ºC Tj=150ºC 12 10 8 6 4 2 0 0 1 2 3 4 5 6 7 8 Id(A) Figure 11. Static drain-source on resistance Figure 12. Static drain-source on resistance vs input voltage (part 1/2) vs input voltage (part 2/2) Rds(on) (mOhm) Rds(on) (mOhm) 140 120 110 Id=3.5A 120 100 Tj=150ºC 90 100 Tj=150ºC 80 Id=6A 70 80 Id=1A 60 50 60 Tj=25ºC Tj=25ºC 40 40 Tj=-40ºC Id=6A 30 Id=1A Tj= - 40ºC Id=6A 20 20 Id=1A 10 0 0 3 3.5 4 4.5 5 5.5 6 6.5 7 3 3.5 4 4.5 5 5.5 6 6.5 Vin(V) Vin(V) Figure 13. Source-drain diode forward Figure 14. Static drain source on resistance characteristics Vsd (mV) Rds(on) (mohms) 1000 150 950 Vin=0V 900 125 Vin=5V 850 100 Tj=150ºC 800 750 75 700 50 650 Tj=25ºC 600 Tj=-40ºC 25 550 500 0 0 2 4 6 8 10 12 14 0 1 2 3 4 5 6 Id(A) Id(A) 12/29 Doc ID 15632 Rev 4

VNN7NV04P-E, VNS7NV04P-E Protection features Figure 15. Turn-on current slope (part 1/2) Figure 16. Turn-on current slope (part 2/2) di/dt(A/us) di/dt(A/us) 2.25 8 2 7 Vin=3.5V Vin=5V 1.75 Vdd=15V 6 Vdd=15V Id=3.5A Id=3.5A 1.5 5 1.25 4 1 3 0.75 2 0.5 1 0.25 0 100 200 300 400 500 600 700 800 900 1000 1100 100 200 300 400 500 600 700 800 900 1000 1100 Rg(ohm) Rg(ohm) Figure 17. Transfer characteristics Figure 18. Static drain-source on resistance vs Id Idon(A) Rds(on) (mOhm) 10 140 Tj=25ºC 9 Vds=13.5V Tj=-40ºC 120 8 Tj=150ºC Vin=3.5V 7 100 Tj=150ºC Vin=5V 6 80 5 60 Vin=3.5V 4 Tj=25ºC 3 40 VViinn==53V.5V 2 Tj=-40ºC Vin=5V 20 1 0 0 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 Vin(V) Id(A) Figure 19. Input voltage vs input charge Figure 20. Turn-off drain source voltage slope (part 1/2) dv/dt(V/us) Vin(V) 300 8 7 250 Vds=12V 6 Id=3.5A Vin=5V 200 Vdd=15V 5 Id=3.5A 150 4 3 100 2 50 1 0 0 100 200 300 400 500 600 700 800 900 1000 1100 0 5 10 15 20 25 Rg(ohm) Qg(nC) Doc ID 15632 Rev 4 13/29

Protection features VNN7NV04P-E, VNS7NV04P-E Figure 21. Turn-off drain source voltage slope Figure 22. Capacitance variations (part 2/2) dv/dt(v/us) C(pF) 300 600 250 500 Vin=3.5V f=1MHz 200 Vdd=15V Vin=0V Id=3.5A 400 150 300 100 50 200 0 100 100 200 300 400 500 600 700 800 900 1000 1100 0 5 10 15 20 25 30 35 Rg(ohm) Vds(V) Figure 23. Output characteristics Figure 24. Normalized on resistance vs temperature v ID(A) Rds(on) 12 2.25 11 2 10 Vin=5V 9 Vin=5V Id=3.5A Vin=4.5V 1.75 8 Vin=4V 7 1.5 6 Vin=3V 5 1.25 4 1 3 Vin=2.5V 2 0.75 1 Vin=2V 0 0.5 0 1 2 3 4 5 6 7 8 9 10 11 12 13 -50 -25 0 25 50 75 100 125 150 175 VDS(V) T(ºC) Figure 25. Switching time resistive load (part Figure 26. Switching time resistive load (part 1/2) 2/2) t(us) t(ns) 5.5 1600 tr 5 Vdd=15V tr 1400 4.5 Id=3.5A td(off) Vdd=15V 4 Vin=5V 1200 Id=3.5A tf Rg=150ohm 3.5 1000 3 2.5 800 2 600 1.5 td(off) 400 1 td(on) tf 0.5 200 0 td(on) 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 0 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 Rg(ohm) Vin(V) 14/29 Doc ID 15632 Rev 4

VNN7NV04P-E, VNS7NV04P-E Protection features Figure 27. Normalized input threshold voltage Figure 28. Normalized current limit vs junction vs temperature temperature Vin(th) Ilim (A) 1.15 15 1.1 14 Vds=Vin 13 Vds=13V 1.05 Vin=5V Id=1mA 12 1 11 0.95 10 0.9 9 0.85 8 0.8 7 0.75 6 0.7 5 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 T(ºC) Tj (ºC) Figure 29. Step response current limit Tdlim(us) 7 6.5 Vin=5V Rg=150ohm 6 5.5 5 4.5 4 3.5 5 10 15 20 25 30 35 Vdd(V) Doc ID 15632 Rev 4 15/29

Protection features VNN7NV04P-E, VNS7NV04P-E 3.2 SO-8 maximum demagnetization energy Figure 30. SO-8 maximum turn-off current versus load inductance ILMAX (A) 100 10 A B C 1 0.1 1 10 100 L(mH) Legend A = Single Pulse at T =150°C Jstart B = Repetitive pulse at T =100°C Jstart C = Repetitive Pulse at T =125°C Jstart Conditions: V =13.5V CC Values are generated with R =0Ω. In case of repetitive pulses, T (at beginning of each L jstart demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. Figure 31. SO-8 demagnetization V , I IN L Demagnetization Demagnetization Demagnetization t 16/29 Doc ID 15632 Rev 4

VNN7NV04P-E, VNS7NV04P-E Protection features 3.3 SOT-223 maximum demagnetization energy Figure 32. SOT-223 maximum turn-off current versus load inductance ILMAX (A) 100 10 1 0.01 0.1 1 10 L(mH) Legend A = Single Pulse at T =150°C Jstart B = Repetitive pulse at T =100°C Jstart C = Repetitive Pulse at T =125°C Jstart Conditions: V =13.5V CC Values are generated with R =0Ω. In case of repetitive pulses, T (at beginning of each L jstart demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. Figure 33. SOT-223 demagnetization V , I IN L Demagnetization Demagnetization Demagnetization t Doc ID 15632 Rev 4 17/29

Package and PCB thermal data VNN7NV04P-E, VNS7NV04P-E 4 Package and PCB thermal data 4.1 SO-8 thermal data Figure 34. SO-8 PC board Note: Layout condition of R and Z measurements (PCB FR4 area=58mm x 58mm, PCB th th thickness=2mm, Cu thickness=35µm, Copper areas: 0.14cm2, 0.8cm2, 2cm2). Figure 35. R vs PCB copper area in open box free air condition thj-amb RTHj_amb (ºC/W) SO-8 at 2 pins connected to TAB 110 105 100 95 90 85 80 75 70 0 0.5 1 1.5 2 2.5 PCB Cu heatsink area (cm^2) 18/29 Doc ID 15632 Rev 4

VNN7NV04P-E, VNS7NV04P-E Package and PCB thermal data Figure 36. SO-8 thermal impedance junction ambient single pulse ZTH (°C/W) 1000 100 10 1 0.1 0.0001 0.001 0.01 0.1 1 10 100 1000 Time (s) Figure 37. Thermal fitting model of an OMNIFET II in SO-8 Tj C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd T_amb Equation 1Pulse calculation formula Z = R ⋅δ+Z (1–δ) THδ TH THtp where δ = t ⁄T p T able 5. SO-8 thermal parameter Area/island (cm2) Footprint 2 R1 (°C/W) 0.2 R2 (°C/W) 0.9 R3 (°C/W) 3.5 R4 (°C/W) 21 R5 (°C/W) 16 R6 (°C/W) 58 28 C1 (W.s/°C) 3.00E-04 Doc ID 15632 Rev 4 19/29

Package and PCB thermal data VNN7NV04P-E, VNS7NV04P-E Table 5. SO-8 thermal parameter (continued) Area/island (cm2) Footprint 2 C2 (W.s/°C) 9.00E-04 C3 (W.s/°C) 7.50E-03 C4 (W.s/°C) 0.045 C5 (W.s/°C) 0.35 C6 (W.s/°C) 1.05 2 4.2 SOT-223 thermal data Figure 38. SOT-223 PC board Note: Layout condition of R and Z measurements (PCB FR4 area=58mm x 58mm, PCB th th thickness=2mm, Cu thickness=35µm, Copper areas: 0.11cm2, 1cm2, 2cm2). Figure 39. R vs PCB copper area in open box free air condition thj-amb RTH j-amb (°C/W) 140 130 120 110 100 90 80 70 60 0 0.5 1 1.5 2 2.5 Cu area (cm^2) 20/29 Doc ID 15632 Rev 4

VNN7NV04P-E, VNS7NV04P-E Package and PCB thermal data Figure 40. SOT-223 thermal impedance junction ambient single pulse ZTH (°C/W) 1000 100 10 1 0.1 0.0001 0.001 0.01 0.1 1 10 100 1000 Time (s) Figure 41. Thermal fitting model of an OMNIFET II in SOT-223 Tj C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd T_amb Equation 2Pulse calculation formula Z = R ⋅δ+Z (1–δ) THδ TH THtp where δ = t ⁄T p Doc ID 15632 Rev 4 21/29

Package and PCB thermal data VNN7NV04P-E, VNS7NV04P-E T able 6. SOT-223 thermal parameter Area/island (cm2) Footprint 2 R1 (°C/W) 0.2 R2 (°C/W) 1.1 R3 (°C/W) 4.5 R4 (°C/W) 24 R5 (°C/W) 0.1 R6 (°C/W) 100 45 C1 (W.s/°C) 3.00E-04 C2 (W.s/°C) 9.00E-04 C3 (W.s/°C) 3.00E-02 C4 (W.s/°C) 0.16 C5 (W.s/°C) 1000 C6 (W.s/°C) 0.5 2 22/29 Doc ID 15632 Rev 4

VNN7NV04P-E, VNS7NV04P-E Package and packing information 5 Package and packing information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 5.1 SOT-223 mechanical data T able 7. SOT-223 mechanical data millimeters Symbol Min. Typ. Max. A 1.8 B 0.6 0.7 0.85 B1 2.9 3 3.15 c 0.24 0.26 0.35 D 6.3 6.5 6.7 e 2.3 e1 4.6 E 3.3 3.5 3.7 H 6.7 7 7.3 V 10 (max) A1 0.02 0.1 Figure 42. SOT-223 package dimensions 0046067 Doc ID 15632 Rev 4 23/29

Package and packing information VNN7NV04P-E, VNS7NV04P-E 5.2 SO-8 mechanical data T able 8. SO-8 mechanical data mm Dim. Min. Typ. Max. A 1.75 a1 0.1 0.25 a2 1.65 a3 0.65 0.85 b 0.35 0.48 b1 0.19 0.25 C 0.25 0.5 c1 45 (typ.) D 4.8 5 E 5.8 6.2 e 1.27 e3 3.81 F 3.8 4 L 0.4 1.27 M 0.6 S 8 (max.) L1 0.8 1.2 24/29 Doc ID 15632 Rev 4

VNN7NV04P-E, VNS7NV04P-E Package and packing information Figure 43. SO-8 package dimensions Doc ID 15632 Rev 4 25/29

Package and packing information VNN7NV04P-E, VNS7NV04P-E 5.3 SOT-223 packing information Figure 44. SOT-223 tape and reel shipment (suffix “TR”) REEL DIMENSIONS Base Q.ty 1000 Bulk Q.ty 1000 A (max) 330 B (min) 1.5 C (± 0.2) 13 F 20.2 G (+ 2 / -0) 12.4 N (min) 60 T (max) 18.4 TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width W 12 Tape Hole Spacing P0 (± 0.1) 4 Component Spacing P 8 Hole Diameter D (± 0.1/-0) 1.5 Hole Diameter D1 (min) 1.5 Hole Position F (± 0.05) 5.5 Compartment Depth K (max) 4.5 Hole Spacing P1 (± 0.1) 2 All dimensions are in mm. End Start Top No components Components No components cover tape 500mm min Empty components pockets 500mm min saled with cover tape. User direction of feed 26/29 Doc ID 15632 Rev 4

VNN7NV04P-E, VNS7NV04P-E Package and packing information 5.4 SO-8 packing information Figure 45. SO-8 tube shipment (no suffix) B C Base Q.ty 100 Bulk Q.ty 2000 Tube length (± 0.5) 532 A A 3.2 B 6 C (± 0.1) 0.6 Figure 46. SO-8 tape and reel shipment (suffix “TR”) REEL DIMENSIONS Base Q.ty 2500 Bulk Q.ty 2500 A (max) 330 B (min) 1.5 C (± 0.2) 13 F 20.2 G (+ 2 / -0) 12.4 N (min) 60 T (max) 18.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width W 12 Tape Hole Spacing P0 (± 0.1) 4 Component Spacing P 8 Hole Diameter D (± 0.1/-0) 1.5 Hole Diameter D1 (min) 1.5 Hole Position F (± 0.05) 5.5 Compartment Depth K (max) 4.5 Hole Spacing P1 (± 0.1) 2 All dimensions are in mm. End Start Top No components Components No components cover tape 500mm min Empty components pockets 500mm min saled with cover tape. User direction of feed Doc ID 15632 Rev 4 27/29

Revision history VNN7NV04P-E, VNS7NV04P-E 6 Revision history T able 9. Document revision history Date Revision Changes 15-Oct-2009 1 Initial release. Updated Figure43: SO-8 package dimensions. 26-Oct-2009 2 Updated Table8: SO-8 mechanical data. Table4: Electrical characteristics: 05-Jul-2011 3 – R : updated maximum values DS(on) – t , t, t , t: updated min, typ and max values d(on) r d(off) f 18-Sep-2013 4 Updated Disclaimer. 28/29 Doc ID 15632 Rev 4

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