VIPER16 Fixed frequency VIPer™ plus family Datasheet - production data • Standby power < 30 mW at 230 V AC • Limiting current with adjustable set point • On-board soft-start • Safe auto-restart after a fault condition (cid:39)(cid:44)(cid:51)(cid:16)(cid:26) • Hysteretic thermal shutdown (cid:54)(cid:50)(cid:20)(cid:25)(cid:3)(cid:3)(cid:81)(cid:68)(cid:85)(cid:85)(cid:82)(cid:90) Application Figure 1. Typical application • Replacement of capacitive power supply • Auxiliary power supply for appliances, • Power metering • LED drivers Description The device is an off-line converter with an 800 V avalanche ruggedness power section, a PWM controller, user defined overcurrent limit, protection against feedback network disconnection, hysteretic thermal protection, soft Features start up and safe auto restart after any fault • 800 V avalanche rugged power section condition. It is able to power itself directly from the rectified mains, eliminating the need for an • PWM operation with frequency jittering for low auxiliary bias winding. Advance frequency jittering EMI reduces EMI filter cost. Burst mode operation and • Operating frequency: the devices very low consumption both help to – 60 kHz for L type meet the standard set by energy saving regulations. – 115 kHz for H type • No need of auxiliary winding for low power application Table 1. Device summary Order codes Package Packaging VIPER16LN DIP-7 Tube VIPER16HN VIPER16HD Tube VIPER16HDTR Tape and reel SO16 narrow VIPER16LD Tube VIPER16LDTR Tape and reel June 2014 DocID15232 Rev 7 1/30 This is information on a product in full production. www.st.com

Contents VIPER16 Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 Typical power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 Typical electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6 Typical circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8 High voltage current generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 9 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 10 Soft start-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 11 Adjustable current limit set point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 12 FB pin and COMP pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 13 Burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 14 Automatic auto restart after overload or short-circuit . . . . . . . . . . . . . 20 15 Open loop failure protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 2/30 DocID15232 Rev 7

VIPER16 Contents 16 Layout guidelines and design recommendations . . . . . . . . . . . . . . . . 23 17 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 DocID15232 Rev 7 3/30 30

Block diagram VIPER16 1 Block diagram Figure 2. Block diagram 2 Typical power Table 2. Typical power 230 V 85-265 V AC AC Part number Adapter(1) Open frame(2) Adapter(1) Open frame(2) VIPER16 9 W 10 W 5 W 6 W 1. Typical continuous power in non ventilated enclosed adapter measured at 50 °C ambient. 2. Maximum practical continuous power in an open frame design at 50 °C ambient, with adequate heat sinking. 4/30 DocID15232 Rev 7

VIPER16 Pin settings 3 Pin settings Figure 3. Connection diagram (top view) (cid:39)(cid:53)(cid:36)(cid:44)(cid:49) (cid:39)(cid:53)(cid:36)(cid:44)(cid:49) (cid:39)(cid:53)(cid:36)(cid:44)(cid:49) (cid:49)(cid:17)(cid:38)(cid:17) (cid:39)(cid:53)(cid:36)(cid:44)(cid:49) (cid:39)(cid:53)(cid:36)(cid:44)(cid:49) (cid:49)(cid:17)(cid:36)(cid:17) (cid:39)(cid:53)(cid:36)(cid:44)(cid:49) (cid:36)(cid:48)(cid:19)(cid:20)(cid:19)(cid:28)(cid:27)(cid:89)(cid:20) Note: The copper area for heat dissipation has to be designed under the DRAIN pins. Table 3. Pin description Pin N. Name Function DIP-7 SO16 Connected to the source of the internal power MOSFET and controller 1 1-2 GND ground reference. Not available for user. This pin is mechanically connected to the - 4 N.A. controller die pad of the frame. In order to improve the noise immunity, is highly recommended connect it to GND (pin 1-2). Supply voltage of the control section. This pin provides the charging 2 5 VDD current of the external capacitor. This pin allows setting the drain current limitation to a lower value respect to I , which is the default one. The limit can be reduced by Dlim connecting an external resistor between this pin and GND. In case of 3 6 LIM high electrical noise, a capacitor could be connected between this pin and GND, the capacitor value must be lower than 470 nF in order to not impact the functionality of the pin. The pin can be left open if default drain current limitation, I , is used. Dlim Inverting input of the internal trans conductance error amplifier. Connecting the converter output to this pin through a single resistor 4 7 FB results in an output voltage equal to the error amplifier reference voltage (see V on Table8). An external resistors divider is FB_REF required for higher output voltages. DocID15232 Rev 7 5/30 30

Pin settings VIPER16 Table 3. Pin description (continued) Pin N. Name Function DIP-7 SO16 Output of the internal trans conductance error amplifier. The compensation network have to be placed between this pin and GND to achieve stability and good dynamic performance of the voltage control 5 8 COMP loop. The pin is used also to directly control the PWM with an optocoupler. The linear voltage range extends from V to COMPL V (Table8). COMPH High voltage drain pin. The built-in high voltage switched start-up bias 7,8 13-16 DRAIN current is drawn from this pin too. Pins connected to the metal frame to facilitate heat dissipation. 6/30 DocID15232 Rev 7

VIPER16 Electrical data 4 Electrical data 4.1 Maximum ratings Table 4. Absolute maximum ratings Value Pin Symbol Parameter Unit (DIP-7) Min Max V 7, 8 Drain-to-source (ground) voltage 800 V DRAIN E 7, 8 Repetitive avalanche energy (limited by T = 150 °C) 2 mJ AV J I 7, 8 Repetitive avalanche current (limited by T = 150 °C) 1 A AR J I 7, 8 Pulse drain current (limited by T = 150 °C) 2.5 A DRAIN J V 5 Input pin voltage -0.3 3.5 V COMP V 4 Input pin voltage -0.3 4.8 V FB V 3 Input pin voltage -0.3 2.4 V LIM Self V 2 Supply voltage -0.3 V DD limited I 2 Input current 20 mA DD Power dissipation at T < 40 °C (DIP-7) 1 W A P TOT Power dissipation at T < 60 °C (SO16N) 1 W A T Operating junction temperature range -40 150 °C J T Storage temperature -55 150 °C STG ESD 1 to 8 Human body model 4 kV (HBM) ESD 1 to 8 Charge device model 1.5 kV (CDM) 4.2 Thermal data Table 5. Thermal data Max value Max value Symbol Parameter Unit SO16N DIP-7 Thermal resistance junction pin R 35 40 °C/W thJP (Dissipated power = 1 W) Thermal resistance junction ambient R 90 110 °C/W thJA (Dissipated power = 1 W) Thermal resistance junction ambient (1) R 80 90 °C/W thJA (Dissipated power = 1 W) 1. When mounted on a standard single side FR4 board with 100 mm2 (0.155 sq in) of Cu (35 μm thick) DocID15232 Rev 7 7/30 30

Electrical data VIPER16 4.3 Electrical characteristics (T = -25 to 125 °C, V = 14 V (a); unless otherwise specified) J DD Table 6. Power section Symbol Parameter Test condition Min Typ Max Unit I = 1 mA, V Break-down voltage DRAIN 800 V BVDSS V = GND, T = 25 °C COMP J I = 0.2 A, T = 25 °C 20 24 Ω DRAIN J R Drain-source on state resistance DS(on) I = 0.2 A, T = 125 °C 40 48 Ω DRAIN J C Effective (energy related) output capacitance V = 0 to 640 V 10 pF OSS DRAIN V = 640 V DRAIN 60 μA V = GND FB I OFF state drain current OFF V = 800 V DRAIN 75 μA V = GND FB Table 7. Supply section Symbol Parameter Test condition Min Typ Max Unit Voltage V Drain-source start voltage 40 50 60 V DRAIN_START V = 100 V to 640 V, I Start up charging current DRAIN -0.6 -1.8 mA DDch1 V = 4 V DD V = 100 V to 640 V, I Charging current during operation DRAIN -7 -14 mA DDch2 V = 9 V falling edge DD V Operating voltage range 11.5 23.5 V DD V V clamp voltage I = 15 mA 23.5 V DDclamp DD DD V V start up threshold 12 13 14 V DDon DD VDD on internal high voltage current V 9.5 10.5 11.5 V DDCSon generator threshold V V under voltage shutdown threshold 7 8 9 V DDoff DD a. Adjust V above V start-up threshold before setting to 14 V DD DDon 8/30 DocID15232 Rev 7

VIPER16 Electrical data Table 7. Supply section (continued) Symbol Parameter Test condition Min Typ Max Unit Current I Operating supply current, not switching F = 0 kHz, V = GND 0.6 mA DD0 OSC COMP V = 120 V, DRAIN 1.3 mA F = 60 kHz SW I Operating supply current, switching DD1 V = 120 V, DRAIN 1.5 mA F = 115 kHz SW I Operating supply current with V < V V < V 0.35 mA DDoff DD DDoff DD DDoff V = V I Open loop failure current threshold DD DDclamp 4 mA DDol V = 3.3 V, COMP Table 8. Controller section Symbol Parameter Test condition Min Typ Max Unit Error amplifier V FB reference voltage 3.2 3.3 3.4 V REF_FB I Current pull up -1 μA FB_PULL UP G Trans conductance 2 mA/V M Current setting (LIM) pin V Low level clamp voltage I = -100 μA 0.5 V LIM_LOW LIM Compensation (COMP) pin V Upper saturation limit T = 25 °C 3 V COMPH J V Burst mode threshold T = 25 °C 1 1.1 1.2 V COMPL J V Burst mode hysteresis T = 25 °C 40 mV COMPL_HYS J H ΔV / ΔI 4 9 V/A COMP COMP DRAIN R Dynamic resistance V = GND 15 kΩ COMP(DYN) FB Source / sink current V > 100 mV 150 μA FB I COMP Max source current V = GND, V = GND 220 μA COMP FB Current limitation I = -10 μA, V = 3.3 V, I Drain current limitation LIM COMP 0.38 0.4 0.42 A Dlim T = 25 °C J t Soft-start time 8.5 ms SS T Minimum turn ON time 220 450 ns ON_MIN I Burst mode current limitation V = V 85 mA Dlim_bm COMP COMPL Overload t Overload time 50 ms OVL t Restart time after fault 1 s RESTART DocID15232 Rev 7 9/30 30

Electrical data VIPER16 Table 8. Controller section (continued) Symbol Parameter Test condition Min Typ Max Unit Oscillator section VIPer16L 54 60 66 kHz F Switching frequency OSC VIPer16H 103 115 127 kHz F = 60 kHz ±4 kHz OSC F Modulation depth D F = 115 kHz ±8 kHz OSC F Modulation frequency 230 Hz M D Maximum duty cycle 70 80 % MAX Thermal shutdown T Thermal shutdown temperature(1) 150 160 °C SD T Thermal shutdown hysteresis(1) 30 °C HYST 1. Specification assured by design, characterization and statistical correlation. 10/30 DocID15232 Rev 7

VIPER16 Typical electrical characteristics 5 Typical electrical characteristics Figure 4. IDlim vs T Figure 5. F vs T J OSC J (cid:20)(cid:17)(cid:19)(cid:23) (cid:44)(cid:39)(cid:79)(cid:76)(cid:80)(cid:18)(cid:3)(cid:44)(cid:39)(cid:79)(cid:76)(cid:80)(cid:35)(cid:21)(cid:24)(cid:131)(cid:38) (cid:20)(cid:17)(cid:19)(cid:23) (cid:41)(cid:50)(cid:54)(cid:38)(cid:3)(cid:18)(cid:3)(cid:41)(cid:50)(cid:54)(cid:38)(cid:35)(cid:21)(cid:24)(cid:131)(cid:38) (cid:20)(cid:17)(cid:19)(cid:21) (cid:20)(cid:17)(cid:19)(cid:21) (cid:20)(cid:17)(cid:19)(cid:19) (cid:20)(cid:17)(cid:19)(cid:19) (cid:19)(cid:17)(cid:28)(cid:27) (cid:19)(cid:17)(cid:28)(cid:27) (cid:19)(cid:17)(cid:28)(cid:25) (cid:19)(cid:17)(cid:28)(cid:25) (cid:19)(cid:17)(cid:28)(cid:23) (cid:19)(cid:17)(cid:28)(cid:21) (cid:19)(cid:17)(cid:28)(cid:23) (cid:16)(cid:24)(cid:19) (cid:19) (cid:24)(cid:19) (cid:20)(cid:19)(cid:19) (cid:20)(cid:24)(cid:19) (cid:16)(cid:24)(cid:19) (cid:19) (cid:24)(cid:19) (cid:20)(cid:19)(cid:19) (cid:20)(cid:24)(cid:19) (cid:55)(cid:45)(cid:3)(cid:62)(cid:131)(cid:38)(cid:64) (cid:55)(cid:45)(cid:3)(cid:62)(cid:131)(cid:38)(cid:64) (cid:36)(cid:48)(cid:19)(cid:20)(cid:20)(cid:23)(cid:23)(cid:89)(cid:20) (cid:36)(cid:48)(cid:19)(cid:20)(cid:20)(cid:23)(cid:24)(cid:89)(cid:20) Figure 6. V vs T Figure 7. H vs T DRAIN_START J COMP J (cid:20)(cid:17)(cid:19)(cid:21)(cid:19) (cid:57)(cid:39)(cid:53)(cid:36)(cid:44)(cid:49)(cid:66)(cid:54)(cid:55)(cid:36)(cid:53)(cid:55)(cid:3)(cid:18)(cid:3)(cid:57)(cid:39)(cid:53)(cid:36)(cid:44)(cid:49)(cid:66)(cid:54)(cid:55)(cid:36)(cid:53)(cid:55)(cid:35)(cid:21)(cid:24)(cid:131)(cid:38) (cid:20)(cid:17)(cid:22)(cid:19) (cid:20)(cid:17)(cid:19)(cid:20)(cid:19) (cid:20)(cid:17)(cid:21)(cid:19) (cid:20)(cid:17)(cid:19)(cid:19)(cid:19) (cid:20)(cid:17)(cid:20)(cid:19) (cid:19)(cid:17)(cid:28)(cid:28)(cid:19) (cid:20)(cid:17)(cid:19)(cid:19) (cid:19)(cid:17)(cid:28)(cid:27)(cid:19) (cid:19)(cid:17)(cid:28)(cid:19) (cid:19)(cid:17)(cid:28)(cid:26)(cid:19) (cid:19)(cid:17)(cid:28)(cid:25)(cid:19) (cid:19)(cid:17)(cid:27)(cid:19) (cid:16)(cid:24)(cid:19) (cid:19) (cid:24)(cid:19) (cid:20)(cid:19)(cid:19) (cid:20)(cid:24)(cid:19) (cid:16)(cid:24)(cid:19) (cid:19) (cid:24)(cid:19) (cid:20)(cid:19)(cid:19) (cid:20)(cid:24)(cid:19) (cid:55)(cid:45)(cid:3)(cid:62)(cid:131)(cid:38)(cid:64) (cid:55)(cid:45)(cid:3)(cid:62)(cid:131)(cid:38)(cid:64) (cid:36)(cid:48)(cid:19)(cid:20)(cid:20)(cid:23)(cid:25)(cid:89)(cid:20) (cid:36)(cid:48)(cid:19)(cid:20)(cid:20)(cid:23)(cid:26)(cid:89)(cid:20) Figure 8. G vs T Figure 9. V vs T M J REF_FB J (cid:20)(cid:17)(cid:20)(cid:19) (cid:42)(cid:48)(cid:3)(cid:18)(cid:3)(cid:42)(cid:48)(cid:35)(cid:21)(cid:24)(cid:131)(cid:38) (cid:57)(cid:53)(cid:40)(cid:41)(cid:66)(cid:41)(cid:37)(cid:3)(cid:18)(cid:3)(cid:57)(cid:53)(cid:40)(cid:41)(cid:66)(cid:41)(cid:37)(cid:35)(cid:21)(cid:24)(cid:131)(cid:38) (cid:20)(cid:17)(cid:19)(cid:27) (cid:20)(cid:17)(cid:19)(cid:24) (cid:20)(cid:17)(cid:19)(cid:23) (cid:20)(cid:17)(cid:19)(cid:19) (cid:20)(cid:17)(cid:19)(cid:19) (cid:19)(cid:17)(cid:28)(cid:25) (cid:19)(cid:17)(cid:28)(cid:24) (cid:19)(cid:17)(cid:28)(cid:21) (cid:19)(cid:17)(cid:28)(cid:19) (cid:19)(cid:17)(cid:27)(cid:27) (cid:19)(cid:17)(cid:27)(cid:24) (cid:19)(cid:17)(cid:27)(cid:23) (cid:19)(cid:17)(cid:27)(cid:19) (cid:19)(cid:17)(cid:27)(cid:19) (cid:16)(cid:24)(cid:19) (cid:19) (cid:24)(cid:19) (cid:20)(cid:19)(cid:19) (cid:20)(cid:24)(cid:19) (cid:16)(cid:24)(cid:19) (cid:19) (cid:24)(cid:19) (cid:20)(cid:19)(cid:19) (cid:20)(cid:24)(cid:19) (cid:55)(cid:45)(cid:3)(cid:62)(cid:131)(cid:38)(cid:64) (cid:55)(cid:45)(cid:3)(cid:62)(cid:131)(cid:38)(cid:64) (cid:36)(cid:48)(cid:19)(cid:20)(cid:20)(cid:23)(cid:27)(cid:89)(cid:20) (cid:36)(cid:48)(cid:19)(cid:20)(cid:20)(cid:23)(cid:28)(cid:89)(cid:20) DocID15232 Rev 7 11/30 30

Typical electrical characteristics VIPER16 Figure 10. I vs T Figure 11. Operating supply current COMP J (no switching) vs T J (cid:44)(cid:38)(cid:50)(cid:48)(cid:51)(cid:3)(cid:18)(cid:3)(cid:44)(cid:38)(cid:50)(cid:48)(cid:51)(cid:35)(cid:21)(cid:24)(cid:131)(cid:38) (cid:44)(cid:39)(cid:39)(cid:19)(cid:3)(cid:18)(cid:3)(cid:44)(cid:39)(cid:39)(cid:19)(cid:35)(cid:21)(cid:24)(cid:131)(cid:38) (cid:20)(cid:17)(cid:19)(cid:27) (cid:20)(cid:17)(cid:19)(cid:27) (cid:20)(cid:17)(cid:19)(cid:23) (cid:20)(cid:17)(cid:19)(cid:23) (cid:20)(cid:17)(cid:19)(cid:19) (cid:20)(cid:17)(cid:19)(cid:19) (cid:19)(cid:17)(cid:28)(cid:25) (cid:19)(cid:17)(cid:28)(cid:25) (cid:19)(cid:17)(cid:28)(cid:21) (cid:19)(cid:17)(cid:28)(cid:21) (cid:19)(cid:17)(cid:27)(cid:27) (cid:19)(cid:17)(cid:27)(cid:27) (cid:19)(cid:17)(cid:27)(cid:23) (cid:19)(cid:17)(cid:27)(cid:23) (cid:19)(cid:17)(cid:27)(cid:19) (cid:19)(cid:17)(cid:27)(cid:19) (cid:16)(cid:24)(cid:19) (cid:19) (cid:24)(cid:19) (cid:20)(cid:19)(cid:19) (cid:20)(cid:24)(cid:19) (cid:16)(cid:24)(cid:19) (cid:19) (cid:24)(cid:19) (cid:20)(cid:19)(cid:19) (cid:20)(cid:24)(cid:19) (cid:55)(cid:45)(cid:3)(cid:62)(cid:131)(cid:38)(cid:64) (cid:55)(cid:45)(cid:3)(cid:62)(cid:131)(cid:38)(cid:64) (cid:36)(cid:48)(cid:19)(cid:20)(cid:20)(cid:24)(cid:19)(cid:89)(cid:20) (cid:36)(cid:48)(cid:19)(cid:20)(cid:20)(cid:24)(cid:20)(cid:89)(cid:20) Figure 12. Operating supply current (switching) Figure 13. IDlim vs R LIM vs T J (cid:20)(cid:17)(cid:20)(cid:19) (cid:44)(cid:39)(cid:39)(cid:20)(cid:3)(cid:18)(cid:3)(cid:44)(cid:39)(cid:39)(cid:20)(cid:35)(cid:21)(cid:24)(cid:131)(cid:38) (cid:20)(cid:17)(cid:20)(cid:19) (cid:44)(cid:39)(cid:79)(cid:76)(cid:80)(cid:3)(cid:18)(cid:3)(cid:44)(cid:39)(cid:79)(cid:76)(cid:80)(cid:35)(cid:20)(cid:19)(cid:19)(cid:46)(cid:50)(cid:75)(cid:80) (cid:20)(cid:17)(cid:19)(cid:24) (cid:20)(cid:17)(cid:19)(cid:19) (cid:19)(cid:17)(cid:28)(cid:19) (cid:20)(cid:17)(cid:19)(cid:19) (cid:19)(cid:17)(cid:27)(cid:19) (cid:19)(cid:17)(cid:28)(cid:24) (cid:19)(cid:17)(cid:26)(cid:19) (cid:19)(cid:17)(cid:28)(cid:19) (cid:19)(cid:17)(cid:25)(cid:19) (cid:19)(cid:17)(cid:27)(cid:24) (cid:19)(cid:17)(cid:24)(cid:19) (cid:19)(cid:17)(cid:27)(cid:19) (cid:19)(cid:17)(cid:23)(cid:19) (cid:19)(cid:17)(cid:26)(cid:24) (cid:19)(cid:17)(cid:22)(cid:19) (cid:19)(cid:17)(cid:26)(cid:19) (cid:19)(cid:17)(cid:21)(cid:19) (cid:19)(cid:17)(cid:25)(cid:24) (cid:19)(cid:17)(cid:20)(cid:19) (cid:19)(cid:17)(cid:25)(cid:19) (cid:19)(cid:17)(cid:19)(cid:19) (cid:16)(cid:24)(cid:19) (cid:19) (cid:24)(cid:19) (cid:20)(cid:19)(cid:19) (cid:20)(cid:24)(cid:19) (cid:19) (cid:21)(cid:19) (cid:23)(cid:19) (cid:25)(cid:19) (cid:27)(cid:19) (cid:20)(cid:19)(cid:19) (cid:55)(cid:45)(cid:3)(cid:62)(cid:131)(cid:38)(cid:64) (cid:53)(cid:79)(cid:76)(cid:80)(cid:3)(cid:62)(cid:78)(cid:50)(cid:75)(cid:80)(cid:64) (cid:36)(cid:48)(cid:19)(cid:20)(cid:20)(cid:24)(cid:21)(cid:89)(cid:20) (cid:36)(cid:48)(cid:19)(cid:20)(cid:20)(cid:24)(cid:22)(cid:89)(cid:20) Figure 14. Power MOSFET on-resistance vs T Figure 15. Power MOSFET break down voltage J vs T J 12/30 DocID15232 Rev 7

VIPER16 Typical electrical characteristics Figure 16. Thermal shutdown V DD V DDon V DDCSon V DDoff I time DRAIN time T J T SD TSD -THYST time Normal operation Shut down after over temperature Normal operation DocID15232 Rev 7 13/30 30

Typical circuit VIPER16 6 Typical circuit Figure 17. Buck converter (cid:39)(cid:21) (cid:11)(cid:82)(cid:83)(cid:87)(cid:76)(cid:82)(cid:81)(cid:68)(cid:79)(cid:12) (cid:53)(cid:73)(cid:69)(cid:20) (cid:36)(cid:38)(cid:3)(cid:44)(cid:49) (cid:39)(cid:76)(cid:81) (cid:53)(cid:76)(cid:81) (cid:47)(cid:20) (cid:57)(cid:44)(cid:51)(cid:72)(cid:85)(cid:20)(cid:25) (cid:57)(cid:39)(cid:39) (cid:39)(cid:53)(cid:36)(cid:44)(cid:49) (cid:48)(cid:20) (cid:53)(cid:73)(cid:69)(cid:21) (cid:38)(cid:23) (cid:41)(cid:37) (cid:38)(cid:20) (cid:38)(cid:50)(cid:49)(cid:55)(cid:53)(cid:50)(cid:47) (cid:38)(cid:21) (cid:38)(cid:22) (cid:38)(cid:73)(cid:69) (cid:38)(cid:50)(cid:48)(cid:51) (cid:47)(cid:44)(cid:48) (cid:42)(cid:49)(cid:39) (cid:39)(cid:20) (cid:53)(cid:70)(cid:82)(cid:80)(cid:83) (cid:38)(cid:70)(cid:82)(cid:80)(cid:83) (cid:11)(cid:38)(cid:82)(cid:83)(cid:47)(cid:87)(cid:44)(cid:76)(cid:48)(cid:82)(cid:81)(cid:68)(cid:79)(cid:12) (cid:53)(cid:11)(cid:82)(cid:47)(cid:83)(cid:44)(cid:87)(cid:48)(cid:76)(cid:82)(cid:81)(cid:68)(cid:79)(cid:12) (cid:47)(cid:82)(cid:88)(cid:87) (cid:14) (cid:39)(cid:82)(cid:88)(cid:87) (cid:38)(cid:82)(cid:88)(cid:87) (cid:57)(cid:50)(cid:56)(cid:55) (cid:17) (cid:42)(cid:53)(cid:50)(cid:56)(cid:49)(cid:39) (cid:16) (cid:36)(cid:48)(cid:19)(cid:20)(cid:20)(cid:28)(cid:23)(cid:89)(cid:20) Figure 18. Buck boost converter (cid:36)(cid:38)(cid:3)(cid:44)(cid:49) (cid:53)(cid:76)(cid:81) (cid:39)(cid:76)(cid:81) (cid:47)(cid:20) (cid:57)(cid:44)(cid:51)(cid:72)(cid:85)(cid:20)(cid:25) (cid:57)(cid:39)(cid:39) (cid:39)(cid:53)(cid:36)(cid:44)(cid:49) (cid:48)(cid:21) (cid:41)(cid:37) (cid:38)(cid:20) (cid:38)(cid:50)(cid:49)(cid:55)(cid:53)(cid:50)(cid:47) (cid:39)(cid:21) (cid:38)(cid:50)(cid:48)(cid:51) (cid:47)(cid:44)(cid:48) (cid:42)(cid:49)(cid:39) (cid:11)(cid:82)(cid:83)(cid:87)(cid:76)(cid:82)(cid:81)(cid:68)(cid:79)(cid:12) (cid:38)(cid:21) (cid:38)(cid:22) (cid:53)(cid:73)(cid:69)(cid:20) (cid:53)(cid:70)(cid:82)(cid:80)(cid:83) (cid:53)(cid:47)(cid:44)(cid:48) (cid:53)(cid:73)(cid:69)(cid:21) (cid:38)(cid:23) (cid:38)(cid:47)(cid:44)(cid:48) (cid:11)(cid:82)(cid:83)(cid:87)(cid:76)(cid:82)(cid:81)(cid:68)(cid:79)(cid:12) (cid:38)(cid:70)(cid:82)(cid:80)(cid:83) (cid:11)(cid:82)(cid:83)(cid:87)(cid:76)(cid:82)(cid:81)(cid:68)(cid:79)(cid:12) (cid:39)(cid:82)(cid:88)(cid:87) (cid:16) (cid:47)(cid:82)(cid:88)(cid:87) (cid:39)(cid:20) (cid:38)(cid:82)(cid:88)(cid:87) (cid:14) (cid:57)(cid:50)(cid:56)(cid:55) (cid:17) (cid:42)(cid:53)(cid:50)(cid:56)(cid:49)(cid:39) (cid:17) (cid:14) (cid:3) (cid:36)(cid:48)(cid:19)(cid:20)(cid:20)(cid:28)(cid:24)(cid:89)(cid:20) 14/30 DocID15232 Rev 7

VIPER16 Typical circuit Figure 19. Flyback converter (primary regulation) (cid:36)(cid:38)(cid:3)(cid:44)(cid:49) (cid:41)(cid:56)(cid:54)(cid:40) (cid:39)(cid:19) (cid:47)(cid:20) (cid:16) (cid:14) (cid:25)(cid:25) (cid:36)(cid:38)(cid:3)(cid:44)(cid:49) (cid:38)(cid:20) (cid:38)(cid:21) (cid:14) (cid:14) (cid:53)(cid:70)(cid:79) (cid:38)(cid:70)(cid:79) (cid:39)(cid:21) (cid:57)(cid:50)(cid:56)(cid:55) (cid:20)(cid:21) (cid:39)(cid:20) (cid:14) (cid:53)(cid:68)(cid:88)(cid:91) (cid:39)(cid:68)(cid:88)(cid:91) (cid:23) (cid:38)(cid:82)(cid:88)(cid:87) (cid:22) (cid:20)(cid:19) (cid:17) (cid:57)(cid:44)(cid:51)(cid:72)(cid:85)(cid:20)(cid:25) (cid:20) (cid:53)(cid:73)(cid:69)(cid:75) (cid:57)(cid:39)(cid:39) (cid:39)(cid:53)(cid:36)(cid:44)(cid:49) (cid:48)(cid:21) (cid:41)(cid:37) (cid:38)(cid:57)(cid:39)(cid:39) (cid:38)(cid:50)(cid:49)(cid:55)(cid:53)(cid:50)(cid:47) (cid:14) (cid:38)(cid:50)(cid:48)(cid:51) (cid:47)(cid:44)(cid:48) (cid:42)(cid:49)(cid:39) (cid:53)(cid:73)(cid:69)(cid:79) (cid:38)(cid:73)(cid:69) (cid:53)(cid:70) (cid:38)(cid:83) (cid:38)(cid:47)(cid:44)(cid:48) (cid:53)(cid:47)(cid:44)(cid:48) (cid:38)(cid:70) (cid:11)(cid:82)(cid:83)(cid:87)(cid:76)(cid:82)(cid:81)(cid:68)(cid:79)(cid:12) (cid:11)(cid:82)(cid:83)(cid:87)(cid:76)(cid:82)(cid:81)(cid:68)(cid:79)(cid:12) (cid:36)(cid:48)(cid:19)(cid:20)(cid:20)(cid:28)(cid:25)(cid:89)(cid:20) Figure 20. Flyback converter (non isolated) (cid:36)(cid:38)(cid:3)(cid:44)(cid:49) (cid:53)(cid:76)(cid:81) (cid:39)(cid:76)(cid:81) (cid:20) (cid:47)(cid:20) (cid:39)(cid:82)(cid:88)(cid:87) (cid:57)(cid:50)(cid:56)(cid:55) (cid:21) (cid:16) (cid:14) (cid:23) (cid:25) (cid:53)(cid:71) (cid:38)(cid:71) (cid:14) (cid:37)(cid:53)(cid:44)(cid:39)(cid:42)(cid:40) (cid:38)(cid:21) (cid:14) (cid:38)(cid:82)(cid:88)(cid:87) (cid:22) (cid:38)(cid:22) (cid:14) (cid:42)(cid:53)(cid:50)(cid:56)(cid:49)(cid:39) (cid:39)(cid:20) (cid:42)(cid:53)(cid:50)(cid:56)(cid:49)(cid:39) (cid:39)(cid:68)(cid:88)(cid:91) (cid:11)(cid:82)(cid:83)(cid:87)(cid:76)(cid:82)(cid:81)(cid:68)(cid:79)(cid:12) (cid:53)(cid:73)(cid:69)(cid:20) (cid:57)(cid:44)(cid:51)(cid:72)(cid:85)(cid:20)(cid:25) (cid:57)(cid:39)(cid:39) (cid:39)(cid:53)(cid:36)(cid:44)(cid:49) (cid:48)(cid:22) (cid:41)(cid:37) (cid:38)(cid:20) (cid:38)(cid:50)(cid:49)(cid:55)(cid:53)(cid:50)(cid:47) (cid:38)(cid:50)(cid:48)(cid:51) (cid:47)(cid:44)(cid:48) (cid:42)(cid:49)(cid:39) (cid:53)(cid:73)(cid:69)(cid:21) (cid:53)(cid:70)(cid:82)(cid:80)(cid:83)(cid:20) (cid:38)(cid:70)(cid:82)(cid:80)(cid:83)(cid:21) (cid:38)(cid:47)(cid:44)(cid:48) (cid:53)(cid:47)(cid:44)(cid:48) (cid:11)(cid:82)(cid:83)(cid:87)(cid:76)(cid:82)(cid:81)(cid:68)(cid:79)(cid:12) (cid:11)(cid:82)(cid:83)(cid:87)(cid:76)(cid:82)(cid:81)(cid:68)(cid:79)(cid:12) (cid:38)(cid:70)(cid:82)(cid:80)(cid:83)(cid:20) (cid:36)(cid:48)(cid:19)(cid:20)(cid:20)(cid:28)(cid:26)(cid:89)(cid:20) DocID15232 Rev 7 15/30 30

Power section VIPER16 7 Power section The power section is implemented with an n-channel power MOSFET with a breakdown voltage of 800 V min. and a typical R of 20 Ω. It includes a SenseFET structure to DS(on) allow a virtually lossless current sensing and the thermal sensor. The gate driver of the power MOSFET is designed to supply a controlled gate current during both turn-ON and turn-OFF in order to minimize common mode EMI. During UVLO conditions, an internal pull-down circuit holds the gate low in order to ensure that the power MOSFET cannot be turned ON accidentally. 8 High voltage current generator The high voltage current generator is supplied by the DRAIN pin. At the first start up of the converter it is enabled when the voltage across the input bulk capacitor reaches the V threshold, sourcing a I current (see Table7 on page8); as the V DRAIN_START DDch1 DD voltage reaches the V threshold, the power section starts switching and the high DDon voltage current generator is turned OFF. The VIPer16 is powered by the energy stored in the V capacitor. DD In steady state condition, if the self biasing function is used, the high voltage current generator is activated between V and V (see Table7 on page8), delivering DDCSon DDon I , see Table7 on page8 to the V capacitor during the MOSFET off time (see DDch2 DD Figure21 on page16). The device can also be supplied through the auxiliary winding; in this case the high voltage current source is disabled during steady-state operation, provided that VDD is above V . DDCSon At converter power-down, the V voltage drops and the converter activity stops as it falls DD below V threshold (see Table7 on page8). DDoff Figure 21. Power on and power off VIN VIN< VDRAIN_START HV startup is no more activated VDRAIN_START VDD With internal self-supply regulation is lost here t Without internal self-supply VDDon VDDCSon VDDoff V t DRAIN I DD ttt IDDch2 IDDch1 t Power-on Normal operation Power-off 16/30 DocID15232 Rev 7

VIPER16 Oscillator 9 Oscillator The switching frequency is internally fixed at 60 kHz (part number VIPER16LN or LD) or 115 kHz (part number VIPER16HN or HD). In both cases the switching frequency is modulated by approximately ±4 kHz (60 kHz version) or ±8 kHz (115 kHz version) at 230 Hz (typical) rate, so that the resulting spread- spectrum action distributes the energy of each harmonic of the switching frequency over a number of sideband harmonics having the same energy on the whole but smaller amplitudes. 10 Soft start-up During the converters' start-up phase, the soft-start function progressively increases the cycle-by-cycle drain current limit, up to the default value I . By this way the drain current Dlim is further limited and the output voltage is progressively increased reducing the stress on the secondary diode. The soft-start time is internally fixed to t , see typical value SS on Table8 on page9, and the function is activated for any attempt of converter start-up and after a fault event. This function helps prevent transformers' saturation during start-up and short-circuit. 11 Adjustable current limit set point The VIPer16 includes a current mode PWM controller: cycle by cycle the drain current is sensed through the integrated resistor R and the voltage is applied to the non SENSE inverting input of the PWM comparator, see Figure2 on page4. As soon as the sensed voltage is equal to the voltage derived from the COMP pin, the power MOSFET is switched OFF. In parallel with the PWM operations, the comparator OCP, see Figure2 on page4, checks the level of the drain current and switch OFF the power MOSFET in case the current is higher than the threshold I , see Table8 on page9. Dlim The level of the drain current limit, I , can be reduced depending from the sunk current Dlim from the pin LIM. The resistor R , between LIM and GND pins, fixes the current sunk and LIM than the level of the current limit, I , see Figure13 on page12. Dlim When the LIM pin is left open or if the R has an high value (i.e. > 80 kΩ) the current limit LIM is fixed to its default value, I , as reported on Table8 on page9. Dlim DocID15232 Rev 7 17/30 30

FB pin and COMP pin VIPER16 12 FB pin and COMP pin The device can be used both in non-isolated and in isolated topology. In case of non- isolated topology, the feedback signal from the output voltage is applied directly to the FB pin as inverting input of the internal error amplifier having the reference voltage, V REF_FB, see the Table8 on page9. The output of the error amplifier sources and sinks the current, I , respectively to and COMP from the compensation network connected on the COMP pin. This signal is then compared, in the PWM comparator, with the signal coming from the SenseFET; the power MOSFET is switched off when the two values are the same on cycle by cycle basis. See the Figure2 on page4 and the Figure22 on page18. When the power supply output voltage is equal to the error amplifier reference voltage, V , a single resistor has to be connected from the output to the FB pin. For higher REF_FB output voltages the external resistor divider is needed. If the voltage on FB pin is accidentally left floating, an internal pull-up protects the controller. The output of the error amplifier is externally accessible through the COMP pin and it’s used for the loop compensation: usually an RC network. As reported on Figure22 on page18, in case of isolated power supply, the internal error amplifier has to be disabled (FB pin shorted to GND). In this case an internal resistor is connected between an internal reference voltage and the COMP pin, see the Figure22 on page18. The current loop has to be closed on the COMP pin through the opto-transistor in parallel with the compensation network. The V dynamics ranges is between V COMP COMPL and V as reported on Figure23 on page19. COMPH When the voltage V drops below the voltage threshold V , the converter enters COMP COMPL burst mode, see Section13 on page 19. When the voltage V rises above the V threshold, the peak drain current will COMP COMPH reach its limit, as well as the deliverable output power. Figure 22. Feedback circuit Wswitithcohu ot pIseonla &ti oEn/:A enabled VREF With Isolation: RCOMP VCOMPL PWM stop switch closed & E/A disabled + VOUT SW - BUS FB - from RSENSE RH VREF_FB +E/A + to PWM Isolation nR - No RL Isolation R COMP 18/30 DocID15232 Rev 7

VIPER16 Burst mode Figure 23. COMP pin voltage versus I DRAIN (cid:3) (cid:44)(cid:39)(cid:53)(cid:36)(cid:44)(cid:49) (cid:44) (cid:39)(cid:79)(cid:76)(cid:80) (cid:44) (cid:39)(cid:79)(cid:76)(cid:80)(cid:66)(cid:69)(cid:80) (cid:57)(cid:38)(cid:50)(cid:48)(cid:51) (cid:57) (cid:57) (cid:38)(cid:50)(cid:48)(cid:51)(cid:47) (cid:38)(cid:50)(cid:48)(cid:51)(cid:43) (cid:36)(cid:48)(cid:19)(cid:20)(cid:19)(cid:28)(cid:24)(cid:89)(cid:20) 13 Burst mode When the voltage V drops below the threshold, V , the power MOSFET is kept in COMP COMPL OFF state and the consumption is reduced to I current, as reported on Table7 on DD0 page8. As reaction at the energy delivery stop, the V voltage increases and as soon COMP as it exceeds the threshold V + V , the converter starts switching again with COMPL COMPL_HYS consumption level equal to I current. This ON-OFF operation mode, referred to as “burst DD1 mode” and reported on Figure24 on page19, reduces the average frequency, which can go down even to a few hundreds hertz, thus minimizing all frequency-related losses and making it easier to comply with energy saving regulations. During the burst mode, the drain current limit is reduced to the value I (reported on Table8 on page9) in order to Dlim_bm avoid the audible noise issue. Figure 24. Load-dependent operating modes: timing diagrams V COMP VCOMPL +VCOMPL_HYS VCOMPL time I DD IDD1 IDD0 I time DRAIN IDlim_bm time Burst Mode AM13269v1 DocID15232 Rev 7 19/30 30

Automatic auto restart after overload or short-circuit VIPER16 14 Automatic auto restart after overload or short-circuit The overload protection is implemented in automatic way using the integrated up-down counter. Every cycle, it is incremented or decremented depending if the current logic detects the limit condition or not. The limit condition is the peak drain current, I reported on Dlim , Table8 on page9 or the one set by the user through the R resistor, as reported in LIM Figure13 on page12. After the reset of the counter, if the peak drain current is continuously equal to the level I , the counter will be incremented till the fixed time, t , after that will Dlim OVL be disabled the power MOSFET switch ON. It will be activated again, through the soft start, after the t time, see the Figure25 and Figure26 on page20 and the mentioned RESTART time values on Table8 on page9. In case of overload or short-circuit event, the power MOSFET switching will be stopped after a time that depends from the counter and that can be as maximum equal to t . The OVL protection will occur in the same way until the overload condition is removed, see Figure25 and Figure26 on page20. This protection ensures restart attempts of the converter with low repetition rate, so that it works safely with extremely low power throughput and avoiding the IC overheating in case of repeated overload events. If the overload is removed before the protection tripping, the counter will be decremented cycle by cycle down to zero and the IC will not be stopped. Figure 25. Timing diagram: OLP sequence (IC externally biased) SHORT CIRCUIT SHORT CIRCUIT V OCCURS HERE REMOVED HERE DD V DDon V DDCSon I time DRAIN I Dlim_bm t t time t1* tRESTART OVL tRESTART OVL tRESTART t t t SS SS SS * The timet can be lower or equal to the timet 1 OVL AM13270v1 Figure 26. Timing diagram: OLP sequence (IC internally biased) SHORT CIRCUIT SHORT CIRCUIT V OCCURS HERE REMOVED HERE DD V DDon V DDCSon I time DRAIN I Dlim_bm t t time t1* tRESTART OVL tRESTART OVL tRESTART t t t SS SS SS * The time t can be lower than or equal to the time t 1 OVL AM13271v1 20/30 DocID15232 Rev 7

VIPER16 Open loop failure protection 15 Open loop failure protection In case the power supply is built in fly-back topology and the VIPer16 is supplied by an auxiliary winding, as shown in Figure27 on page21 and Figure28 on page22, the converter is protected against feedback loop failure or accidental disconnections of the winding. The following description is applicable for the schematics of Figure27 on page21 and Figure28 on page22, respectively the non-isolated fly-back and the isolated fly-back. If R is opened or R is shorted, the VIPer16 works at its drain current limitation. The output H L voltage, V , will increase and so the auxiliary voltage, V , which is coupled with the OUT AUX output through the secondary-to-auxiliary turns ratio. As the auxiliary voltage increases up to the internal V active clamp, V (the value is DD DDclamp reported on Table8 on page9) and the clamp current injected on VDD pin exceeds the latch threshold, I (the value is reported on Table8 on page9), a fault signal is internally DDol generated. In order to distinguish an actual malfunction from a bad auxiliary winding design, both the above conditions (drain current equal to the drain current limitation and current higher than I through VDD clamp) have to be verified to reveal the fault. DDol If R is opened or R is shorted, the output voltage, V , will be clamped to the reference L H OUT voltage V (in case of non isolated fly-back) or to the external TL voltage reference (in REF_FB case of isolated fly-back). Figure 27. FB pin connection for non-isolated fly-back R D AUX AUX CVDD VAUX VDD V OUT VCOMPL + PWM stop - R H BUS FB from R V -E/A SENSE R REF_FB + L nR + to PWM - R COMP RS CP CS AM13272v1 DocID15232 Rev 7 21/30 30

Open loop failure protection VIPER16 Figure 28. FB pin connection for isolated fly-back R D AUX AUX V C AUX VDD V REF RCOMP VCOMPL + PWM stop SW - Disabled BUS FB V from RSENSE OUT - E/A VREF_FB + nR + to PWM - R ROPTO R H COMP R3 U5 RC CC C COMP TL R L - AM13273v1 22/30 DocID15232 Rev 7

VIPER16 Layout guidelines and design recommendations 16 Layout guidelines and design recommendations A proper printed circuit board layout is essential for correct operation of any switch-mode converter and this is true for the VIPer16 as well. Also some trick can be used to make the design rugged versus external influences. Careful component placing, correct traces routing, appropriate traces widths and compliance with isolation distances are the major issues. The main reasons to have a proper PCB routing are: – Provide a noise free path for the signal ground and for the internal references, ensuring good immunity against external noises and switching noises – Minimize the pulsed loops (both primary and secondary) to reduce the electromagnetic interferences, both radiated and conducted and passing more easily the EMC regulations. The below list can be used as guideline when designing a SMPS using VIPer16. – Signal ground routing should be routed separately from power ground and, in general, from any pulsed high current loop; – Connect all the signal ground traces to the power ground, using a single "star point", placed close to the IC GND pin; – With flyback topologies, when the auxiliary winding is used, it is suggested to connect the VDD capacitor on the auxiliary return and then to the main GND using a single track; – The compensation network should be connected as close as possible to the COMP pin, maintaining the trace for the GND as short as possible; – A small bypass capacitor (a few hundreds pF up to 0.1 µF) to GND might be useful to get a clean bias voltage for the signal part of the IC and protect the IC itself during EFT/ESD tests. A low ESL ceramic capacitor should be used, placed as close as possible to the VDD pin; – When using SO16 package it is recommended to connect the pin 4 to GND pin, using a signal track, in order to improve the noise immunity. This is highly recommended in case of high nosily environment; – An optional capacitor can be connected on the LIM pin in order to improve the IC noise immunity. It is strongly recommended to don't exceed 470nF. – The IC thermal dissipation takes place through the drain pins. An adequate heat sink copper area has to be designed under the drain pins to improve the thermal dissipation; – It is not recommended to place large copper areas on the GND pins. – Minimize the area of the pulsed loops (primary, RCD and secondary loops), in order to reduce its parasitic self- inductance and the radiated electromagnetic field: this will greatly reduce the electromagnetic interferences produced by the power supply during the switching. DocID15232 Rev 7 23/30 30

Layout guidelines and design recommendations VIPER16 Figure 29. Suggested routing for converter: flyback case (cid:57)(cid:50)(cid:56)(cid:55) (cid:14) (cid:36)(cid:38) (cid:16) (cid:36)(cid:38) (cid:42)(cid:49)(cid:39) (cid:57)(cid:44)(cid:51)(cid:40)(cid:53)(cid:20)(cid:25) (cid:57)(cid:39)(cid:39) (cid:39)(cid:53)(cid:36)(cid:44)(cid:49) (cid:41)(cid:37) (cid:38)(cid:50)(cid:49)(cid:55)(cid:53)(cid:50)(cid:47) (cid:38)(cid:50)(cid:48)(cid:51) (cid:47)(cid:44)(cid:48) (cid:49)(cid:17)(cid:36)(cid:17) (cid:42)(cid:49)(cid:39) (cid:50)(cid:51)(cid:55)(cid:44)(cid:50)(cid:49)(cid:36)(cid:47) Figure 30. Suggested routing for converter: buck case (cid:14) (cid:36)(cid:38) (cid:16) (cid:36)(cid:38) (cid:57)(cid:44)(cid:51)(cid:40)(cid:53)(cid:20)(cid:25) (cid:57)(cid:39)(cid:39) (cid:39)(cid:53)(cid:36)(cid:44)(cid:49) (cid:41)(cid:37) (cid:38)(cid:50)(cid:49)(cid:55)(cid:53)(cid:50)(cid:47) (cid:38)(cid:50)(cid:48)(cid:51) (cid:47)(cid:44)(cid:48) (cid:49)(cid:17)(cid:36)(cid:17) (cid:42)(cid:49)(cid:39) (cid:57)(cid:50)(cid:56)(cid:55) (cid:50)(cid:51)(cid:55)(cid:44)(cid:50)(cid:49)(cid:36)(cid:47) (cid:42)(cid:49)(cid:39) 24/30 DocID15232 Rev 7

VIPER16 Package mechanical data 17 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Figure 31. DIP-7 package dimensions DocID15232 Rev 7 25/30 30

Package mechanical data VIPER16 Table 9. DIP-7 mechanical data mm Dim. Typ Min Max A 5,33 A1 0,38 A2 3,30 2,92 4,95 b 0,46 0,36 0,56 b2 1,52 1,14 1,78 c 0,25 0,20 0,36 D 9,27 9,02 10,16 E 7,87 7,62 8,26 E1 6,35 6,10 7,11 e 2,54 eA 7,62 eB 10,92 L 3,30 2,92 3,81 M (6)(8) 2,508 N 0,50 0,40 0,60 N1 0,60 O (7)(8) 0,548 1- The leads size is comprehensive of the thickness of the leads finishing material. 2- Dimensions do not include mold protrusion, not to exceed 0,25 mm in total (both side). 3- Package outline exclusive of metal burrs dimensions. 4- Datum plane “H” coincident with the bottom of lead, where lead exits body. 5- Ref. POA MOTHER doc. 0037880 6- Creepage distance > 800 V 7- Creepage distance 250 V 8- Creepage distance as shown in the 664-1 CEI / IEC standard. 26/30 DocID15232 Rev 7

VIPER16 Package mechanical data Figure 32. SO16N package dimensions DocID15232 Rev 7 27/30 30

Package mechanical data VIPER16 Table 10. SO16N mechanical data mm Dim. Min Typ Max A 1.75 A1 0.1 0.25 A2 1.25 b 0.31 0.51 c 0.17 0.25 D 9.8 9.9 10 E 5.8 6 6.2 E1 3.8 3.9 4 e 1.27 h 0.25 0.5 L 0.4 1.27 k 0 8 ccc 0.1 28/30 DocID15232 Rev 7

VIPER16 Revision history 18 Revision history s Table 11. Document revision history Date Revision Changes 21-Jan-2009 1 Initial release 07-Dec-2009 2 Updated Figure7 on page11 14-May-2010 3 Updated Figure3 on page5 and Table3 on page5 Updated Table3 on page5, Figure16 on page13 and 26-Aug-2010 4 Figure21 on page16 10-Oct-2011 5 Updated Figure32 on page27 and Table7 on page8 Updated the features in cover page, Table3: Pin description, Table4: Absolute maximum ratings, Table6: Power section, Table7: Supply section. 26-May-2014 6 Modified Figure17, 18, 19 and 20. Added Section16: Layout guidelines and design recommendations. Minor text changes. Updated Table3: Pin description and Table6: Power section. 13-Jun-2014 7 Minor text changes. DocID15232 Rev 7 29/30 30

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