Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild_questions@onsemi.com. ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

U S B 1 T August 2010 1 1 A — USB1T11A — Universal Serial Bus Transceiver U n i v e r Features s Description a l (cid:131) Complies with Universal Serial Bus Specification 1.1 S The USB1T11A is a one-chip, generic USB transceiver. e (cid:131) Utilizes Digital Inputs and Outputs to Transmit and It is designed to allow 5.0V or 3.3V programmable and ri Receive USB Cable Data standard logic to interface with the physical layer of the al Universal Serial Bus. It is capable of transmitting and B (cid:131) Supports 12Mbit/s “Full Speed” and 1.5Mbit/s receiving serial data at both full-speed (12Mbit/s) and u “Low Speed” Serial Data Transmission low-speed (1.5Mbit/s) data rates. s T (cid:131) Compatible with the VHDL “Serial Interface Engine” The input and output signals of the USB1T11A conform ra from USB Implementers' Forum with the “Serial Interface Engine.” Implementation of the n s (cid:131) Supports Single-ended Data Interface serial interface engine allows designers to make USB- c compatible devices with off-the-shelf logic to modify and e (cid:131) Single 3.3V Supply update the application. iv e (cid:131) ESD Performance: Human Body Model r >9.5kV on D-, D+ pins only >4kV on all other pins Ordering Information Operating Packing Part Number Temperature Package Method Range 14-Lead, Small Outline Integrated Circuit (SOIC), JEDEC USB1T11AM Tube MS-012, 0.150-Inch Narrow 14-Lead, Small Outline Integrated Circuit (SOIC), JEDEC Tape and USB1T11AMX MS-012, 0.150-Inch Narrow Reel -40 to +85°C 14-Lead, Thin Shrink Small Outline Package (TSSOP), USB1T11AMTC Tube JEDEC MO-153, 4.4mm Wide 14-Lead, Thin Shrink Small Outline Package (TSSOP), Tape and USB1T11AMTCX JEDEC MO-153, 4.4mm Wide Reel /OE D- SPEED V /F MO SE0 D+ V PO + RCV - V P V M Figure 1. Logic Diagram © 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T11A • Rev. 1.0.4

U Pin Configuration S B 1 T MODE 1 14 VCC 1 1 A /OE 2 13 VMO/FSEO — RCV 3 12 VPO U n VP 4 11 D+ iv e r VM 5 10 D- s a l SUSPND 6 9 SPEED S e r GND 7 8 NC ia l B Figure 2. TSSOP and SOIC Pin Assignments u s Pin Descriptions T r a Pin Names I/O Description n s RCV O Receive Data. CMOS level output for USB differential input. c e i Output Enable. Active LOW, enables the transceiver to transmit data on the bus. v /OE I e When not active, the transceiver is in receive mode. r Mode. When left unconnected, a weak pull-up transistor pulls it to V and, in this Mode I CC GND, the V /F pin takes the function of F (force SEO). MO SEO SEO Inputs to differential driver. (Outputs from SIE.) Mode V V /F RESULT PO MO SEO 0 0 0 Logic “0” 0 0 1 /SEO 0 1 0 Logic “1” V ,V /F I PO MO SEO 0 1 1 /SEO 1 0 0 /SEO 1 0 1 Logic “0” 1 1 0 Logic “1” 1 1 1 Illegal Code Buffered version of D- and D+. Outputs are logic “0” and logic “1.” Used to detect single ended zero (/SEO), error conditions, and interconnected speed. (Input to SIE). V V RESULT P M V ,V O 0 0 /SEO P M 0 1 Low Speed 1 0 Full Speed 0 1 Error D+, D- AI/O Data+, Data-. Differential data bus conforming to the Universal Serial Bus standard. Suspend. Enables a low-power state while the USB bus is inactive. While the SUSPND I suspend pin is active, it drives the RCV pin to a logic “0” state. Both D+ and D- are 3- STATE. Edge Rate Control. Logic “1” operates at edge rates for “full speed.” Logic “0” Speed I operates edge rates for “low speed.” V 3.0 to 3.6 power supply. CC GND Ground reference. © 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T11A • Rev. 1.0.4 2

U Functional Truth Table S B 1 Input I/O Outputs T 1 Mode V V /F /OE SUSPND D+ D- RCV V V Result 1 PO MO SEO P M A 0 0 0 0 0 0 1 0 0 1 Logic “0” — Undefined 0 0 1 0 0 0 0 0 0 /SEO U State n i 0 1 0 0 0 1 0 1 1 0 Logic “1” v e Undefined r 0 1 1 0 0 0 0 0 0 /SEO s State a l Undefined S 1 0 0 0 0 0 0 0 0 /SEO State e r 1 0 1 0 0 0 1 0 0 1 Logic “0” ia l 1 1 0 0 0 1 0 1 1 0 Logic “1” B u 1 1 1 0 0 1 1 Undefined Undefined Undefined Illegal s State State State Code T r Don’t Don’t Don’t Care 1 0 3-State 3-State Undefined Undefined Undefined D+/D- a Care Care State State State Hi-Z n s Don’t Don’t Undefined Undefined Undefined D+/D- c Don’t Care 1 1 3-State 3-State e Care Care State State State Hi-Z i v e r © 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T11A • Rev. 1.0.4 3

U S Absolute Maximum Ratings B 1 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be T 1 operable above the recommended operating conditions and stressing the parts to these levels is not recommended. 1 In addition, extended exposure to stresses above the recommended operating conditions may affect device A reliability. The absolute maximum ratings are stress ratings only. — U Symbol Parameter Min. Max. Unit n i V DC Supply Voltage 0.5 7.0 V v CC e IIK DC Input Diode Current, VIN<0V -50 mA rs a VIN Input Voltage(1) 0.5 5.5 V l S VI/O Input Voltage 0.5 VCC + 0.5 V e r IOK Output Diode Current, VO>VCC or VO<0 ±50 mA ia l V Output Voltage 0.5 V + 0.5 V B O CC u Output Source or Sink Current VP, VM, RCV Pins ±15 s IO (VO = 0 to VCC) D+/D- Pins ±50 mA Tr a ICC / IGND VCC / GND Current ±100 mA n s T Storage Temperature Range -60 +150 °C c STG e Note: iv 1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are e r observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Min. Max. Unit V Power Supply Operating 3.0 3.6 V CC V Input Voltage 0 5.5 V IN V Input Range for AI/0 0 V V AI/O CC V Output Voltage 0 V V O CC T Operating Ambient Temperature, Free Air -40 +85 °C A © 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T11A • Rev. 1.0.4 4

U S DC Electrical Characteristics Digital Pins B 1 Over recommended range of supply voltage and operating free air temperature unless otherwise noted. T 1 V = 3.0V to 3.6V. CC 1 A T =-40 to +85°C A — Symbol Parameter Conditions Units Min. Typ. Max. U n Input Levels i v V Low-Level Input Voltage 0.8 V e IL r s V High-Level Input Voltage 2 V IH a l Output Levels S e IOL=4mA 0.4 r V Low-Level Output Voltage V i OL a IOL=20µA 0.1 l B I =4mA 2.5 V High-Level Output Voltage OH V u OH I =20µA V -0.1 s OH CC T Leakage Current r a I Input Leakage Current V =3.0 to 3.6 ±5 µA n IN CC s I Supply Current, Full Speed V =3.0 to 3.6 5 mA c CCFS CC e ICCLS Supply Current, Low Speed VCC=3.0 to 3.6 5 mA iv e ICCQ Quiescent Supply Current VCC=3.0 to 3.6, VIN=VCC or GND 5 mA r I Supply Current in Suspend V =3.0 to 3.6, Mode=V 10 µA CCS CC CC DC Electrical Characteristics D+/D- Pins Over recommended range of supply voltage and operating free air temperature unless otherwise noted. V = 3.0V to 3.6V. CC T =-40 to +85°C A Symbol Parameter Conditions Units Min. Typ. Max. Input Levels VDI Differential Input Sensitivity ⎪(D+) – (D-)⎪ 0.2 V V Differential Common-Mode Range Includes V Range 0.8 2.5 V CM DI V Single-Ended Receiver Threshold 0.8 2.0 V SE Output Levels V Static Output Low-Voltage 0.3 V OL VOH Static Output High-Voltage RL of 1.5kΩ to 3.6V 2.8 3.6 V VCR Differential Crossover RL of 1.5kΩ to GND 1.3 2.0 V Leakage Current I High Z-State Data Line Leakage Current 0V<V <3.3V ±5 µA OZ IN Capacitance Transceiver Capacitance Pin to GND 10 pF C (2) IN Capacitance Match 10 % Output Resistance Driver Output Resistance Steady-State Drive 4 20 Ω Z (3) DRV Resistance Match 10 % Notes: 2. This specification is guaranteed by design and statistical process distribution. 3. Excludes external resistor. To comply with USB specification 1.1, external series resistors of 24W ±1% each on D+ and D- are recommended. © 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T11A • Rev. 1.0.4 5

U S AC Electrical Characteristics D+/D- Pins, Full Speed B 1 Over recommended range of supply voltage and operating free air temperature unless otherwise noted. T 1 VCC = 3.0V to 3.6V, CL = 50Pf; RL = kΩ on D+ to VCC. 1 A TA=-40 to +85°C — Symbol Parameter Conditions Units Min. Typ. Max. U n Driver Characteristics i v t t Rise and Fall Time 10 and 90%, Figure 4 4 20 ns e R, F r s tRFM Rise/Fall Time Matching tR / tF 90 110 % a l VCRS Output Signal Crossover Voltage 1.3 2.0 V S e Driver Timings r i a tPLH D(Vrive,Vr Pro/Fpaga ttoio Dn +D/Del-a) y Figure 4 18 ns l B PO MO SEO u tPHZ, tPLZ Driver Disable Delay (/OE to D+/D-) Figure 6 13 ns s t t Driver Enable Delay (/OE to D+/D-) Figure 6 17 ns T PZH, PZL r a Receiver Timings n s t Receiver Propagation Delay Figure 5 16 ns c PLH e tPHL D+/D- to RVC Figure 5 19 ns iv e Single-ended Receiver Delay r t , t Figure 5 8 ns PLH PHL (D+/D- to V , V ) P M AC Electrical Characteristics D+/D- Pins, Low Speed Over recommended range of supply voltage and operating free air temperature unless otherwise noted. V = 3.0V to 3.6V, C = 200pF to 600pF; R = 1.5kΩ on D- to V . CC L L CC T =-40 to +85°C A Symbol Parameter Conditions Units Min. Typ. Max. Driver Characteristics t , t Rise and Fall Time 10 and 90%, Figure 4 75 300 ns LR LF t Rise/Fall Time Matching t / t 80 120 % RFM R F V Output Signal Crossover Voltage 1.3 2.0 V CRS Driver Timings Driver Propagation Delay t , t Figure 4 300 ns PLH PHL (V ,V /F to D+/D-) PO MO SEO t t Driver Disable Delay (/OE to D+/D-) Figure 6 13 ns PHZ, PLZ t t Driver Enable Delay (/OE to D+/D-) Figure 6 205 ns PZH, PZL Receiver Timings Receiver Propagation Delay t , t Figure 5 18 ns PLH PHL (D+/D- to RVC) Single-ended Receiver Delay t , t Figure 5 28 ns PLH PHL (D+/D- to V , V ) P M © 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T11A • Rev. 1.0.4 6

U S AC Loadings and Waveforms B 1 V and V are the typical output voltage drops that occur with the output load. V never goes below 3.0V. T OL OH CC 1 1 A — U n i v e r s a l S e r i a Figure 3. Rise and Fall Times Figure 4. VPO, VMO/FSEO to D+/D- l B u s T r a n s c e i v e r Figure 5. D+/D- to RCV, V /V Figure 6. /OE to D+/D- P M Test Circuits and Waveforms Figure 7. Load for V /V and RCV Figure 8. Load for Enable and Disable Times M P Test S1 D-/LS Close D+/LS Open D-/FS Open C =50pF, Full Speed L CL=200pF, Full Speed (Minimum Timing) D+/FS Close CL=600pF, Full Speed (Maximum Timing) 1.5kΩ on D-(Low Speed) or D+ (Full Speed) only. Figure 9. Load for D+/D- © 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T11A • Rev. 1.0.4 7

U S Physical Dimensions B 1 T 1 1 8.75 A 8.50 A 0.65 — U 7.62 n i v e 14 8 r B s a 5.60 l S e 6.00 4.00 ri 3.80 a l B u s 1.70 1.27 T PIN ONE 1 7 r INDICATOR 1.27 0.51 an 0.35 LAND PATTERN RECOMMENDATION s c 0.25 M C B A e (0.33) iv e r 1.75 MAX SEE DETAIL A 1.50 1.25 0.25 0.25 0.10 C 0.19 0.10 C NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC 0.50 MS-012, VARIATION AB, ISSUE C, 0.25 X 45° B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD R0.10 GAGE PLANE FLASH OR BURRS. R0.10 D) LANDPATTERN STANDARD: 0.36 SOIC127P600X145-14M 8° E) DRAWING CONFORMS TO ASME Y14.5M-1994 0° F) DRAWING FILE NAME: M14AREV13 0.90 SEATING PLANE 0.50 (1.04) DETAIL A SCALE: 20:1 Figure 10. 14-Lead, Small Outline Integrated Circuit (SOIC) MO-012, 0.150-inch Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T11A • Rev. 1.0.4 8

U S B Physical Dimensions 1 T 1 1 A — 0.43 TYP 0.65 U n i v e r s a l S e r i a l 1.65 B u s T r a n s 0.45 6.10 c e i v e r 12.00°TOP & BOTTOM R0.09 min A. CONFORMS TO JEDEC REGISTRATION MO-153, VARIATION AB, REF NOTE 6 R0.09min 1.00 B. DIMENSIONS ARE IN MILLIMETERS C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS D. DIMENSIONING AND TOLERANCES PER ANSI Y14.5M, 1982 E. LANDPATTERN STANDARD: SOP65P640X110-14M F. DRAWING FILE NAME: MTC14REV6 Figure 11. 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T11A • Rev. 1.0.4 9

U S B 1 T 1 1 A — U n i v e r s a l S e r i a l B u s T r a n s c e i v e r © 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T11A • Rev. 1.0.4 10

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