UC1834 UC2834 UC3834 High Efficiency Linear Regulator FEATURES DESCRIPTION • Minimum VIN - VOUT Less Than The UC1834 family of integrated circuits is optimized for the design of low 0.5V At 5A Load With External input-output differential linear regulators. A high gain amplifier and 200mA Pass Device sink or source drive outputs facilitate high output current designs which use • Equally Usable For Either Positive an external pass device. With both positive and negative precision refer- ences, either polarity of regulator can be implemented. A current sense am- or Negative Regulator Design plifier with a low, adjustable, threshold can be used to sense and limit • Adjustable Low Threshold Current currents in either the positive or negative supply lines. Sense Amplifier In addition, this series of parts has a fault monitoring circuit which senses • Under And Over-Voltage Fault Alert both under and over-voltage fault conditions. After a user defined delay for With Programmable Delay transient rejection, this circuitry provides a fault alert output for either fault • Over-Voltage Fault Latch With condition. In the over-voltage case, a 100mA crowbar output is activated. 100mA Crowbar Drive Output An over-voltage latch will maintain the crowbar output and can be used to shutdown the driver outputs. System control to the device can be accom- modated at a single input which will act as both a supply reset and remote shutdown terminal. These die are protected against excessive power dissi- pation by an internal thermal shutdown function. BLOCK DIAGRAM 6/94

UC1834 UC2834 UC3834 ABSOLUTE MAXIMUM RATINGS (Note 1) Input Supply Voltage, VIN + . . . . . . . . . . . . . . . . . . . . . . . . . 40V Power Dissipation at TA = 25°C. . . . . . . . . . . . . . . . . . 1000mW Driver Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400mA Power Dissipation at TC = 25°C. . . . . . . . . . . . . . . . . . 2000mW Driver Source to Sink Voltage . . . . . . . . . . . . . . . . . . . . . . . 40V Operating Junction Temperature. . . . . . . . . . - 55°C to +150°C Crowbar Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 200mA Storage Temperature. . . . . . . . . . . . . . . . . . . - 65°C to +150°C +1.5V Reference Output Current. . . . . . . . . . . . . . . . . . - 10mA Lead Temperature (soldering, 10 seconds). . . . . . . . . . . 300°C Fault Alert Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V Note 1:Voltages are reference to VIN- , Pin 5. Fault Alert Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15mA Currents are positive into, negative out of the specified Error Amplifier Inputs . . . . . . . . . . . . . . . . . . . . . . - 0.5V to 35V terminals. Current Sense Inputs. . . . . . . . . . . . . . . . . . . . . . - 0.5V to 40V Consult Packaging section of Databook for thermal O.V. Latch Output Voltage. . . . . . . . . . . . . . . . . . - 0.5V to 40V limitations and considerations of package. O.V. Latch Output Current . . . . . . . . . . . . . . . . . . . . . . . . 15mA CONNECTION DIAGRAMS DIL-16, SOIC-16 (TOP VIEW) PLCC-20, LCC-20 (TOP VIEW) J or N Package, DW Package Q, L Packages PACKAGE PIN FUNCTION FUNCTION PIN N/C 1 VIN + 2 - 2.0V REF 3 +1.5V REF 4 Threshold Adjust 5 N/C 6 VIN- 7 Sense- 8 Sense+ 9 N.Inv. Input 10 N/C 11 Inv. Input 12 Fault Alert 13 Fault Delay 14 Driver Sink 15 N/C 16 Driver Source 17 Compensation/ Shutdown 18 O.V. Latch Output/Reset 19 Crowbar Gate 20 2

UC1834 UC2834 UC3834 ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for TA=- 55°C to +125°C for the UC1834, - 40°C to +85°C for the UC2834, and 0°C to +70°C for the UC3834. VIN+ = 15V, VIN- = 0V, TA = TJ. UC1834 UC3834 UNITS PARAMETER TEST CONDITIONS UC2834 MIN TYP MAX MIN TYP MAX Turn-on Characteristics Standby Supply Current 5.5 7 5.5 10 mA +1.5 Volt Reference Output Voltage TJ = 25°C 1.485 1.5 1.515 1.47 1.5 1.53 V TJ(MIN) £ TJ £ TJ(MAX) 1.47 1.53 1.455 1.545 Line Regulation VIN+ = 5 to 35V 1 10 1 15 mV Load Regulation IOUT = 0 to 2mA 1 10 1 15 mV -2.0 Volt Reference (Note 2) Output Voltage (Referenced TJ = 25°C - 2.04 - 2 - 1.96 - 2.06 - 2 - 1.94 V to VIN+) TJ(MIN) £ TJ £ TJ(MAX) - 2.06 - 1.94 - 2.08 - 1.92 Line Regulation VIN+ = 5 to 35V 1.5 15 1.5 20 mV Output Impedance 2.3 2.3 kW Error Amplifier Section Input Offset Voltage VCM = 1.5V 1 6 1 10 mV Input Bias Current VCM = 1.5V - 1 - 4 - 1 - 8 m A Input Offset Current VCM = 1.5V 0.1 1 0.1 2 m A Small Signal Open Loop Gain Output @ Pin 14, Pin 12 = VIN+ 50 65 50 65 dB Pin 13, 20W to VIN- CMRR VCM = 0.5 to 33V, VIN+ = 35V 60 80 60 80 dB PSRR VIN+ = 5 to 35V, VCM = 1.5V 70 100 70 100 dB Driver Section Maximum Output Current 200 350 200 350 mA Saturation Voltage IOUT = 100mA 0.5 1.2 0.5 1.5 V Output Leakage Current Pin 12 = 35V, Pin 13 = VIN- , Pin 14 = VIN- 0.1 50 0.1 50 m A Shutdown Input Voltage IOUT £ 100m A, Pin 13 = VIN- , Pin 12 = 0.4 1 0.4 1 V at Pin 14 VIN+ Shutdown Input Current Pin 14 = VIN- , Pin 12 = VIN+ - 100 - 150 - 100 - 150 m A at Pin 14 IOUT £ 100m A, Pin 13 = VIN- Thermal Shutdown (Note 3) 165 165 °C Fault Amplifier Section Under- and Over-Voltage VCM = 1.5V, @ E/A Inputs 120 150 180 110 150 190 mV Fault Threshold Common Mode Sensitivity VIN+ = 35V, VCM = 1.5 to 33V - 0.4 - 0.8 - 0.4 - 1.0 %/v Supply Sensitivity VCM = 1.5V, VIN+ = 5 to 35V - 0.5 - 1.0 - 0.5 - 1.2 %/V Fault Delay 30 45 60 30 45 60 ms/m F Fault Alert Output Current 2 5 2 5 mA Fault Alert Saturation Voltage IOUT = 1mA 0.2 0.5 0.2 0.5 V O.V. Latch Output Current 2 4 2 4 mA O.V. Latch Saturation Voltage IOUT = 1mA 1.0 1.3 1.0 1.3 V O.V. Latch Output Reset 0.3 0.4 0.6 0.3 0.4 0.6 V Voltage Crowbar Gate Current - 100 - 175 - 100 - 175 mA Crowbar Gate Leakage VIN+ = 35V, Pin 16 = VIN- - 0.5 - 50 - 0.5 - 50 m A Current Note 2:When using both the 1.5V and - 2.0V references the current out of pin 3 should be balanced by an equivalent current into Pin 2. The - 2.0V output will change - 2.3mV per m A of imbalance. Note 3:Thermal shutdown turns off the driver. If Pin 15 (O.V. Latch Output) is tied to Pin 14 (Compensation/Shutdown) the O.V. Latch will be reset. 3

UC1834 UC2834 UC3834 ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for TA=- 55°C to +125°C for the UC1834, - 40°C to +85°C for the UC2834, and 0°C to +70°C for the UC3834. VIN+ = 15V, VIN- = 0V. TA = TJ UC1834 UC3834 UNITS PARAMETER TEST CONDITIONS UC2834 MIN TYP MAX MIN TYP MAX Current Sense Amplifier Section Threshold Voltage Pin 4 Open, VCM = VIN+ or VIN- 130 150 170 120 150 180 mV Pin 4 = 0.5V, VCM = VIN+ or VIN- 40 50 60 30 50 70 Threshold Supply Sensitivity Pin 4 Open, VCM = VIN- , VIN+ = 5 to 35V - 0.1 - 0.3 - 0.1 - 0.5 %/V Adj. Input Current Pin 4 = 0.5V - 2 - 10 - 2 - 10 m A Sense Input Bias Current VCM = VIN+ 100 200 100 200 m A VCM = VIN- - 100 - 200 - 100 - 200 Current Sense Threshold Adjustment Current Limiting Knee Characteristics Differential Voltage at Current Sense Inputs - mV (reference to sense - input) Error Amplifier Gain and Phase Current Sense Amplifier Gain and Phase Frequency Response Frequency Response 4

UC1834 UC2834 UC3834 APPLICATION INFORMATION Foldback Current Limiting Both the current sense and error amplifiers on the UC1834 The crowbar output on the UC1834 is activated following a are transconductance type amplifiers. As a result, their volt- sustained over-voltage condition. The crowbar output remains age gain is a direct function of the load impedance at their high as long as the fault condition persists, or, as long as the shared output pin, Pin 14. Their small signal voltage gain as over-voltage latch is set. The latch is set with an over-voltage a function of load and frequency is nominally given by; fault if the voltage at Pin 15 is above the latch reset threshold, AV E ⁄ A = 7Z0L0 (Wf) and AV C. S. ⁄ A = Z7L0 W(f) t1y5p ilcoawlly t h0r.o4uVg. hW ah esne rtihees ldaitocdhe i.s Asse t,l oitnsg Q a-s oau tnpoumt winiall l ppuulll lP-uinp load exists, the series diode prevents Q- from pulling Pin 15 for: f £ 500kHz and |ZL(f)| £ 1 MW below the reset threshold. However, Pin 15 is pulled low Where: enough to disable the driver outputs if Pins 15 and 14 are AV=Small Signal Voltage Gain to pin 14. tied together. With Pin 15 and 14 common, the regulator ZL(f) = Load Impedance at Pin 14. will latch off in response to an over-voltage fault. If the The UC1834 fault delay circuitry prevents the fault outputs fault condition is cleared and Pins 14 and 15 are momen- from responding to transient fault conditions. The delay reset tarily pulled below the latch reset threshold, the driver out- latch insures that the full, user defined, delay passes before an puts are re-enabled. over-voltage fault response occurs. This prevents unnecessary crowbar, or latched-off conditions, from occurring following sharp under-voltage to over-voltage transients. Setting the Threshold Adjust Voltage (VADJ) 5

UC1834 UC2834 UC3834 TYPICAL APPLICATIONS 5-10 Amp Positive Regulator 5-10 Amp Negative Regulator UNITRODE CORPORATION 7 CONTINENTAL BLVD. • MERRIMACK, NH 03054 TEL. (603) 424-2410 • FAX (603) 424-3460 6

PACKAGE OPTION ADDENDUM www.ti.com 13-Mar-2016 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) 5962-87742012A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962- 87742012A UC1834L/ 883B 5962-8774201EA ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8774201EA UC1834J/883B 5962-8774201V2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type 5962- 8774201V2A UC1834L QMLV 5962-8774201VEA ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type 5962-8774201VE A UC1834JQMLV UC1834J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 UC1834J UC1834J/81025 OBSOLETE CDIP J 16 TBD Call TI Call TI -55 to 125 UC1834J883B ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8774201EA UC1834J/883B UC1834L ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 UC1834L UC1834L883B ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962- 87742012A UC1834L/ 883B UC2834DW ACTIVE SOIC DW 16 40 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 UC2834DW & no Sb/Br) UC2834DWG4 ACTIVE SOIC DW 16 40 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 UC2834DW & no Sb/Br) UC2834DWTR ACTIVE SOIC DW 16 2000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 UC2834DW & no Sb/Br) UC2834DWTRG4 ACTIVE SOIC DW 16 2000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 UC2834DW & no Sb/Br) UC2834J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -40 to 85 UC2834J UC2834N NRND PDIP N 16 25 TBD Call TI Call TI -40 to 85 UC2834N Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 13-Mar-2016 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) UC2834Q ACTIVE PLCC FN 20 46 Green (RoHS CU SN Level-2-260C-1 YEAR -40 to 85 UC2834Q & no Sb/Br) UC2834QG3 ACTIVE PLCC FN 20 46 Green (RoHS CU SN Level-2-260C-1 YEAR -40 to 85 UC2834Q & no Sb/Br) UC2834QTR OBSOLETE PLCC FN 20 TBD Call TI Call TI -40 to 85 UC2834Q UC3834DW ACTIVE SOIC DW 16 40 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR 0 to 70 UC3834DW & no Sb/Br) UC3834DWG4 ACTIVE SOIC DW 16 40 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR 0 to 70 UC3834DW & no Sb/Br) UC3834N NRND PDIP N 16 25 Green (RoHS CU NIPDAU N / A for Pkg Type 0 to 70 UC3834N & no Sb/Br) UC3834NG4 NRND PDIP N 16 25 Green (RoHS CU NIPDAU N / A for Pkg Type 0 to 70 UC3834N & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 13-Mar-2016 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF UC1834, UC1834-SP, UC2834, UC2834M, UC3834 : •Catalog: UC3834, UC1834, UC2834 •Military: UC2834M, UC1834 •Space: UC1834-SP NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product •Military - QML certified for Military and Defense Applications •Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2013 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) UC2834DWTR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2013 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) UC2834DWTR SOIC DW 16 2000 367.0 367.0 38.0 PackMaterials-Page2

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