UC1708 UC2708 UC3708 www.ti.com SLUS171C–MARCH1997–REVISEDSEPTEMBER2007 DUAL NON-INVERTING POWER DRIVER FEATURES • High-Speed,PowerMOSFETCompatible 1 • 3.0APeakCurrentTotemPoleOutput • EfficientHighFrequencyOperation • 5to35VOperation • LowCross-ConductionCurrentSpike • 25nsRiseandFallTimes • EnableandShutdownFunctions • 25nsPropagationDelays • WideInputVoltageRange • ThermalShutdownandUnder-Voltage • ESDProtectionto2kV Protection DESCRIPTION The UC1708 family of power drivers is made with a high-speed, high-voltage, Schottky process to interface control functions and high-power switching devices – particularly power MOSFETs. Operating over a 5 V to 35 V supply range, these devices contain two independent channels. The A and B inputs are compatible with TTL and CMOS logic families, but can withstand input voltages as high as V . Each output can source or sink up to 3 A IN aslongaspowerdissipationlimitsarenotexceeded. Although each output can be activated independently with its own inputs, they can be forced low in common through the action of either a digital high signal at the Shutdown terminal or by forcing the Enable terminal low. The Shutdown terminal will only force the outputs low, it will not effect the behavior of the rest of the device. The Enable terminal effectively places the device in under-voltage lockout, reducing power consumption by as much as 90%. During under-voltage and disable (Enable terminal forced low) conditions, the outputs are held in a self-biasing,low-voltage,state. The UC3708 and UC2708 are available in plastic 8-pin MINI DIP and 16-pin bat-wing DIP packages for commercial operation over a 0(cid:176) C to 70(cid:176) C temperature range and industrial temperature range of –25(cid:176) C to 85(cid:176) C respectively. For operation over a –55(cid:176) C to 125(cid:176) C temperature range, the UC1708 is available in hermetically sealed8-pinMINICDIP,16pinCDIPand20pinCLCCpackages.Surfacemountdevicesarealsoavailable. BLOCKDIAGRAM V IN 5.6 V Enable Reg Internal Bias Logic Gnd Thermal OutputA Shutdown Pwr GndA InputA Input B Output B Shutdown Pwr Gnd B NOTE: ShutdownfeatureisnotavailableinJorNpackagesonly. 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsof TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©1997–2007,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

UC1708 UC2708 UC3708 www.ti.com SLUS171C–MARCH1997–REVISEDSEPTEMBER2007 CONNECTION DIAGRAMS DIL-8 (Top View) SOIC-16 (Top View) J Or N Package DW Package NC Pwr GndA Enable NC InputA Output A InputA OutputA Enable VIN Gnd V IN Logic Gnd NC Input B Output B NC NC Shutdown V IN Input B Output B NC Pwr Gnd B DIL-16 (Top View) CLCC-20 (Top View) JE Or NE Package LPackage A D A A N T G U UT R TP NC Pwr GndA INP NC NC PW OU InputA OutputA 3 2 1 20 19 Enable VIN ENABLE 4 18 VIN NC Logic Gnd Logic Gnd LOGIC GND 5 17 Logic Gnd Logic Gnd NC 6 16 NC Shutdown V NC 7 15 NC IN V SHUTDOWN 8 14 IN Input B Output B 9 10 11 12 13 NC Pwr Gnd B B C C B B T N N D T U N U Note: In JE package, Pin 4 is Logic Ground. P G P Pins 5, 12, and 13 are no connect. IN R UT W O P 2 SubmitDocumentationFeedback Copyright©1997–2007,TexasInstrumentsIncorporated ProductFolderLink(s):UC1708UC2708UC3708

UC1708 UC2708 UC3708 www.ti.com SLUS171C–MARCH1997–REVISEDSEPTEMBER2007 ABSOLUTE MAXIMUM RATINGS(1) VALUE UNIT SupplyVoltage,V 35 V IN Steady-State 0.5 A OutputCurrent(EachOutput,SourceorSink) PeakTransient 3 A OuputVoltage –0.3to(V +0.3) V IN EnableandShutdownInputs –0.3to6.2 V AandBInputs –0.3to(V +0.3) V IN OperatingJunctionTemperature(2) 150 (cid:176) C StorageTemperatureRange –65to150 (cid:176) C LeadTemperature(Soldering,10Seconds) 300 (cid:176) C (1) AllvoltagesarewithrespecttoLogicGndpin.Allcurrentsarepositiveinto,negativeoutof,deviceterminals.r (2) ConsultUnitrodeIntegratedCircuitsdatabookforinformationregardingthermalspecificationsandlimitationsofpackages. ELECTRICAL CHARACTERISTICS Unlessotherwisestated,V =10Vto35V,andthesespecificationsapplyfor:–55(cid:176) C<T <125(cid:176) CfortheUC1708, IN A –25(cid:176) C<T <85(cid:176) CfortheUC2708,and0(cid:176) C<T <70(cid:176) CfortheUC3708,T =T A A A J PARAMETER TESTCONDITIONS MIN TYP MAX UNIT Outputslow 18 26 V Supplycurrent Outputshigh 14 18 mA IN Enable=0V 1 4 A,Bandshutdowninputslowlevel 0.8 V A,Bandshutdowninputshighlevel 2.0 V A,BInputcurrentlow V =0.4V –1 –0.6 mA A,B A,BInputcurrenthigh V =2.4V –200 50 A A,B A,BInputleakagecurrenthigh V =35.3V 200 A A,B Shutdowninputcurrentlow V =0.4V 20 100 A SHUTDOWN V =2.4V 170 500 A SHUTDOWN Shutdowninputcurrenthigh V =6.2V 0.6 1.5 mA SHUTDOWN Enableinputcurrentlow V =0V –600 –460 200 A ENABLE Enableinputcurrenthigh V =6.2V 200 A ENABLE Enablethresholdrising 2.8 3.6 V Enablethresholdfalling 1.0 2.4 3.4 V V – I =–50mA 2.0 V IN OUT V OutputHighSaturation OUT I =–500mA 2.5 V OUT I =50mA 0.5 V OUT V OutputLowSaturation OUT I =500mA 2.5 V OUT ThermalShutdown 155 (cid:176) C Copyright©1997–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLink(s):UC1708UC2708UC3708

UC1708 UC2708 UC3708 www.ti.com SLUS171C–MARCH1997–REVISEDSEPTEMBER2007 SWITCHING CHARACTERISTICS (see Figure 1) (VIN=20V,delaysmeasuredto10%outputchange.) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT FROMA,BINPUTTOOUTPUT: CL=0pF 25 40 ns UC1708 25 45 CL=1000pF ns RiseTimeDelay(TPLH) UC2708/UC3708 25 40 UC1708 25 50 CL=2200pF ns UC2708/UC3708 25 45 CL=0pF 55 75 ns UC1708 25 80 CL=1000pF(1) ns 10%to90%Rise(TTLH) UC2708/UC3708 25 50 UC1708 40 85 CL=2200pF ns UC2708/UC3708 40 55 CL=0pF 25 40 FallTimeDelay(TPHL) CL=1000pF(1) 25 45 ns CL=2200pF 35 50 CL=0pF 15 20 90%to10%Fall(TTHL) CL=1000pF(1) 25 45 ns CL=2200pF 40 55 (1) Theseparameters,specifiedat1000pF,althoughensuredoverrecommendedoperatingconditions,arenottestedinproduction. SWITCHING CHARACTERISTICS (see Figure 1) (VIN=20V,delaysmeasuredto10%outputchange.) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT FROMSHUTDOWNINPUTTOOUTPUT: CL=0pF 25 75 ns UC1708 30 80 CL=1000pF(1) ns RiseTimeDelay(TPLH) UC2708/UC3708 30 75 UC1708 35 85 CL=2200pF ns UC2708/UC3708 35 75 CL=0pF 50 75 ns UC1708 25 80 CL=1000pF(1) ns 10%to90%Rise(TTLH) UC2708/UC3708 25 50 UC1708 40 85 CL=2200pF ns UC2708/UC3708 40 55 CL=0pF 25 45 FallTimeDelay(TPHL) CL=1000pF(1) 30 50 ns CL=2200pF 35 55 CL=0pF 25 20 90%to10%Fall(TTHL) CL=1000pF(1) 25 45 ns CL=2200pF 40 55 F=200kHz,50%dutycycle,bothchannels;CL=0pF 23 25 TotalSupplyCurrent mA F=200kHz,50%dutycycle,bothchannels;CL=2200pF 38 45 (1) Theseparameters,specifiedat1000pF,althoughensuredoverrecommendedoperatingconditions,arenottestedinproduction. 4 SubmitDocumentationFeedback Copyright©1997–2007,TexasInstrumentsIncorporated ProductFolderLink(s):UC1708UC2708UC3708

UC1708 UC2708 UC3708 www.ti.com SLUS171C–MARCH1997–REVISEDSEPTEMBER2007 20 V Input 4.3 V INPUT 50% 50% 10mF 47mF 0 V 12 V UC1708 20 V AC Input MPF LH0063 Output 90% 90% 6660 47W OUTPUT 200 kHz 50W 50W PGWNDR CL 0 V 10% 10% tr³0.5 V/RS TPLH TPHL tf³0.5/RS Duty Cycle - 50% Logic TTLH TTHL Gnd Figure1.ACTestCircuitandSwitchingTimeWaveforms Enable VIN 5.6 V ToA/B 8 kW Output 2.5 pF 450mA A/B Input Shutdown 5.6 V 500W 10 kW Internal Bias Under 10 kW 5.6 V Voltage ToA/B 5.6 V Lockout Output NOTE: ShutdownfeatureavailableonlyinJE,NEorDWPackages. Figure2.EquivalentInputCircuits Copyright©1997–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLink(s):UC1708UC2708UC3708

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) 5962-0051401Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962- 0051401Q2A UC1708L/ 883B 5962-0051401QEA ACTIVE CDIP J 16 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-0051401QE A UC1708JE/883B 5962-0051401QPA ACTIVE CDIP JG 8 1 TBD Call TI N / A for Pkg Type -55 to 125 0051401QPA UC1708 5962-0051401V2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962- 0051401V2A UC1708L QMLV 5962-0051401VEA ACTIVE CDIP J 16 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-0051401VE A UC1708JEQMLV 5962-0051401VPA ACTIVE CDIP JG 8 1 TBD Call TI N / A for Pkg Type -55 to 125 0051401VPA UC1708 UC1708J ACTIVE CDIP JG 8 1 TBD Call TI N / A for Pkg Type -55 to 125 UC1708J UC1708J883B ACTIVE CDIP JG 8 1 TBD Call TI N / A for Pkg Type -55 to 125 0051401QPA UC1708 UC1708JE ACTIVE CDIP J 16 1 TBD Call TI N / A for Pkg Type -55 to 125 UC1708JE UC1708JE883B ACTIVE CDIP J 16 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-0051401QE A UC1708JE/883B UC1708L883B ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962- 0051401Q2A UC1708L/ 883B UC2708DW ACTIVE SOIC DW 16 40 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 UC2708DW & no Sb/Br) UC2708DWTR ACTIVE SOIC DW 16 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 UC2708DW & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) UC2708N ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type -40 to 85 UC2708N & no Sb/Br) UC3708DW ACTIVE SOIC DW 16 40 Green (RoHS NIPDAU Level-2-260C-1 YEAR 0 to 70 UC3708DW & no Sb/Br) UC3708DWG4 ACTIVE SOIC DW 16 40 Green (RoHS NIPDAU Level-2-260C-1 YEAR 0 to 70 UC3708DW & no Sb/Br) UC3708DWTR ACTIVE SOIC DW 16 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR 0 to 70 UC3708DW & no Sb/Br) UC3708N ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 UC3708N & no Sb/Br) UC3708NE ACTIVE PDIP N 16 25 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 UC3708NE & no Sb/Br) UC3708NG4 ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 UC3708N & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF UC1708, UC1708-SP, UC3708 : •Catalog: UC3708, UC1708 •Military: UC1708 •Space: UC1708-SP NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product •Military - QML certified for Military and Defense Applications •Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) UC2708DWTR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1 UC3708DWTR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) UC2708DWTR SOIC DW 16 2000 367.0 367.0 38.0 UC3708DWTR SOIC DW 16 2000 367.0 367.0 38.0 PackMaterials-Page2

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GENERIC PACKAGE VIEW DW 16 SOIC - 2.65 mm max height 7.5 x 10.3, 1.27 mm pitch SMALL OUTLINE INTEGRATED CIRCUIT This image is a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4224780/A www.ti.com

PACKAGE OUTLINE DW0016A SOIC - 2.65 mm max height SCALE 1.500 SOIC C 10.63 SEATING PLANE TYP 9.97 A PIN 1 ID 0.1 C AREA 14X 1.27 16 1 10.5 2X 10.1 8.89 NOTE 3 8 9 0.51 16X 0.31 7.6 B 7.4 0.25 C A B 2.65 MAX NOTE 4 0.33 TYP 0.10 SEE DETAIL A 0.25 GAGE PLANE 0.3 0 - 8 0.1 1.27 0.40 DETAIL A (1.4) TYPICAL 4220721/A 07/2016 NOTES: 1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm, per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm, per side. 5. Reference JEDEC registration MS-013. www.ti.com

EXAMPLE BOARD LAYOUT DW0016A SOIC - 2.65 mm max height SOIC 16X (2) SEE SYMM DETAILS 1 16 16X (0.6) SYMM 14X (1.27) 8 9 R0.05 TYP (9.3) LAND PATTERN EXAMPLE SCALE:7X METAL SOLDER MASK SOLDER MASK METAL OPENING OPENING 0.07 MAX 0.07 MIN ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4220721/A 07/2016 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DW0016A SOIC - 2.65 mm max height SOIC 16X (2) SYMM 1 16 16X (0.6) SYMM 14X (1.27) 8 9 R0.05 TYP (9.3) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:7X 4220721/A 07/2016 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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MECHANICAL DATA MCER001A – JANUARY 1995 – REVISED JANUARY 1997 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE 0.400 (10,16) 0.355 (9,00) 8 5 0.280 (7,11) 0.245 (6,22) 1 4 0.065 (1,65) 0.045 (1,14) 0.063 (1,60) 0.020 (0,51) MIN 0.310 (7,87) 0.015 (0,38) 0.290 (7,37) 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0°–15° 0.015 (0,38) 0.100 (2,54) 0.014 (0,36) 0.008 (0,20) 4040107/C 08/96 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification. E. Falls within MIL STD 1835 GDIP1-T8 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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IMPORTANTNOTICEANDDISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2020, Texas Instruments Incorporated