ICGOO在线商城 > 集成电路(IC) > PMIC - 照明,镇流器控制器 > UBA20270T/1,518
数量阶梯 | 香港交货 | 国内含税 |
+xxxx | $xxxx | ¥xxxx |
查看当月历史价格
查看今年历史价格
UBA20270T/1,518产品简介:
ICGOO电子元器件商城为您提供UBA20270T/1,518由NXP Semiconductors设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 UBA20270T/1,518价格参考。NXP SemiconductorsUBA20270T/1,518封装/规格:PMIC - 照明,镇流器控制器, 。您可以下载UBA20270T/1,518参考资料、Datasheet数据手册功能说明书,资料中有UBA20270T/1,518 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | 集成电路 (IC) |
描述 | IC CFL LAMP DVR 600V 16-SOIC |
产品分类 | |
品牌 | NXP Semiconductors |
数据手册 | |
产品图片 | |
产品型号 | UBA20270T/1,518 |
PCN封装 | |
rohs | 无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | - |
产品培训模块 | http://www.digikey.cn/PTM/IndividualPTM.page?site=cn&lang=zhs&ptm=25733 |
供应商器件封装 | 16-SO |
其它名称 | 568-8543-2 |
制造商卷带宽度 | 16mm |
制造商卷带材料 | 塑料 |
制造商卷带直径 | 13"(330mm) |
包装 | 带卷 (TR) |
图号 | 568; SOT109-1; D, T, TN2; 16 |
安装类型 | 表面贴装 |
封装/外壳 | 16-SOIC(0.154",3.90mm 宽) |
工作温度 | -40°C ~ 85°C |
标准包装 | 2,500 |
电压-电源 | 11.9 V ~ 13.8 V |
电流-灌/拉输出 | - |
电流-电源 | 1.6mA |
类型 | CFL/TL 控制器 |
调光 | 是 |
频率 | 22kHz ~ 100kHz |
UBA20270 600 V Driver IC for dimmable compact fluorescent lamps Rev. 2 — 8 September 2011 Product data sheet 1. General description The UBA20270 is a high-voltage power IC intended to control higher powered self ballasted Compact Fluorescent Lamp (CFL) lighting applications. The UBA20270 is a controller circuit with advanced features for dimming and has a lamp current controlled boost feature for boosting cold (amalgam) CFLs. The controller contains a half-bridge drive function for CFL, a high-voltage level-shift circuit with integrated bootstrap diode. In addition, the controller contains an oscillator function, a current control function both for preheat and burn, a timer function and protection circuits. The UBA20270 is supplied via a dV/dt current charge supply circuit from the half-bridge circuit. Remark: Mains voltages noted are AC. 2. Features and benefits 2.1 Half-bridge features Integrated high-voltage level-shift function with integrated bootstrap diode 2.2 Preheat and ignition features Coil saturation protection during ignition Adjustable preheat time Adjustable preheat current Ignition lamp current detection 2.3 Lamp boost features Adjustable boost timing Fixed boost current ratio of 1.5 Gradually boost to burn transition timing 2.4 Dim features Continuously variable dimming function for standard phase cut dimmers Natural dimming curve by logarithmic correction Adjustable Minimum Dimming Level (MDL) Controlled lamp ON/OFF
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps 2.5 Protection OverCurrent Protection (OCP) in boost and burn state Capacitive Mode Protection (CMP) OverPower Protection (OPP) Power-down function OverTemperature Protection (OTP) 2.6 Other features Current controlled operating in boost and burn state External power-down function Lamp flicker suppression 3. Applications Dimmable compact fluorescent lamps for power levels above 20 W and for universal mains voltages. 4. Ordering information Table 1. Ordering info rmation Type number Package Name Description Version UBA20270T/N1 SO16 Plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 2 of 32
xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x P U 5 N roduct data BA20270 4VDD BOOTSTRAP 14 FS . Blo XP Sem sh HS 16 GHS ck ic eet SUPPLY REVFOELRTEANGCEES DIVLIODGE IBCY 2 DLROIGVEICR SLHEIFVTEELR driver 15 HBO dia ond TEMSPEENRSAOTRURE LdrSiver 2 GLS gr uc 5 V DIGITAL 160°120° 80° 1 SLS a to m r 5 V ANALOG s CAPACITIVE MODE DETECTOR STATE LOGIC VS LOW RESET Vth(capm)SLS A ll inform CP 11 RESET STATE C PREHEAT CURRENT SENSOR Rev. 2 — 8 September 2011 ation provided in this document is subject to legal disclaimers. SGNCDB 1123 B1 OμPAORSETH ETIAM6T Eμ/AR 60 μA 5 V LOGICCOUNTER POSPIWGTBRBHEANOEUORRIOHTRL-TIEDSDN-OUATO NSST PWS TT SSTSAANTATTTT AATASEETTETTEEEATE LOGILOGICIGNIOTIIVNO2E5DNR μU CCACUUTRRORRREE SNNVATTpTh VDD(UStEhERLV(TTSdAthEe)ET(toC)CIicOgTTpnNO)O(SC/RRLSSI) 3 PGND 600 V Driver IC for dim m REFERENCE VOLTAGE LOGIC BOOST BOOST ENABLE START ENABLE a CURRENT CONTROLLED OSCILLATOR FREQUENCY AMPLIFIER Vclamp ble 1.27 V CONTROL VLD (CSI) c o OTA Vth(bst) Vth(start) m (DCI) (DCI) 10 DCI p I VCO VTD(hCeIc1) act U © N V CULRARMEPNT Votp(CSI) DCI DIMMER flu B 3 of 32 XP B.V. 2011. All rights reserved. Fig 1. BlockR5 RdEiFagram 6CF 8CI SENSOR 9CDSSIR M275D μLA LEVEL SHIFT CONTROL 001aam663 orescent lamps A20270
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps 6. Pinning information 6.1 Pinning SLS 1 16 GHS GLS 2 15 HBO PGND 3 14 FS VDD 4 13 SGND UBA20270 RREF 5 12 CB CF 6 11 CP MDL 7 10 DCI CI 8 9 CSI 001aam664 Fig 2. Pin configuration (SO16) 6.2 Pin description Table 2. Pin description Symbol Pin Description SLS 1 source low-side switch input GLS 2 low-side gate driver output PGND 3 power ground V 4 low voltage supply DD RREF 5 internal reference current input CF 6 voltage controlled oscillator capacitor MDL 7 minimum dimming level input CI 8 voltage controlled oscillator input integrating capacitor CSI 9 current feedback sense input DCI 10 dimming level input CP 11 preheat timing capacitor CB 12 boost timing capacitor SGND 13 signal ground FS 14 floating supply voltage HBO 15 half-bridge output GHS 16 high-side gate driver output UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 4 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps 7. Functional description The UBA20270 is an IC for driving external half-bridge MOSFETs in self ballasted high-power CFL and their derivatives. The UBA20270 is equipped with a dimming control input that has a logarithmic corrected natural dimming function. This function enables a less sensitive brightness control of the lamp at low dim levels. The UBA20270 is rated up to a maximum continuous rectified mains voltage of 500 V (peak 600 V). The UBA20270 includes all the necessary functions for preheat, ignition, boost, and on-state operation of the lamp. In addition, the UBA20270 includes several protection measures that safeguard the functioning of the CFL and controller. The controller states are shown in Figure 3. VDD = 0 RESET STATE VDD < VDD(rst) HOLD = 0 VDD > VDD(rst) VDD < VDD(rst) START-UP STATE VCP < Vth(rel)CP POWER-DOWN STATE (1) PREHEAT STATE (2) HOLD STATE (3) HOLD = 1 preheat time completed IGNITION STATE (4) Ignition_Detected (6) BOOST AND BURN (5) STATES 001aam665 (1) V > V AND V > V AND (HOLD = 0 OR V < V ) DD DD(start) i(DCI) th(start)DCI CP th(rel)CP (2) VDD < VDD(stop) OR Vi(DCI) < Vth(start)DCI Vth(hys)DCI (3) (End of ignition time AND HOLD = 0) OR VDD < VDD(stop) OR Vi(DCI) < Vth(start)DCI Vth(hys)DCI (4) End of ignition time AND HOLD = 1 (5) VCP < Vth(pd)CP OR overcurrent fault time > 1⁄10 tph OR fbridge(max) detected in capacitive mode (6) VDD < VDD(stop) OR Vi(DCI) < Vth(start)DCI Vth(hys)DCI Fig 3. State diagram UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 5 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps 7.1 Lamp start-up cycle 7.1.1 Reset state The UBA20270 is in a reset state while the supply voltage on the V pinis below the DD V level. In the reset state, a part of the internal supply is turned off, all registers, DD(rst) counters and timers are undefined. In addition, the hold state latch is reset and both the applied external high and low-side transistor (Q1, Q2) are non-conductive. During power-up, the low voltage supply capacitor on the V pin is charged via an external DD start-up resistor. When the voltage on the V pin is above the V level, the start-up DD DD(rst) state is entered. The UBA20270 enters the reset state when the supply voltage on the V pin drops lower than V . DD DD(rst) 7.1.2 Start-up state Start-up is achieved by charging the low voltage supply capacitor on the V pin via an DD external start-up resistor. At start-up the High-Side (HS) transistor is non-conductive and the Low-Side (LS) is conductive to enable charging of the bootstrap capacitor. This capacitor supplies the HS driver and level shifter circuit connected between the FS and HBO pin. A DC reset circuit is incorporated in the ICs HS driver. This circuit ensures that lower than the lockout voltage on the FS pin the output voltage (V - V ) is zero. GHS HBO As the start-up state is entered, the circuit only starts oscillating when the low voltage supply (V ) reaches the value of V AND V > V . The circuit starts DD DD(start) i(DCI) th(start)DCI oscillating at f . bridge(max) The circuit enters the preheat state as soon as the capacitor on the CP pin is charged to a voltage level above V . To remain oscillating, the V voltage must remain higher th(CP)max DD than V and lower than the upper limit V . In addition, the typical voltage level DD(stop) DD(clamp) on the DCI pin must be higher than V V = 0.24 V. th(start)DCI th(hys)DCI An UnderVoltage LockOut (UVLO) is implemented on the DCI pin to create a guaranteed turn-off for multiple lamps when the lamps are at low dim levels. The UVLO also guarantees that there is a preheat phase when the dim level is turned up again. The typical turn-on level on the DCI pin is set to lower than V = 0.36 V, else it th(start)DCI increases the turn-on hysteresis of the lamp. This level enables the UBA20270 to perform a stable ignition of the lamp when there is already sufficient power from the dimmer at lower dim levels. During the start-up state, the voltage on the CF pin is at zero and the CB pin is close to zero. The voltage on the CP pin rises to higher than V level during the start-up th(CP)max state. See Figure 9. 7.1.3 Preheat state Starting at f , the frequency decreases by charging capacitor C via an output bridge(max) CI current circuit controlled by the preheat current sensor circuit. This state continues until the momentary value of the voltage across sense resistor R reaches the internally SLS fixed preheat voltage level (SLS pin). At this level, the current of the preheat current sensor reaches a charge and discharge balanced state on capacitor C to set the CI frequency. UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 6 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps The preheat time consists of eight saw-toothed pulses at the CP pin. Preheat begins as soon as the capacitor on the CP pin is charged to a voltage higher than V . During th(CP)max the preheat time, the current feedback sensor circuit (input CSI pin) is disabled. To increase noise immunity, an internal filter of 30 ns is included at the SLS pin. If during preheat, the level on the DCI pin drops lower than V V th(start)DCI th(hys)DCI = 0.24 V or the V pin drops lower than V thepreheat state is immediately DD DD(stop), stopped. The circuit enters the hold state delaying a new preheat cycle. A fixed voltage drop on the preheat capacitor C and a fixed discharge current on the CP pin sets the CP delay time. A new preheat cycle starts after the CP pin level slowly discharges. This condition continues until V < V and recharges higher than V provided CP th(rel)CP th(CP)max V > V AND V > V . See Figure 5. DD DD(start) i(DCI) th(start)DCI f (kHz) 100 start frequency CFL ignition A B C preheat frequency 100 % boost bottom ~22 kHz time (s) preheat ignition boost transition burn 001aam764 Fig 4. CFL frequency from start to burn state 7.1.4 Ignition state Directly after the preheat state has been completed, the ignition state is entered. In the ignition state, the frequency sweeps down due to charging of the capacitor C on the CI CI pin with an internally fixed current. See Figure 4. During this continuous decrease in frequency, the circuit approaches the resonant frequency of the resonant tank L2, C5. This results in a high voltage across the lamp to ignite the lamp. The current sensor circuit which monitors the voltage over resistor R detects lamp ignition. See Figure 11. CSI If the voltage on the CSI pin is above the typical ignition detection threshold voltage level of 0.6 V, lamp ignition is detected. The system then changes from ignition state to the boost or burn state. If no ignition is detected, the frequency decreases further to the minimum half-bridge frequency f . To prevent continuous ignition attempts and bridge(min) over-heating of the application due to lamp damage, the UBA20270 only attempts to ignite the lamp twice after power-up. The ignition attempt counter is incremented when the lamp ignition threshold voltage on the CSI pin is not exceeded at the end of the ignition enabling time. If a second ignition attempt also exceeds the ignition time-out period, the IC enters the power-down state. See Figure 5. UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 7 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps voltage (V) 1st failed 2nd failed 5 V VCP ignition ignition Vth(CP)max attempt attempt Vth(CP)min discharge to 0 V Vth(rel)CP startup 1st preheat 2nd preheat HOLD STATE POWER DOWN STATE time time time tph ten(ign) td(restart) tph ten(ign) 1st ignition restart 2nd 2nd ignition enabling time delay time startup enabling time 0 V time (s) 001aan537 Fig 5. Retry cycle 7.1.5 Boost state and transition to burn state When ignition is detected by measuring lamp current on the CSI pin, the circuit enters the boost state. Figure 7 shows the boost and burn state in more detail. In the boost state, the nominal burn state lamp current can be increased with a fixed boost ratio of 1.5:1. This boosts up the slow luminescence increase of a cold amalgam CFL lamp, provided V > V . If the IC is at a temperature (T ) before entering the boost state, the DCI th(bst)DCI j(bp)bst burn state is bypassed. A boost timing circuit is included to determine the boost time and transition to burn time. The circuit consists of a clock generator comprising C , R and a 64-step counter. CB ext(RREF) When the timer is not operating, C is discharged to lower than the V level of CB th(CB)min 1.1 V. This voltage, about 0.6 V, is still higher than the level at which the comparator on C detects if the CB pin is shorted to ground. CB The boost time consists of 63 saw-toothed pulses at the CB pin and automatically followed by the transition time at the CP pin. The 32 saw-tooth pulses form the transition time from boost to burn enabling a smooth transition between the current controlled boost and burn state. The total transition time is approximately four times the preheat time as shown in Figure 6. UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 8 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps voltage (V) 5 V VCP 1 32 Vth(CP)max 4.5 V Vth(CP)min 3.8 V Vth(CB)max 3.6 V VCB Vth(CB)min 1.1 V 1 2 61 62 63 0.6 V ignition boost transition burn 0 V time (s) 001aam765 Fig 6. Boost timing In the boost state, the lamp current feedback control circuit operates the same as in the burn state. This action is used to improve lamp stability. Lamp current boosted by a fixed ratio of 1.5 compared to the burn state, boosts up the slow luminescence increase of a cold CFL lamp. In the boost to burn transition time there is a slow 15-step ratio decrease from 1.5 to 1. For the transition to burn time, the preheat timer is reused and the boost ratio is gradually decreased in 15 steps from 1.5 to 1. The steps occur within 32 saw-toothed pulses on the CP pin. The 32 saw-toothed pulses form the transition time from boost to burn to enable a smooth transition between the current controlled boost and burn state. Given the application values of C and R a boost time of more than CB ext(RREF) 300 s is possible. In addition to boost bypass at temperature T ( 80 C), there is a j(bp)bst temperature protection function during the boost state of T ( 120 C). If the IC j(end)bst temperature passes this level during boost, the transition timer is immediately started in order to enter the burn state faster. This action effectively reduces the boost time. See Figure 4 [B]. The current boost in the boost state does not start when V is lower than V . i(DCI) th(bst)DCI Current boost ends when V is lower than V V without a boost i(DCI) th(bst)DCI th(bst)hys(DCI) transition. See Figure 4 [A]. Remark: If the CB pin is shorted to ground, the boost function is disabled. During such conditions, the bottom frequency f is 1.8 times higher than the boost bottom bridge(min) frequency f . bridge(bst)min 7.1.6 Burn state After the boost state, or when the boost state is bypassed burn state starts. The lamp current sensor circuit is still enabled. See Figure 4 [A]. The CSI pin (current sense input) measures the RMS voltage across sense resistor R . It then passes through a CSI Double-Sided Rectifier (DSR) circuit and fed towards an Operational Transconductor Amplifier (OTA). When the RMS voltage on the CSI pin reaches the internal reference level, the lamp current sensor circuit takes over the control of the lamp current. The UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 9 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps internal current output of the OTA is transferred via an integrator on the CI pin to the input of the Voltage Controlled Oscillator (VCO). The VCO regulates the frequency and as a result, the lamp current. BOOST AND BURN STATES boost timer running Vi(DCI) > Vth(bst)DCI AND boost 00 (2) 01 Boost_ratio = 1 Boost_ratio = 1.5 burn select boost (3) temp < (Tj(otp) - Tj(otp)hys (1) Vi(CSI) = Votp(CSI) Vi(CSI) = Vclamp(CSI) (4) (66 % level) (100 % level) temp > (Tj(otp) 10 11 burn (5) boost transition 001aam668 (1) Temp > T OR Boost_Disable j(bp)bst (2) Temp < Tj(bp)bst AND NOT Boost_Disable (3) NOT (Boost OR Boost transition) (4) Temp > Tj(end)bst OR Boost timer ended OR (Boost_ratio = 1.5 AND VDCI < Vth(bst)DCI - Vth(bst)hys(DCI)) (5) Boost_Transition timer ended OR VDCI < Vth(bst)DCI Vth(bst)hys(DCI) OR Temp > Tj(otp) Fig 7. Boost and burn state machine 7.1.7 Hold state The hold state is a special state to reduce lamp flicker at deep dim levels, on or near dim and ignition threshold level. See Figure 3. The hold state is entered following: • a failed ignition attempt • or when the low supply voltage V is lower than V in the ignition or preheat DD DD(stop) state • or when V < V V in the ignition or preheat state DCI th(start)DCI th(hys)DCI A repeated aborted preheat or ignition cycle due to a drop in DCI voltage that is lower than V V or a drop in supply voltage that is lower than V in preheat or th(start)DCI th(hys)DCI DD(stop) ignition state does not increment the ignition attempt counter. The UBA20271/2 enters the hold state only delaying a new preheat cycle by the same time delay and mechanism. As shown in Figure 5 hold state retention time. UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 10 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps When CP is lower than V the IC is released from the hold state and moves to the th(rel)CP, start-up state. See Figure 3. Alternatively, the hold state ends when the supply voltage is lower than V and the IC is reset. DD(rst) With a 470 nF capacitor on the CP pin, the typical hold state retention delay is between 1.0 seconds and 1.7 seconds. However, it depends on where the preheat cycle is cut off on the rising or falling edge of the preheat timing. The retention time for a failed ignition always starts from the top of the rising edge on the CP pin. See Figure 5. In the hold state, a latch is set (hold state latch = 1), the oscillator is stopped, transistor HS is non-conductive and transistor LS conducting. The voltage on pin V alternates between DD V and V as long as the voltage on the CP pin has not reached V See DD(start) DD(stop) th(rel)CP. Figure 5. The alternating supply voltage is a result of the current drawn by the IC supply pin V . DD The supply current is less than 220 A, when the supply voltage V is increasing DD between V and V . The supply current is typically 2 mA when V is DD(stop) DD(start) DD decreasing between V and V . More current is drawn during the decreasing DD(start) DD(stop) slope of V as the internal analog supply is turned on when V > V . This DD DD DD(start) condition enables comparators in the IC to monitor the voltage on the CP pin and whether the supply voltage V decreases lower than V . DD DD(stop) 7.2 Oscillation and timing 7.2.1 Oscillation The internal oscillator is a VCO circuit which generates a sawtooth waveform between the Vth(CF)max level and 0 V. Capacitor CCF, resistor Rext(RREF), and the voltage at the CI pin determine the frequency of the sawtooth. R and C determine the minimum and ext(RREF) CF maximum switching frequencies. Their ratio is internally fixed. There are two ratios, the ratio between f and f is 2.5 and the ratio between f and bridge(max) bridge(min) bridge(max) f is4.6. The sawtooth frequency is twice the half-bridge frequency. bridge(bst)min Transistors HS (Q1) and LS (Q2) are brought into conduction with a duty cycle of approximately 50 %. Figure 8 provides an overview of the oscillator signal and driver signals. The oscillator starts oscillating at f . The non-overlap time between the bridge(max) gate drive signals V and V is t . GLS GHS no UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 11 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps voltage (V) VCF 0 tdch V(GHS-HBO) 0 VGLS tno tno 0 VHBO 0 time (s) 001aam766 Fig 8. Sawtooth, gate driver and half-bridge output signals 7.2.2 Combined timing circuit A combined timing circuit is included to determine the preheat time, ignition enabling time and overcurrent time, see Figure 9. The circuit consists of a clock generator defined by C and R and a counter. When the timer is not operating, C is charged to 5 V. CP ext(RREF) CP The timing circuit starts operating after the start-up state, as soon as the low supply voltage has reached V Additionally the DCI input voltage must be higher than DD(start). V and the voltage on the CP pin must pass V . The preheat time consists th(start)DCI th(CP)max of eight saw-tooth pulses on the CP pin as shown in Figure 9. The maximum ignition enabling time following the preheat phase is two complete sawtooth (triangular) pulses. During the boost and burn state, part of the timer is used to generate the maximum overcurrent time (more than one half of the saw-toothed pulse). If a continuous overcurrent is detected, the timer starts. UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 12 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps voltage (V) ignition enabling time 5 V VCP Vth(CP)max 4.5 V Vth(CP)min 3.8 V CFL ignitionovercurrent ignition fault time time startup preheat time boost-burn power down time 0 V time (s) 001aam768 Fig 9. Timing diagram preheat, ignition and overcurrent 7.3 Natural linear dimming What determines the actual internal set point level used for the current control feedback loop is an external level applied via the DCI pin for dimming. The DCI voltage is a function of the phase cut angle of the applied dimmer. To ensure that the external input for the control on the DCI pin internally stays within a certain range, this input signal passes an internal linear to logarithmic conversion circuit followed by a limiting circuit. The linear to logarithmic conversion circuit is designed to improve dimming control by correcting for the higher sensitivity of the human eye to small changes in low light levels. See Figure 10. The conversion circuit also provides a natural perceived linear brightness adjustment of the lamp. The limiting circuit prevents the signal falling below the MDL or rising above the 100 % reference level of V The output of the linear to logarithmic conversion circuit is clamp(CSI). the actual reference voltage for the lamp current control loop. See signal V in Figure 1 LD (dimmer control block). When the IC is in the burn state, the voltage is equal to the RMS voltageon the CSI pin. When the control loop is regulating correctly, the upper limit is clamped at the 100 % reference level. This condition prevents lamp current values that are too high in mains overvoltage situations. See Figure 10. The MDL level presets a minimum to which the lamp current clips at low dim levels and is adjustable via the MDL pin. An accurate minimum dimming voltage level is set by using an internal reference current (derived from the internal band gap reference circuit and resistor R ) and an applied external resistor R on the MDL pin. ext(RREF) MDL UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 13 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps voltage (V) 1.2 Vi(CSI) (1) internal [VRMS] clamp 1.0 Vclamp(CSI) 100 % 0.8 0.6 VLD 0.4 midcurve 0.2 Vth(hys)DCI MDL voltage 0 (V) 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 Vi(DCI) (V) VT(hec1)DCI VT(hec2)DCI 0.9 VT(hec3)DCI Vth(start)DCI 001aam671 (1) V = V = f(V ) i(CSI) LD i(DCI) Fig 10. CSI voltage as a function of DCI voltage 7.4 Protection and power-down 7.4.1 Coil saturation protection Coil saturation protection is integrated into the IC to allow for the use of small CFL lamps and use of small coils. Saturation of these coils is detected and excessive overcurrent due to saturation is prevented. Coil saturation protection is only enabled during the ignition state. To limit voltages and currents in the resonant circuit when there is no ignition or delayed ignition, a cycle-by-cycle control mechanism is used to prevent coil saturation. This control also limits the high peak current and dissipation in the half-bridge power transistors. Coil saturation is detected by monitoring the voltage across the R resistor. A trigger is SLS generated when this voltage exceeds the V level. When saturation is detected, a th(sat)SLS fixed current I is injected into the C capacitor to shorten the switching cycle of o(sat)CF CF the half-bridge. The injected current is maintained until the end of the switching cycle. This action immediately increases the half-bridge switching frequency. Furthermore, in each successive cycle that coil saturation is detected, capacitor C is discharged to enable an CI ignition time-out detection in the ignition state. UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 14 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps Coil saturation protection is triggered when the voltage on the SLS pin exceeds V . th(sat)SLS The voltage V on the SLS pin is also used to set the preheat current. The value of SLS external resistor R determines this voltage. SLS 7.4.2 OverCurrent Protection (OCP) OCP is active in the burn and boost states (not during boost transition). When the peak absolute value of the voltage across the current sense resistor on the SLS pin exceeds the OCP reference level V , overcurrent is detected. A current I is then sunk th(ocp)SLS o(CP) from the capacitor connected to the CP pin for the next full cycle. If the overcurrent is absent at the end of this cycle, the current is disabled. Instead a current, also equal to I , is sourced to the CP pin. If the overcurrent occurs in more than half the number of o(CP) cycles, there is a net discharging of the capacitor connected to the CP pin. When the voltage, on the CP pin is lower than V the IC enters power-down mode. In a th(CP)min continuous overcurrent condition, the overcurrent time-out of t takes about 1⁄ t fault(oc) 10 ph. The IC then enters the power-down mode. The V level corresponds with the th(ocp)SLS V level during the ignition state. th(sat)SLS 7.4.3 OverPower Protection (OPP) OPP is active in boost and burn state. The lamp current is limited and regulated to its nominal designed lamp current in case overvoltage situations on the mains supply occur. The overpower comes into action when the DCI voltage, that regulates the lamp current is exceeding the maximum DCI input range. Internally the DCI voltage is clamped to the maximum input voltage level V , see Figure 10. The DCI clamp level is T(hec3)DCI independent of any supply voltage fluctuations. 7.4.4 Capacitive Mode Protection (CMP) CMP is active in the ignition, burn and boost states and during boost transition. The signal across resistor R also provides information about the switching behavior of the SLS half-bridge. When conditions are normal, the current flows from the source of the LS transistor to the half-bridge when the LS transistor is switched on. This results in a negative voltage on the SLS pin. As the circuit yields to capacitive mode, the voltage decreases and eventually reverses polarity. The protection prevents this condition from happening by checking if the voltage on the SLS pin is higher than V . th(capm)SLS If the voltage across resistor R is above the V threshold when the LS SLS th(capm)SLS transistor is switched on, the circuit assumes that it is in capacitive mode. When capacitive mode is detected, the currents from the OTA are disabled and the capacitive mode sink current, I , is enabled. This sink current discharges the capacitor/resistor o(sink)CI circuitry on the CI pin and as a result gradually increase the half-bridge frequency. Discharge continues for the remainder of the current switching cycle, so the total current on CI is equal to the sink current. If capacitive mode persists, the action is repeated until capacitive mode is not detected. If the capacitive mode is no longer detected, the OTA starts regulating again. If the conditions causing the capacitive mode persist, the OTA regulates the system back towards capacitive mode with the protection system taking control. The system operates on the edge of capacitive mode. During boost and burn state, if the load on the half-bridge continues to be capacitive at higher frequencies, CMP eventually drives the half-bridge to the maximum frequency f . From this point, the IC enters power-down mode. bridge(max) UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 15 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps 7.4.5 Power-down mode Power-down mode is entered when: • a continuous overcurrent exceeds the maximum overcurrent time-out t . Or over fault(oc) a longer period if the overcurrent occurs in more than half the number of cycles as soon as V is reached. th(CP)min • during the boost or the burn state f is reached due to capacitive mode bridge(max) detection • two consecutive failed lamp ignition attempts occur In power-down mode, the oscillator is stopped and the HS transistor is non-conductive while the LS transistor is conductive. The V supply is internally clamped. The circuit is DD released from power-down mode by lowering the low voltage supply lower than V DD(rst) (mains switch reset). An option exists to set the IC in power-down mode via external logic. The external power-down option is only available when the IC is in the boost or burn state. To enable the external power-down option, the CP pin is used. When pin CP, is connected via a 10 k resistor to either PGND or SGND the voltage on pin CP is pulled down lower than V . This results in the IC entering power-down mode. th(pd)CP Remark: Do not connect the CP pin directly to SGND or PGND pin. Connect the SGND or PGND pin via a series 10 kresistor otherwise excessive currents flow during reset and start-up state. Excessive current prevent the IC from starting up. 7.4.6 OverTemperature Protection (OTP) The OTP circuit is designed to prevent the IC from overheating in hazardous environments. The circuit is triggered when the IC temperature exceeds the maximum temperature value T . OTP changes the lamp current to the level that corresponds to j(otp) V level. This condition remains until the IC temperature reduces by 20 C otp(CSI) (=T ) and returns to the DCI controlled level. j(otp)hys UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 16 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps 8. Limiting values Table 3. Limiting valu es In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit General R external resistance on pin RREF fixed nominal value 30 36 k ext(RREF) 33 k SR slew rate on pins HBO with 4 +4 V/ns respect to GND T ambient temperature P = 0.8 W 40 85 C amb T junction temperature 40 +150 C j T storage temperature 55 +150 C stg Currents I input current on pin CF 0 200 A i(CF) Voltages V voltage on pin HBO operating - 500 V HBO during 1 second - 600 V V voltage on pin FS with respect to HBO 0.3 +14 V FS V supply voltage 0.3 +14 V DD V input voltage on pin CSI 5 +5 V i(CSI) V input voltage on pin DCI 0 5 V i(DCI) V input voltage on pin SLS 6 +6 V i(SLS) V voltage on pin CI 0 3.5 V CI V voltage on pin MDL 0 5 V MDL ESD V electrostatic discharge voltage human body model: ESD all pins, except pins 2000 +2000 V 14,15, and 16 pins 14,15, and 16 1000 +1000 V charged device model: all pins 500 +500 V Latch-up [1] - - - [1] In accordance with SNW-FQ-303: all pins. 9. Thermal characteristics Table 4. Thermal cha racteristics Symbol Parameter Conditions Typ Unit R thermal resistance from junction to in free air; SO16 package 100 K/W th(j-a) ambient UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 17 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps 10. Characteristics Table 5. Characterist ics V = 13 V; V - V = 13 V; T = 25 C; settings according to default setting in Table 6, all voltages referenced to GND, DD FS HBO amb positive currents flow into the IC, unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Start-up state (VDD) V reset supply voltage high-side switch = off; 5.7 6.2 6.7 V DD(rst) low side switch = on V stop supply voltage 9.6 10.0 10.4 V DD(stop) V start supply voltage 11.9 12.4 12.9 V DD(start) V hysteresis of supply 2.2 2.4 2.6 V DD(hys) voltage V clamp supply voltage I = 5 mA 13.0 13.4 13.8 V DD(clamp) clamp(VDD) I clamp supply current V = 14 V 20 30 - mA DD(clamp) DD I start-up supply current V = 9 V - 190 220 A DD(startup) DD I power-down supply V = 9 V - 190 220 A DD(pd) DD current I supply current default setting; V = 1.4 V [1] - 1.6 2.0 mA DD DCI V = V V = 0 V CI clamp(CI), CB High-voltage supply (GHS, HBO and FS) I leakage current 500 V on high-voltage pins - - 30 A leak Voltage controlled oscillator Output pin IC V maximum voltage on 2.7 3.0 3.3 V CI(max) pin CI V headroom voltage on V = V + V - 80 - mV hr(CI) clamp(CI) hr(CI)) CI(max) ; pin CI burn and boost state Voltage controlled oscillator Output pin CF f maximum bridge C = 100 pF; V = 0 V [2] 88 100 112 kHz bridge(max) CF CI frequency f minimum boost bridge C = 100 pF; [2] 21 22 23 kHz bridge(bst)min CF frequency V = V CI clamp(CI) f minimum bridge C = 100 pF; [2] 38 40 42 kHz bridge(min) CF frequency V = V ; V = 0 V CI clamp(CI) CB t non-overlap time V rising edge 1.3 1.5 1.7 s no HBO V falling edge 1.3 1.5 1.7 s HBO V maximum threshold C = 100 pF; 2.40 2.50 2.60 V th(CF)max CF voltage on pin CF V = V ; V = 0 V CI clamp(CI) CB I boost output current on V = 1.5 V; V = V 12.3 11.8 11.3 A o(bst)CF CF CI clamp(CI) pin CF UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 18 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps Table 5. Characteristics …continued V = 13 V; V - V = 13 V; T = 25 C; settings according to default setting in Table 6, all voltages referenced to GND, DD FS HBO amb positive currents flow into the IC, unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit I minimum output current V = 1.5 V; V = 0 V ; 22.8 21.8 20.8 A o(CF)min CF CB on pin CF V = V CI clamp(CI) I maximum output V = 1.5 V; V = 0 V 67.0 60.0 53.0 A o(CF)max CF CB current on pin CF Gate driver output Output pins GLS, GHS I driver source current V = 4 V (GLS or GHS); 105 90 75 mA source(drv) G V = 0 V; V = V HBO DD FS = 12 V R driver sink resistance V = 2 V (GLS or GHS); 13 15.5 18 sink(drv) G V = 0 V; HBO V = V = 12 V DD FS UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 19 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps Table 5. Characteristics …continued V = 13 V; V - V = 13 V; T = 25 C; settings according to default setting in Table 6, all voltages referenced to GND, DD FS HBO amb positive currents flow into the IC, unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Bootstrap diode V forward voltage bootstrap diode; I = 5 mA; 1.3 1.7 2.1 V F FS (V = V - V ) F DD FS Preheat current sensor Input: pin SLS I input current on pin V = 0.4 V - - 1 A I(SLS) i(SLS) SLS V preheat voltage on pin [3] 0.57 0.60 0.63 V ph(SLS) SLS Output: pin CI I source output current V = 2.0 V; V < 0.6 V 10.6 9.6 8.6 A o(source)CI CI i(SLS) on pin CI I sink output current on V = 2.0 V; V > 0.6 V 26 29 32 A o(sink)CI CI i(SLS) pin CI Preheat timer, ignition timer, overcurrent fault timer Pin CP t preheat time C = 470 nF; - 0.93 - s ph CP R = 33 k ext(RREF) t ignition enable time C = 470 nF; - 0.22 - s en(ign) CP R = 33 k ext(RREF) t overcurrent fault time C = 470 nF; - 0.10 - s fault(oc) CP R = 33 k; ext(RREF) initial voltage V = 5.0 V CP I output current on pin V = 4.1 V; source () and 5.5 5.9 6.3 A o(CP) CP CP sink (+) V minimum threshold - 3.8 - V th(CP)min voltage on pin CP V maximum threshold - 4.5 - V th(CP)max voltage on pin CP V hysteresis voltage on 0.6 0.7 0.8 V hys(CP) pin CP I pull-up current on pin V = 3.8 V - 60 - A pu(CP) CP CP V power-down threshold burn state, pin CP connected - 1.0 - V th(pd)CP voltage on pin CP to SGND via 10 k V release threshold hold state, V = 1.4 V - 2.7 - V th(rel)CP DCI voltage on pin CP Boost timer Pin CB t boost time C = 470 nF; T < 80 C - 148 - s bst CB j I output current on pin V = 2.35 V; source () and 0.8 1.0 1.2 A o(CB) CB CB sink (+) V minimum threshold - 1.1 - V th(CB)min voltage on pin CB UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 20 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps Table 5. Characteristics …continued V = 13 V; V - V = 13 V; T = 25 C; settings according to default setting in Table 6, all voltages referenced to GND, DD FS HBO amb positive currents flow into the IC, unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit V maximum threshold - 3.6 - V th(CB)max voltage on pin CB V hysteresis voltage on 2.3 2.5 2.7 V hys(CB) pin CB T boost bypass junction T sensed at end ignition time 65 80 95 C j(bp)bst j temperature T boost end junction T during boost time 105 120 135 C j(end)bst j temperature I boost disable detection V = 0 V 30 25 20 A det(dis)bst CB current t transition time from C = 470 nF; T < 80 C - 3.6 - s t(bst-burn) CP j boost to burn Pin CSI N lamp current boost ratio V in boost state versus 1.4 1.5 1.6 LCBR CSI V in burn state; CSI V = 1.34 V DCI Coil saturation protection and overcurrent detection Input: pin SLS V saturation threshold ignition state 2.3 2.5 2.7 V th(sat)SLS voltage on pin SLS V overcurrent protection boost state and burn state 2.3 2.5 2.7 V th(ocp)SLS threshold voltage on pin SLS t leading edge blanking detection disabled first part - 800 - ns leb time of GLS time Output: pin CI I sink output current on V = 2.0 V; ignition state; 26 29 32 A o(sink)CI CI pin CI V > V ; cycle i(SLS) th(sat)SLS clocked Output: pin CF I saturation output V = 1.5 V; ignition state; - 160 - A o(sat)CF CF current difference on low-side switch = on pin CF Ignition current detection Input: pin CSI V ignition detection 0.55 0.60 0.65 V th(det)ign(CSI) threshold voltage on pin CSI t minimum ignition V = 0.75 V 685 885 1085 ns w(det)ign(min) th(det)ign(CSI) detection pulse width square pulse UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 21 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps Table 5. Characteristics …continued V = 13 V; V - V = 13 V; T = 25 C; settings according to default setting in Table 6, all voltages referenced to GND, DD FS HBO amb positive currents flow into the IC, unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Capacitive mode detection Input: pin SLS V capacitive mode [4] 15 5 0 mV th(capm)SLS threshold voltage on pin SLS Output: pin CI I sink output current on V > V ; 26 29 32 A o(sink)CI SLS th(capm)SLS pin CI V = 2.0 V; ignition state or CI boost and burn state Lamp current sensor and dimming control Input: pin CSI R input resistance on pin V = 1 V 1 - - M i(CSI) i(CSI) CSI V = 1 V 40 50 60 k i(CSI) V input voltage on pin controlled feedback RMS 44 50 56 mV i(CSI) CSI voltage at minimum dim level; V = 0 V; i(DCI) R = 33 k; ext(RREF) R = 2.0 k MDL controlled feedback RMS - 215 - mV voltage at mid scale of l log in curve in burn state; V = 0.9 V; i(DCI) R = 33 kW ext(RREF) voltage rectification range for 2.5 - +2.5 V linear operation V clamping voltage on pin 100 % light output; V - 1.0 - V clamp(CSI) i(DCI) CSI 1.34 V Input: pin DCI V input voltage on pin minimum voltage set by MDL V - 1.34 V i(DCI) T(hec2)DCI DCI pin resistor R input resistance on pin V = 1 V 1 - - M i(DCI) i(CSI) DCI V boost threshold voltage 1.00 1.05 1.10 V th(bst)DCI on pin DCI V hysteresis boost 80 100 120 mV th(bst)hys(DCI) threshold voltage on pin DCI V start threshold voltage - 0.35 - V th(start)DCI on pin DCI V hysteresis threshold 80 100 120 mV th(hys)DCI voltage on pin DCI V human eye correction 1 V = 0 V; V = 0 V - 0.17 - V T(hec1)DCI i(CSI) MDL transition voltage on pin DCI UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 22 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps Table 5. Characteristics …continued V = 13 V; V - V = 13 V; T = 25 C; settings according to default setting in Table 6, all voltages referenced to GND, DD FS HBO amb positive currents flow into the IC, unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit V human eye correction 2 R = 33 k; - 0.44 - V T(hec2)DCI ext(RREF) transition voltage on pin R = 2.0 k; MDL DCI V = V i(CSI) clamp(CSI) V human eye correction 3 V = 1 V - 1.34 - V T(hec3)DCI i(CSI) transition voltage on pin DCI V overtemperature RMS voltage; 380 400 420 mV otp(CSI) protection voltage on R = 33 k; ext(RREF) pin CSI R = 2.0 k; MDL V = 1.5 V; i(DCI) T > T T j j(otp) j(otp)hys Output: pin CI I output current on pin CI burn state; source () and 85 95 105 A o(CI) sink (+); V = 2.0 V CI Input: pin MDL I source current on pin 26.3 25.0 23.7 A source(MDL) MDL V voltage on pin MDL R = 33 k; - 50 - mV MDL ext(RREF) R = 2.0 k MDL Temperature protection T overtemperature 145 160 175 C j(otp) protection junction temperature T hysteresis 10 20 30 C j(otp)hys overtemperature protection junction temperature [1] For the default setting, see Table 6. [2] Switching frequency of the half-bridge output HBO. The sawtooth frequency on pin CF is twice as high. [3] Data sampling of V is performed at the end of the conduction period of the low-side power MOSFET, in preheat state. ph(SLS) [4] Data sampling of V is performed at the start of conduction of the low-side power MOSFET, in all states with oscillator active. th(capm)SLS UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 23 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps 11. Application information 11.1 Design equations All equations are only valid for R = 33 k ext(RREF) 11.1.1 C related timing equations: CP • Preheat time: C t = -------C---P----16V +5–V (1) ph I hysCP thCPmax oCP • Ignition enabling time: C t = -------C---P----4V (2) enign I hysCP oCP • Overcurrent fault time: C t = -------C---P----5–V (3) faultoc I thCPmin oCP • Transition to burn time: C t = -------C---P----64V +5–V (4) tbst–burn I hysCP thCPmax oCP • Restart delay time: C t = -------------C---P----------V –V (5) drestart I thCPmax threlCP restartCP Where: I = 0.5 A (typical) restart(CP) 11.1.2 C related timing equations: CB • Boost time: C t = -------C---B----126V +V –0.6 (6) bst I hysCB thCBmin oCB 11.1.3 C related frequency equations: CF • Maximum bridge frequency: 0.5 f = ---------------------------------------------------------------------------- (7) bridgemax C +C -----C---F-------------p---a---rV +t I thCFmax dch oCFmax • Minimum bridge frequency with disabled boost: UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 24 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps 0.5 f = ---------------------------------------------------------------------------- (8) bridgemin C +C -----C---F-------------p---a---rV +t I thCFmax dch oCFmin • Minimum bridge frequency with enabled boost: 0.5 f = ---------------------------------------------------------------------------- (9) bridgebstmin C +C -----C---F-------------p---a---rV +t I thCFmax dch obstCF Where: Cpar = 4.7 [pF] and tdch = 0.4 [s] (typical) 11.1.4 R related preheat current: SLS V V I = ----p---h----S---L---S--- I -------p--h-----S--L---S------ (10) phM RSLS phRMS RSLS 3 11.1.5 R related MDL: MDL • MDL threshold voltage: V = R I (11) MDL MDL sourceMDL D5 D6 CB CCB C17 C3 12 R5 Q1 GHS 16 CP CCP 11 FS 14 R8 R6 C12 CI C15 8 C16 R1 L1 D1 D2 HBO 15 C1 C2 CFL C9 D8 VDD 4 UBA20270 7 MDL RMDL C10 D7 C13 RREFRREF 5 D3 D4 R2 Q2 GLS L2 2 CF CCF SLS 6 1 R3 C4 C5 C8 R9 CSI 9 R10 DCI 10 R7 D9 3 13 R4 C11 RCSI C14 R11 C7 RSLS C6 PGND SGND 001aam672 Fig 11. Application diagram Detailed in Table 6 is a list of typical application components. See Figure 11. Table 6. Typical components for a 230 V mains application Reference Component UBA20270 Description R1 10 2 W fusible resistor R2, R3 220 k R4 22 k UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 25 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps Table 6. Typical components for a 230 V mains application …continued Reference Component UBA20270 Description R5, R6 330 k R7, R10 100 k R8 1 k R9 1 k R11 39 k R 33 k; 1 % REF R 1.2 SLS R 1 k MDL R 8.2 adjust for nominal lamp current CSI C1, C2 22 nF; 630 V C3 3.3 nF; 1000 V C4 10 F; 400 V C5 4.7 nF; 1000 V lamp capacitor C6, C14 470 nF C7 100 pF C8 47 nF; 400 V C9 560 pF; 500 V V charge pump capacitor DD C10 not mounted C11 4.7 nF C12 100 nF C13 470 nF C15 220 nF C16 not mounted C17 22 nF; 400 V C 150 nF CB C 470 nF CP C 100 pF; 2 % CF Q1, Q2 SPS02N60C3 D1 to D4 1N4007 D5, D6 1N4937 D7 BZX84JC12 D8 1N4148 L1 4.7 mH mains filter inductor; I = 300 mA SAT L2 2000/2/2 H lamp inductor D9 1N4148 UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 26 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps 12. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A1 (A 3 ) A pin 1 index θ Lp 1 8 L e w M detail X bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. A1 A2 A3 bp c D(1) E(1) e HE L Lp Q v w y Z(1) θ 0.25 1.45 0.49 0.25 10.0 4.0 6.2 1.0 0.7 0.7 mm 1.75 0.25 1.27 1.05 0.25 0.25 0.1 0.10 1.25 0.36 0.19 9.8 3.8 5.8 0.4 0.6 0.3 8o 0.010 0.057 0.019 0.0100 0.39 0.16 0.244 0.039 0.028 0.028 0o inches 0.069 0.01 0.05 0.041 0.01 0.01 0.004 0.004 0.049 0.014 0.0075 0.38 0.15 0.228 0.016 0.020 0.012 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC JEITA PROJECTION 99-12-27 SOT109-1 076E07 MS-012 03-02-19 Fig 12. Package outline SOT109-1 (SO16) UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 27 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps 13. Abbreviations Table 7. Abbreviations Acronym Description CFL Compact Fluorescent Lamp CMP Capacitive Mode Protection DSR Double-Sided Rectifier ESD ElectroStatic Discharge HS High-Side LS Low-Side MDL Minimum Dimming Level OCP OverCurrent Protection OPP OverPower Protection OTA Operational Transconductance Amplifier OTP OverTemperature Protection RMS Root Mean Square SR Slew Rate UVLO UnderVoltage LockOut VCO Voltage Controlled Oscillator UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 28 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps 14. Revision history Table 8. Revision history Document ID Release date Data sheet status Change notice Supersedes UBA20270 v.2 20110908 Prroduct data sheet - UBA20270 v.1 UBA20270 v.1 20110816 Preliminary data sheet - - UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 29 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of Draft — The document is a draft version only. The content is still under NXP Semiconductors products in such equipment or applications and internal review and subject to formal approval, which may result in therefore such inclusion and/or use is at the customer’s own risk. modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of Applications — Applications that are described herein for any of these information included herein and shall have no liability for the consequences of products are for illustrative purposes only. NXP Semiconductors makes no use of such information. representation or warranty that such applications will be suitable for the specified use without further testing or modification. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended Customers are responsible for the design and operation of their applications for quick reference only and should not be relied upon to contain detailed and and products using NXP Semiconductors products, and NXP Semiconductors full information. For detailed and full information see the relevant full data accepts no liability for any assistance with applications or customer product sheet, which is available on request via the local NXP Semiconductors sales design. It is customer’s sole responsibility to determine whether the NXP office. In case of any inconsistency or conflict with the short data sheet, the Semiconductors product is suitable and fit for the customer’s applications and full data sheet shall prevail. products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate Product specification — The information and data provided in a Product design and operating safeguards to minimize the risks associated with their data sheet shall define the specification of the product as agreed between applications and products. NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, NXP Semiconductors does not accept any liability related to any default, shall an agreement be valid in which the NXP Semiconductors product is damage, costs or problem which is based on any weakness or default in the deemed to offer functions and qualities beyond those described in the customer’s applications or products, or the application or use by customer’s Product data sheet. third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and 15.3 Disclaimers the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limited warranty and liability — Information in this document is believed to Limiting values — Stress above one or more limiting values (as defined in be accurate and reliable. However, NXP Semiconductors does not give any the Absolute Maximum Ratings System of IEC 60134) will cause permanent representations or warranties, expressed or implied, as to the accuracy or damage to the device. Limiting values are stress ratings only and (proper) completeness of such information and shall have no liability for the operation of the device at these or any other conditions above those given in consequences of use of such information. the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or In no event shall NXP Semiconductors be liable for any indirect, incidental, repeated exposure to limiting values will permanently and irreversibly affect punitive, special or consequential damages (including - without limitation - lost the quality and reliability of the device. profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such Terms and conditions of commercial sale — NXP Semiconductors damages are based on tort (including negligence), warranty, breach of products are sold subject to the general terms and conditions of commercial contract or any other legal theory. sale, as published at http://www.nxp.com/profile/terms, unless otherwise Notwithstanding any damages that customer might incur for any reason agreed in a valid written individual agreement. In case an individual whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards agreement is concluded only the terms and conditions of the respective customer for the products described herein shall be limited in accordance agreement shall apply. NXP Semiconductors hereby expressly objects to with the Terms and conditions of commercial sale of NXP Semiconductors. applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without No offer to sell or license — Nothing in this document may be interpreted or limitation specifications and product descriptions, at any time and without construed as an offer to sell products that is open for acceptance or the grant, notice. This document supersedes and replaces all information supplied prior conveyance or implication of any license under any copyrights, patents or to the publication hereof. other industrial or intellectual property rights. Suitability for use — NXP Semiconductors products are not designed, Export control — This document as well as the item(s) described herein authorized or warranted to be suitable for use in life support, life-critical or may be subject to export control regulations. Export might require a prior safety-critical systems or equipment, nor in applications where failure or authorization from national authorities. UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 30 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps Non-automotive qualified products — Unless this data sheet expressly NXP Semiconductors’ specifications such use shall be solely at customer’s states that this specific NXP Semiconductors product is automotive qualified, own risk, and (c) customer fully indemnifies NXP Semiconductors for any the product is not suitable for automotive use. It is neither qualified nor tested liability, damages or failed product claims resulting from customer design and in accordance with automotive testing or application requirements. NXP use of the product for automotive applications beyond NXP Semiconductors’ Semiconductors accepts no liability for inclusion and/or use of standard warranty and NXP Semiconductors’ product specifications. non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in 15.4 Trademarks automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the Notice: All referenced brands, product names, service names and trademarks product for such automotive applications, use and specifications, and (b) are the property of their respective owners. whenever customer uses the product for automotive applications beyond 16. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com UBA20270 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 8 September 2011 31 of 32
UBA20270 NXP Semiconductors 600 V Driver IC for dimmable compact fluorescent lamps 17. Contents 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 28 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . 29 2.1 Half-bridge features . . . . . . . . . . . . . . . . . . . . . 1 15 Legal information . . . . . . . . . . . . . . . . . . . . . . 30 2.2 Preheat and ignition features . . . . . . . . . . . . . . 1 15.1 Data sheet status. . . . . . . . . . . . . . . . . . . . . . 30 2.3 Lamp boost features. . . . . . . . . . . . . . . . . . . . . 1 15.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 2.4 Dim features. . . . . . . . . . . . . . . . . . . . . . . . . . . 1 15.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 30 2.5 Protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 15.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 31 2.6 Other features. . . . . . . . . . . . . . . . . . . . . . . . . . 2 16 Contact information . . . . . . . . . . . . . . . . . . . . 31 3 Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 17 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 5 7.1 Lamp start-up cycle . . . . . . . . . . . . . . . . . . . . . 6 7.1.1 Reset state . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 7.1.2 Start-up state . . . . . . . . . . . . . . . . . . . . . . . . . . 6 7.1.3 Preheat state . . . . . . . . . . . . . . . . . . . . . . . . . . 6 7.1.4 Ignition state. . . . . . . . . . . . . . . . . . . . . . . . . . . 7 7.1.5 Boost state and transition to burn state . . . . . . 8 7.1.6 Burn state. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 7.1.7 Hold state . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 7.2 Oscillation and timing. . . . . . . . . . . . . . . . . . . 11 7.2.1 Oscillation. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7.2.2 Combined timing circuit . . . . . . . . . . . . . . . . . 12 7.3 Natural linear dimming . . . . . . . . . . . . . . . . . . 13 7.4 Protection and power-down . . . . . . . . . . . . . . 14 7.4.1 Coil saturation protection . . . . . . . . . . . . . . . . 14 7.4.2 OverCurrent Protection (OCP) . . . . . . . . . . . . 15 7.4.3 OverPower Protection (OPP) . . . . . . . . . . . . . 15 7.4.4 Capacitive Mode Protection (CMP) . . . . . . . . 15 7.4.5 Power-down mode . . . . . . . . . . . . . . . . . . . . . 16 7.4.6 OverTemperature Protection (OTP) . . . . . . . . 16 8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 17 9 Thermal characteristics . . . . . . . . . . . . . . . . . 17 10 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 18 11 Application information. . . . . . . . . . . . . . . . . . 24 11.1 Design equations . . . . . . . . . . . . . . . . . . . . . . 24 11.1.1 C related timing equations: . . . . . . . . . . . . 24 CP 11.1.2 C related timing equations:. . . . . . . . . . . . . 24 CB 11.1.3 C related frequency equations:. . . . . . . . . . 24 CF 11.1.4 R related preheat current: . . . . . . . . . . . . . 25 SLS 11.1.5 R related MDL: . . . . . . . . . . . . . . . . . . . . . 25 MDL 12 Package outline. . . . . . . . . . . . . . . . . . . . . . . . 27 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 8 September 2011 Document identifier: UBA20270