TSX631, TSX632, TSX634, TSX631A, TSX632A, TSX634A μ Micropower (45 A, 200 kHz) rail-to-rail 16 V CMOS operational amplifiers Datasheet - production data Related products Single • See TSX56x or TSX92x series for higher gain bandwidth products (900 kHz or 10 MHz) Applications SOT23-5 • Industrial signal conditioning Dual • Automotive signal conditioning • Active filtering • Medical instrumentation • High impedance sensors DFN8 2x2 MiniSO-8 Description Quad The TSX63x and TSX63xA series of operational amplifiers offer low voltage operation and rail-to- rail input and output. TSX631 is the single version, TSX632 the dual version and TSX634 the quad version, with pinouts compatible with industry standards. QFN16 3x3 TSSOP14 The TSX63x and TSX63xA series offer a 200 kHz gain bandwidth product while consuming 60 µA maximum at 16 V. Features The devices are housed in the tiniest industrial • Low power consumption: 60 µA max at 16 V packages. • Supply voltage: 3.3 V to 16 V These features make the TSX63x and TSX63xA • Rail-to-rail input and output family ideal for sensor interfaces and industrial signal conditioning. The wide temperature range • Gain bandwidth product: 200 kHz typ and high ESD tolerance ease the use in harsh • Low offset voltage: automotive applications. – 500 µV max for “A” version – 1 mV max for standard version Table 1. Device summary • Low input bias current: 1 pA typ Op-amp Standard V Enhanced V • Automotive qualification version io io Single TSX631 TSX631A Benefits Dual TSX632 TSX632A • Power savings in power-conscious Quad TSX634 TSX634A applications • Easy interfacing with high impedance sensors March 2013 DocID024293 Rev 1 1/31 This is information on a product in full production. www.st.com 31

Contents TSX63x, TSX63xA Contents 1 Package pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 4 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.1 Operating voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.2 Rail-to-rail input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.3 Input offset voltage drift over temperature . . . . . . . . . . . . . . . . . . . . . . . . 18 4.4 Long term input offset voltage drift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.5 High values of input differential voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.6 PCB layouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.7 Macromodel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.1 SOT23-5 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.2 DFN8 2x2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.3 MiniSO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.4 QFN16 3x3 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.5 TSSOP14 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 6 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 2/31 DocID024293 Rev 1

TSX63x, TSX63xA Package pin connections 1 Package pin connections Figure 1. Pin connections for each package (top view) Single SOT23-5 (TSX631) Dual (cid:50)(cid:56)(cid:55)(cid:20) (cid:20) (cid:27) (cid:57)(cid:38)(cid:38)(cid:14) (cid:50)(cid:56)(cid:55)(cid:20) (cid:57)(cid:38)(cid:38)(cid:14) (cid:44)(cid:49)(cid:20)(cid:16) (cid:21) (cid:26) (cid:50)(cid:56)(cid:55)(cid:21) (cid:44)(cid:49)(cid:20)(cid:16) (cid:50)(cid:56)(cid:55)(cid:21) (cid:44)(cid:49)(cid:20)(cid:14) (cid:22) (cid:25) (cid:44)(cid:49)(cid:21)(cid:16) (cid:44)(cid:49)(cid:20)(cid:14) (cid:44)(cid:49)(cid:21)(cid:16) (cid:57)(cid:38)(cid:38)(cid:16) (cid:23) (cid:24) (cid:44)(cid:49)(cid:21)(cid:14) (cid:57)(cid:38)(cid:38)(cid:16) (cid:44)(cid:49)(cid:21)(cid:14) DFN8 2x2 (TSX632) Mini-SO8 (TSX632) Quad (cid:20) (cid:23) (cid:20)(cid:16) (cid:56)(cid:55) (cid:56)(cid:55) (cid:23)(cid:16) (cid:49) (cid:50) (cid:50) (cid:49) (cid:44) (cid:44) (cid:20)(cid:25) (cid:20)(cid:24) (cid:20)(cid:23) (cid:20)(cid:22) (cid:44)(cid:49)(cid:20)(cid:14) (cid:20) (cid:20)(cid:21) (cid:44)(cid:49)(cid:23)(cid:14) (cid:57)(cid:38)(cid:38)(cid:14) (cid:21) (cid:20)(cid:20) (cid:57)(cid:38)(cid:38)(cid:16) (cid:49)(cid:38) (cid:22) (cid:20)(cid:19) (cid:49)(cid:38) (cid:44)(cid:49)(cid:21)(cid:14) (cid:23) (cid:28) (cid:44)(cid:49)(cid:22)(cid:14) (cid:24) (cid:25) (cid:26) (cid:27) (cid:49)(cid:21)(cid:16) (cid:56)(cid:55)(cid:21) (cid:56)(cid:55)(cid:22) (cid:49)(cid:22)(cid:16) (cid:44) (cid:50) (cid:50) (cid:44) QFN16 3x3 (TSX634) TSSOP14 (TSX634) DocID024293 Rev 1 3/31

Absolute maximum ratings and operating conditions TSX63x, TSX63xA 2 Absolute maximum ratings and operating conditions Table 2. Absolute maximum ratings (AMR) Symbol Parameter Value Unit V Supply voltage(1) 18 CC V Differential input voltage (2) ±V V id CC V Input voltage(3) V - 0.2 to V + 0.2 in CC- CC+ I Input current(4) 10 mA in T Storage temperature -65 to +150 °C stg Thermal resistance junction to ambient(5)(6) SOT23-5 250 DFN8 2x2 120 R thja MiniSO-8 190 QFN16 3x3 80 °C/W TSSOP14 100 Thermal resistance junction to case R thjc DFN8 2x2 33 QFN16 3x3 30 T Maximum junction temperature 160 °C j HBM: human body model(7) 4 kV ESD MM: machine model(8) 200 V CDM: charged device model(9) 1.3 kV Latch-up immunity 200 mA 1. All voltage values, except the differential voltage are with respect to network ground terminal. 2. The differential voltage is the non-inverting input terminal with respect to the inverting input terminal. See Section 4.5 for precautions of using the TSX631 with high differential input voltage. 3. V -V must not exceed 18 V, V must not exceed 18 V. CC in in 4. Input current must be limited by a resistor in series with the inputs. 5. Short-circuits can cause excessive heating and destructive dissipation. 6. R are typical values. th 7. Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for all couples of pin combinations with other pins floating. 8. Machine model: a 200 pF cap is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω), done for all couples of pin combinations with other pins floating. 9. Charged device model: all pins plus package are charged together to the specified voltage and then discharged directly to the ground. Table 3. Operating conditions Symbol Parameter Value Unit V Supply voltage 3.3 to 16 CC V V Common mode input voltage range V - 0.1 to V + 0.1 icm CC- CC+ T Operating free air temperature range -40 to +125 °C oper 4/31 DocID024293 Rev 1

TSX63x, TSX63xA Electrical characteristics 3 Electrical characteristics Table 4. El e ctrical characteristics at V = +3.3 V with V = 0 V, V = V /2, T = 25 ° C, and CC+ CC- icm CC R = 10 kΩ connected to V /2 (unless otherwise specified) L CC Symbol Parameter Conditions Min. Typ. Max. Unit DC performance TSX63xA, T = 25 °C 700 μV TSX63xA, -40°C < T < 125 °C 1500 V Offset voltage io TSX63x, T = 25 °C 1.6 TSX63x, -40°C < T < 125 °C 2.4 mV Offset voltage, high common T = 25 °C 4 V io mode (Vicm=VCC, RL > 1 MΩ) -40°C < T < 125 °C 5 ΔV /ΔT Input offset voltage drift -40°C < T < 125 °C(1) 1 8 μV/°C io T = 25 °C 1 100(2) I Input offset current (V = V /2) io out CC -40°C < T < 125 °C 200(2) pA T = 25 °C 1 100(2) I Input bias current (V = V /2) ib out CC -40°C < T < 125 °C 200(2) R Input resistance 1 TΩ IN C Input capacitance 5 pF IN Common mode rejection ratio T = 25 °C 65 79 CMR = 20 log (ΔV /ΔV ) CMR1 icm io (Vicm = -0.1 V to VCC-1.65 V, -40°C < T < 125 °C 62 V = V /2, R > 1 MΩs) out CC L Common mode rejection ratio T = 25 °C 59 74 CMR = 20 log (ΔV /ΔV ) dB CMR2 icm io (Vicm = -0.1 V to VCC+0.1 V, -40°C < T < 125 °C 55 V = V /2, R > 1 MΩ) out CC L Large signal voltage gain T = 25 °C 100 110 A (V = 0.5 V to (V - 0.5 V), vd out CC R > 1 MΩ) -40°C < T < 125°C 90 L High level output voltage RL = 10 kΩ, T = 25 °C 70 V OH Vid = +1 V, VOH = VCC-Vout RL = 10 kΩ, -40 °C < T < 125 °C 100 mV Low level output voltage RL = 10 kΩ, T = 25 °C 70 V OL Vid = -1 V, RL = 10 kΩ, -40°C < T < 125 °C 100 T = 25 °C 4.3 5.3 I (V = V ) sink out CC -40°C < T < 125 °C 2.5 I mA out T = 25 °C 3.3 4.3 I (V = 0 V) source out -40°C < T < 125 °C 2.5 Supply current T = 25 °C 45 60 I (per operator, V = V /2, µA CC out CC R > 1 MΩ) -40°C < T < 125 °C 60 L DocID024293 Rev 1 5/31

Electrical characteristics TSX63x, TSX63xA Table 4. Electrical characteristics at V = +3.3 V with V = 0 V, V = V /2, T = 25 ° C, and CC+ CC- icm CC R = 10 kΩ connected to V /2 (unless otherwise specified) L CC Symbol Parameter Conditions Min. Typ. Max. Unit AC performance GBP Gain bandwidth product 160 200 kHz F Unity gain frequency 160 u R = 100 kΩ, C = 100 pF Φ Phase margin L L 55 degrees m G Gain margin 9 dB m R = 100 kΩ, C = 100 pF, SR Slew rate L L 0.12 V/μs V = 0.5 V to V - 0.5V out CC ∫ Low-frequency peak-to-peak e Bandwidth: f = 0.1 to 10 Hz 5 µV n input noise pp f = 1 kHz nV e Equivalent input noise voltage 60 ------------ n Hz f = 10 kHz Follower configuration, f = 1 kHz, R = 100 kΩ, THD+N Total harmonic distortion + noise in L 0.005 % V = 0.9V, BW = 22 kHz, icm V = 1 V out pp 1. See Chapter 4.3: Input offset voltage drift over temperature on page 18 2. Guaranteed by design 6/31 DocID024293 Rev 1

TSX63x, TSX63xA Electrical characteristics Table 5. E l e ctrical characteristics at V = +5 V with V = 0 V, V = V /2, T = 25 ° C, and CC+ CC- icm CC R = 10 kΩ connected to V /2 (unless otherwise specified) L CC Symbol Parameter Conditions Min. Typ. Max. Unit DC performance TSX63xA, T = 25 °C 700 μV TSX63xA, -40°C < T < 125 °C 1500 V Offset voltage io TSX63x, T = 25 °C 1.6 TSX63x, -40°C < T < 125 °C 2.4 mV Offset voltage, high common T = 25 °C 4 V io mode (Vicm=VCC, RL > 1 MΩ) -40°C < T < 125 °C 5 ΔV /ΔT Input offset voltage drift -40°C < T < 125 °C(1) 1 8 μV/°C io Long term input offset voltage nV ΔV T = 25 °C(2) 17 --------------------------- io drift month Input offset current T = 25 °C 1 100(3) I io (Vout = VCC/2) -40°C < T < 125 °C 200(3) pA T = 25 °C 1 100(3) I Input bias current (V = V /2) ib out CC -40°C < T < 125 °C 200(3) R Input resistance 1 TΩ IN C Input capacitance 5 pF IN Common mode rejection ratio T = 25 °C 65 79 CMR = 20 log (ΔV /ΔV ) CMR1 icm io (Vicm = -0.1 V to VCC-1.65 V, -40°C < T < 125 °C 62 V = V /2, R > 1 MΩ) out CC L Common mode rejection ratio T = 25 °C 62 77 CMR = 20 log (ΔV /ΔV ) dB CMR2 icm io (Vicm = -0.1 V to VCC+0.1 V, -40°C < T < 125 °C 58 V = V /2, R > 1 MΩ) out CC L Large signal voltage gain T = 25 °C 100 110 A (V = 0.5 V to (V - 0.5 V), vd out CC R > 1 MΩ) -40°C < T < 125 °C 90 L High level output voltage RL = 10 kΩ, T=25 °C 70 V OH Vid = +1 V, VOH = VCC-Vout RL = 10 kΩ, -40°C < T < 125 °C 100 mV Low level output voltage RL = 10 kΩ, T = 25 °C 70 V OL Vid = -1 V, RL = 10 kΩ, -40°C < T < 125 °C 100 T = 25 °C 11 14 I (V = V ) sink out CC -40°C < T < 125 °C 8 I mA out T = 25 °C 9 12 I (V = 0 V) source out -40°C < T < 125 °C 7 Supply current T = 25 °C 45 60 I (per operator, V = V /2, µA CC out CC R > 1 MΩ) -40°C < T < 125 °C 60 L DocID024293 Rev 1 7/31

Electrical characteristics TSX63x, TSX63xA Table 5. Electrical characteristics at V = +5 V with V = 0 V, V = V /2, T = 25 ° C, and CC+ CC- icm CC R = 10 kΩ connected to V /2 (unless otherwise specified) L CC Symbol Parameter Conditions Min. Typ. Max. Unit AC performance GBP Gain bandwidth product 160 200 kHz F Unity gain frequency 160 u R = 100 kΩ, C = 100 pF Φ Phase margin L L 55 degrees m G Gain margin 9 dB m R = 100 kΩ, C = 100 pF, SR Slew rate L L 0.12 V/μs V = 0.5 V to V - 0.5V out CC ∫ Low-frequency peak-to-peak e Bandwidth: f = 0.1 to 10 Hz 5 µV n input noise pp f = 1 kHz nV e Equivalent input noise voltage 60 ------------ n Hz f = 10 kHz Follower configuration, f = 1 kHz, R = 100 kΩ, THD+N Total harmonic distortion + noise in L 0.005 % V = 2.5V, BW = 22 kHz, icm V = 1 V out pp 1. See Chapter 4.3: Input offset voltage drift over temperature on page 18 2. Typical value is based on the Vio drift observed after 1000h at 125°C extrapolated to 25°C using the Arrhenius law and assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration. See Chapter 4.4: Long term input offset voltage drift on page 19. 3. Guaranteed by design 8/31 DocID024293 Rev 1

TSX63x, TSX63xA Electrical characteristics Table 6. El e ctrical characteristics at V = +10 V with V = 0 V, V = V /2, T = 25 ° C, and CC+ CC- icm CC R =10 kΩ connected to V /2 (unless otherwise specified) L CC Symbol Parameter Conditions Min. Typ. Max. Unit DC performance TSX63xA, T = 25 °C 500 μV TSX63xA, -40°C < T < 125 °C 1300 V Offset voltage io TSX63x, T = 25 °C 1 TSX63x, -40°C < T < 125 °C 1.8 mV Offset voltage, high common T = 25 °C 4 V io mode (Vicm=VCC, RL > 1 MΩ) -40°C < T < 125 °C 5 ΔV /ΔT Input offset voltage drift -40°C < T < 125 °C(1) 1 8 μV/°C io Long term input offset voltage nV ΔV T = 25 °C(2) 180 --------------------------- io drift month T = 25 °C 1 100(3) I Input offset current (V = V /2) io out CC -40°C < T < 125 °C 200(3) pA T = 25 °C 1 100(3) I Input bias current (V = V /2) ib out CC -40°C < T < 125 °C 200(3) R Input resistance 1 TΩ IN C Input capacitance 5 pF IN Common mode rejection ratio T = 25 °C 71 84 CMR = 20 log (ΔV /ΔV ) CMR1 icm io (Vicm = -0.1 V to VCC-1.65 V, -40°C < T < 125 °C 68 V = V /2, R > 1 MΩ) out CC L Common mode rejection ratio T = 25 °C 69 82 CMR = 20 log (ΔV /ΔV ) dB CMR2 icm io (Vicm = -0.1 V to VCC+0.1 V, -40°C < T < 125 °C 66 V = V /2, R > 1 MΩ) out CC L Large signal voltage gain T = 25 °C 100 110 A (V = 0.5 V to (V - 0.5 V), vd out CC R > 1 MΩ) -40°C < T < 125 °C 90 L High level output voltage RL = 10 kΩ, T = 25 °C 70 V OH Vid = +1 V, VOH = VCC-Vout RL = 10 kΩ, -40°C < T < 125 °C 100 mV Low level output voltage RL = 10 kΩ, T = 25 °C 70 V OL Vid = -1 V, RL = 10 kΩ, -40°C < T < 125 °C 100 T = 25 °C 35 51 I (V = V ) sink out CC -40°C < T < 125 °C 25 I mA out T = 25 °C 30 42 I (V = 0 V) source out -40°C < T < 125 °C 20 Supply current T = 25 °C 45 60 I (per operator, V = V /2, µA CC out CC R > 1 MΩ) -40°C < T < 125 °C 60 L DocID024293 Rev 1 9/31

Electrical characteristics TSX63x, TSX63xA Table 6. Electrical characteristics at V = +10 V with V = 0 V, V = V /2, T = 25 ° C, and CC+ CC- icm CC R =10 kΩ connected to V /2 (unless otherwise specified) L CC Symbol Parameter Conditions Min. Typ. Max. Unit AC performance GBP Gain bandwidth product 160 200 kHz F Unity gain frequency 160 u R = 100 kΩ, C = 100 pF Φ Phase margin L L 55 degrees m G Gain margin 9 dB m R = 100 kΩ, C = 100 pF, SR Slew rate L L 0.12 V/μs V = 0.5 V to V - 0.5V out CC ∫ Low-frequency peak-to-peak e Bandwidth: f = 0.1 to 10 Hz 5 µV n input noise pp f = 1 kHz nV e Equivalent input noise voltage 60 ------------ n Hz f = 10 kHz Follower configuration, f = 1 kHz, R = 100 kΩ, THD+N Total harmonic distortion + noise in L 0.004 % V = 5 V, BW = 22 kHz, icm V = 1 V out pp 1. See Chapter 4.3: Input offset voltage drift over temperature on page 18 2. Typical value is based on the Vio drift observed after 1000h at 125°C extrapolated to 25°C using the Arrhenius law and assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration. See Chapter 4.4: Long term input offset voltage drift on page 19. 3. Guaranteed by design 10/31 DocID024293 Rev 1

TSX63x, TSX63xA Electrical characteristics Table 7. El e ctrical characteristics at V = +16 V with V = 0 V, V = V /2, T= 25 ° C, and CC+ CC- icm CC R =10 kΩ connected to V /2 (unless otherwise specified) L CC Symbol Parameter Conditions Min. Typ. Max. Unit DC performance TSX63xA, T = 25 °C 700 μV TSX63xA, -40°C < T < 125 °C 1500 V Offset voltage io T = 25 °C 1.6 -40°C < T < 125 °C 2.4 mV Offset voltage, high common- T = 25°C 4 V io mode (Vicm=VCC, RL > 1 MΩ) -40°C < T < 125 °C 5 ΔV /ΔT Input offset voltage drift -40°C < T < 125 °C(1) 1 8 μV/°C io Long term input offset voltage μV ΔV T = 25 °C(2) 3.4 --------------------------- io drift month Input offset current T = 25 °C 1 100(3) I io (Vout = VCC/2) -40°C < T < 125 °C 200(3) pA Input bias current T = 25 °C 1 100(3) I ib (Vout = VCC/2) -40°C < T < 125 °C 200(3) R Input resistance 1 TΩ IN C Input capacitance 5 pF IN Common mode rejection ratio T = 25 °C 71 85 CMR = 20 log (ΔV /ΔV ) CMR1 icm io (Vicm = -0.1 V to VCC-1.65 V, -40°C < T < 125 °C 68 V = V /2, R > 1 MΩ) out CC L Common mode rejection ratio T = 25 °C 69 83 CMR = 20 log (ΔV /ΔV ) CMR2 icm io (Vicm = -0.1 V to VCC+0.1 V, -40°C < T < 125 °C 66 Vout = VCC/2, RL > 1 MΩ) dB Common mode rejection ratio T = 25 °C 73 87 20 log (ΔV /ΔV ) SVR CC io (VCC =3.3 V to 16 V, -40°C < T < 125 °C 70 V = V V /2) out icm CC Large signal voltage gain T = 25 °C 100 110 A (V = 0.5 V to (V - 0.5 V), vd out CC R > 1 MΩ) -40°C < T < 125 °C 90 L High level output voltage RL = 10 kΩ, T = 25 °C 70 V OH Vid = +1 V, VOH = VCC-Vout RL = 10 kΩ, -40°C < T < 125 °C 100 mV Low level output voltage RL = 10 kΩ, T = 25 °C 70 V OL Vid = -1 V, RL = 10 kΩ, -40°C < T < 125 °C 100 DocID024293 Rev 1 11/31

Electrical characteristics TSX63x, TSX63xA Table 7. Electrical characteristics at V = +16 V with V = 0 V, V = V /2, T= 25 ° C, and CC+ CC- icm CC R =10 kΩ connected to V /2 (unless otherwise specified) L CC Symbol Parameter Conditions Min. Typ. Max. Unit V = V , T = 25 °C 40 92 out CC I sink V = V , -40°C < T < 125 °C 35 out CC I mA out V = 0 V, T = 25 °C 30 90 out I source V = 0 V, -40°C < T < 125 °C 25 out Supply current T = 25 °C 45 60 I (per operator, V = V /2, µA CC out CC R > 1 MΩ) -40°C < T < 125 °C 60 L AC performance GBP Gain bandwidth product 160 200 kHz F Unity gain frequency 160 u R = 100 kΩ, C = 100 pF Φ Phase margin L L 55 degrees m G Gain margin 9 dB m R = 100 kΩ, C = 100 pF, SR Slew rate L L 0.12 V/μs V = 0.5 V to V - 0.5V out CC ∫ Low-frequency peak-to-peak e Bandwidth: f = 0.1 to 10 Hz 5 µV n input noise pp f = 1 kHz nV e Equivalent input noise voltage 60 ------------ n Hz f = 10 kHz Follower configuration, f = 1 kHz, Total harmonic distortion + in THD+N R = 100 kΩ, V = 8 V, 0.004 % noise L icm BW = 22 kHz, V = 1 V out pp 1. See Chapter 4.3: Input offset voltage drift over temperature on page 18 2. Typical value is based on the Vio drift observed after 1000h at 125°C extrapolated to 25°C using the Arrhenius law and assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration. See Chapter 4.4: Long term input offset voltage drift on page 19. 3. Guaranteed by design 12/31 DocID024293 Rev 1

TSX63x, TSX63xA Electrical characteristics Figure 2. Supply current vs. supply voltage at Figure 3. Input offset voltage distribution at V = V /2 V = 16 V icm CC CC 20 50 Vcc=16V Vicm=Vcc/2 Vicm=8V T=25°C 40 15 A) ent (µ 30 n (%) ply Curr 20 T=-40°C opulatio 10 up T=25°C P S 5 10 T=125°C 0 0 0 2 4 6 8 10 12 14 16 -1500 -1000 -500 0 500 1000 1500 Supply Voltage (V) Input offset voltage (µV) Figure 4. Input offset voltage distribution at Figure 5. Input offset voltage vs. temperature at V = 10 V V =16 V CC CC 35 3000 Vcc=3.3V Limit for TSX63x Limit for TSX63xA 30 Vicm=1.65V 2000 T=25°C V) 25 e (µ 1000 %) ag Population ( 112050 ut offset volt -10000 p n I -2000 5 Vcc=16V 0 -3000 -250 -200 -150 -100 -50 0 50 100 150 200 250 -40 -20 0 20 40 60 80 100 120 Input offset voltage (µV) Temperature (°C) Figure 6. Input offset voltage temperature Figure 7. Input offset voltage vs. input common coefficient distribution mode voltage 25 600 Vcc=16V Vicm=8V 400 20 T=25°C V) 200 µ opulation (%) 1105 Offset Voltage ( --4200000 T=-40°C T=25°C T=125°C P ut p -600 5 n I -800 Vcc=16V 0 -1000 -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 0 2 4 6 8 10 12 14 16 ΔVio/ΔT (µV/°C) Input Common Mode Voltage (V) DocID024293 Rev 1 13/31

Electrical characteristics TSX63x, TSX63xA Figure 8. Output current vs. output voltage at Figure 9. Output current vs. output voltage at V = 3.3 V V = 16 V CC CC 1100..00 125 Sink 110000 Sink 77..55 Vid=-1V Vid=-1V 75 55..00 A) A) 5500 urrent (m 0022....0055 T=125°C T=25°C T=-40°C urrent (m 2500 T=25°C T=-40°C ut C --22..55 ut C -25 T=125°C p p ut ut --5500 O --55..00 O -75 --77..55 Source --110000 Source Vcc=3.3V Vid=1V Vcc=16V Vid=1V --1100..00 -125 00..00 00..55 11..00 11..55 22..00 22..55 33..00 00..00 22..00 44..00 66..00 88..00 1100..00 1122..00 1144..00 1166..00 Output Voltage (V) Output Voltage (V) Figure 10. Output low-rail linearity Figure 11. Output high-rail linearity performance (R ≥ 2 kΩ) performance (R ≥ 2kΩ) L L 0.20 0.20 From Vcc=3.3V to Vcc=16V From Vcc=3.3V to Vcc=16V 0.15 0.15 V) Vout (V) 0.10 c - Vout ( 0.10 c V 0.05 0.05 Follower configuration Follower configuration T=25°C T=25°C 0.00 0.00 0.00 0.05 0.10 0.15 0.20 0.00 0.05 0.10 0.15 0.20 Vin (V) Vcc - Vin (V) Figure 12. Bode diagram at V = 3.3 V, Figure 13. Bode diagram at V = 3.3 V, CC CC R = 10 kΩ R = 100 kΩ L L 40 0 40 0 Gain Gain 30 -45 30 -45 20 -90 20 -90 ain (dB) 10 T=-40°C Phase -135hase (°) ain (dB) 10 T=-40°C Phase -135hase (°) G P G P 0 Vcc=3.3V T=25°C -180 0 Vcc=3.3V T=25°C -180 Vicm=1.65V Vicm=1.65V Rl=10kΩ Rl=100kΩ -10 -225 -10 -225 Cl=100pF Cl=100pF Gain=-100 T=125°C Gain=-100 T=125°C -20 -270 -20 -270 1k 10k 100k 1M 1k 10k 100k 1M Frequency (Hz) Frequency (Hz) 14/31 DocID024293 Rev 1

TSX63x, TSX63xA Electrical characteristics Figure 14. Bode diagram at V = 16 V, Figure 15. Bode diagram at V = 16 V, CC CC R = 10 kΩ R = 100 kΩ L L 40 0 40 0 Gain Gain 30 -45 30 -45 20 -90 20 -90 ain (dB) 10 T=-40°C Phase -135hase (°) ain (dB) 10 T=-40°C Phase -135hase (°) G P G P 0 Vcc=16V T=25°C -180 0 Vcc=16V T=25°C -180 Vicm=8V Vicm=8V Rl=10kΩ Rl=100kΩ -10 -225 -10 -225 Cl=100pF Cl=100pF Gain=-100 T=125°C Gain=-100 T=125°C -20 -270 -20 -270 1k 10k 100k 1M 1k 10k 100k 1M Frequency (Hz) Frequency (Hz) Figure 16. Closed-loop gain vs. Figure 17. In-series resistor (R ) vs. iso capacitive load capacitive load 15 10000 Follower configuration Follower configuration Vcc=16V Cl=470pF 1100 Stable Vcc=16V Vicm=8V Vicm=8V Rl=100kΩ Rl=100kΩ 5 T=25°C Cl=200pF 1000 T=25°C dB) 00 Ω) Gain ( Riso ( Unstable -5 Cl=20pF 100 --1100 Cl=100pF -15 10 1k 10k 100k 1M 100p 1n 10n 100n Frequency (Hz) Cload (F) Figure 18. Negative slew rate Figure 19. Positive slew rate 66..00 66..00 5.0 Vcc=16V 5.0 44..00 T=-40°C Vicm=Vcc/2 44..00 Rl=100kΩ 3.0 Cl=100pF 3.0 V) 22..00 V) 22..00 Output Voltage ( ----3221001.......0000000 T=25°CT=125°C Output Voltage ( ----0013221.......0000000 T=25°CVcTc==11265V°C T=-40°C --44..00 --44..00 Vicm=Vcc/2 -5.0 -5.0 Rl=100kΩ Cl=100pF --66..00 --66..00 -20 0 20 40 60 80 100 120 140 -20 0 20 40 60 80 100 120 140 Time (µs) Time (µs) DocID024293 Rev 1 15/31

Electrical characteristics TSX63x, TSX63xA Figure 20. Slew rate vs. supply voltage Figure 21. Small step response 00..2200 00..1100 Vcc = 16V 0.15 Vicm=8V 00..1100 00..0055 Rl=100kΩ Cl=100pF V) T=25°C Slew rate (V/µs) -0000....00005005 T=125°C T=25°C T=-40°C VVRCilllco==ma11d00==00VVkpcΩFccc/2/2 Output Voltage ( 00..0000 --00..1100 --00..0055 -0.15 --00..2200 --00..1100 44 66 88 1100 1122 1144 1166 0 10 20 30 40 Supply Voltage (V) Time (µs) Figure 22. Noise vs. frequency at V = 16 V Figure 23. 0.1 Hz to 10 Hz noise at V = 16 V CC CC 440000 4 V/VHz) 350 Vcc=16V VVciccm==186VV n Vicm=Vcc/2 T=25°C nt Input Noise Voltage ( 111222330050050000000000 T=25°C put voltage noise (µV) -202 e n al I uiv 50 q E 00 -4 10 100 1000 10000 0 2 4 6 8 10 Frequency (Hz) Time (s) Figure 24. THD+N vs. frequency at Figure 25. THD+N vs. output voltage at V = 16 V V = 16 V CC CC 1 1 Vcc=16V Vicm=8V Gain=1 Vin=1Vpp 0.1 BW=80kHz %) Rl=100kΩ %) N ( 0.1 T=25°C N ( D + D + Vcc=16V H H Vicm=8V T T 0.01 Gain=1 f=1kHz BW=22kHz Rl=100kΩ T=25°C 0.01 1E-3 100 1000 10000 0.01 0.1 1 10 Frequency (Hz) Output Voltage (Vpp) 16/31 DocID024293 Rev 1

TSX63x, TSX63xA Electrical characteristics Figure 26. Output impedance vs. frequency in Figure 27. PSRR vs. frequency closed loop configuration 10000 100 Vcc=16V Vcc=16V 1000 Vicm=8V 80 PSRR+ VGiacimn==18V Gain=1 Ω) Vosc=30mV Rl=10kΩ ce ( 100 T=25°C RMS 60 CVol=s1c0=01p0F0mV dan dB) T=25°C PP pe R ( ut im 10 PSR 40 p ut O 1 20 PSRR- 0.1 0 10 100 1k 10k 100k 1M 10M 10 100 1k 10k 100k 1M Frequency (Hz) Frequency (Hz) DocID024293 Rev 1 17/31

Application information TSX63x, TSX63xA 4 Application information 4.1 Operating voltages The amplifiers of the TSX63x and TSX63xA series can operate from 3.3 to 16 V. Their parameters are fully specified at 3.3, 5, 10 and 16 V power supplies. However, the parameters are very stable in the full V range. Additionally, the main specifications are CC guaranteed in extended temperature ranges from -40 ° C to +125 ° C. 4.2 Rail-to-rail input The TSX63x and TSX63xA are built with two complementary PMOS and NMOS input differential pairs. The devices have a rail-to-rail input, and the input common mode range is extended from V - 0.1 V to V + 0.1 V. CC- CC+ However, the performance of these devices is clearly optimized for the PMOS differential pairs (which means from V - 0.1V to V - 1.65V). CC- CC+ Beyond V - 1.65 V, the op-amp is still functional but with a degraded performance as can CC+ be observed in the electrical characteristics section of this datasheet (mainly V ). io These performances are suitable for a number of applications requiring rail-to-rail input and output. The devices are guaranteed without phase reversal. 4.3 Input offset voltage drift over temperature The maximum input voltage drift over the temperature variation is defined as the offset variation related to offset value measured at 25 °C. The operational amplifier is one of the main circuits of the signal conditioning chain, and the amplifier input offset is a major contributor to the chain accuracy. The signal chain accuracy at 25 °C can be compensated during production at application level. The maximum input voltage drift over temperature enables the system designer to anticipate the effect of temperature variations. The maximum input voltage drift over temperature is computed using Equation 1. Equation 1 -Δ - -Δ -V---T--i-o-- = maxV-----i-o---(--T---T--)---––-----V2---5-i-o--°-(--C-2---5----°---C-----)- with T = -40 °C and 125 °C. The datasheet maximum value is guaranteed by a measurement on a representative sample size ensuring a C (process capability index) greater than 2. pk 18/31 DocID024293 Rev 1

TSX63x, TSX63xA Application information 4.4 Long term input offset voltage drift To evaluate product reliability, two types of stress acceleration are used: • Voltage acceleration, by changing the applied voltage • Temperature acceleration, by changing the die temperature (below the maximum junction temperature allowed by the technology) with the ambient temperature. The voltage acceleration has been defined based on JEDEC results, and is defined using Equation 2. Equation 2 β⋅ (V –V ) A = e S U FV Where: A is the voltage acceleration factor FV β β is the voltage acceleration constant in 1/V, constant technology parameter ( = 1) V is the stress voltage used for the accelerated test S V is the voltage used for the application U The temperature acceleration is driven by the Arrhenius model, and is defined in Equation 3. Equation 3 E--k---a-⋅ ⎝⎛T--1----–T--1----⎠⎞ A = e U S FT Where: A is the temperature acceleration factor FT E is the activation energy of the technology based on the failure rate a k is the Boltzmann constant (8.6173 x 10-5 eV.K-1) T is the temperature of the die when V is used (K) U U T is the temperature of the die under temperature stress (K) S The final acceleration factor, A , is the multiplication of the voltage acceleration factor and F the temperature acceleration factor (Equation 4). Equation 4 A = A × A F FT FV A is calculated using the temperature and voltage defined in the mission profile of the F product. The A value can then be used in Equation 5 to calculate the number of months of F use equivalent to 1000 hours of reliable stress duration. DocID024293 Rev 1 19/31

Application information TSX63x, TSX63xA Equation 5 Months = A × 1000 h× 12 months⁄ (24 h× 365.25 days) F To evaluate the op-amp reliability, a follower stress condition is used where V is defined CC as a function of the maximum operating voltage and the absolute maximum rating (as recommended by JEDEC rules). The V drift (in µV) of the product after 1000 h of stress is tracked with parameters at io different measurement conditions (see Equation 6). Equation 6 V = maxV with V = V ⁄ 2 CC op icm CC The long term drift parameter (ΔV ), estimating the reliability performance of the product, is io obtained using the ratio of the V (input offset voltage value) drift over the square root of the io calculated number of months (Equation 7). Equation 7 V drift ΔV = ----------i-o------------------- io (months) where V drift is the measured drift value in the specified test conditions after 1000 h stress io duration. 4.5 High values of input differential voltage In closed loop configuration, which represents the typical use of an op-amp, the input differential voltage is low (close to V ). However, some specific conditions can lead to io higher input differential values, such as: • operation in an output saturation state • operation at speeds higher than the device bandwidth, with output voltage dynamics limited by slew rate. • use of the amplifier in a comparator configuration, hence in open loop Use of the TSX631 in comparator configuration, especially combined with high temperature and long duration can create a permanent drift of V . io All channels of the dual and quad versions of the TSX632 and TSX634 are virtually unaffected when used in comparator configuration. 4.6 PCB layouts For correct operation, it is advised to add 10 nF decoupling capacitors as close as possible to the power supply pins. 20/31 DocID024293 Rev 1

TSX63x, TSX63xA Application information 4.7 Macromodel Accurate macromodels of the TSX63x and TSX63xA are available on STMicroelectronics’ web site at www.st.com. These models are a trade-off between accuracy and complexity (that is, time simulation) of the TSX63x and TSX63xA operational amplifiers. They emulate the nominal performances of a typical device within the specified operating conditions mentioned in the datasheet. They also help to validate a design approach and to select the right operational amplifier, but they do not replace on-board measurements. DocID024293 Rev 1 21/31

Package information TSX63x, TSX63xA 5 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 22/31 DocID024293 Rev 1

TSX63x, TSX63xA Package information 5.1 SOT23-5 package information Figure 28. SOT23-5 package mechanical drawing Table 8. SOT23-5 package mechanical data Dimensions Ref. Millimeters Inches Min. Typ. Max. Min. Typ. Max. A 0.90 1.20 1.45 0.035 0.047 0.057 A1 0.15 0.006 A2 0.90 1.05 1.30 0.035 0.041 0.051 B 0.35 0.40 0.50 0.013 0.015 0.019 C 0.09 0.15 0.20 0.003 0.006 0.008 D 2.80 2.90 3.00 0.110 0.114 0.118 D1 1.90 0.075 e 0.95 0.037 E 2.60 2.80 3.00 0.102 0.110 0.118 F 1.50 1.60 1.75 0.059 0.063 0.069 L 0.10 0.35 0.60 0.004 0.013 0.023 K 0 ° 10 ° 0 ° 10 ° DocID024293 Rev 1 23/31

Package information TSX63x, TSX63xA 5.2 DFN8 2x2 package information Figure 29. DFN8 2x2 package mechanical drawing (cid:39) (cid:36) (cid:37) (cid:51)(cid:44)(cid:49)(cid:3)(cid:20)(cid:3)(cid:44)(cid:49)(cid:39)(cid:40)(cid:59)(cid:3)(cid:36)(cid:53)(cid:40)(cid:36) (cid:40) (cid:21)(cid:91) (cid:38) (cid:19)(cid:17)(cid:20)(cid:19) (cid:19)(cid:17)(cid:20)(cid:19)(cid:38)(cid:21)(cid:91) (cid:55)(cid:50)(cid:51)(cid:3)(cid:57)(cid:44)(cid:40)(cid:58) (cid:19)(cid:17)(cid:20)(cid:19)(cid:38) (cid:36) (cid:36)(cid:20) (cid:38) (cid:54)(cid:40)(cid:36)(cid:55)(cid:44)(cid:49)(cid:42) (cid:51)(cid:47)(cid:36)(cid:49)(cid:40) (cid:19)(cid:17)(cid:19)(cid:27) (cid:38) (cid:54)(cid:44)(cid:39)(cid:40)(cid:3)(cid:57)(cid:44)(cid:40)(cid:58) (cid:72) (cid:51)(cid:44)(cid:49)(cid:3)(cid:20)(cid:3)(cid:44)(cid:49)(cid:39)(cid:40)(cid:59)(cid:3)(cid:36)(cid:53)(cid:40)(cid:36) (cid:69)(cid:3)(cid:11)(cid:27)(cid:3)(cid:83)(cid:79)(cid:70)(cid:86)(cid:12) (cid:20) (cid:23) (cid:19)(cid:17)(cid:20)(cid:19) (cid:38) (cid:36) (cid:37) (cid:51)(cid:76)(cid:81)(cid:6)(cid:20)(cid:3)(cid:44)(cid:39) (cid:47) (cid:27) (cid:24) (cid:37)(cid:50)(cid:55)(cid:55)(cid:50)(cid:48)(cid:3)(cid:57)(cid:44)(cid:40)(cid:58) (cid:42)(cid:36)(cid:48)(cid:54)(cid:21)(cid:21)(cid:19)(cid:21)(cid:20)(cid:22)(cid:20)(cid:25)(cid:22)(cid:24)(cid:38)(cid:37) Table 9. DFN8 2x2 package mechanical data Dimensions Ref. Millimeters Inches Min. Typ. Max. Min. Typ. Max. A 0.70 0.75 0.80 0.028 0.030 0.031 A1 0.00 0.02 0.05 0.000 0.001 0.002 b 0.15 0.20 0.25 0.006 0.008 0.010 D 2.00 0.079 E 2.00 0.079 e 0.50 0.020 L 0.045 0.55 0.65 0.018 0.022 0.026 N 8 8 24/31 DocID024293 Rev 1

TSX63x, TSX63xA Package information 5.3 MiniSO-8 package information Figure 30. MiniSO-8 package mechanical drawing Table 10. MiniSO-8 package mechanical data Dimensions Ref. Millimeters Inches Min. Typ. Max. Min. Typ. Max. A 1.1 0.043 A1 0 0.15 0 0.006 A2 0.75 0.85 0.95 0.030 0.033 0.037 b 0.22 0.40 0.009 0.016 c 0.08 0.23 0.003 0.009 D 2.80 3.00 3.20 0.11 0.118 0.126 E 4.65 4.90 5.15 0.183 0.193 0.203 E1 2.80 3.00 3.10 0.11 0.118 0.122 e 0.65 0.026 L 0.40 0.60 0.80 0.016 0.024 0.031 L1 0.95 0.037 L2 0.25 0.010 k 0 ° 8 ° 0 ° 8 ° ccc 0.10 0.004 DocID024293 Rev 1 25/31

Package information TSX63x, TSX63xA 5.4 QFN16 3x3 package information Figure 31. QFN16 3x3 package mechanical drawing (cid:39) (cid:36) (cid:37) (cid:3)(cid:44)(cid:3)(cid:49)(cid:39)(cid:40)(cid:59)(cid:3)(cid:36)(cid:53)(cid:40)(cid:36) (cid:11)(cid:39)(cid:18)(cid:21)(cid:91)(cid:40)(cid:18)(cid:21)(cid:12) (cid:40) (cid:91) (cid:21) (cid:38) (cid:68) (cid:68) (cid:68) (cid:68)(cid:68)(cid:68) (cid:38) (cid:21)(cid:91) (cid:3) (cid:55)(cid:50)(cid:51)(cid:3)(cid:3)(cid:57)(cid:44)(cid:40)(cid:58) (cid:70)(cid:70)(cid:70) (cid:38) (cid:20) (cid:36) (cid:38) (cid:36) (cid:54)(cid:40)(cid:36)(cid:55)(cid:44)(cid:49)(cid:42) (cid:51)(cid:47)(cid:36)(cid:49)(cid:40) (cid:54)(cid:44)(cid:39)(cid:40)(cid:3)(cid:57)(cid:44)(cid:40)(cid:58) (cid:72)(cid:72)(cid:72) (cid:38) (cid:3) (cid:3) (cid:72) (cid:47) (cid:69) (cid:24) (cid:27) (cid:69)(cid:69)(cid:69) (cid:38) (cid:36) (cid:37) (cid:69)(cid:69)(cid:69) (cid:38) (cid:23) (cid:28) (cid:20) (cid:20)(cid:21) (cid:51)(cid:76)(cid:81)(cid:6)(cid:20)(cid:3)(cid:44)(cid:39) (cid:20)(cid:25) (cid:20)(cid:22) (cid:53)(cid:19)(cid:17)(cid:20)(cid:20) (cid:37)(cid:50)(cid:55)(cid:55)(cid:50)(cid:48)(cid:3)(cid:57)(cid:44)(cid:40)(cid:58) (cid:42)(cid:36)(cid:48)(cid:54)(cid:21)(cid:24)(cid:19)(cid:21)(cid:20)(cid:22)(cid:20)(cid:19)(cid:24)(cid:20)(cid:38)(cid:37) 26/31 DocID024293 Rev 1

TSX63x, TSX63xA Package information Table 11. QFN16 3x3 package mechanical data Dimensions Ref. Millimeters Inches Min. Typ. Max. Min. Typ. Max. A 0.50 0.65 0.020 0.026 A1 0 0.05 0 0.002 b 0.18 0.25 0.30 0.007 0.010 0.012 D 3.00 0.118 E 3.00 0.118 e 0.50 0.020 L 0.30 0.50 0.012 0.020 aaa 0.15 0.006 bbb 0.10 0.004 ccc 0.10 0.004 ddd 0.05 0.002 eee 0.08 0.003 DocID024293 Rev 1 27/31

Package information TSX63x, TSX63xA 5.5 TSSOP14 package information Figure 32. TSSOP14 package mechanical drawing Table 12. TSSOP14 package mechanical data Dimensions Ref. Millimeters Inches Min. Typ. Max. Min. Typ. Max. A 1.20 0.047 A1 0.05 0.15 0.002 0.004 0.006 A2 0.80 1.00 1.05 0.031 0.039 0.041 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.90 5.00 5.10 0.193 0.197 0.201 E 6.20 6.40 6.60 0.244 0.252 0.260 E1 4.30 4.40 4.50 0.169 0.173 0.176 e 0.65 0.0256 L 0.45 0.60 0.75 0.018 0.024 0.030 L1 1.00 0.039 k 0 ° 8 ° 0 ° 8 ° aaa 0.10 0.004 28/31 DocID024293 Rev 1

TSX63x, TSX63xA Ordering information 6 Ordering information Table 13. Order codes Order Temperature No. of Package Packing Marking code range channels TSX631ILT 1 SOT23-5 K27 TSX632IQ2T 2 DFN8 2x2 K27 TSX632IST -40 to 125 °C 2 MiniSO8 K27 TSX634IQ4T 4 QFN16 3x3 K27 TSX634IPT 4 TSSOP14 TSX634I TSX631IYLT 1 SOT23-5 K188 -40 to 125 °C TSX632IYST Automotive 2 MiniSO8 K188 grade(1) Tape and reel TSX634IYPT 4 TSSOP14 TSX634IY TSX631AILT 1 SOT23-5 K189 TSX632AIST -40 to 125 °C 2 MiniSO8 K189 TSX634AIPT 4 TSSOP14 TSX634AI TSX631AIYLT 1 SOT23-5 K190 -40 to 125°C TSX632AIYST Automotive 2 MiniSO8 K190 grade(1) TSX634AIYPT 4 TSSOP14 TSX634AIY 1. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 & Q 002 or equivalent are on-going. DocID024293 Rev 1 29/31

Revision history TSX63x, TSX63xA 7 Revision history Table 14. Document revision history Date Revision Changes 26-Mar-2013 1 Initial release 30/31 DocID024293 Rev 1

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Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: S TMicroelectronics: TSX631AILT TSX631ILT TSX634IPT TSX634AIPT TSX631AIYLT TSX632AIST TSX634IQ4T TSX631IYLT TSX632IQ2T TSX632IST TSX632AIYST TSX634IYPT TSX632IYST TSX634AIYPT