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TSV711ICT产品简介:

ICGOO电子元器件商城为您提供TSV711ICT由STMicroelectronics设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 TSV711ICT价格参考。STMicroelectronicsTSV711ICT封装/规格:线性 - 放大器 - 仪表,运算放大器,缓冲器放大器, 通用 放大器 1 电路 满摆幅 SC-70-5。您可以下载TSV711ICT参考资料、Datasheet数据手册功能说明书,资料中有TSV711ICT 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
-3db带宽

-

产品目录

集成电路 (IC)半导体

描述

IC OPAMP GP 150KHZ RRO SC70-5运算放大器 - 运放 Hi acc micropwr 14A 150kHz 5V CMOS

产品分类

Linear - Amplifiers - Instrumentation, OP Amps, Buffer Amps集成电路 - IC

品牌

STMicroelectronics

产品手册

点击此处下载产品Datasheet

产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

放大器 IC,运算放大器 - 运放,STMicroelectronics TSV711ICT-

数据手册

点击此处下载产品Datasheet

产品型号

TSV711ICT

产品种类

运算放大器 - 运放

供应商器件封装

SC-70-5

共模抑制比—最小值

61 dB

关闭

No Shutdown

其它名称

497-13683-6

其它有关文件

http://www.st.com/web/catalog/sense_power/FM123/SC61/SS1378/PF252503?referrer=70071840

包装

Digi-Reel®

压摆率

0.06 V/µs

商标

STMicroelectronics

增益带宽生成

150 kHz

增益带宽积

150kHz

安装类型

表面贴装

安装风格

SMD/SMT

封装

Reel

封装/外壳

6-TSSOP(5 引线),SC-88A,SOT-353

封装/箱体

SC-70-5

工作温度

-40°C ~ 125°C

工作电源电压

1.5 V to 5.5 V

工厂包装数量

3000

技术

CMOS

放大器类型

通用

最大工作温度

+ 125 C

最小工作温度

- 40 C

标准包装

1

电压-电源,单/双 (±)

1.5 V ~ 5.5 V

电压-输入失调

200µV

电流-电源

10µA

电流-输入偏置

1pA

电流-输出/通道

56mA

电源电流

9 uA

电路数

1

系列

TSV711

转换速度

0.04 V/us

输入偏压电流—最大

10 pA

输入参考电压噪声

100 nV

输入补偿电压

1200 uV

输出类型

满摆幅

通道数量

1 Channel

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PDF Datasheet 数据手册内容提取

TSV711, TSV712, TSV714 μ μ High accuracy (200 V) micropower 14 A, 150 kHz 5 V CMOS operational amplifiers Datasheet - preliminary data Benefits Single (TSV711) • Higher accuracy without calibration • Energy saving • Guaranteed operation on low-voltage battery SC70-5 Related products • See the TSV73 series (900 kHz for 60 μA) for Dual (TSV712) higher gain bandwidth products Applications • Battery powered applications DFN8 2x2 MiniSO-8 • Portable devices • Signal conditioning Quad (TSV714) • Active filtering • Medical instrumentation Description The TSV71x series of single, dual, and quad operational amplifiers offer low-voltage operation, rail-to-rail input and output, and excellent QFN16 3x3 TSSOP14 accuracy (Vio lower than 200 μV at 25 °C). These devices benefit from STMicroelectronics® 5 V CMOS technology and offer an excellent Features speed/power consumption ratio (150 kHz typical gain bandwidth) while consuming less than 14 μA • Low offset voltage: 200 µV max. at 5 V. The TSV71x series also feature an • Low power consumption: 10 µA at 5 V ultra-low input bias current. • Low supply voltage: 1.5 V to 5.5 V The single version (TSV711), the dual version • Gain bandwidth product: 150 kHz typ. (TSV712), and the quad version (TSV714) are housed in the smallest industrial packages. • Low input bias current: 1 pA typ. • Rail-to-rail input and output These characteristics make the TSV71x family ideal for sensor interfaces, battery-powered and • EMI hardened operational amplifiers portable applications, and active filtering. • High tolerance to ESD: 4 kV HBM • Extended temperature range: -40 to +125 °C March 2013 DocID023707 Rev 2 1/29 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to www.st.com 29 change without notice.

Contents TSV711, TSV712, TSV714 Contents 1 Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 4 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.1 Operating voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.2 Rail-to-rail input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.3 Rail-to-rail output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.4 Input offset voltage drift over temperature . . . . . . . . . . . . . . . . . . . . . . . . 16 4.5 Long-term input offset voltage drift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.6 Initialization time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.7 PCB layouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.8 Macromodel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.1 SC70-5 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.2 DFN8 2x2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.3 MiniSO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.4 QFN16 3x3 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.5 TSSOP14 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 6 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 2/29 DocID023707 Rev 2

TSV711, TSV712, TSV714 Pin connections 1 Pin connections Figure 1. Pin connections (top view) Single (cid:44)(cid:49)(cid:14) (cid:20) (cid:24) (cid:57)(cid:38)(cid:38)(cid:14) (cid:14) (cid:57)(cid:38)(cid:38)(cid:16) (cid:21) (cid:16) (cid:44)(cid:49)(cid:16) (cid:22) (cid:23) (cid:50)(cid:56)(cid:55) SC70-5 (TSV711) Dual (cid:50)(cid:56)(cid:55)(cid:20) (cid:20) (cid:27) (cid:57)(cid:38)(cid:38)(cid:14) (cid:50)(cid:56)(cid:55)(cid:20) (cid:57)(cid:38)(cid:38)(cid:14) (cid:44)(cid:49)(cid:20)(cid:16) (cid:21) (cid:26) (cid:50)(cid:56)(cid:55)(cid:21) (cid:44)(cid:49)(cid:20)(cid:16) (cid:50)(cid:56)(cid:55)(cid:21) (cid:44)(cid:49)(cid:20)(cid:14) (cid:22) (cid:25) (cid:44)(cid:49)(cid:21)(cid:16) (cid:44)(cid:49)(cid:20)(cid:14) (cid:44)(cid:49)(cid:21)(cid:16) (cid:57)(cid:38)(cid:38)(cid:16) (cid:23) (cid:24) (cid:44)(cid:49)(cid:21)(cid:14) (cid:57)(cid:38)(cid:38)(cid:16) (cid:44)(cid:49)(cid:21)(cid:14) DFN8 2x2 (TSV712) MiniSO-8 (TSV712) Quad (cid:20) (cid:23) (cid:20)(cid:16) (cid:56)(cid:55) (cid:56)(cid:55) (cid:23)(cid:16) (cid:49) (cid:50) (cid:50) (cid:49) (cid:44) (cid:44) (cid:20)(cid:25) (cid:20)(cid:24) (cid:20)(cid:23) (cid:20)(cid:22) (cid:44)(cid:49)(cid:20)(cid:14) (cid:20) (cid:20)(cid:21) (cid:44)(cid:49)(cid:23)(cid:14) (cid:57)(cid:38)(cid:38)(cid:14) (cid:21) (cid:20)(cid:20) (cid:57)(cid:38)(cid:38)(cid:16) (cid:49)(cid:38)(cid:11)(cid:20)(cid:12) (cid:49)(cid:38) (cid:22) (cid:20)(cid:19) (cid:49)(cid:38) (cid:44)(cid:49)(cid:21)(cid:14) (cid:23) (cid:28) (cid:44)(cid:49)(cid:22)(cid:14) (cid:24) (cid:25) (cid:26) (cid:27) (cid:49)(cid:21)(cid:16) (cid:56)(cid:55)(cid:21) (cid:56)(cid:55)(cid:22) (cid:49)(cid:22)(cid:16) (cid:44) (cid:50) (cid:50) (cid:44) QFN16 3x3 (TSV714) TSSOP14 (TSV714) 1. The exposed pads of the QFN16 3x3 can be connected to VCC- or left floating. DocID023707 Rev 2 3/29

Absolute maximum ratings and operating conditions TSV711, TSV712, TSV714 2 Absolute maximum ratings and operating conditions Table 1. Absolute maximum ratings (AMR) Symbol Parameter Value Unit V Supply voltage(1) 6 CC V Differential input voltage(2) ±V V id CC V Input voltage(3) V - 0.2 to V + 0.2 in CC- CC+ I Input current(4) 10 mA in T Storage temperature -65 to +150 °C stg Thermal resistance junction-to-ambient(5)(6) SC70-5 205 DFN8 2x2 120 R thja MiniSO8 190 QFN16 3x3 45 °C/W TSSOP14 100 Thermal resistance junction-to-case R thjc DFN8 2x2 33 T Maximum junction temperature 150 °C j HBM: human body model(7) 4 kV MM: machine model for TSV711(8) 150 MM: machine model for TSV712(8) 200 V ESD MM: machine model for TSV714(8) 300 CDM: charged device model except MiniSO8(9) 1.5 kV CDM: charged device model for MiniSO8(9) 1.3 Latchup immunity 200 mA 1. All voltage values, except the differential voltage are with respect to the network ground terminal. 2. The differential voltage is a non-inverting input terminal with respect to the inverting input terminal. The TSV712 and TSV714 devices include an internal differential voltage limiter that clamps internal differential voltage at 0.5 V. 3. VCC - Vin must not exceed 6 V, Vin must not exceed 6 V. 4. Input current must be limited by a resistor in series with the inputs. 5. Short-circuits can cause excessive heating and destructive dissipation. 6. R are typical values. th 7. Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for all couples of pin combinations with other pins floating. 8. Machine model: a 200 pF cap is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω), done for all couples of pin combinations with other pins floating. 9. Charged device model: all pins plus package are charged together to the specified voltage and then discharged directly to ground. 4/29 DocID023707 Rev 2

TSV711, TSV712, TSV714 Absolute maximum ratings and operating conditions Table 2. Operating conditions Symbol Parameter Value Unit V Supply voltage 1.5 to 5.5 CC V V Common mode input voltage range V - 0.1 to V + 0.1 icm CC- CC+ T Operating free air temperature range -40 to +125 °C oper DocID023707 Rev 2 5/29

Electrical characteristics TSV711, TSV712, TSV714 3 Electrical characteristics Table 3. E l e ctrical characteristics at V = 1.8 V with V = 0 V, V = V /2, T = 25 °C, and CC+ CC- icm CC R = 10 kΩ connected to V /2 (unless otherwise specified) L CC Symbol Parameter Conditions Min. Typ. Max. Unit DC performance T = 25 °C 200 Input offset voltage V -40 °C < T< 85 °C 850 μV io (V = 0 V) icm -40 °C < T< 125 °C 1200 ΔV /ΔT Input offset voltage drift -40 °C < T< 125 °C(1) 10 μV/°C io Input offset current T = 25 °C 1 10(2) I io (Vout = VCC/2) -40 °C < T< 125 °C 1 300(2) pA T = 25 °C 1 10(2) I Input bias current (V = V /2) ib out CC -40 °C < T< 125 °C 1 300(2) Common mode rejection ratio T = 25 °C 69 88 20 log (ΔV /ΔV ) CMR icm io Vicm = 0 V to VCC, -40 °C < T< 125 °C 61 Vout = VCC/2, RL > 1 MΩ dB Large signal voltage gain T = 25 °C 95 A vd Vout = 0.5 V to (VCC - 0.5 V) -40 °C < T< 125 °C 85 High level output voltage T = 25 °C 75 V OH (VOH = VCC - Vout) -40 °C < T< 125 °C 80 mV T = 25 °C 40 V Low level output voltage OL -40 °C < T< 125 °C 60 T = 25 °C 6 12 I V = V sink ( out CC) -40 °C < T< 125 °C 4 I mA out T = 25 °C 5 7 I (V = 0 V) source out -40 °C < T< 125 °C 3 Supply current (per channel, T = 25 °C 9 14 I µA CC Vout = VCC/2, RL > 1 MΩ) -40 °C < T< 125 °C 16 6/29 DocID023707 Rev 2

TSV711, TSV712, TSV714 Electrical characteristics Table 3. Electrical characteristics at V = 1.8 V with V = 0 V, V = V /2, T = 25 °C, and CC+ CC- icm CC R = 10 kΩ connected to V /2 (unless otherwise specified) (continued) L CC Symbol Parameter Conditions Min. Typ. Max. Unit AC performance GBP Gain bandwidth product 100 120 kHz F Unity gain frequency 100 u R = 10 kΩ, C = 100 pF Φ Phase margin L L 45 Degrees m G Gain margin 19 dB m R = 10 kΩ, C = 100 pF, SR Slew rate(3) L L 0.04 V/μs V = 0.5 V to V - 0.5 V out CC f = 1 kHz 100 en Equivalent input noise voltage ---n---V------ Hz f = 10 kHz 96 T = 25 °C 5 t Initialization time(4) ms init -40 °C < T< 125 °C 60 1. See Section 4.4: Input offset voltage drift over temperature. 2. Guaranteed by characterization. 3. Slew rate value is calculated as the average between positive and negative slew rates. 4. Initialization time is defined as the delay after power-up to guarantee operation within specified performances. Guaranteed by design. See Section 4.6: Initialization time. DocID023707 Rev 2 7/29

Electrical characteristics TSV711, TSV712, TSV714 Table 4. E l e ctrical characteristics at V = 3.3 V with V = 0 V, V = V /2, T = 25 °C, and CC+ CC- icm CC R = 10 kΩ connected to V /2 (unless otherwise specified) L CC Symbol Parameter Conditions Min. Typ. Max. Unit DC performance T = 25 °C 200 V Input offset voltage -40 °C < T< 85 °C 850 μV io -40 °C < T< 125 °C 1200 ΔV /ΔT Input offset voltage drift -40 °C < T< 125 °C(1) 10 μV/°C io μ ΔV Long-term input offset voltage T = 25 °C(2) 0.3 --------------V------------- io drift month Input offset current T = 25 °C 1 10(3) I io (Vout = VCC/2) -40 °C < T< 125 °C 1 300(3) pA T = 25 °C 1 10(3) I Input bias current (V = V /2) ib out CC -40 °C < T< 125 °C 1 300(3) Common mode rejection ratio T = 25 °C 80 100 20 log (ΔV /ΔV ) CMR icm io Vicm = 0 V to VCC, Vout = VCC/2, -40 °C < T< 125 °C 69 R > 1 MΩ dB L Large signal voltage gain T = 25 °C 95 A vd Vout = 0.5 V to (VCC - 0.5 V) -40 °C < T< 125 °C 85 High level output voltage T = 25 °C 75 V OH (VOH = VCC - Vout) -40 °C < T< 125 °C 80 mV T = 25 °C 40 V Low level output voltage OL -40 °C < T< 125 °C 60 T = 25 °C 20 34 I V = V sink ( out CC) -40 °C < T< 125 °C 15 I mA out T = 25 °C 20 26 I (V = 0 V) source out -40 °C < T< 125 °C 15 Supply current (per channel, T = 25 °C 9 14 I µA CC Vout = VCC/2, RL > 1 MΩ) -40 °C < T< 125 °C 16 8/29 DocID023707 Rev 2

TSV711, TSV712, TSV714 Electrical characteristics Table 4. Electrical characteristics at V = 3.3 V with V = 0 V, V = V /2, T = 25 °C, and CC+ CC- icm CC R = 10 kΩ connected to V /2 (unless otherwise specified) (continued) L CC Symbol Parameter Conditions Min. Typ. Max. Unit AC performance GBP Gain bandwidth product 100 120 kHz F Unity gain frequency 100 u R = 10 kΩ, C = 100 pF Φ Phase margin L L 45 Degrees m G Gain margin 19 dB m R = 10 kΩ, C = 100 pF, SR Slew rate(4) L L 0.05 V/μs V = 0.5 V to V - 0.5 V out CC f = 1 kHz 100 en Equivalent input noise voltage ---n---V------ Hz f = 10 kHz 96 T = 25 °C 5 t Initialization time(5) ms init -40 °C < T< 125 °C 50 1. See Section 4.4: Input offset voltage drift over temperature. 2. Typical value is based on the V drift observed after 1000h at 125 °C extrapolated to 25 °C using the Arrhenius law and io assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration. See Section 4.5: Long-term input offset voltage drift. 3. Guaranteed by characterization. 4. Slew rate value is calculated as the average between positive and negative slew rates. 5. Initialization time is defined as the delay after power-up which guarantees operation within specified performances. Guaranteed by design. See Section 4.6: Initialization time. DocID023707 Rev 2 9/29

Electrical characteristics TSV711, TSV712, TSV714 Table 5 . Electrical characteristics at V = 5 V with V = 0 V, V = V /2, T = 25 °C, CC+ CC- icm CC and R = 10 kΩ connected to V /2 (unless otherwise specified) L CC Symbol Parameter Conditions Min. Typ. Max. Unit DC performance T = 25 °C 200 V Input offset voltage -40 °C < T< 85 °C 850 μV io -40 °C < T< 125 °C 1200 ΔV /ΔT Input offset voltage drift -40 °C < T< 125 °C(1) 10 μV/°C io μ ΔV Long-term input offset voltage T = 25 °C(2) 0.7 --------------V------------- io drift month Input offset current T = 25 °C 1 10(3) I io (Vout = VCC/2) -40 °C < T< 125 °C 1 300(3) pA Input bias current T = 25 °C 1 10(3) I ib (Vout = VCC/2) -40 °C < T< 125 °C 1 300(3) Common mode rejection ratio T = 25 °C 74 94 20 log (ΔV /ΔV ) CMR icm io Vicm = 0 V to VCC, -40 °C < T< 125 °C 73 V = V /2, R > 1 MΩ out CC L Supply voltage rejection ratio T = 25 °C 71 90 20 log (ΔV /ΔV ) SVR CC io VCC = 1.5 to 5.5 V, Vic = 0 V, -40 °C < T< 125 °C 71 R > 1 MΩ L dB Large signal voltage gain T = 25 °C 95 A vd Vout = 0.5 V to (VCC - 0.5 V) -40 °C < T< 125 °C 85 V = 100 mV f = 400 MHz 38(4) RF RFpeak, EMI rejection ratio VRF = 100 mVRFpeak, f = 900 MHz 50(4) EMIRR EMIRR = 20 log (VRFpeak/ΔVio) VRF = 100 mVRFpeak, f = 1800 MHz 60(4) V = 100 mV , f = 2400 MHz 63(4) RF RFpeak High level output voltage T = 25 °C 75 V OH (VOH = VCC - Vout) -40 °C < T< 125 °C 80 mV T = 25 °C 40 V Low level output voltage OL -40 °C < T< 125 °C 60 T = 25 °C 35 56 I V = V sink ( out CC) -40 °C < T< 125 °C 20 I mA out T = 25 °C 35 45 I (V = 0 V) source out -40 °C < T< 125 °C 20 Supply current (per channel, T = 25 °C 10 14 I µA CC Vout = VCC/2, RL > 1 MΩ) -40 °C < T< 125 °C 16 10/29 DocID023707 Rev 2

TSV711, TSV712, TSV714 Electrical characteristics Table 5. Electrical characteristics at V = 5 V with V = 0 V, V = V /2, T = 25 °C, CC+ CC- icm CC and R = 10 kΩ connected to V /2 (unless otherwise specified) (continued) L CC Symbol Parameter Conditions Min. Typ. Max. Unit AC performance GBP Gain bandwidth product 110 150 kHz F Unity gain frequency 120 u R = 10 kΩ, C = 100 pF Φ Phase margin L L 45 Degrees m G Gain margin 19 dB m R = 10 kΩ, C = 100 pF, SR Slew rate(5) L L 0.06 V/μs V = 0.5 V to V - 0.5 V out CC ∫ Low-frequency peak-to-peak e Bandwidth: f = 0.1 to 10 Hz 10 µV n input noise pp f = 1 kHz 100 en Equivalent input noise voltage ---n---V------ Hz f = 10 kHz 96 f = 1 kHz, A = 1, Total harmonic distortion + in CL THD+N R = 100 kΩ, V = (V - 1 V)/2, 0.008 % noise L icm CC BW = 22 kHz, V = 0.5 V out pp T = 25 °C 5 t Initialization time(6) ms init -40 °C < T< 125 °C 50 1. See Section 4.4: Input offset voltage drift over temperature. 2. Typical value is based on the V drift observed after 1000h at 125 °C extrapolated to 25 °C using the Arrhenius law and io assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration. See Section 4.5: Long-term input offset voltage drift. 3. Guaranteed by characterization. 4. Tested on SC70-5 package. 5. Slew rate value is calculated as the average between positive and negative slew rates. 6. Initialization time is defined as the delay after power-up to guarantee operation within specified performances. Guaranteed by design. See Section 4.6: Initialization time. DocID023707 Rev 2 11/29

Electrical characteristics TSV711, TSV712, TSV714 Figure 2. Supply current vs. supply voltage Figure 3. Input offset voltage distribution at V = V /2 at V = 5 V, V = V /2 icm CC CC icm CC (cid:3) Figure 4. Input offset voltage distribution Figure 5. Input offset voltage temperature at V = 3.3 V, V = V /2 coefficient distribution CC icm CC 30 VCC = 3.3 V 25 Vicm = 1.65 V T = 25 ˚C %) 20 n ( o 15 ati ul p o 10 P 5 0 -250 -200 -150 -100 -50 0 50 100 150 200 250 Input offset voltage (µV) (cid:3) Figure 6. Input offset voltage vs. input common Figure 7. Input offset voltage vs. temperature mode voltage (cid:3) (cid:3) (cid:3) (cid:3) 12/29 DocID023707 Rev 2

TSV711, TSV712, TSV714 Electrical characteristics Figure 8. Output current vs. output voltage Figure 9. Output current vs. output voltage at V = 1.5 V at V = 5 V CC CC (cid:3) (cid:3) (cid:3) Figure 10. Output current vs. supply voltage Figure 11. Bode diagram at V = 1.5 V CC (cid:3) (cid:3) Figure 12. Bode diagram at V = 5 V Figure 13. Closed-loop gain diagram CC vs. capacitive load (cid:3) DocID023707 Rev 2 13/29

Electrical characteristics TSV711, TSV712, TSV714 Figure 14. Positive slew rate Figure 15. Negative slew rate (cid:3) Figure 16. Slew rate vs. supply voltage Figure 17. Noise vs. frequency (cid:3) (cid:19) (cid:20) Figure 18. 0.1 Hz to 10 Hz noise Figure 19. THD+N vs. frequency (cid:3) 14/29 DocID023707 Rev 2

TSV711, TSV712, TSV714 Electrical characteristics Figure 20. THD+N vs. output voltage Figure 21. Output impedance vs. frequency in closed-loop configuration (cid:3) (cid:3) DocID023707 Rev 2 15/29

Application information TSV711, TSV712, TSV714 4 Application information 4.1 Operating voltages The TSV71x series of devices can operate from 1.5 V to 5.5 V. The parameters are fully specified for 1.8 V, 3.3 V, and 5 V power supplies. However, they are very stable in the full V range and several characterization curves show TSV71x device characteristics at 1.5 V. CC In addition, the main specifications are guaranteed in the extended temperature range from -40 °C to +125 °C. 4.2 Rail-to-rail input The TSV711, TSV712, and TSV714 devices have a rail-to-rail input, and the input common mode range is extended from VCC-- 0.1 V to VCC+ + 0.1 V. 4.3 Rail-to-rail output The output levels of the TSV71x operational amplifiers can go close to the rails: to a maximum of 40 mV below the upper rail and to a maximum of 75 mV above the lower rail when a 10 kΩ resistive load is connected to V /2. CC 4.4 Input offset voltage drift over temperature The maximum input voltage drift over the temperature variation is defined as the offset variation related to offset value measured at 25 °C. The operational amplifier is one of the main circuits of the signal conditioning chain, and the amplifier input offset is a major contributor to the chain accuracy. The signal chain accuracy at 25 °C can be compensated during production at application level. The maximum input voltage drift over temperature enables the system designer to anticipate the effect of temperature variations. The maximum input voltage drift over temperature is computed using Equation 1. Equation 1 -Δ - -Δ -V---T--i-o-- = maxV-----i-o---(--T---T--)---––-----V2---5-i-o--°-(--C-2---5----°---C-----)- with T = -40 °C and 125 °C. The datasheet maximum value is guaranteed by a measurement on a representative sample size ensuring a C (process capability index) greater than 1.33. pk 16/29 DocID023707 Rev 2

TSV711, TSV712, TSV714 Application information 4.5 Long-term input offset voltage drift To evaluate product reliability, two types of stress acceleration are used: • Voltage acceleration, by changing the applied voltage • Temperature acceleration, by changing the die temperature (below the maximum junction temperature allowed by the technology) with the ambient temperature. The voltage acceleration has been defined based on JEDEC results, and is defined using Equation 2. Equation 2 β⋅ (V –V ) A = e S U FV Where: A is the voltage acceleration factor FV β β is the voltage acceleration constant in 1/V, constant technology parameter ( = 1) V is the stress voltage used for the accelerated test S V is the voltage used for the application U The temperature acceleration is driven by the Arrhenius model, and is defined in Equation 3. Equation 3 E--k---a-⋅ ⎝⎛T--1----–T--1----⎠⎞ A = e U S FT Where: A is the temperature acceleration factor FT E is the activation energy of the technology based on the failure rate a k is the Boltzmann constant (8.6173 x 10-5 eV.K-1) T is the temperature of the die when V is used (K) U U T is the temperature of the die under temperature stress (K) S The final acceleration factor, A , is the multiplication of the voltage acceleration factor and F the temperature acceleration factor (Equation 4). Equation 4 A = A × A F FT FV A is calculated using the temperature and voltage defined in the mission profile of the F product. The A value can then be used in Equation 5 to calculate the number of months of F use equivalent to 1000 hours of reliable stress duration. DocID023707 Rev 2 17/29

Application information TSV711, TSV712, TSV714 Equation 5 Months = A × 1000 h× 12 months⁄ (24 h× 365.25 days) F To evaluate the op-amp reliability, a follower stress condition is used where V is defined CC as a function of the maximum operating voltage and the absolute maximum rating (as recommended by JEDEC rules). The V drift (in µV) of the product after 1000 h of stress is tracked with parameters at io different measurement conditions (see Equation 6). Equation 6 V = maxV with V = V ⁄ 2 CC op icm CC The long term drift parameter (ΔV ), estimating the reliability performance of the product, is io obtained using the ratio of the V (input offset voltage value) drift over the square root of the io calculated number of months (Equation 7). Equation 7 V drift ΔV = ----------i-o------------------- io (months) where V drift is the measured drift value in the specified test conditions after 1000 h stress io duration. 18/29 DocID023707 Rev 2

TSV711, TSV712, TSV714 Application information 4.6 Initialization time The TSV71x series of devices use a proprietary trimming topology that is initiated at each device power-up and allows excellent V performance to be achieved. The initialization time io is defined as the delay after power-up which guarantees operation within specified performances. During this period, the current consumption (I ) and the input offset voltage CC (V ) can be different to the typical ones. io Figure 22. Initialization phase The initialization time is V and temperature dependent. Table 6 sums up the CC measurement results for different supply voltages and for temperatures varying from -40 °C to 125 °C. Table 6. Initialization time measurement results Temperature: -40 °C Temperature: 25 °C Temperature: 125 °C V (V) CC T (ms) I phase 1 (mA) T (ms) I phase 1 (mA) T (ms) I phase 1 (mA) init CC init CC init CC 1.8 37 0.33 3.2 0.40 0.35 0.46 3.3 2.9 1.4 0.95 1.3 0.34 1.2 5 2.4 3.2 0.85 2.4 0.31 2.9 4.7 PCB layouts For correct operation, it is advised to add a 10 nF decoupling capacitors as close as possible to the power supply pins. DocID023707 Rev 2 19/29

Application information TSV711, TSV712, TSV714 4.8 Macromodel Accurate macromodels of the TSV71x devices are available on the STMicroelectronics’ website at www.st.com. These model are a trade-off between accuracy and complexity (that is, time simulation) of the TSV71x operational amplifiers. They emulate the nominal performance of a typical device within the specified operating conditions mentioned in the datasheet. They also help to validate a design approach and to select the right operational amplifier, but they do not replace on-board measurements. 20/29 DocID023707 Rev 2

TSV711, TSV712, TSV714 Package information 5 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID023707 Rev 2 21/29

Package information TSV711, TSV712, TSV714 5.1 SC70-5 package information Figure 23. SC70-5 package mechanical drawing SIDE VIEW DIMENSIONS IN MM GAUGE PLANE COPLANAR LEADS SEATING PLANE TOP VIEW Table 7. SC70-5 package mechanical data Dimensions Symbol Millimeters Inches Min. Typ. Max. Min. Typ. Max. A 0.80 1.10 0.032 0.043 A1 0 0.10 0.004 A2 0.80 0.90 1.00 0.032 0.035 0.039 b 0.15 0.30 0.006 0.012 c 0.10 0.22 0.004 0.009 D 1.80 2.00 2.20 0.071 0.079 0.087 E 1.80 2.10 2.40 0.071 0.083 0.094 E1 1.15 1.25 1.35 0.045 0.049 0.053 e 0.65 0.025 e1 1.30 0.051 L 0.26 0.36 0.46 0.010 0.014 0.018 < 0° 8° 0° 8° 22/29 DocID023707 Rev 2

TSV711, TSV712, TSV714 Package information 5.2 DFN8 2x2 package information Figure 24. DFN8 2x2 package mechanical drawing (cid:39) (cid:36) (cid:37) (cid:51)(cid:44)(cid:49)(cid:3)(cid:20)(cid:3)(cid:44)(cid:49)(cid:39)(cid:40)(cid:59)(cid:3)(cid:36)(cid:53)(cid:40)(cid:36) (cid:40) (cid:21)(cid:91) (cid:38) (cid:19)(cid:17)(cid:20)(cid:19) (cid:19)(cid:17)(cid:20)(cid:19)(cid:38)(cid:21)(cid:91) (cid:55)(cid:50)(cid:51)(cid:3)(cid:57)(cid:44)(cid:40)(cid:58) (cid:19)(cid:17)(cid:20)(cid:19)(cid:38) (cid:36) (cid:36)(cid:20) (cid:38) (cid:54)(cid:40)(cid:36)(cid:55)(cid:44)(cid:49)(cid:42) (cid:51)(cid:47)(cid:36)(cid:49)(cid:40) (cid:19)(cid:17)(cid:19)(cid:27) (cid:38) (cid:54)(cid:44)(cid:39)(cid:40)(cid:3)(cid:57)(cid:44)(cid:40)(cid:58) (cid:72) (cid:51)(cid:44)(cid:49)(cid:3)(cid:20)(cid:3)(cid:44)(cid:49)(cid:39)(cid:40)(cid:59)(cid:3)(cid:36)(cid:53)(cid:40)(cid:36) (cid:69)(cid:3)(cid:11)(cid:27)(cid:3)(cid:83)(cid:79)(cid:70)(cid:86)(cid:12) (cid:20) (cid:23) (cid:19)(cid:17)(cid:20)(cid:19) (cid:38) (cid:36) (cid:37) (cid:51)(cid:76)(cid:81)(cid:6)(cid:20)(cid:3)(cid:44)(cid:39) (cid:47) (cid:27) (cid:24) (cid:37)(cid:50)(cid:55)(cid:55)(cid:50)(cid:48)(cid:3)(cid:57)(cid:44)(cid:40)(cid:58) (cid:42)(cid:36)(cid:48)(cid:54)(cid:21)(cid:21)(cid:19)(cid:21)(cid:20)(cid:22)(cid:20)(cid:25)(cid:22)(cid:24)(cid:38)(cid:37) Table 8. DFN8 2x2 package mechanical data Dimensions Ref. Millimeters Inches Min. Typ. Max. Min. Typ. Max. A 0.70 0.75 0.80 0.028 0.030 0.031 A1 0.00 0.02 0.05 0.000 0.001 0.002 b 0.15 0.20 0.25 0.006 0.008 0.010 D 2.00 0.079 E 2.00 0.079 e 0.50 0.020 L 0.045 0.55 0.65 0.018 0.022 0.026 N 8 8 DocID023707 Rev 2 23/29

Package information TSV711, TSV712, TSV714 5.3 MiniSO-8 package information Figure 25. MiniSO-8 package mechanical drawing Table 9. MiniSO-8 package mechanical data Dimensions Ref. Millimeters Inches Min. Typ. Max. Min. Typ. Max. A 1.1 0.043 A1 0 0.15 0 0.006 A2 0.75 0.85 0.95 0.030 0.033 0.037 b 0.22 0.40 0.009 0.016 c 0.08 0.23 0.003 0.009 D 2.80 3.00 3.20 0.11 0.118 0.126 E 4.65 4.90 5.15 0.183 0.193 0.203 E1 2.80 3.00 3.10 0.11 0.118 0.122 e 0.65 0.026 L 0.40 0.60 0.80 0.016 0.024 0.031 L1 0.95 0.037 L2 0.25 0.010 k 0 ° 8 ° 0 ° 8 ° ccc 0.10 0.004 24/29 DocID023707 Rev 2

TSV711, TSV712, TSV714 Package information 5.4 QFN16 3x3 package information Figure 26. QFN16 3x3 package mechanical drawing (cid:52)(cid:41)(cid:49)(cid:20)(cid:25)(cid:66)(cid:22)(cid:91)(cid:22)(cid:66)(cid:57)(cid:20)(cid:66)(cid:26)(cid:24)(cid:19)(cid:28)(cid:25)(cid:19)(cid:23)(cid:66)(cid:38) DocID023707 Rev 2 25/29

Package information TSV711, TSV712, TSV714 Table 10. QFN16 3x3 mm package mechanical data (pitch 0.5 mm) Dimensions Ref. Millimeters Inches Min. Typ. Max. Min. Typ. Max. A 0.80 0.90 1.00 0.031 0.035 0.039 A1 0 0.05 0 0.002 A3 0.20 0.008 b 0.18 0.30 0.007 0.012 D 2.90 3.00 3.10 0.114 0.118 0.122 D2 1.50 1.80 0.059 0.071 E 2.90 3.00 3.10 0.114 0.118 0.122 E2 1.50 1.80 0.059 0.071 e 0.50 0.020 L 0.30 0.50 0.012 0.020 Figure 27. QFN16 3x3 footprint recommendation (cid:52)(cid:41)(cid:49)(cid:20)(cid:25)(cid:66)(cid:22)(cid:91)(cid:22)(cid:66)(cid:57)(cid:20)(cid:66)(cid:73)(cid:82)(cid:82)(cid:87)(cid:83)(cid:85)(cid:76)(cid:81)(cid:87)(cid:66)(cid:26)(cid:24)(cid:19)(cid:28)(cid:25)(cid:19)(cid:23)(cid:66)(cid:38) 26/29 DocID023707 Rev 2

TSV711, TSV712, TSV714 Package information 5.5 TSSOP14 package information Figure 28. TSSOP14 package mechanical drawing Table 11. TSSOP14 package mechanical data Dimensions Ref. Millimeters Inches Min. Typ. Max. Min. Typ. Max. A 1.20 0.047 A1 0.05 0.15 0.002 0.004 0.006 A2 0.80 1.00 1.05 0.031 0.039 0.041 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.90 5.00 5.10 0.193 0.197 0.201 E 6.20 6.40 6.60 0.244 0.252 0.260 E1 4.30 4.40 4.50 0.169 0.173 0.176 e 0.65 0.0256 L 0.45 0.60 0.75 0.018 0.024 0.030 L1 1.00 0.039 k 0 ° 8 ° 0 ° 8 ° aaa 0.10 0.004 DocID023707 Rev 2 27/29

Ordering information TSV711, TSV712, TSV714 6 Ordering information Table 12. Order codes Temperature Order code Package Packaging Marking range TSV711ICT SC70-5 K1W TSV712IQ2T DFN8 2x2 K1W TSV712IST -40° C to +125° C MiniSO8 Tape and reel V712 TSV714IQ4T QFN16 3x3 K1W TSV714IPT TSSOP14 TSV714IP 7 Revision history Table 13. Document revision history Date Revision Changes 26-Sep-2012 1 Initial internal release Initial public release. Datasheet updated for two new products: TSV712 and TSV714. 26-Mar-2013 2 Four new packages added: DFN8 2x2, MiniSO-8, QFN16 3x3, and TSSOP14. Updated Table 3, Table 4, and Table 5. Section 4: Application information: re-written 28/29 DocID023707 Rev 2

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