TS27L2C,I,M PRECISION VERY LOW POWER CMOS DUAL OPERATIONAL AMPLIFIERS n VERY LOW POWER CONSUMPTION : 10µA/op n OUTPUT VOLTAGE CAN SWING TO GROUND n EXCELLENT PHASE MARGIN ON CAPACITIVE LOADS N n DIP8 STABLE AND LOW OFFSET VOLTAGE (Plastic Package) n THREE INPUT OFFSET VOLTAGE SELECTIONS DESCRIPTION D These devices are low cost, low power dual oper- SO8 (Plastic Micropackage) ational amplifiers designed to operate with single or dual supplies. These operational amplifiers use the ST silicon gate CMOS process allowing an ex- cellent consumption-speed ratio. These series are ideally suited for low consumption applications. P Three power consumptions are available allowing TSSOP8 to have always the best consumption-speed ratio: (Thin Shrink Small Outline Package) q I = 10µA/amp.: TS27L2 (very low power) CC q PIN CONNECTIONS (top view) I = 150µA/amp.: TS27M2 (low power) CC q I = 1mA/amp.: TS272 (standard) CC These CMOS amplifiers offer very high input im- pedance and extremely low input currents. The 1 8 major advantage versus JFET devices is the very low input currents drift with temperature (see fig- 2 - 7 ure 2). 3 + - 6 ORDER CODE 4 + 5 Package Part Number Temperature Range N D P 1 - Output 1 TS27L2C/AC/BC 0°C, +70°C • • • 2 - Inverting Input 1 3 - Non-inverting Input 1 TS27L2I/AI/BI -40°C, +125°C • • • 4 - V - TS27L2M/AM/BM -55°C, +125°C • • • 5 - NoCnC-inverting Input 2 Example : TS27L2ACN 6 - Inverting Input 2 7 - Output 2 8 - V + N = Dual in Line Package (DIP) CC D = Small Outline Package (SO) - also available in Tape & Reel (DT) P = Thin Shrink Small Outline Package (TSSOP) - only available in Tape & Reel (PT) November 2001 1/9

TS27L2C,I,M BLOCK DIAGRAM V CC Current source x I Input Second Output differential stage stage Output V CC E E ABSOLUTE MAXIMUM RATINGS Symbol Parameter TS27L2C/AC/BC TS27L2I/AI/BI TS27L2M/AM/BM Unit VCC+ Supply Voltage 1) 18 V Vid Differential Input Voltage 2) ±18 V Vi Input Voltage 3) -0.3 to 18 V Io Output Current for VCC+ ‡ 15V ±30 mA Iin Input Current ±5 mA Toper Operating Free-Air Temperature Range 0 to +70 -40 to +125 -55 to +125 °C Tstg Storage Temperature Range -65 to +150 °C 1. All values, except differential voltage are with respect to network ground terminal. 2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. 3. The magnitude of the input and the output voltages must never exceed the magnitude of the positive supply voltage. OPERATING CONDITIONS Symbol Parameter Value Unit V + Supply Voltage 3 to 16 V CC Vicm Common Mode Input Voltage Range 0 to VCC+ - 1.5 V 2/9

TS27L2C,I,M SCHEMATIC DIAGRAM (for 1/2 TS27L2) ut p ut T15 O T16 T12 T14 10 T 1 T1 13 T T8 T9 6 7 T T 1 R 1 ut C p n I T2 T4 5 C T C V T1 T3 ut p n 7 I 9 2 2 T 8 T 2 T T26 T23 T22 VCC 2 1 R 2 5 8 T 2 1 T T 4 7 9 0 T2 T1 T1 T2 3/9

TS27L2C,I,M ELECTRICAL CHARACTERISTICS V + = +10V, V -= 0V, T = +25°C (unless otherwise specified) CC CC amb TS27L2I/AI/BI TS27L2C/AC/BC TS27L2M/AM/BM Symbol Parameter Unit Min. Typ. Max. Min. Typ. Max. Input Offset Voltage VO = 1.4V, Vic = 0V TS27L2C/I/M 1.1 10 1.1 10 TS27L2AC/AI/AM 0.9 5 5 0.9 Vio TS27L2B/C/I/M 0.25 2 0.25 2 mV T £ T £ T TS27L2C/I/M 12 12 min amb max TS27L2AC/AI/AM 6.5 6.5 TS27L2B/C/I/M 3 3.5 DVio Input Offset Voltage Drift 2 2 µV/°C Input Offset Current note 1) Iio Vic = 5V, VO = 5V 1 1 pA T £ T £ T 100 200 min amb max Input Bias Current - see note 1 Iib Vic = 5V, VO = 5V 1 1 pA T £ T £ T 150 300 min amb max High Level Output Voltage VOH Vid = 100mV, RL = 1MW 8.8 9 8.8 9 V T £ T £ T 8.7 8.6 min amb max Low Level Output Voltage VOL Vid = -100mV 50 50 mV Large Signal Voltage Gain Avd ViC = 5V, RL = 1MW, Vo = 1V to 6V 60 100 60 100 V/mV T £ T £ T 45 40 min amb max Gain Bandwidth Product GBP Av = 40dB, RL = 1MW, CL = 100pF, fin = 100kHz 0.1 0.1 MHz Common Mode Rejection Ratio CMR dB ViC = 1V to 7.4V, Vo = 1.4V 65 80 65 80 Supply Voltage Rejection Ratio SVR dB V + = 5V to 10V, V = 1.4V 60 80 60 80 CC o Supply Current (per amplifier) ICC Av = 1, no load, Vo = 5V 10 15 10 15 µA T £ T £ T 17 18 min amb max Output Short Circuit Current Io Vo = 0V, Vid = 100mV 60 60 mA Output Sink Current Isink Vo = VCC, Vid = -100mV 45 45 mA Slew Rate at Unity Gain SR RL = 1MW , CL = 100pF, Vi = 3 to 7V 0.04 0.04 V/m s Phase Margin at Unity Gain f m Av = 40dB, RL = 1MW , CL = 100pF 45 45 Degrees KOV Overshoot Factor 30 30 % Equivalent Input Noise Voltage nV e ------------ n f = 1kHz, Rs = 100W 68 68 Hz Vo1/Vo2 Channel Separation 120 120 dB 1. Maximum values including unavoidable inaccuracies of the industrial test. 4/9

TS27L2C,I,M TYPICAL CHARACTERISTICS Figure 1 : Supply Current (each amplifier) versus Figure 3b : High Level Output Voltage versus Supply Voltage High Level Output Current 20 20 T =25°C A) Tamb =25°C V) amb m( AV=1 ( 16 Vid =100mV CC 15 VO=VCC/2 OH V =16V NT,I E,V 12 CC E G RR 10 TA U L YC VO 8 VCC=10V L T P 5 U P P U T 4 S U O 0 0 4 8 12 16 -50 -40 -30 -20 -10 0 SUPPLYVOLTAGE,VCC(V) OUTPUTCURRENT,IOH(mA) Figure 2 : Input Bias Current versus Free Air Figure 4a : Low Level Output Voltage versus Low Temperature Level Output Current 100 1.0 (pA)B VVCiC==51V0V (V)L 0.8 VCC = 3V II O T, V REN GE, 0.6 VCC = 5V R 10 A U T C L 0.4 O S A V Tamb = 25°C BI T T U 0.2 Vic= 0.5V PU TP Vid = -100mV N U I O 1 0 1 2 3 25 50 75 100 125 TEMPERATURE,Tamb (°C) OUTPUT CURRENT,IOL(mA) Figure 3a : High Level Output Voltage versus Figure 4b : Low Level Output Voltage versus Low High Level Output Current Level Output Current 5 3 V) Tamb =25°C (V) VCC = 10V (H 4 Vid =100mV OL VO V V = 16V E, E, 2 CC G 3 VCC=5V G TA A L T O L V 2 O 1 UTPUT 1 VCC=3V PUTV TVViadim==b0=-.1520V50°mCV O T U 0 O -10 -8 -6 -4 -2 0 0 4 8 12 16 20 OUTPUTCURRENT,IOH(mA) OUTPUT CURRENT, IOL (mA) 5/9

TS27L2C,I,M Figure 5 : Open Loop Frequency Response and Figure 8 : Phase Margin versus Capacitive Load Phase Shift ) es 80 50 e 40 GAIN 0 es) (Degr 70 TRAaLVm=b==112M5W°C B) 30 PHASE 45 gre m VCC= 10V GAIN(d 2100 TVRaCLmC=b+==1M215W0°VC PMhaargsien 91035 HASE(De fARGIN, 60 0 CALVC=L1=0100p0F GBaanindwidth 180 P EM 50 Product S -10 A 2 3 4 5 6 7 H 40 10 10 10 10 10 10 P 0 20 40 60 80 100 FREQUENCY,f(Hz) CAPACITANCE, CL (pF) Figure 6 : Gain Bandwidth Product versus Supply Figure 9 : Slew Rate versus Supply Voltage Voltage ) z 120 H M Tamb= 25°C 0.05 D.,GBP( 18000 CARVLL === 1110M0WpF mSR(V/s) 0.04 CTRaLLm==b11=0M20W5p°FC SR O S, R E P 60 T SR A W. R 0.03 D W N 40 E A L S B 0.02 N AI 4 6 8 10 12 14 16 G 0 4 8 12 16 SUPPLY VOLTAGE,VCC (V) SUPPLY VOLTAGE, VCC (V) Figure 7 : Phase Margin versus Supply Voltage Figure 10 : Input Voltage Noise versus Frequency ) 60 Degrees 50 TRCaLmb===11M020W5p°FC NOISEHz) 300 VTaCmCb==2150°VC m( ALV = 1 PUTV/V 200 RS= 100W fN, INE(n GI 40 NTG AR ALELTA 100 M VO IV E U S 30 Q A E H 0 P 1 10 100 1000 0 4 8 12 16 FREQUENCY (Hz) SUPPLY VOLTAGE,VCC (V) 6/9

TS27L2C,I,M PACKAGE MECHANICAL DATA 8 PINS - PLASTIC DIP Millimeters Inches Dim. Min. Typ. Max. Min. Typ. Max. A 3.32 0.131 a1 0.51 0.020 B 1.15 1.65 0.045 0.065 b 0.356 0.55 0.014 0.022 b1 0.204 0.304 0.008 0.012 D 10.92 0.430 E 7.95 9.75 0.313 0.384 e 2.54 0.100 e3 7.62 0.300 e4 7.62 0.300 F 6.6 0260 i 5.08 0.200 L 3.18 3.81 0.125 0.150 Z 1.52 0.060 7/9

TS27L2C,I,M PACKAGE MECHANICAL DATA 8 PINS - PLASTIC MICROPACKAGE (SO) L c1 C a3 a2 A b s a1 b1 e3 E D M 8 5 F 1 4 Millimeters Inches Dim. Min. Typ. Max. Min. Typ. Max. A 1.75 0.069 a1 0.1 0.25 0.004 0.010 a2 1.65 0.065 a3 0.65 0.85 0.026 0.033 b 0.35 0.48 0.014 0.019 b1 0.19 0.25 0.007 0.010 C 0.25 0.5 0.010 0.020 c1 45° (typ.) D 4.8 5.0 0.189 0.197 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 3.81 0.150 F 3.8 4.0 0.150 0.157 L 0.4 1.27 0.016 0.050 M 0.6 0.024 S 8° (max.) 8/9

TS27L2C,I,M PACKAGE MECHANICAL DATA 8 PINS - THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP) k c 0.25mm .010 inch GAGE PLANE LL L1L1 E1 SEATINGPLANE C A E A2 A1 55 44 D b e 8 1 8 1 PIN 1 IDENTIFICATION Millimeters Inches Dim. Min. Typ. Max. Min. Typ. Max. A 1.20 0.05 A1 0.05 0.15 0.01 0.006 A2 0.80 1.00 1.05 0.031 0.039 0.041 b 0.19 0.30 0.007 0.15 c 0.09 0.20 0.003 0.012 D 2.90 3.00 3.10 0.114 0.118 0.122 E 6.40 0.252 E1 4.30 4.40 4.50 0.169 0.173 0.177 e 0.65 0.025 k 0° 8° 0° 8° l 0.50 0.60 0.75 0.09 0.0236 0.030 L 0.45 0.600 0.75 0.018 0.024 0.030 L1 1.000 0.039 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States © http://www.st.com 9/9