TS12011/TS12012 A 0.8V/1.5µA Nanopower Op Amp, Comparator, and Reference FEATURES DESCRIPTION  NanoWatt Analog™ Op Amp, Comparator, and The TS12011/TS12012 combine a 0.58V reference, a 0.58V Reference in Single 4 mm2 Package 20µs comparator, and a unity-gain stable op amp in a  Ultra Low Total Supply Current: 1.6µA (max) single IC. All three devices operate from a single 0.8V  Supply Voltage Range: 0.8V to 2.5V to 2.5V power supply and consume less than 1.6µA  Internal 0.58V Reference total supply current. Supply current for all three  Op Amp and Comparator Input Ranges are functions over 0.8V to 2.5V supply range is Rail-to-Rail guaranteed 1.6µA max.  Unity-gain Stable Op Amp with A = 104dB VOL  Op Amp Output: Rail-to-Rail and Phase- Super-flexible for crafting voltage detectors, timers, Reversal-Free and wake-up circuits, these bundled functions exhibit  Internal ±7.5mV Comparator Hysteresis low shoot-through currents and graceful power-down  20µs Comparator Propagation Delay modes. Both the comparator and the op amp feature  Resettable Latched Comparator rail-to-rail input stages. The latching comparator  TS12011: Push-pull Rail-to-Rail Output exhibits ±7.5mV of internal hysteresis for clean, TS12012: Open-drain Output chatter-free output switching. When compared against similar products, the TS12011/TS12012 offer a factor-of-20 lower power consumption and at least a APPLICATIONS 55% reduction in pcb area. Battery-powered Systems The TS12011’s comparator has a push-pull output Single-Cell and +1.8V, +2.5V Powered Systems stage with break-before-make switches for low shoot- Low-Frequency, Local-Area Alarms/Detectors through currents. The TS12012’s comparator has an Smoke Detectors and Safety Sensors open-drain output having no parasitic diode to VDD, Infrared Receivers for Remote Controls for interfacing to wired-OR or mixed-voltage logic. Instruments, Terminals, and Bar-Code Readers Smart-Card Readers The TS12011 and the TS12012 are fully specified over the -40°C to +85°C temperature range and each is available in a low-profile, 10-pin 2x2mm TDFN package with an exposed back-side paddle. TYPICAL APPLICATION CIRCUIT Comparator Part Number Output Stage TS12011 Push-pull TS12012 Ope n-Drain Page 1 © 2014 Silicon Laboratories, Inc. All rights reserved.

TS12011/TS12012 ABSOLUTE MAXIMUM RATINGS Supply Voltage (V to V ) ................................................. +2.75 V Output Current DD SS Input Voltage AMPOUT, COMPOUT…………………...............................50mA AMPIN+, AMPIN-…………………….….V – 0.3V to V + 0.3V Short-Circuit Duration SS DD COMPIN+, COMPIN-…..........................V – 0.3V to V + 0.3V (REFOUT, AMPOUT, COMPOUT)………………...….Continuous SS DD L(cid:3364)(cid:3364)H(cid:3364)(cid:3364)(cid:3364)D(cid:3364)(cid:3364)E(cid:3364)(cid:3364)T(cid:3364)………………………………..…….….. VSS - 0.3V to +5.5V Continuous Power Dissipation (TA = +70°C) Output Voltage 10-Pin TDFN (Derate at 13.48mW/°C above +70°C) ......... 1078mW AMPOUT, REFOUT……….………….....V – 0.3V to V + 0.3V Operating Temperature Range ................................. -40°C to +85°C SS DD COMPOUT (TS12011)………….........…V - 0.3V to V + 0.3V Junction Temperature……………………………………..……+150°C SS DD COMPOUT (TS12012)……...…..………….…V - 0.3V to +5.5V Storage Temperature Range .................................. -65°C to +150°C SS Differential Input Voltage (AMPIN, COMPIN)........................ ±2.75V Lead Temperature (Soldering, 10s) ...................................... +300°C Electrical and thermal stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. Exposure to any absolute maximum rating conditions for extended periods may affect device reliability and lifetime. PACKAGE/ORDERING INFORMATION PART PART ORDER NUMBER CARRIERQUANTITY ORDER NUMBER CARRIERQUANTITY MARKING MARKING Tape Tape TS12011ITD1022 ----- TS12012ITD1022 ----- & Reel & Reel AAL AAM Tape Tape TS12011ITD1022T 3000 TS12012ITD1022T 3000 & Reel & Reel Lead-free Program: Silicon Labs supplies only lead-free packaging. Consult Silicon Labs for products specified with wider operating temperature ranges. Page 2 TS12011/12 Rev. 1.0

TS12011/TS12012 ELECTRICAL CHARACTERISTICS V = 0.8V; V = 0V; V = 0V; V = 0V; V = (V + V )/2; V = HiZ; T = -40°C to +85°C, unless otherwise noted. DD SS COMPIN+/- AMPIN+/- AMPOUT DD SS COMPOUT A Typical values are at T = +25°C. See note 1. A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Voltage V 0.8 2.5 V DD T = +25°C 1.1 1.6 Supply Current I REFOUT = open A µA DD -40°C ≤ T ≤ 85°C 2 A REFERENCE SECTION Reference Output T = +25°C 555 577 600 V V = 0.8V or 2.5V A mV Voltage REFOUT DD -40°C ≤ T ≤ 85°C 552 602 A Reference Load I = ±100nA 0.5 % Regulation OUT AMPLIFIER SECTION T = +25°C 3.5 mV Input Offset Voltage V V = V or V = V A OS AMPIN+/- DD AMPIN+/- SS -40°C ≤ T ≤ 85°C 7 A Input Bias Current I , I V V = (V – V )/2 20 nA IN+ N- AMPIN+, AMPIN- DD SS Input Offset Current I V V = (V – V )/2 0.01 5 nA OS AMPIN+, AMPIN- DD SS Input Common-Mode IVR Guaranteed by Input Offset Voltage Test V V V Range SS DD Large-Signal Voltage R = 100K to V /2; A L DD 90 104 dB Gain VOL V + 50mV < V < V - 50mV SS OUT DD Gain-Bandwidth GBWP R = 100kΩ//20pF 15 kHz Product L Phase Margin φ R = 100kΩ//20pF 70 deg M L Slew Rate SR R = 100kΩ//20pF 6 V/ms L Common-Mode CMRR 0V ≤ V ≤ 2.1V; V = 2.5V 50 75 dB Rejection Ratio IN(CM) DD Power-Supply PSRR 0.65V ≤ (V - V ) ≤ 2.5V 50 75 dB Rejection Ratio DD SS Output High Voltage V R = 100kΩ to V V – 50mV V OH L SS DD Output Low Voltage V R = 100kΩ to V V + 50mV V OL L DD SS Output Source I V = V 0.28 mA Current SC+ AMPOUT SS Output Sink Current I V = V 4.5 mA SC- AMPOUT DD Output Load C 50 pF Capacitive Drive OUT COMPARATOR SECTION V = V ; V = V ; T = +25°C 4.5 mV Input Offset Voltage V AMPIN+/- DD AMPIN+/- SS A OS See Note 2 -40°C ≤ T ≤ 85°C 8 A Input Hysteresis V See Note 3 ±7.5 mV HB Input Bias Current I , I V V = V or V 20 nA IN+ N- COMPIN+, COMPIN- DD SS Input Offset Current I V V = V or V 0.2 5 nA OS COMPIN+, COMPIN- DD SS Input Voltage Range IVR Guaranteed by Input Offset Voltage Test V V V SS DD Common-Mode CMRR 0V ≤ V ≤ 2.1V; V = 2.5V 50 60 dB Rejection Ratio IN(CM) DD Power-Supply PSRR 0.8V ≤ (V - V ) ≤ 2.5V 50 70 dB Rejection Ratio DD SS Low-to-High V = 10mV; See Note 4 30 µs t OVERDRIVE TS12011 Propagation Delay PD+ V = 100mV; See Note 4 20 µs OVERDRIVE High-to-Low V = 10mV; See Note 4 30 µs t OVERDRIVE Propagation Delay PD- V = 100mV; See Note 4 20 µs OVERDRIVE Output High Voltage V TS12011; I = -100μA V – 0.1 V OH OUT DD Output Low Voltage V TS12011 ; I = 100μA V + 0.1 V OL OUT SS Output Low Voltage V TS12012 ; I = 100μA V + 0.11 V OL OUT SS Sourcing; V = V 0.1 mA Output Short-Circuit COMPOUT SS I TS12011 ; Sinking; V = V 0.5 mA Current SC COMPOUT DD TS12012 ; Sinking; V = V 1.4 mA COMPOUT DD Open Drain Leakage TS12012 ; V = 5V 20 nA COMPOUT TS12011/12 Rev. 1.0 Page 3

TS12011/TS12012 V = 0.8V, V = 0V, V = 0V, V = 0V, V = (V + V )/2, V = HiZ. T = -40°C to +85°C, unless otherwise noted. DD SS COMPIN+/- AMPIN+/- AMPOUT DD SS COMPOUT A Typical values are at T = +25°C. See note 1. A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS CONTROL PIN SECTION L(cid:3364)(cid:3364)H(cid:3364)(cid:3364)(cid:3364)D(cid:3364)(cid:3364)E(cid:3364)(cid:3364)T(cid:3364) Input Low Voltage V Comparator Latched Output 0.8V ≤ VDD≤ 1.1V 0.1 V IL Enabled 1.1V < V ≤ 2.5V 0.2 DD Comparator Latched Output 0.8V ≤ V ≤ 1.1V V - 0.1 L(cid:3364)(cid:3364)H(cid:3364)(cid:3364)(cid:3364)D(cid:3364)(cid:3364)E(cid:3364)(cid:3364)T(cid:3364) Input High Voltage V DD DD V IH Disabled 1.1V < V ≤ 2.5V 1 DD L(cid:3364)(cid:3364)H(cid:3364)(cid:3364)(cid:3364)D(cid:3364)(cid:3364)E(cid:3364)(cid:3364)T(cid:3364) Input Leakage VL(cid:3364)(cid:3364)H(cid:3364)(cid:3364)(cid:3364)D(cid:3364)(cid:3364)E(cid:3364)(cid:3364)T(cid:3364) = VSS; VL(cid:3364)(cid:3364)H(cid:3364)(cid:3364)(cid:3364)D(cid:3364)(cid:3364)E(cid:3364)(cid:3364)T(cid:3364) = 5.5V 100 nA Note 1: All devices are 100% production tested at T = +25°C and are guaranteed by characterization for T = T to T , as specified. A A MIN MAX Note 2: V is defined as the center of the hysteresis band at the input minus V OS IN(CM). Note 3: The hysteresis-related trip points are defined by the edges of the hysteresis band and measured with respect to the center of the hysteresis band. Note 4: The propagation delays are specified with an output load capacitance of C = 15pF. V is defined above and is beyond the L OVERDRIVE offset voltage and hysteresis of the comparator input. Page 4 TS12011/12 Rev. 1.0

TS12011/TS12012 TYPICAL PERFORMANCE CHARACTERISTICS V = 2.5V; V = 0V; V = HiZ; V = HiZ, unless otherwise noted. Typical values are at T = +25°C. DD SS AMPOUT COMPOUT A Supply Current vs Supply Voltage and Temperature Reference Voltage vs Temperature 1.6 0.589 NT - µA 1.4 TA = +85ºC TAGE - V 0.587 E L R T = +25ºC O R 1.2 A V 0.585 CU CE Y N L E P R P 1 E 0.583 U F S TA = -40ºC RE 0.8 0.581 0.8 1.23 1.65 2.08 2.5 -40 -15 10 35 60 85 SUPPLY VOLTAGE - V TEMPERATURE - ºC Op Amp Short-Circuit Current Comparator Short-Circuit Current vs Supply Voltage vs Supply Voltage 20 16 mA VAMPOUT = VSS A VCOMPOUT = VSS NT - 16 T - m 12 E N RR 12 RE U R C U 8 CUIT 8 UIT C R C RT-CI 4 T-CIR 4 O R H O S 0 SH 0 0.8 1.23 1.65 2.08 2.5 0.8 1.23 1.65 2.08 2.5 SUPPLY VOLTAGE - V SUPPLY VOLTAGE - V Op Amp Short-Circuit Current Comparator Short-Circuit Current vs Supply Voltage vs Supply Voltage 45 18 mA VAMPOUT = VDD A VCOMPOUT = VDD ENT - 38.5 NT - m 12 R E R R U R C 32 U RCUIT CUIT C 6 RT-CI 25.5 T-CIR O R H O S 19 SH 0 0.8 1.23 1.65 2.08 2.5 0.8 1.23 1.65 2.08 2.5 SUPPLY VOLTAGE - V SUPPLY VOLTAGE - V TS12011/12 Rev. 1.0 Page 5

TS12011/TS12012 TYPICAL PERFORMANCE CHARACTERISTICS V = 2.5V; V = 0V; V = HiZ; V = HiZ, unless otherwise noted. Typical values are at T = +25°C. DD SS AMPOUT COMPOUT A Comparator Output Voltage High Comparator Output Voltage Low vs Source Current vs Sink Current 0.6 0.4 0.3 0.4 V - H V - VDO V - OL 0.2 VD 0.2 0.1 0 0 0 1 2 3 4 0 1 2 3 SOURCE CURRENT - mA SINK CURRENT - mA Op Amp Output Voltage High Op Amp Output Voltage Low vs Source Current vs Sink Current 0.6 0.35 0.5 0.28 V 0.4 - V - DDOH0.3 V - V OL 00..1241 V 0.2 0.07 0.1 0 0 0 2 4 6 8 0 2 4 6 SOURCE CURRENT - mA SINK CURRENT - mA Op Amp Input Offset Voltage Comparator Input Offset Voltage vs Supply Voltage vs Supply Voltage 300 1 V V E - µ 200 E - m VINCM = VSS G G 0.5 A A T100 V = V T L INCM DD L O O V V T 0 T 0 E E S S F F UT OF-100 VINCM = VSS UT OF -0.5 VINCM = VDD NP-200 NP I I -300 -1 0.8 1.23 1.65 2.08 2.5 0.8 1.23 1.65 2.08 2.5 SUPPLY VOLTAGE - V SUPPLY VOLTAGE - V Page 6 TS12011/12 Rev. 1.0

TS12011/TS12012 TYPICAL PERFORMANCE CHARACTERISTICS VDD = 2.5V; VSS = 0V; VAMPOUT = HiZ; VCOMPOUT = HiZ, unless otherwise noted. Typical values are at TA = +25°C. Op Amp Input Offset Voltage Op Amp Input Offset Voltage vs Input Common-Mode Voltage vs Input Common-Mode Voltage 0.8 0.8 V V E - m VDD = 0.8V E - m VDD = 2.5V G G 0.7 A A T 0.6 T L L O O V V T T 0.6 E E S S F F OF 0.4 OF T T 0.5 U U P P N N I I 0.2 0.4 0 0.2 0.4 0.6 0.8 0 0.5 1 1.5 2 2.5 SUPPLY VOLTAGE - V SUPPLY VOLTAGE - V TS12011 TS12011 Op Amp Small-Signal Transient Response Op Amp Large Signal Transient Response VDD = 2.5V, RLOAD = 100kΩ, CLOAD = 15pF VDD = 2.5V, RLOAD = 100kΩ, CLOAD = 15pF NPUT mV/DIV NPUT V/DIV I0 I1 5 UTPUT mV/DIV UTPUT V/DIV O0 O1 5 200µs/DIV 500µs/DIV TS12011 TS12011 Comparator Propagation Delay (TPD+) Comparator Propagation Delay (TPD-) V = 2.5V, V = 100mV, C = 15pF V = 2.5V, V = 100mV, C = 15pF DD OVERDRIVE LOAD DD OVERDRIVE LOAD V V T DI T DI PU V/ PUV/ N m Nm I0 I0 5 5 UT V UT V P DI PDI UTV/ UTV/ O 1 O1 20µs/DIV 20µs/DIV TS12011/12 Rev. 1.0 Page 7

TS12011/TS12012 TYPICAL PERFORMANCE CHARACTERISTICS V = 2.5V; V = 0V; V = HiZ; V = HiZ, unless otherwise noted. Typical values are at T = +25°C. DD SS AMPOUT COMPOUT A Gain and Phase vs Frequency 50 100 70º PHASE 40 50 30 0 s e AIN - dB 1200 GAIN -1-5000 E - Degre G S A V = 0.8V 14kHz H 0 DD -150 P T = +25ºC A R = 100kΩ L -10 C = 20pF -200 L A = 1000V/V VCL -20 -250 100 1k 10k 100k FREQUENCY - Hz PIN FUNCTIONS PIN PIN NAME FUNCTION TS12011 TS12012 1 1 AMPOUT Amplifier Output 2 2 AMPIN- Amplifier Inverting Input 3 3 AMPIN+ Amplifier Non-inverting Input 4 4 VSS Negative Supply Voltage. Latch Enable Pin, active low. Tie to VDD for normal 5 5 L(cid:3364)(cid:3364)(cid:3364)H(cid:3364)(cid:3364)(cid:3364)D(cid:3364)(cid:3364)(cid:3364)E(cid:3364)(cid:3364)T(cid:3364)(cid:3364) operation. Do not leave floating. See Latch Truth Tables below. 6 8 COMPIN+ Comparator Non-inverting Input 7 7 REFOUT 0.58V Reference Output 8 6 COMPIN- Comparator Inverting Input Comparator Output. 9 9 COMPOUT TS12011: push-pull TS12012: open-drain Positive Supply Voltage. Connect a 0.1µF bypass capacitor 10 10 VDD from this pin to analog VSS/GND. EP EP ---- Exposed paddle is electrically connected to VSS/GND. Page 8 TS12011/12 Rev. 1.0

TS12011/TS12012 BLOCK DIAGRAM THEORY OF OPERATION and exhibit +/-7.5mV of hysteresis. The only difference between the two device types is in the output stage of the comparator. The TS12011 has a The TS12011 and TS12012 are multi-purpose CMOS push-pull output and latches in the high state. The building blocks intended for creating analog glue TS12012 has an open-drain output, latches in the low functions around battery-powered uC systems. There state, and can tolerate pull-up voltages higher than is an op amp for signal conditioning, a comparator for the supply (up to 5.5V absolute max above detection, and a reference to establish detection VSS/GND). threshold levels. It’s possible to build a wide variety of timers, event detectors, regulators, and voltage TS12011 push-pull output driver was designed to monitors using these flexible uncommitted blocks. minimize supply-current surges while driving ±100µA loads with an output swing to within 100mV of the Optimized for low-voltage operation, these devices supply rails. The TS12011 and the TS12012 can sink draw less than 1.6uA total from a 0.8V to 2.5V 0.5mA and 1.4mA of current, respectively. The supply. The op amp and comparator blocks typically TS12011 can source 0.1mA of current. continue to function down to less than 0.5V (REFOUT will go into dropout, however). The non-traditional latch function works to detect and latch changes in the input state. If the L(cid:3364)(cid:3364)H(cid:3364)(cid:3364)(cid:3364)D(cid:3364)(cid:3364)E(cid:3364)(cid:3364)T(cid:3364) control Comparator input is enabled, the output will latch high (low for the TS12012) whenever the differential input voltage is The comparator block is designed for high gain and high enough to force a change in that direction. If the chatter-free output switching in noisy environments. differential voltage is in the wrong direction to force a The comparator inputs have rail-to-rail VIN range, TS12011/12 Rev. 1.0 Page 9

TS12011/TS12012 change, the comparator stays active and waits for the Op Amp crossing, at which point it will latch in its final state. The TS12011 and TS12012 have a unity-gain stable An internal POR circuit ensures that the latch powers op-amp with a GBWP of 15kHz, a slew rate of 6V/ms, up in the “comparator active” state if L(cid:3364)(cid:3364)H(cid:3364)(cid:3364)(cid:3364)D(cid:3364)(cid:3364)E(cid:3364)(cid:3364)T(cid:3364) is low and can drive a capacitive load up to 50pF. The when VDD is first applied. common mode input voltage range extends from VSS to VDD and the input bias current and offset current Latch Truth Table – TS12011 are less than 20nA and 2nA, respectively. CMPIN+ CMPOUT to CMPIN- Op-Amp Stability L(cid:3364)(cid:3364)H(cid:3364)(cid:3364)(cid:3364)D(cid:3364)(cid:3364)E(cid:3364)(cid:3364)T(cid:3364) initial CMPOUT difference state voltage The TS12011 and TS12012 op-amp is able to drive Normal up to 50pF of capacitive load and still maintain HIGH X N/A operation stability in a unity-gain configuration with a 15kHz HIGH GBWP and a phase margin of 70 degrees with a LOW HIGH X (latched) 100kΩ//20pF output load. LOW LOW LOW negative (comparator Though the TS12011 and TS12012 address low active) frequency applications, it is essential to perform good layout techniques in order to minimize board leakage HIGH LOW LOW positive and stray capacitance, which is of a concern in low (latched) power, high impedance circuits. For instance, a X = Don’t Care 10MΩ resistor coupled with a 1pF stray capacitance can lead to a pole at approximately 15kHz, which is Latch Truth Table – TS12012 the GBWP of the device. If stray capacitance is CMPIN+ CMPOUT unavoidable, a feedback capacitor can be placed in to CMPIN- L(cid:3364)(cid:3364)H(cid:3364)(cid:3364)(cid:3364)D(cid:3364)(cid:3364)E(cid:3364)(cid:3364)T(cid:3364) initial CMPOUT parallel with the feedback resistor. difference state voltage APPLICATIONS INFORMATION Normal HIGH X N/A operation LOW LOW X LOW Comparator Hysteresis (latched) HIGH As a result of circuit noise or unintended parasitic LOW HIGH positive (comparator feedback, many analog comparators often break into active) oscillation within their linear region of operation LOW HIGH negative LOW especially when the applied differential input voltage (latched) approaches 0V (zero volt). Externally-introduced X = Don’t Care hysteresis is a well-established technique for stabilizing analog comparator behavior and requires Reference external components. As shown in Figure 1, adding comparator hysteresis creates two trip points: VTHR The TS12011 and TS12012 on-board 0.58V ±4.5% (for the rising input voltage) and VTHF (for the falling reference voltage can source and sink 0.1µA and input voltage). The hysteresis band (VHB) is defined 0.1µA of current and can drive a capacitive load less as the voltage difference between the two trip points. than 50pF and greater than 50nF with a maximum When a comparator’s input voltages are equal, capacitive load of 250nF. The higher the capacitive hysteresis effectively forces one comparator input to load, the lower the noise on the reference voltage move quickly past the other input, moving the input and the longer the time needed for the reference out of the region where oscillation occurs. Figure 1 voltage to respond and become available on the illustrates the case in which an IN- input is a fixed REFOUT pin. With a 250nF capacitive load, the voltage and an IN+ is varied. If the input signals were reference voltage will settle to within specifications in reversed, the figure would be the same with an approximately 20ms. inverted output. To save cost and external pcb area, an internal ±7.5mV hysteresis circuit was added to the TS12011 and TS12012. Page 10 TS12011/12 Rev. 1.0

TS12011/TS12012 and if IR2 = 150nA is chosen, then the formulae above produce two resistor values: 3.87MΩ and 12.8MΩ - a 4.02MΩ standard value for R2 is selected. 2) Next, the desired hysteresis band (VHYSB) is set. In this example, VHYSB is set to 100mV. 3) Resistor R1 is calculated according to the following equation: R1 = R2 x (VHYSB/VDD) Figure 1. TS12011/TS12012 Threshold Hysteresis Band and substituting the values selected in 1) and Adding Hysteresis to the TS12011 Push-pull 2) above yields: Output Option R1 = 4.02MΩ x (100mV/2.5V) = 160.8kΩ. Additional hysteresis can be generated with three external resistors using positive feedback as shown The 160kΩ standard value for R1 is chosen. in Figure 2. Unfortunately, this method also reduces the hysteresis response time. The procedure to 4) The trip point for COMPIN+ rising (VTHR) is calculate the resistor values for the TS12011 is as chosen such that VTHR > VREFOUT x (R1 + follows: R2)/R2 (VTHF is the trip point for VCOMPIN+ falling). This is the threshold voltage at which the comparator switches its output from low to high as VCOMPIN+ rises above the trip point. In this example, VTHR is set to 2. 5) With the VTHR from Step 4 above, resistor R3 is then computed as follows: R3 = 1/[VTHR/(VREFOUT x R1) - (1/R1) - (1/R2)] R3 = 1/[2V/(0.58V x 160kΩ) - (1/160kΩ) - Figure 2. Using Three Resistors Introduces (1/4.02MΩ)] = 66.43kΩ Additional Hysteresis in the TS12011 In this example, a 69.8kΩ, 1% standard 1) Setting R2. As the leakage current at the IN value resistor is selected for R3. pin is less than 20nA, the current through R2 should be at least 150nA to minimize offset 6) The last step is to verify the trip voltages and voltage errors caused by the input leakage hysteresis band using the standard current. The current through R2 at the trip resistance values: point is (VREFOUT - VCOMPOUT)/R2. For VCOMPIN+ rising: In solving for R2, there are two formulas – one each for the two possible output states: VTHR = VREFOUT x R1 [(1/R1) + (1/R2) + (1/R3)] = 1.93V R2 = VREFOUT/IR2 For VCOMPIN+ falling: or VTHF = VTHR - (R1 x VDD/R2) = 1.83V R2 = (VDD - VREFOUT)/IR2 From the results of the two formulae, the and Hysteresis Band = VTHR – VTHF = 100mV smaller of the two resulting resistor values is chosen. For example, when using the TS12011 (VREFOUT = 0.58V) at a VDD = 2.5V TS12011/12 Rev. 1.0 Page 11

TS12011/TS12012 Adding Hysteresis to the TS12012 Open-Drain Option R3 = 1/[VTHR/(VREFOUT x R1) - (1/R1) - (1/R2)] The TS12012 has open-drain output and requires an 6) As before, the last step is to verify the trip external pull-up resistor to VDD as shown in Figure 3. voltages and hysteresis band with the standard resistor values used in the circuit: For VCOMPIN+ rising: VTHR = VREFOUT x R1 x (1/R1+1/R2+1/R3) For VCOMPIN+ falling: VTHF = VREFOUT x R1 x(1/R1+1/R3+1/(R2+R4)) -(R1/(R2+R4)) x VDD and Hysteresis Band is given by VTHR – VTHF Figure 3. Using Four Resistors Introduces PC Board Layout and Power-Supply Bypassing Additional Hysteresis in the TS12012 While power-supply bypass capacitors are not Additional hysteresis can be generated using positive typically required, it is good engineering practice to feedback; however, the formulae differ slightly from use 0.1uF bypass capacitors close to the device’s those of the push-pull option TS12011. The power supply pins when the power supply impedance procedure to calculate the resistor values for the is high, the power supply leads are long, or there is TS12012 is as follows: excessive noise on the power supply traces. To reduce stray capacitance, it is also good engineering 1) As in the previous section, resistor R2 is practice to make signal trace lengths as short as chosen according to the formulae: possible. Also recommended are a ground plane and surface mount resistors and capacitors. R2 = VREFOUT/150nA Input Noise or Radiated noise is common in low power circuits that R2 = (VDD- VREFOUT)/150nA - R4 require high impedance circuits. To minimize this effect, all traces between the inputs of the where the smaller of the two resulting resistor comparator or op-amp and passive component values is the best starting value. networks should be made as short as possible. 2) As before, the desired hysteresis band Pilot Light Flame Detector with Low-Battery (VHYSB) is set to 100mV. Lockout Circuit 3) Next, resistor R1 is then computed according The TS12011 can be used to create a pilot flame to the following equation: detector with low-battery lockout circuit as shown in Figure 4. The circuit is able to detect when the R1 = (R2 + R4) x (VHYSB/VDD) thermocouple does not detect the pilot flame and when the battery in the circuit drops to 1.39V. This 4) The trip point for VCOMPIN+ rising (VTHR) is circuit makes use of the op-amp, comparator, and chosen (again, remember that VTHF is the trip 0.58V reference in the TS12011. In this example, a point for VCOMPIN+ falling). This is the type R thermocouple is used. It generates a voltage threshold voltage at which the comparator range from 9mV to 17mV that corresponds to a switches its output from low to high as temperature range of 900ºC to 1500ºC, which is VCOMPIN+ rises above the trip point. typical of a methane pilot flame. If the pilot flame is removed, the temperature drops; hence, the output 5) With the VTHR from Step 4 above, resistor R3 voltage generated by the thermocouple is drops to a is computed as follows: minimum voltage of 0.1mV that is applied to the non- Page 12 TS12011/12 Rev. 1.0

TS12011/TS12012 inverting input of the op-amp. This switches the off Q2 and the output of the op-amp will turn Q1 off. output voltage of the op-amp to a LOW state and in The complete circuit consumes approximately 95µA turn, switches Q1 off. If, however, the battery voltage of supply current at V = 1.5V. DD drops from 1.5V to 1.39V, the comparator output will switch from an output HIGH to a LOW. This will turn Figure 4. Pilot Light Flame Detector with Low-Battery Lockout Circuit TS12011/12 Rev. 1.0 Page 13

TS12011/TS12012 Figure 5. Sawtooth/Triangle Generator with Stable Frequency and Amplitude Page 14 TS12011/12 Rev. 1.0

TS12011/TS12012 Figure 6. Low-power One-shot and Latch Circuits TS12011/12 Rev. 1.0 Page 15

TS12011/TS12012 Figure 7. Adjustable Buffered Reference Generators Page 16 TS12011/12 Rev. 1.0

TS12011/TS12012 PACKAGE OUTLINE DRAWING 10-Pin TDFN22 Package Outline Drawing (N.B., Drawings are not to scale) Patent Notice Silicon Labs invests in research and development to help our customers differentiate in the market with innovative low-power, small size, analog-intensive mixed-signal solutions. Silicon Labs' extensive patent portfolio is a testament to our unique approach and world-class engineering team. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where personal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized application, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. Silicon Laboratories, Inc. Page 17 400 West Cesar Chavez, Austin, TX 78701 TS12011/12 Rev. 1.0 +1 (512) 416-8500 ▪ www.silabs.com

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