TS1100/01/02/03 Data Sheet TS1100/01/02/03 Uni- and Bidirectional Current-Sense Amplifiers KEY FEATURES The TS1100/01/02/03 Unidirectional and Bidirectional Current Sense Amplifiers con- • Low Supply Current sume a very low 0.68 µA supply current. • Current Sense Amplifier: 0.68 µA The TS1100 and TS1101 high-side current sense amplifiers (CSA) combine a 100 µV • IVDD: 0.02 µA (max) input offset voltage (V ) and a 0.6% (max) gain error (GE), with both specifica- OS • High Side Bidirectional and Unidirectional tions optimized for any precision current measurement. Current Sense Amplifier • Wide CSA Input Common Mode Range: +2 The TS1102 and TS1103 CSAs combine a 200 µV (max) V and a 0.6% (max) GE for OS V to +27 V cost-sensitive applications. • Low CSA Input Offset Voltage: 100 µV (max) (TS1100 and TS1101 Only) For all high-side current sensing applications, the TS1100/01/02/03 CSAs are self-pow- ered and feature a wide input common-mode voltage range from 2 to 27 V. • Low Gain Error: 0.6% (max) • Four Gain Options Available: For the bidirectional CSAs, TS1101 and TS1103, a SIGN comparator digital output is • 25 V/V provided that indicates the direction of current flow. All CSAs are specified for operation • 50 V/V over the –40 °C to +105 °C temperature range. • 100 V/V Applications • 200 V/V • Power Management Systems • 5-Lead and 6-Lead SOT23 Packaging • Portable/Battery-Powered Systems • Smart Chargers • Battery Monitoring • Overcurrent and Undercurrent Detection • Remote Sensing • Industrial Control silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0

TS1100/01/02/03 Data Sheet Ordering Information 1. Ordering Information Ordering Number1 Part Marking Description Gain V/V TS1100-25EG5 TADJ 25 TS1100-50EG5 TADK 50 Unidirectional current sense amplifier (V = 200 µV) OS(MAX) TS1100-100EG5 TADL 100 TS1100-200EG5 TADM 200 TS1101-25EG6 TADN 25 TS1101-50EG6 TADP 50 Bidirectional current sense amplifier (V = 200 µV) OS(MAX) TS1101-100EG6 TADQ 100 TS1101-200EG6 TADR 200 TS1102-25EG5 TADS 25 TS1102-50EG5 TADT 50 Unidirectional current sense amplifier (V = 300 µV) OS(MAX) TS1102-100EG5 TADU 100 TS1102-200EG5 TADV 200 TS1101-25EG6 TADW 25 TS1101-50EG6 TADX 50 Bidirectional current sense amplifier (V = 300 µV) OS(MAX) TS1101-100EG6 TADY 100 TS1101-200EG6 TADZ 200 Note: 1.Adding the suffix, "T", to the part number (e.g., TS1101-25EG6T) denotes tape and reel. silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 1

TS1100/01/02/03 Data Sheet System Overview 2. System Overview 2.1 Typical Application Circuits Figure 2.1. TS1100 and TS1102 Typical Application Circuit Figure 2.2. TS1101 and TS1103 Typical Application Circuit silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 2

TS1100/01/02/03 Data Sheet System Overview 2.2 Theory of Operation The internal configuration of the TS1100/02 (a unidirectional high-side, current-sense amplifier) is based on a common operational am- plifier circuit used for measuring load currents (in one direction) in the presence of high common-mode voltages. In the general case, a current-sense amplifier monitors the voltage caused by a load current through an external sense resistor and generates an output volt- age as a function of that load current. The internal configuration of the TS1101/03 (a bidirectional high-side, current-sense amplifier) is a variation of the TS1100/02 unidirec- tional current-sense amplifier. In the design of the TS1101/03, the input amplifier was reconfigured for fully differential input/output oper- ation and a second low-threshold p-channel FET (M2) was added where the drain terminal of M2 is also connected to R . Therefore, OUT the behavior of the TS1101/03 for when V > V is identical for when V > V . RS– RS+ RS+ RS– Referring to the typical application circuit, the inputs of the op-amp based circuit are connected across an external R resistor that SENSE is used to measure load current. At the non-inverting input of the current-sense amplifier (the RS+ terminal), the applied voltage is I × R . Since the RS– terminal is the non-inverting input of the internal op-amp, op-amp feedback action forces the inverting LOAD SENSE input of the internal op-amp to the same potential. Therefore, the voltage drop across R (V ) and the voltage drop across SENSE SENSE R (at the RS+ terminal) are equal. Necessary for gain ratio matched, both R and R are the same value. GAINA GAINA GAINB Since p-channel M1’s source is connected to the inverting input of the internal op amp and since the voltage drop across R is the GAINA same as the external V , op amp feedback action drives the gate of M1 such that M1’s drain-source current is equal to: SENSE V SENSE I = DS(M1) R GAINA or I ×R LOAD SENSE I = DS(M1) R GAINA Since M1’s drain terminal is connected to R , the output voltage of the current-sense amplifier at the OUT terminal is, therefore: OUT R OUT V =I ×R × OUT LOAD SENSE R GAINA For the TS1101 and TS1103, when the voltage at the RS– terminal is greater than the voltage at the RS+ terminal, the external VSENSE voltage drop is impressed upon R . The voltage drop across R is then converted into a current by M2 that then GAINB GAINB produces an output voltage across R . In this design, when M1 is conducting current (V > V ), the TS1101/03’s internal amplifi- OUT RS+ RS– er holds M2 OFF. When M2 is conducting current (V > V ), the internal amplifier holds M1 OFF. In either case, the disabled FET RS– RS+ does not contribute to the resultant output voltage. The current-sense amplifier’s gain accuracy is therefore the ratio match of R to R . For each of the four gain options availa- OUT GAIN[A/B] ble, Table 1 lists the values for R and R . The TS1101’s output stage is protected against input overdrive by use of an output OUT GAIN[A/B] current-limiting circuit of 3 mA (typical) and a 7 V internal clamp protection circuit. silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 3

TS1100/01/02/03 Data Sheet System Overview 2.3 SIGN Comparator Output As shown in the TS1101/03’s block diagram, the design of the TS1101/03 incorporated one additional feature: an analog comparator whose inputs monitor the internal amplifier’s differential output voltage. While the voltage at the TS1101/03’s OUT terminal indicates the magnitude of the load current, the TS1101/03’s SIGN output indicates the load current’s direction. The SIGN output is a logic high when M1 is conducting current (V > V ). Alternatively, the SIGN output is a logic low when M2 is conducting current (V < V ). The RS+ RS– RS+ RS– SIGN comparator’s transfer characteristic is illustrated in the figure below. Unlike other current-sense amplifiers that implement a OUT/ SIGN arrangement, the TS1101/03 exhibits no “dead zone” at I switchover. The other attribute of the SIGN comparator’s behavior LOAD is its propagation delay as a function of applied V [(V – V ) or (V – V )]. As shown below, the SIGN comparator’s SENSE RS+ RS– RS– RS+ propagation delay behavior is symmetric regardless of current-flow direction and is inversely proportional to V . SENSE Figure 2.3. SIGN Comparator Transfer Characteristic and Propagation Delay Figure 2.4. SIGN Comparator Propagation Delay vs. V SENSE silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 4

TS1100/01/02/03 Data Sheet System Overview 2.4 Choosing the Sense Resistor Selecting the optimal value for the external RSENSE is based on the following criteria and for each commentary follows: 1.R Voltage Loss SENSE 2.V Swing vs. Applied Input Voltage at V and Desired V OUT RS+ SENSE 3.Total I Accuracy LOAD 4.Circuit Efficiency and Power Dissipation 5.R Kelvin Connections SENSE 2.4.1 R Voltage Loss SENSE For the lowest IR power dissipation in R , the smallest usable resistor value for R should be selected. SENSE SENSE 2.4.2 V Swing vs. Applied Input Voltage at V and Desired V OUT RS+ SENSE As there is no separate power supply pin for the current-sense amplifiers, the circuit draws its power from the voltage at its RS+ and RS- terminals. Therefore, the signal voltage at the OUT terminal is bounded by the minimum voltage applied at the RS+ terminal. Therefore: V =V −V −V OUT(max) RS+(min) SENSE(max) OH(max) and V OUT(max) R < SENSE GAIN ×I LOAD(max) where the full-scale V should be less than V /GAIN at the application’s minimum RS+ terminal voltage. For best perform- SENSE OUT(MAX) ance with a 3.6 V power supply, R should be chosen to generate a V of: a) 120 mV (for the 25 V/V GAIN option), b) 60 mV SENSE SENSE (for the 50 V/V GAIN option), c) 30 mV (for the 100 V/V GAIN option), or d) 15 mV (for the 200 V/V GAIN option) at the full-scale I LOAD current in each application. For the case where the minimum power supply voltage is higher than 3.6 V, each of the four full-scale V s above can be increased. SENSE 2.4.3 Total Load Current Accuracy In the current-sense amplifiers’ linear region where V < V , there are two specifications related to the circuit’s accuracy: a) OUT OUT(max) the input offset voltage and b) gain error (GE(max) = 0.6%). An expression for the current sense amplifiers’ total error is given by: V = GAIN ×(1±GE)×V ±(GAIN ×V ) OUT SENSE OS A large value for R permits the use of smaller load currents to be measured more accurately because the effects of offset voltag- SENSE es are less significant when compared to larger V voltages. Due care though should be exercised as previously mentioned with SENSE large values of R . SENSE 2.4.4 Circuit Efficiency and Power Dissipation IR losses in R can be large especially at high load currents. It is important to select the smallest, usable R value to mini- SENSE SENSE mize power dissipation and to keep the physical size of R small. If the external R is allowed to dissipate significant power, SENSE SENSE then its inherent temperature coefficient may alter its design center value, thereby reducing load current measurement accuracy. Pre- cisely because the current-sense amplifiers input stages were designed to exhibit a very low input offset voltage, small R values SENSE can be used to reduce power dissipation and minimize local hot spots on the PCB. silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 5

TS1100/01/02/03 Data Sheet System Overview 2.4.5 R Kelvin Connections SENSE For optimal V accuracy in the presence of large load currents, parasitic PCB track resistance should be minimized. Kelvin-sense SENSE PCB connections between R and the current-sense amplifier’s RS+ and RS– terminals are strongly recommended. The drawing SENSE below illustrates the connections between the current-sense amplifier and the current-sense resistor. The PCB layout should be bal- anced and symmetrical to minimize wiring-induced errors. In addition, the pcb layout for R should include good thermal manage- SENSE ment techniques for optimal R power dissipation. SENSE Figure 2.5. Making PCB Connections to R SENSE 2.4.6 R Composition SENSE Current-shunt resistors are available in metal film, metal strip, and wire-wound constructions. Wire-wound current-shunt resistors con- sist of a wire spirally wound onto a core. As a result, these types of current shunt resistors exhibit the largest self inductance. In applica- tions where the load current contains high-frequency transients, metal film or metal strip current-sense resistors are recommended. 2.4.7 Internal Noise Filter In power management and motor control applications, current-sense amplifiers are required to measure load currents accurately in the presence of both externally-generated differential and common-mode noise. An example of differential-mode noise that can appear at the inputs of a current-sense amplifier is high-frequency ripple. High-frequency ripple (whether introduced into the circuit inductively or capacitively) can produce a differential-mode voltage drop across the external current-shunt resistor (R ). An example of external- SENSE ly-generated, common-mode noise is the high-frequency output ripple of a switching regulator that can result in the injection of com- mon-mode noise into both inputs of a current-sense amplifier. Even though the load current signal bandwidth is dc, the input stage of any current-sense amplifier can rectify unwanted out-of-band noise that can result in an apparent error voltage at its output. This rectification of noise signals occurs because all amplifier input stages are constructed with transistors that can behave as high-frequency signal detectors in the same way P–N junction diodes were used as RF envelope detectors in early radio designs. The amplifier’s internal common-mode rejection is usually sufficient to defeat injected common-mode noise. To counter the effects of externally-injected noise, it has always been good engineering practice to add external low-pass filters in ser- ies with the inputs of a current-sense amplifier. In the design of discrete current-sense amplifiers, resistors used in the external low- pass filters were incorporated into the circuit’s overall design to compensate for any input-bias-current-generated offset voltage and gain errors. With the advent of monolithic current-sense amplifiers, the addition of external low-pass filters in series with the current-sense amplifi- er’s inputs only introduces additional offset voltage and gain errors. To minimize or altogether eliminate the need for external low-pass filters and to maintain low input offset voltage and gain errors, the current-sense amplifiers incorporate a 50 kHz (typ) 2nd-order differ- ential low-pass filter as shown in the Block Diagrams. 2.4.8 Output Filter Capacitor If the current-sense amplifiers are a part of a signal acquisition system in which their OUT terminal is connected to the input of an ADC with an internal, switched-capacitor track-and-hold circuit, the internal track-and-hold’s sampling capacitor can cause voltage droop at V . A good-quality 22 to 100 nF ceramic capacitor from the OUT terminal to GND forms a low-pass filter with the current-sense am- OUT plifier’s R and should be used to minimize voltage droop (holding VOUT constant during the sample interval. Using a capacitor on OUT the OUT terminal will also reduce the small-signal bandwidth as well as band-limiting amplifier noise. 2.4.9 PC Board Layout and Power Supply Bypassing For optimal circuit performance, the current-sense amplifiers should be in very close proximity to the external current-sense resistor, and the PCB tracks from R to the RS+ and the RS– input terminals should be short and symmetric. Also recommended are a SENSE ground plane and surface mount resistors and capacitors. silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 6

TS1100/01/02/03 Data Sheet Electrical Characteristics 3. Electrical Characteristics Table 3.1. Recommended Operating Conditions1 Parameter Symbol Conditions Min Typ Max Units System Specifications Operating Voltage Range VDD 1.25 5.5 V Common-Mode Input Range V V , Guaranteed by CMRR 2 27 V CM RS+ Note: 1.All devices 100% production tested at T = +25 °C. Limits over Temperature are guaranteed by design and characterization. A Table 3.2. DC Characteristics1 Parameter Symbol Conditions Min Typ Max Units System Specifications No Load Input Supply Current IRS+ + IRS–2 TA = +25 °C — 0.68 0.85 µA — — 1.0 V = 25 V T = +25 °C — — 1.0 RS+ A — — 1.2 I — 0.02 0.2 VDD Current Sense Amplifier Common Mode Rejection Ratio CMRR 2 V < V < 27 V 120 130 — dB RS+ Input Offset Voltage3 VOS TS1100 and TA = +25 °C — ±30 ±100 µV TS1101 –40 °C < TA < +85 °C — — ±200 TS1102 and T = +25 °C — ±30 ±200 A TS1103 –40 °C < T < + 85 °C — — ±300 A VOS Hysteresis4 VHYS TA = +25 °C — 10 — µV Gain G TS1100, TS110x-25 — 25 — V/V TS1101, TS110x-50 — 50 — TS1102, TS1103 TS110x-100 — 100 — TS110x-200 — 200 — Gain Error5 GE TA = +25 °C — ±0.1 ±0.6 % –40 °C < T < +85 °C — ±1 % A Gain Match5 GM TA = +25 °C — ±0.2 ±0.6 % –40 °C < T < +85 °C — ±1 % A Output Resistance6 ROUT TS110x-25/50/100 28.0 40.0 52 kΩ TS110x-200 14.0 20.0 26.4 silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 7

TS1100/01/02/03 Data Sheet Electrical Characteristics Parameter Symbol Conditions Min Typ Max Units OUT Low Voltage V TS1100 and Gain = 25 — — 5 mV AOL TS1101 Gain = 50 — — 10 Gain = 100 — — 20 Gain = 200 — — 40 TS1102 and Gain = 25 — — 7.5 TS1103 Gain = 50 — — 15 Gain = 100 — — 30 Gain = 200 — — 60 OUT High Voltage V V = V – V — 0.05 0.2 V AOH OH RS– OUT Sign Comparator Parameters (TS1106 Only) Output Low Voltage V VDD = 1.25 V, I = 5 µA — 0.2 V COL SINK VDD = 1.8 V, I = 35 µA — — SINK Output High Voltage V VDD = 1.25 V, I = 5 µA VDD – 0.2 — — V COH SOURCE VDD = 1.8 V, I = 35 µA — — SOURCE Notes: 1.V = 3.6 V; V = (V – V ) = 0 V; C = 47 nF; V = 1.8 V; T = –40 °C to +105 °C, unless otherwise noted. RS+ SENSE RS+ RS– OUT DD A Typical values are at T = +25 °C. A 2.Extrapolated to VOUT=0V. IRS++IRS- is the total current into the RS+ and the RS– pins. 3.Input offset voltage V is extrapolated from a V measurement with V set to +1 mV and a V measurement with OS OUT(+) SENSE OUT(–) VSENSE set to -1mV; vis-a-viz, Average V = (V – V )/(2 x GAIN). OS OUT(–) OUT(+) 4.Amplitude of V lower or higher than V required to cause the comparator to switch output states. SENSE OS 5.Gain error is calculated by applying two values for V and then calculating the error of the actual slope vs. the ideal transfer SENSE characteristic. TS1100 and TS1102 only applies positive V values. SENSE For GAIN = 25, the applied V is 20 mV and 120 mV. SENSE For GAIN = 50, the applied V is 10 mV and 60 mV. SENSE For GAIN = 100, the applied V is 5 mV and 30 mV. SENSE For GAIN = 200, the applied V is 2.5 mV and 15 mV. SENSE 6.The device is stable for any capacitance load at V . OUT silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 8

TS1100/01/02/03 Data Sheet Electrical Characteristics Table 3.3. AC Characteristics1 Parameter Symbol Conditions Min Typ Max Units Current Sense Amplifier Output Settling time t 1% Final value, Gain = 25, 50, 100 — 2.2 — msec OUT_s VOUT = 3 V Gain = 200 — 4.3 — msec Sign Comparator Parameters (TS1101 and TS1103 Only) Propagation Delay t V = ±1 mV — 3 — msec SIGN_PD SENSE V = ±10 mV — 0.4 — msec SENSE Notes: 1.V = 3.6 V; V = (V – V ) = 0 V; C = 47 nF; V = 1.8 V; T = –40 °C to +105 °C, unless otherwise noted. RS+ SENSE RS+ RS– OUT DD A Typical values are at T = +25 °C. A Table 3.4. Thermal Conditions Parameter Symbol Conditions Min Typ Max Units Operating Temperature Range T –40 — +105 °C OP Table 3.5. Absolute Maximum Limits Parameter Symbol Conditions Min Typ Max Units RS+ Voltage V –0.3 — 27 V RS+ RS– Voltage V –0.3 — 27 V RS– Supply Voltage VDD –0.3 — 6 V OUT Voltage V –0.3 — 6 V OUT SIGN Voltage (TS1106 Only) V –0.3 — 6 V SIGN RS+ to RS– Voltage V – V — — 28 V RS+ RS– Short Circuit Duration: OUT to GND — — Continuous Continuous Input Current (Any Pin) –20 — 20 mA Junction Temperature — — 150 °C Storage Temperature Range –65 — 150 °C Lead Temperature (Soldering, 10 s) — — 300 °C Soldering Temperature (Reflow) — — 260 °C ESD Tolerance Human Body Model — — 2000 V Machine Model — — 200 V silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 9

TS1100/01/02/03 Data Sheet Electrical Characteristics For the following graphs, V = V = 3.6 V; T = +25 (cid:0)C unless otherwise noted. RS+ RS– A silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 10

TS1100/01/02/03 Data Sheet Electrical Characteristics silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 11

TS1100/01/02/03 Data Sheet Electrical Characteristics silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 12

TS1100/01/02/03 Data Sheet Pin Descriptions 4. Pin Descriptions Table 4.1. Pin Descriptions Pin Part Number Label Function 1 TS1100 GND Ground. Connect this pin to analog ground. TS1101 TS1102 TS1103 2 TS1100 GND Ground. Connect this pin to analog ground. TS1102 TS1101 SIGN Comparator Output, push-pull; SIGN is HIGH for (V > V ) and LOW for (V > V ). RS+ RS– RS– RS+ TS1103 3 TS1100 OUT Output Voltage. V is proportional to V = (V – V ) or (V – V ). OUT SENSE RS+ RS– RS– RS+ TS1101 TS1102 TS1103 4 TS1100 RS– External Sense Resistor Load-Side Connection TS1101 TS1102 TS1103 5 TS1100 RS+ External Sense Resistor Power-Side Connection TS1102 TS1101 VDD SIGN Comparator External Power Supply Pin; Connect this pin to system’s logic VDD supply. TS1103 6 TS1100 N/A N/A TS1102 TS1101 RS+ External Sense Resistor Power-Side Connection TS1103 silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 13

TS1100/01/02/03 Data Sheet Packaging 5. Packaging 5.1 TS1100 and TS1102 Package Dimensions Figure 5.1. TS1100 and TS1102 Package Diagram Table 5.1. TS1100 and TS1102 Package Dimensions Dimension Min Max A — 1.45 A1 0.00 0.15 A2 0.90 1.30 b 0.30 0.50 c 0.09 0.20 D 2.90 BSC E 2.80 BSC E1 1.60 BSC e 0.95 BSC e1 1.90 BSC L 0.30 0.60 L2 0.25 BSC θ 0° 8° aaa 0.15 bbb 0.20 ccc 0.10 ddd 0.20 silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 14

TS1100/01/02/03 Data Sheet Packaging Dimension Min Max Note: 1.All dimensions shown are in millimeters (mm) unless otherwise noted. 2.Dimensioning and Tolerancing per ANSI Y14.5M-1994. 3.Recommended card reflow profile is per the JEDEC/IPC J-STD-020D specification for Small Body Components. 4.This drawing conforms to the JEDEC Solid State Outline MO-178, Variation AA. silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 15

TS1100/01/02/03 Data Sheet Packaging 5.2 TS1101 and TS1103 Package Dimensions Figure 5.2. TS1101 and TS1103 Package Diagram Table 5.2. TS1101 and TS1103 Package Dimensions Dimension Min Max A1 0.06 0.15 A2 1.00 1.30 b 0.35 0.50 c 0.127 D 2.80 2.90 E 2.60 3.00 E1 1.50 1.70 e1 0.950 TYP L 0.35 0.55 L2 0.20 BSC θ1 0° 3° θ2 10° TYP Note: 1.All dimensions shown are in millimeters (mm) unless otherwise noted. 2.Dimensioning and Tolerancing per ANSI Y14.5M-1994. 3.Recommended card reflow profile is per the JEDEC/IPC J-STD-020D specification for Small Body Components. 4.This drawing conforms to the JEDEC Solid State Outline MO-178, Variation AA. silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 16

TS1100/01/02/03 Data Sheet Top and Bottom Marking: 5 and 6-Pin Packages 6. Top and Bottom Marking: 5 and 6-Pin Packages Mark Method: Laser Font Size: 0.60 mm (24 mils) Line 1 Mark Format: Device Identifier TADT Manufacturing Code from the Assembly Pur- Line 5 Backside: TTTT = Mfg Code chase Order Form Mark Method: Laser Font Size: 0.60 mm (24 mils) Line 1 Mark Format: Device Identifier TADT Manufacturing Code from the Assembly Pur- Line 5 Backside: TTTT = Mfg Code chase Order Form silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 17

Table of Contents 1. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2. System Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2.1 Typical Application Circuits . . . . . . . . . . . . . . . . . . . . . . . . . 2 2.2 Theory of Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.3 SIGN Comparator Output . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.4 Choosing the Sense Resistor. . . . . . . . . . . . . . . . . . . . . . . . . 5 2.4.1 R Voltage Loss. . . . . . . . . . . . . . . . . . . . . . . . . . . 5 SENSE 2.4.2 V Swing vs. Applied Input Voltage at V and Desired V . . . . . . . . . . . 5 OUT RS+ SENSE 2.4.3 Total Load Current Accuracy . . . . . . . . . . . . . . . . . . . . . . . . 5 2.4.4 Circuit Efficiency and Power Dissipation . . . . . . . . . . . . . . . . . . . . 5 2.4.5 R Kelvin Connections . . . . . . . . . . . . . . . . . . . . . . . . 6 SENSE 2.4.6 R Composition . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 SENSE 2.4.7 Internal Noise Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.4.8 Output Filter Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.4.9 PC Board Layout and Power Supply Bypassing . . . . . . . . . . . . . . . . . . 6 3. Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5. Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.1 TS1100 and TS1102 Package Dimensions . . . . . . . . . . . . . . . . . . . .14 5.2 TS1101 and TS1103 Package Dimensions . . . . . . . . . . . . . . . . . . . .16 6. Top and Bottom Marking: 5 and 6-Pin Packages . . . . . . . . . . . . . . . . . 17 Table of Contents 18

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