TS110-7 High surge voltage 1.25 A SCR for circuit breaker Datasheet - production data Features • On-state rms current, 1.25 A • Repetitive peak off-state voltage, 700 V A • Non-repetitive direct surge peak off-state voltage, 1250 V • Non-repetitive reverse surge peak off-state voltage, 850 V • Triggering gate current, 100 µA G K A Description Thanks to highly sensitive triggering levels, the K TS110-7 series is suitable for circuit breaker G applications where the available gate current is SMBflat-3L limited. Such applications include GFCI (ground TS110-7UF fault circuit interrupter), AFCI (arc fault circuit interrupter), RCD (residual current device), and K RCBO (residual current circuit breaker with overload protection). G A TO-92 with“GAK”pinout The 1250 V surge voltage capability of the TS110-7A1 TS110-7 enables high robustness of the whole circuit breaker. The low leakage current of the TS110-7 reduces power consumption over the entire lifetime of the circuit breaker. The TS110-7 is available in through-hole TO-92 package with GAK pinout and in SMBflat-3L. June 2014 DocID022271 Rev 4 1/10 This is information on a product in full production. www.st.com

Characteristics TS110-7 1 Characteristics Table 1. Absolute ratings (limiting values) Symbol Parameter Value Unit TO-92 T = 58 °C l I On-state rms current (180° conduction angle) 1.25 A T(RMS) SMBflat-3L T = 110 °C tab Average on-state current TO-92 Tl = 58 °C IT 0.8 A (AV) (180° conduction angle) SMBflat-3L T = 110 °C tab t = 8.3 ms 27 p Non repetitive surge peak on-state current t = 10 ms 25 I p A TSM 1st step: one surge every 5 seconds, 25 surges 25 times 12 A, t = 10 ms T = 25 °C 2nd step: one surge every 5 seconds, 25 surges p j initial 25 times 16 A I²t I²t Value for fusing tp = 10 ms 3.1 A2S Critical rate of rise of on-state current F = 60 Hz T = 125 °C 100 I = 2 x I , t ≤ 100 ns j G GT r dI/dt A/µs Critical rate of rise of on-state current T = 25 °C 100 Gate open, V = V , t ≤ 100 ns j D BO r V , DRM Repetitive peak off-state voltage, gate open T = 125 °C 700 V V j RRM Non-repetitive direct surge peak off-state V t = 50 µs T = 25 °C 1250 V DSM voltage, R = 220 Ω p j GK Non-repetitive reverse surge peak off-state V t = 50 µs T = 25 °C 850 V RSM voltage, R = 220 Ω p j GK I Peak gate current t = 20 µs T = 125 °C 1.2 A GM p j P Average gate power dissipation T = 125 °C 0.2 W G(AV) j T Storage junction temperature range - 40 to + 150 stg °C T Operating junction temperature range - 40 to + 125 j Table 2. Electrical characteristics Symbol Test conditions Value Unit Min. 1 I µA GT V = 12 V, R = 140Ω T = 25 °C Max. 100 D L j V Max. 0.8 V GT V V = V , R = 33 kΩ, R = 220 Ω T = 125 °C Min. 0.1 V GD D DRM L GK j V I = 2 mA T = 25 °C Min. 7.5 V RG RG j I I = 50 mA, R = 220 Ω T = 25 °C Max. 2 mA H T GK j I I = 5 mA, R = 220 Ω T = 25 °C Max. 2 mA L G GK j dV/dt V = 67% V R = 220 Ω T = 125 °C Min. 15 V/µs D DRM, GK j 2/10 DocID022271 Rev 4

TS110-7 Characteristics Table 3. Static electrical characteristics Symbol Test conditions Value Unit V I = 2.5 A, t = 380 µs T = 25 °C Max. 1.4 V TM TM p j V Threshold voltage T = 125 °C Max. 0.9 V T0 j R Dynamic resistance T = 125 °C Max. 200 mΩ D j IDRM V = V / V , R = 220 Ω Tj = 25 °C Max. 1 µA IRRM D DRM RRM GK Tj = 125 °C 100 µA Table 4. Thermal resistance Symbol Parameter Value Unit R Junction to leads (DC) TO-92 65 th(j-l) TO-92 160 R Junction to ambient (DC) °C/W th(j-a) SMBflat-3L 75 R Junction to case (DC) S = 5 cm2 SMBflat-3L 14 th(j-c) Figure 1. Maximum average power dissipation Figure 2. Average and DC on-state current versus average on-state current versus lead temperature (TO-92) 1.2 P(W) IT(AV)(A) 1.4 α= 30°,60°,90°,120°,180°,DC α= 30°,60°,90°,120°,180°,DC 1.0 1.2 1.0 0.8 0.8 0.6 0.6 0.4 0.4 360° 0.2 0.2 IT(AV)(A) α Tlead(°C) 0.0 0.0 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 25 50 75 100 125 Figure 3. Average and DC on-state current Figure 4. Average and DC on-state current versus lead temperature (SMBflat-3L) versus ambient temperature IT(AV)(A) IT(AV)(A) 1.4 α= 30°,60°,90°,120°,180°,DC 1.2 SMBF-3L 1.2 DC 1.0 SMBF-3L 1.0 0.8 180- 0.8 TO-92 0.6 DC 0.6 TO-92 0.4 0.4 180- 0.2 0.2 Tlead(°C) Tamb(°C) 0.0 0.0 0 25 50 75 100 125 0 25 50 75 100 125 DocID022271 Rev 4 3/10 10

Characteristics TS110-7 Figure 5 . Relative variation of thermal Figure 6. Relative variation of gate triggering impedance junction to ambient versus pulse current and voltage, holding and latching duration current versus T j 1.00 K=[Zth(j-a)/Rth(j-a)] 3.0 IGT,IH,IL,VGT[Tj] /IGT,IH,IL,VGT[Tj=25°C] TO-92 2.8 IGT 2.6 SMBflat-3L Copper surface 2.4 area = 5cm² 2.2 IH& IL 2.0 1.8 1.6 0.10 1.4 1.2 VGT 1.0 0.8 0.6 tp(s) 0.4 0.2 Tj(°C) 0.01 0.0 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 1.0E+03 -40 -20 0 20 40 60 80 100 120 Figure 7. Relative variation of holding current Figure 8. Relative variation of dV/dt immunity versus gate-cathode resistance (typical values) versus gate-cathode resistance (typical values) IH[RGK] / IH[RGK= 220Ω] dV/dt[RGK] / dV/dt[RGK= 220(cid:2)(cid:3)] 1.5 10.00 Tj= 125°C VD= 0.67 x VDRM 1.0 1.00 0.5 0.10 RGK(kΩ) RGK((cid:3)) 0.0 0.01 0.1 1.0 10.0 0 200 400 600 800 Figure 9. Relative variation of dV/dt immunity Figure 10. Relative variation of dV/dt immunity versus gate-cathode capacitance (typical versus junction temperature with R = 220 Ω GK values) (typical values) 5.0 dV/dt[CGK] / dV/dt[CGK= 100 nF] 10dV/dt[Tj] / dV/dt[Tj=125 °C] Typical value of dV/dt[CGK=100 nF]= 25V/µs 4.5 9 RGK= 220Ω 4.0 Tj= 125°C 8 VD= 0.67 xVDRM VD= 0.67 xVDRM 3.5 7 3.0 6 2.5 5 2.0 4 1.5 3 1.0 2 0.5 CGK(nF) 1 Tj(°C) 0.0 0 0 20 40 60 80 100 120 140 160 180 200 220 20 40 60 80 100 120 4/10 DocID022271 Rev 4

TS110-7 Characteristics Figure 11. S urge peak on-state current versus Figure 12. Non-repetitive surge peak on-state number of cycles current, and corresponding values of I2t ITSM(A) ITSM(A),I 2t (A 2s) 26 1000 24 Tjinitial=25°C 2202 TNjoinni triaelp=e2t5itiv°eC tp=10ms One cycle 18 SMBF-3L 100 ITSM 16 Repetitive 14 TA=25°C 12 10 8 10 TO-92 6 Repetitive I²t 4 TA=25°C Sinusoidal pulse with 2 Number of cycles width tp < 10 ms tp(ms) 0 1 1 10 100 1000 0.01 0.10 1.00 10.00 Figure 13. On-state characteristics (maximum Figure 14. Thermal resistance junction to values) ambient versus copper surface under anode (SMBflat-3L) ITM(A) Rth(j-a)(°C/W) 100.0 170 160 Epoxy printed circuit board FR4 150 copper thickness = 35 µm 140 10.0 130 120 110 TJ=125°C 100 90 1.0 80 TJ=25°C 70 VTM(V) RVdTt=oj2m=00a0.x9 m V:Ω 5600 S(cm²) 0.1 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 1 2 3 4 5 DocID022271 Rev 4 5/10 10

AC line transient voltage ruggedness TS110-7 2 AC line transient voltage ruggedness In comparison with standard SCRs, the TS110-7 is self-protected against over-voltage. The TS110-7 switch can safely withstand AC line surge voltages by switching to the on state (for less than 10 ms on 50 Hz mains) to dissipate energy shocks through the load. The load limits the current through the TS110-7. The self-protection against over-voltage is based on an overvoltage crowbar technology. This safety feature works even with high turn-on current ramp up. Figure15 represents the TS110-7 in a test environment. It is used to stress the TS110-7 switch according to the IEC 61000-4-5 standard conditions. The TS110-7 folds back safely to the on state as shown in Figure16. The TS110-7 recovers its blocking voltage capability after the surge and the next zero current crossing. Such a non repetitive test can be done at least 10 times. Figure 15. Overvoltage ruggedness test circuit for IEC 61000-4-5 standards Surge generator Model of the load Filtering unit R R 1 2 60Ω 60Ω AC Mains CIN 150 nF TS110 VT I T 12Ω47 nF Figure 16. Typical current and voltage waveforms across the TS110-7 during IEC61000-4-5 standard test Vpeak=VBO 1.2/50 µs voltage surge V 0 Ipeak= 25 A I 0 dI/dt = 100 A/µs 6/10 DocID022271 Rev 4

TS110-7 Package information 3 Package information • Epoxy meets UL94, V0 • Lead-free package In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Figure 17. TO_92 dimensions (definitions) A a B C F D E Table 5. TO-92 dimensions (values) Dimensions Ref. Millimeters Inches Min. Typ. Max. Min. Typ. Max. A 1.35 0.053 B 4.70 0.185 C 2.54 0.100 D 4.40 0.173 E 12.70 0.500 F 3.70 0.146 a 0.5 0.019 For packing information see STMicroelectronics document PD0022 Packing information, “Axial, through hole, surface mount and chip scale packages for IPAD™, protection, rectifiers, thyristors and ACSs™”. DocID022271 Rev 4 7/10 10

Package information TS110-7 Figure 18. SMBflat-3L dimensions (definitions) A c e D b 2x L 2x L2 2x L1 E E1 L1 L L2 b4 Table 6. SMBflat-3L dimensions (values) Dimensions Ref. Millimeters Inches Min. Typ. Max. Min. Typ. Max. A 0.90 1.10 0.035 0.043 b 0.35 0.65 0.014 0.026 b4 1.95 2.20 0.07 0.087 c 0.15 0.40 0.006 0.016 D 3.30 3.95 0.130 0.156 E 5.10 5.60 0.201 0.220 E1 4.05 4.60 0.156 0.181 L 0.75 1.50 0.030 0.059 L1 0.40 0.016 L2 0.60 0.024 e 1.60 0.063 Figure 19. SMBflat-3L footprint dimensions 5.84 0.51 (0.230) (0.020) 2.07 2.07 (0.082) (0.082) 0.51 (0.020) 1.20 3.44 1.20 (0.047) (0.136) (0.047) millimeters (inches) 8/10 DocID022271 Rev 4

TS110-7 Ordering information 4 Ordering information Figure 20. Ordering information scheme TS 1 10 - 7 A1 (-AP) Sensitive SCR series Current (rms) 1 = 1.25 A Gate sensitivity 10 = 100 µA Voltage 7 = 700 V Package A1 = TO-92 with“GAK”pinout UF = SMBflat-3L Packing mode -AP = Ammopack (TO_92) Blank = Bulk (TO-92), 13”tape and reel (SMBflat-3L) Table 7. Ordering information Order code Marking Package Weight Base qty. Delivery mode TS110-7A1 TS110-7 2500 Bulk T0-92 200 mg TS110-7A1-AP TS110-7 2000 Ammopack TS110-7UF TS110-7 SMBflat-3L 47 mg 5000 Tape and reel 13” 5 Revision history Table 8. Document revision history Date Revision Changes 01-Sep-2012 1 Initial release. 11-Sep-2012 2 Added SMBflat-3L package. 17-Oct-2013 3 Corrected typographical error in Figure8. 18-Jun-2014 4 Updated device name. DocID022271 Rev 4 9/10 10

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