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TPS7A4201DGNT产品简介:
ICGOO电子元器件商城为您提供TPS7A4201DGNT由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 TPS7A4201DGNT价格参考。Texas InstrumentsTPS7A4201DGNT封装/规格:PMIC - 稳压器 - 线性, Linear Voltage Regulator IC Positive Adjustable 1 Output 1.175 V ~ 26 V 50mA 8-MSOP-PowerPad。您可以下载TPS7A4201DGNT参考资料、Datasheet数据手册功能说明书,资料中有TPS7A4201DGNT 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | 集成电路 (IC)半导体 |
描述 | IC REG LDO ADJ 50MA 8MSOP低压差稳压器 28Vin,50mA,Sgl Out LDO Linear Reg |
产品分类 | |
品牌 | Texas Instruments |
产品手册 | |
产品图片 | |
rohs | 符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 电源管理 IC,低压差稳压器,Texas Instruments TPS7A4201DGNT- |
数据手册 | |
产品型号 | TPS7A4201DGNT |
PSRR/纹波抑制—典型值 | 65 dB at 100 Hz |
产品种类 | 低压差稳压器 |
供应商器件封装 | 8-MSOP-PowerPad |
其它名称 | 296-30185-6 |
包装 | Digi-Reel® |
参考电压 | 1.173 V |
商标 | Texas Instruments |
回动电压—最大值 | 1.3 V |
安装类型 | 表面贴装 |
安装风格 | SMD/SMT |
封装 | Reel |
封装/外壳 | 8-TSSOP,8-MSOP(0.118",3.00mm 宽)裸焊盘 |
封装/箱体 | HVSSOP-8 |
工作温度 | -40°C ~ 125°C |
工厂包装数量 | 250 |
最大工作温度 | + 125 C |
最大输入电压 | 28 V |
最小工作温度 | - 40 C |
最小输入电压 | 7 V |
标准包装 | 1 |
电压-跌落(典型值) | 0.78V @ 50mA |
电压-输入 | 7 V ~ 28 V |
电压-输出 | 1.175 V ~ 26 V |
电压调节准确度 | 1 % |
电流-输出 | 50mA |
电流-限制(最小值) | 51mA |
稳压器拓扑 | 正,可调式 |
稳压器数 | 1 |
系列 | TPS7A4201 |
线路调整率 | 0.03 %/Vout |
负载调节 | 0.31 %/V |
输出电压 | 1.175 V to 26 V |
输出电流 | 50 mA |
输出端数量 | 1 Output |
输出类型 | Adjustable |
Product Sample & Technical Tools & Support & Folder Buy Documents Software Community TPS7A4201 SBVS184A–DECEMBER2011–REVISEDAUGUST2015 TPS7A4201 28-V Input Voltage, 50-mA Voltage Regulator 1 Features 3 Description • WideInputVoltageRange:7Vto28V The TPS7A4201 device is a high-voltage-tolerant 1 linear regulator that offers the benefits of a thermally- • Accuracy: enhanced package (MSOP-8), and is able to – Nominal:1% withstand continuous dc or transient input voltages of – OverLine,Load,andTemperature:2.5% upto28V. • LowQuiescentCurrent:25 µA The TPS7A4201 is stable with any output • QuiescentCurrentatShutdown:4.1 µA capacitance greater than 4.7 µF and any input capacitance greater than 1 µF (over temperature and • MaximumOutputCurrent:50mA tolerance). Therefore, implementations of this device • CMOSLogic-Level-CompatibleEnablePin require minimal board space because of its • AdjustableOutputVoltage:~1.175Vto26V miniaturized packaging (MSOP-8) and a potentially small output capacitor. In addition, the TPS7A4201 • StablewithCeramicCapacitors: offers an enable pin (EN) compatible with standard – InputCapacitance: ≥ 1 µF CMOSlogictoenablealow-currentshutdownmode. – OutputCapacitance: ≥ 4.7 µF The TPS7A4201 has an internal thermal shutdown • DropoutVoltage:290mV and current limiting to protect the system during fault • Built-InCurrent-LimitandThermalShutdown conditions. The MSOP-8 packages has an operating Protection temperaturerangeofTJ=–40°Cto+125°C. • Package:HighThermalPerformanceMSOP-8 In addition, the TPS7A4201 is ideal for generating a PowerPAD™ low-voltage supply from intermediate voltage rails in telecom and industrial applications; not only it can • OperatingTemperatureRange:–40°Cto+125°C supply a well-regulated voltage rail, but it can also withstand and maintain regulation during fast voltage 2 Applications transients. These features translate to simpler and • Microprocessors,MicrocontrollersPoweredby morecost-effectiveelectricalsurge-protectioncircuitry IndustrialBusseswithHighVoltageTransients forawiderangeofapplications. • IndustrialAutomation DeviceInformation(1) • Automotive PARTNUMBER PACKAGE BODYSIZE(NOM) • LEDLighting TPS7A4201 MSOPPowerPAD(8) 3.00mm×3.00mm (1) For all available packages, see the orderable addendum at theendofthedatasheet. TypicalApplication 28 V V IN VIN IN OUT VOUT C IN Device CBYP R1 C OUT V EN FB EN GND R 2 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.
TPS7A4201 SBVS184A–DECEMBER2011–REVISEDAUGUST2015 www.ti.com Table of Contents 1 Features.................................................................. 1 7.4 DeviceFunctionalModes..........................................9 2 Applications........................................................... 1 8 ApplicationandImplementation........................ 10 3 Description............................................................. 1 8.1 ApplicationInformation............................................10 4 RevisionHistory..................................................... 2 8.2 TypicalApplication .................................................11 5 PinConfigurationandFunctions......................... 3 9 PowerSupplyRecommendations...................... 12 6 Specifications......................................................... 3 10 Layout................................................................... 13 6.1 AbsoluteMaximumRatings .....................................3 10.1 LayoutGuidelines.................................................13 6.2 ESDRatings..............................................................4 10.2 LayoutExample....................................................13 6.3 RecommendedOperatingConditions.......................4 10.3 ThermalConsiderations........................................13 6.4 ThermalInformation..................................................4 10.4 PowerDissipation.................................................14 6.5 ElectricalCharacteristics...........................................5 11 DeviceandDocumentationSupport................. 15 6.6 DissipationRatings...................................................5 11.1 CommunityResources..........................................15 6.7 TypicalCharacteristics..............................................6 11.2 Trademarks...........................................................15 7 DetailedDescription.............................................. 8 11.3 ElectrostaticDischargeCaution............................15 7.1 Overview...................................................................8 11.4 Glossary................................................................15 7.2 FunctionalBlockDiagram.........................................8 12 Mechanical,Packaging,andOrderable Information........................................................... 15 7.3 FeatureDescription...................................................8 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromOriginal(December2011)toRevisionA Page • AddedESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection. ................................................................................................ 1 • ChangedmaximumrecommendedoperatingconditionvaluesforVIN,VOUT,andVEN. .................................................. 4 • Changedfootnote2inElectricalCharacteristicstable........................................................................................................... 5 • ChangedI parameterminimumspecificationsinElectricalCharacteristicstable.............................................................. 5 LIM 2 SubmitDocumentationFeedback Copyright©2011–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS7A4201
TPS7A4201 www.ti.com SBVS184A–DECEMBER2011–REVISEDAUGUST2015 5 Pin Configuration and Functions DGNPackage 8-PinMSOP TopView OUT 1 8 IN FB 2 7 NC NC 3 6 NC GND 4 5 EN PinFunctions PIN I/O DESCRIPTION NAME NO. Regulatoroutput.Acapacitorgreaterthan4.7µFmustbetiedfromthispintogroundto OUT 1 O assurestability. Thispinistheinputtothecontrol-looperroramplifier.Itisusedtosettheoutputvoltageof FB 2 I thedevice. 3 NC 6 — Notinternallyconnected.ThispinmusteitherbeleftopenortiedtoGND. 7 GND 4 — Ground Thispinturnstheregulatoronoroff. IfV ≥V theregulatorisenabled. EN 5 I EN EN_HI IfV ≤V ,theregulatorisdisabled. EN EN_LO Ifnotused,theENpincanbeconnectedtoIN.MakesurethatV ≤V atalltimes. EN IN IN 8 I Inputsupply Soldertoprintedcircuitboard(PCB)toenhancethermalperformance. NOTE:ThePowerPADisinternallyconnectedtoGND. PowerPAD — — Althoughitcanbeleftfloating,itishighlyrecommendedtoconnectthePowerPADtothe GNDplane. 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted).(1) MIN MAX UNIT INpintoGNDpin –0.3 +30 V OUTpintoGNDpin –0.3 +30 V OUTpintoINpin –30 +0.3 V Voltage FBpintoGNDpin –0.3 +2 V FBpintoINpin –30 +0.3 V ENpintoINpin –30 0.3 V ENpintoGNDpin –0.3 +30 V Current Peakoutput Internallylimited Operatingjunctiontemperature,TJ –40 +125 °C Temperature Storage,Tstg –65 +150 °C (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedisnotimplied.Exposuretoabsolute- maximumratedconditionsforextendedperiodsmayaffectdevicereliability. Copyright©2011–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:TPS7A4201
TPS7A4201 SBVS184A–DECEMBER2011–REVISEDAUGUST2015 www.ti.com 6.2 ESD Ratings VALUE UNIT Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±2500 V(ESD) Electrostaticdischarge Charged-devicemodel(CDM),perJEDECspecificationJESD22- V C101(2) ±500 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions overoperatingjunctiontemperaturerange(unlessotherwisenoted) MIN NOM MAX UNIT VIN 7 28 V VOUT 1.161 26 V VEN 0 28 V IOUT 0 50 mA 6.4 Thermal Information TPS7A4201 THERMALMETRIC(1) DGN(MSOP) UNIT 8PINS R Junction-to-ambientthermalresistance 66.7 °C/W θJA R Junction-to-case(top)thermalresistance 54.1 °C/W θJC(top) R Junction-to-boardthermalresistance 38.1 °C/W θJB ψ Junction-to-topcharacterizationparameter 2.0 °C/W JT ψ Junction-to-boardcharacterizationparameter 37.8 °C/W JB R Junction-to-case(bottom)thermalresistance 15.5 °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report,SPRA953. 4 SubmitDocumentationFeedback Copyright©2011–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS7A4201
TPS7A4201 www.ti.com SBVS184A–DECEMBER2011–REVISEDAUGUST2015 6.5 Electrical Characteristics AtT =–40°Cto+125°C,V =V +2.0VorV =7.0V(whicheverisgreater),V =V ,I =100µA,C =1μF,C =4.7μF, J IN OUT(NOM) IN EN IN OUT IN OUT andFBtiedtoOUT,unlessotherwisenoted. PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V Inputvoltagerange 7.0 28.0 V IN V Internalreference T =+25°C,V =V ,V =9V,I =25mA 1.161 1.173 1.185 V REF J FB REF IN OUT Outputvoltagerange(1) V ≥V +2.0V V 26 V IN OUT(NOM) REF Nominalaccuracy T =+25°C,V =9V,I =25mA –1.0 +1.0 %V V J IN OUT OUT OUT V +2.0V≤V ≤24V(2) Overallaccuracy OUT(NOM) IN –2.5 +2.5 %V 100µA≤I ≤50mA OUT OUT ΔV Lineregulation 7V≤V ≤28V 0.03 %V O(ΔVI) IN OUT ΔV Loadregulation 100µA≤I ≤50mA 0.31 %V O(ΔVL) OUT OUT V =17V,V =18V,I =20mA 290 mV IN OUT(NOM) OUT V Dropoutvoltage DO V =17V,V =18V,I =50mA 0.78 1.3 V IN OUT(NOM) OUT V =90%V ,V =7.0V,T ≤+85°C 65 117 200 mA OUT OUT(NOM) IN J I Currentlimit LIM V =90%V ,V =9.0V 65 128 200 mA OUT OUT(NOM) IN 7V≤V ≤28V,I =0mA 25 65 μA IN OUT I Groundcurrent GND I =50mA 25 μA OUT I Shutdownsupplycurrent V =+0.4V 4.1 20 μA SHDN EN I Feedbackcurrent(3) –0.1 0.01 0.1 µA FB I Enablecurrent 7V≤V ≤28V,V =V 0.02 1.0 μA EN IN IN EN V Enablehigh-levelvoltage 1.5 V V EN_HI IN V Enablelow-levelvoltage 0 0.4 V EN_LO V =12V,V =V ,C =10μF, IN OUT(NOM) REF OUT 58 μV BW=10Hzto100kHz RMS V Outputnoisevoltage NOISE V =12V,V =5V,C =10μF, CIN (4)=10nOFU,T(BNWOM=) 10HztoOU1T00kHz 73 μVRMS BYP V =12V,V =5V,C =10μF, PSRR Power-supplyrejectionratio CIN (4)=10nOFU,T(fN=OM1)00Hz OUT 65 dB BYP Shutdown,temperatureincreasing +170 °C T Thermalshutdowntemperature SD Reset,temperaturedecreasing +150 °C Operatingjunctiontemperature T –40 +125 °C J range (1) Toensurestabilityatno-loadconditions,acurrentfromthefeedbackresistivenetworkgreaterthanorequalto10μAisrequired. (2) Maximuminputvoltage(V )islimitedto24Vbecauseofthepackagepowerdissipationlimitationsatfullload[P≈(V –V )×I IN IN OUT OUT =(24V–V )×50mA≈1.14V],givenanambienttemperatureof+50°C.Thedeviceiscapableofsourcingsteady-stateload REF currentsashighas60mAathigherinputvoltageswithoutdamageifthemaximumoperatingjunctiontemperature(T )isnotexceeded. J TheElectricalCharacteristicsarenotcharacterizedforloadcurrent(I )exceeding50mA. OUT (3) I >0flowsoutofthedevice. FB (4) C referstoabypasscapacitorconnectedtotheFBandOUTpins. BYP 6.6 Dissipation Ratings DERATINGFACTOR TA≤+25°CPOWER TA=+70°CPOWER TA=+85°CPOWER BOARD PACKAGE RθJA RθJC ABOVETA=+25°C RATING RATING RATING High-K(1) DGN 55.9°C/W 8.47°C/W 16.6mW/°C 1.83W 1.08W 0.833W (1) TheJEDECHigh-K(2s2p)boarddesignusedtoderivethisdatawasa3-inchx3-inchmultilayerboardwith2-ounceinternalpowerand groundplanesand2-ouncecoppertracesontopandbottomoftheboard. Copyright©2011–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:TPS7A4201
TPS7A4201 SBVS184A–DECEMBER2011–REVISEDAUGUST2015 www.ti.com 6.7 Typical Characteristics AtT =–40°Cto+125°C,V =V +2.0VorV =9.0V(whicheverisgreater),V =V ,I =100µA,C =1μF, J IN OUT(NOM) IN EN IN OUT IN C =4.7μF,andFBtiedtoOUT,unlessotherwisenoted. OUT 10 VIN= 12V, VOUT= 5V −40°C +105°C DI = 1mA®29mA®1mA 7.5 +25°C +125°C OUT C = 10mF, C = 10nF +85°C OUT BYP 5 50mV/div VOUT %) 2.5 ()M O 0 N (OUT −2.5 V −5 I OUT −7.5 10mA/div −10 5 10 15 20 25 30 Time (100ms/div) Input Voltage (V) G001 Figure1.LoadTransientResponse Figure2.LineRegulation 1.275 100 −40°C +105°C −40°C +25°C +125°C +25°C +85°C 80 +85°C 1.225 +105°C +125°C 60 V) A) V (FB 1.175 I (µQ 40 1.125 20 IOUT = 0 mA 1.075 0 5 10 15 20 25 30 5 10 15 20 25 30 Input Voltage (V) Input Voltage (V) G002 G003 Figure3.FeedbackVoltage Figure4.QuiescentCurrentvsInputVoltage 100 100 − 40°C 90 90 + 25°C 80 80 + 85°C + 105°C 70 70 + 125°C I (nA)FB 456000 I (µA)GND 456000 30 30 20 20 10 10 0 0 −40 −25 −10 5 20 35 50 65 80 95 110 125 0 10 20 30 40 50 Temperature (°C) Output Current (mA) Figure5.FeedbackCurrent Figure6.GroundCurrent 6 SubmitDocumentationFeedback Copyright©2011–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS7A4201
TPS7A4201 www.ti.com SBVS184A–DECEMBER2011–REVISEDAUGUST2015 Typical Characteristics (continued) AtT =–40°Cto+125°C,V =V +2.0VorV =9.0V(whicheverisgreater),V =V ,I =100µA,C =1μF, J IN OUT(NOM) IN EN IN OUT IN C =4.7μF,andFBtiedtoOUT,unlessotherwisenoted. OUT 2 2.5 − 40°C + 105°C 1.75 + 25°C + 125°C + 85°C 2 1.5 (V)OP 1.215 (V)N 1.5 Vsub (EN_HI) DR VE V 1 0.75 0.5 0.5 Vsub (EN_LO) 0.25 0 0 0 10 20 30 40 50 −40 −25 −10 5 20 35 50 65 80 95 110 125 Output Current (mA) Temperature (°C) Figure7.DropoutVoltage Figure8.EnableThresholdVoltage 10 200 160 1 z) H 120 V/ mA) me ( 0.1 (CL s I 80 oi N −40°C 0.01 VIN = 12V + 25°C VOUT = VREF 40 + 85°C COUT = 10m F IOUT = 100m A,VNOISE = 60m VRMS + 105°C CBYP = 10nF IOUT = 50mA,VNOISE = 100m VRMS + 125°C 0.001 0 10 100 1k 10k 100k 1M 10M 6 9 12 15 18 21 24 Frequency (Hz) Input Voltage (V) Figure9.OutputSpectralNoiseDensity Figure10.CurrentLimit 100 90 80 70 B) 60 d R ( 50 R PS 40 30 VIN = 12V 20 VOUT = 5V 10 CCOBYUPT == 1100nm FF IIOOUUTT == 5100m0mAA 0 10 100 1k 10k 100k 1M 10M Frequency (Hz) Figure11.Power-SupplyRejectionRatio Copyright©2011–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:TPS7A4201
TPS7A4201 SBVS184A–DECEMBER2011–REVISEDAUGUST2015 www.ti.com 7 Detailed Description 7.1 Overview The TPS7A4201 belongs to a new generation of linear regulators that use an innovative BiCMOS process technologytoachieveveryhighmaximuminputandoutputvoltages. This process not only allows the TPS7A4201 to maintain regulation during very fast voltage transients up to 28 V, but it also allows the TPS7A4201 to regulate from a continuous high-voltage input rail. Unlike other regulators created using bipolar technology, the TPS7A4201 ground current is also constant over its output current range, resultinginincreasedefficiencyandlowerpowerconsumption. These features, combined with a high thermal performance MSOP-8 PowerPAD package, make this device ideal forindustrialandtelecomapplications. 7.2 Functional Block Diagram IN OUT UVLO Pass Device Thermal Shutdown Current Limit Error Enable Amp EN FB 7.3 Feature Description 7.3.1 EnablePinOperation TheTPS7A4201providesanenablepin(EN)featurethatturnsontheregulatorwhenV >1.5V. EN 7.3.2 ThermalProtection Thermal protection disables the output when the junction temperature rises to approximately 170°C, allowing the device to cool. When the junction temperature cools to approximately 150°C, the output circuitry is enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage as a result of overheating. Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heatsink. For reliable operation, limit junction temperature to a maximum of 125°C. To estimate the margin of safety in a complete design (including heatsink), increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. For good reliability, trigger thermal protection at least 35°C above the maximum expected ambient condition of your particular application. This configuration produces a worst-casejunctiontemperatureof125°Catthehighestexpectedambienttemperatureandworst-caseload. The internal protection circuitry of the TPS7A4201 device has been designed to protect against overload conditions. The protection circuitry was not intended to replace proper heatsinking. Continuously running the TPS7A4201deviceintothermalshutdowndegradesdevicereliability. 8 SubmitDocumentationFeedback Copyright©2011–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS7A4201
TPS7A4201 www.ti.com SBVS184A–DECEMBER2011–REVISEDAUGUST2015 7.4 Device Functional Modes 7.4.1 NormalOperation Thedeviceregulatestothenominaloutputvoltageunderthefollowingconditions: • TheinputvoltageisatleastashighasV . IN(min) • Theinputvoltageisgreaterthanthenominaloutputvoltageaddedtothedropoutvoltage. • The enable voltage has previously exceeded the enable rising threshold voltage and has not decreased belowtheenablefallingthreshold. • Theoutputcurrentislessthanthecurrentlimit. • Thedevicejunctiontemperatureislessthanthemaximumspecifiedjunctiontemperature. 7.4.2 DropoutOperation If the input voltage is lower than the nominal output voltage plus the specified dropout voltage, but all other conditions are met for normal operation, the device operates in dropout mode. In this mode of operation, the output voltage is the same as the input voltage minus the dropout voltage. The transient performance of the device is significantly degraded because the pass device (as a bipolar junction transistor, or BJT) is in saturation and no longer controls the current through the LDO. Line or load transients in dropout can result in large output voltagedeviations. 7.4.3 Disabled Thedeviceisdisabledunderthefollowingconditions: • The enable voltage is less than the enable falling threshold voltage or has not yet exceeded the enable rising threshold. • Thedevicejunctiontemperatureisgreaterthanthethermalshutdowntemperature. Table1liststheconditionsthatleadtothedifferentmodesofoperation. Table1.DeviceFunctionalModeComparison PARAMETER OPERATINGMODE V V I T IN EN OUT J V >V +V and Normalmode IN OUT(nom) DO V >V I <I T <125°C V >V EN EN_HI OUT LIM J IN IN(min) Dropoutmode V <V <V +V V >V — T <125°C IN(min) IN OUT(nom) DO EN EN_HI J Disabledmode — V <V — T >170°C (anytrueconditiondisablesthedevice) EN EN_LO J Copyright©2011–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:TPS7A4201
TPS7A4201 SBVS184A–DECEMBER2011–REVISEDAUGUST2015 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 8.1 Application Information 8.1.1 AdjustableOperation The TPS7A4201 has an output voltage range of ~1.175 V to 26 V. The nominal output voltage of the device is setbytwoexternalresistors,asshowninFigure12. VIN VOUT IN OUT C IN 10mF Device C10B YnPF R1 C OUT EN FB 10mF GND R 2 Figure12. AdjustableOperationforMaximumACPerformance R and R can be calculated for any output voltage range using the formula shown in Equation 1. To ensure 1 2 stabilityunderno-loadconditions,thisresistivenetworkmustprovideacurrentgreaterthanorequalto10 μA. V V R = R OUT -1 , where OUT ³10mA 1 2 V R + R REF 1 2 (1) If greater voltage accuracy is required, take into account the output voltage offset contributions because of the feedbackpincurrentanduse0.1%toleranceresistors. 8.1.2 TransientVoltageProtection One of the primary applications of the TPS7A4201 is to provide transient voltage protection to sensitive circuitry thatmaybedamagedinthepresenceofhigh-voltagespikes. This transient voltage protection can be more cost-effective and compact compared to topologies that use a transientvoltagesuppression(TVS)block. 10 SubmitDocumentationFeedback Copyright©2011–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS7A4201
TPS7A4201 www.ti.com SBVS184A–DECEMBER2011–REVISEDAUGUST2015 8.2 Typical Application VIN IN OUT VOUT C 10INmF Device C10B YnPF R1 C Where: RV1O+U RT2³10mA, and OUT VEN EN GND FB 10mF R1= R2 VVOUT -1 REF R 2 Figure13. ExampleCircuittoMaximizeTransientPerformance 8.2.1 DesignRequirements Forthisdesignexample,usethefollowingparameterslistedinTable2. Table2.DesignParameters PARAMETER VALUE V 12V IN V 5V(ideal),4.981V(actual) OUT I 28mA OUT Accuracy 5% R1,R2 162kΩ,49.9kΩ 8.2.2 DetailedDesignProcedure The maximum value of total feedback resistance can be calculated to be 500 kΩ. Equation 1 was used to calculateR1andR2,andstandard1%resistorswereselectedtokeeptheaccuracywithinthe5%allocation.10- uF ceramic input and output capacitors were selected, along with a 10-nF bypass capacitor for optimal AC performance. 8.2.2.1 CapacitorRecommendations Low equivalent series resistance (ESR) capacitors should be used for the input, output, and bypass capacitors. Ceramic capacitors with X7R and X5R dielectrics are preferred. These dielectrics offer more stable characteristics. Ceramic X7R capacitors offer improved over-temperature performance, while ceramic X5R capacitorsarethemostcost-effectiveandareavailableinhighervalues. NotethathighESRcapacitorsmaydegradePSRR. 8.2.2.2 InputandOutputCapacitorRequirements TheTPS7A4101highvoltagelinearregulatorachievesstabilitywithaminimumoutputcapacitanceof4.7 µFand input capacitance of 1 µF; however, it is highly recommended to use 10-μF output and input capacitors to maximizeacperformance. 8.2.2.3 BypassCapacitorRequirements Although a bypass capacitor (C ) is not needed to achieve stability, it is highly recommended to use a 10-nF BYP bypasscapacitortomaximizeacperformance(includinglinetransient,noiseandPSRR). 8.2.2.4 MaximumACPerformance In order to maximize line transient, noise, and PSRR performance, it is recommended to include 10-μF (or higher) input and output capacitors, and a 10-nF bypass capacitor; see Figure 12. The solution shown delivers minimumnoiselevelsof58μV andpower-supplyrejectionlevelsabove36dBfrom10Hzto10MHz. RMS 8.2.2.5 TransientResponse As with any regulator, increasing the size of the output capacitor reduces over/undershoot magnitude but increasesdurationofthetransientresponse. Copyright©2011–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:TPS7A4201
TPS7A4201 SBVS184A–DECEMBER2011–REVISEDAUGUST2015 www.ti.com Note that the presence of the C capacitor may greatly improve the TPS7A4201 line transient response, as BYP notedinFigure1. 8.2.3 ApplicationCurves V = 12V, V = 5V IN OUT DI = 1mA®29mA®1mA OUT C = 10mF, C = 10nF OUT BYP V OUT 50mV/div I OUT 10mA/div Time (100ms/div) Figure14.LoadTransientResponse 9 Power Supply Recommendations The input supply for the LDO should not exceed its recommended operating conditions (7 V to 28 V). The input voltage should provide adequate headroom for the device to have a regulated output. If the input supply is noisy, additional input capacitors with low ESR can help improve the output noise performance. The input and output supplies should also be bypassed with 10-µF capacitors located near the input and output pins. There should be noothercomponentslocatedbetweenthesecapacitorsandthepins. 12 SubmitDocumentationFeedback Copyright©2011–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS7A4201
TPS7A4201 www.ti.com SBVS184A–DECEMBER2011–REVISEDAUGUST2015 10 Layout 10.1 Layout Guidelines 10.1.1 BoardLayoutRecommendationstoImprovePSRRandNoisePerformance To improve AC performance such as PSRR, output noise, and transient response, TI recommends designing the board with separate ground planes for IN and OUT, with each ground plane connected only at the GND pin of the device. In addition, the ground connection for the output capacitor should connect directly to the GND pin of thedevice. Equivalent series inductance (ESL) and ESR must be minimized to maximize performance and ensure stability. Every capacitor (C , C , C ) must be placed as close as possible to the device and on the same side of the IN OUT BYP PCBastheregulatoritself. DonotplaceanyofthecapacitorsontheoppositesideofthePCBfromwheretheregulatorisinstalled.Theuse of vias and long traces is strongly discouraged because they may impact system performance negatively and evencauseinstability. If possible, and to ensure the maximum performance denoted in this product data sheet, use the same layout patternusedfortheTPS7A4201evaluationboard,availableatwww.ti.com. 10.2 Layout Example Input GND Plane Vout Cin OUT 1 8 IN R1 Sense Line Cout FB 2 7 NC Vin Thermal Pad R2 NC 3 6 NC GND 4 5 EN Output GND Plane Figure15. RecommendedLayoutExample 10.3 Thermal Considerations Thermal protection disables the output when the junction temperature rises to approximately 170°C, allowing the device to cool. When the junction temperature cools to approximately 150°C, the output circuitry is enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle ON and OFF. This cycling limits the dissipation of the regulator, protecting it from damage as a result of overheating. Copyright©2011–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:TPS7A4201
TPS7A4201 SBVS184A–DECEMBER2011–REVISEDAUGUST2015 www.ti.com Thermal Considerations (continued) Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heatsink. For reliable operation, junction temperature should be limited to a maximum of 125°C. To estimate the margin of safety in a complete design (including heatsink), increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. For good reliability, thermal protection should trigger at least 45°C above the maximum expected ambient condition of the particular application. This configuration produces a worst-case junction temperature of 125°C at the highest expected ambient temperature andworst-caseload. The internal protection circuitry of the TPS7A4201 has been designed to protect against overload conditions. It was not intended to replace proper heatsinking. Continuously running the TPS7A4201 device into thermal shutdowndegradesdevicereliability. 10.4 Power Dissipation The ability to remove heat from the die is different for each package type, presenting different considerations in the PCB layout. The PCB area around the device that is free of other components moves the heat from the device to the ambient air. Using heavier copper increases the effectiveness in removing heat from the device. Theadditionofplatedthrough-holestoheatdissipatinglayersalsoimprovestheheatsinkeffectiveness. Powerdissipationdependsoninputvoltageandloadconditions.Powerdissipation(P )isequaltotheproductof D theoutputcurrenttimesthevoltagedropacrosstheoutputpasselement,asshowninEquation2: P = (V -V ) I D IN OUT OUT (2) 14 SubmitDocumentationFeedback Copyright©2011–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS7A4201
TPS7A4201 www.ti.com SBVS184A–DECEMBER2011–REVISEDAUGUST2015 11 Device and Documentation Support 11.1 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 11.2 Trademarks PowerPAD,E2EaretrademarksofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 11.3 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 11.4 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©2011–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:TPS7A4201
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS7A4201DGNR ACTIVE HVSSOP DGN 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 SBC & no Sb/Br) TPS7A4201DGNT ACTIVE HVSSOP DGN 8 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 SBC & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Addendum-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 6-Sep-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS7A4201DGNR HVSSOP DGN 8 2500 330.0 12.4 5.3 3.3 1.3 8.0 12.0 Q1 TPS7A4201DGNT HVSSOP DGN 8 250 180.0 12.4 5.3 3.3 1.3 8.0 12.0 Q1 PackMaterials-Page1
PACKAGE MATERIALS INFORMATION www.ti.com 6-Sep-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS7A4201DGNR HVSSOP DGN 8 2500 346.0 346.0 35.0 TPS7A4201DGNT HVSSOP DGN 8 250 203.0 203.0 35.0 PackMaterials-Page2
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PACKAGE OUTLINE DGN0008B PowerPAD TM VSSOP - 1.1 mm max height SCALE 4.000 SMALL OUTLINE PACKAGE C 5.05 A 4.75 TYP 0.1 C PIN 1 INDEX AREA SEATING PLANE 6X 0.65 8 1 2X 3.1 1.95 2.9 NOTE 3 4 5 0.38 8X 0.25 B 3.1 0.13 C A B 2.9 NOTE 4 0.23 0.13 SEE DETAIL A EXPOSED THERMAL PAD 4 5 0.25 GAGE PLANE 1.98 1.78 9 1.1 MAX 8 1 0.7 0.15 0 -8 0.05 0.4 DETA 20AIL A 1.88 TYPICAL 1.62 4218837/A 11/2019 PowerPAD is a trademark of Texas Instruments. NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-187. www.ti.com
EXAMPLE BOARD LAYOUT DGN0008B PowerPAD TM VSSOP - 1.1 mm max height SMALL OUTLINE PACKAGE (2) NOTE 9 METAL COVERED BY SOLDER MASK (1.88) SYMM SOLDER MASK DEFINED PAD 8X (1.4) (R0.05) TYP 8 8X (0.45) 1 (3) 9 SYMM NOTE 9 (1.98) 6X (0.65) (1.22) 5 4 ( 0.2) TYP VIA (0.55) SEE DETAILS (4.4) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 15X SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDE15.000R MASK DETAILS 4218837/A 11/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 8. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. 9. Size of metal pad may vary due to creepage requirement. www.ti.com
EXAMPLE STENCIL DESIGN DGN0008B PowerPAD TM VSSOP - 1.1 mm max height SMALL OUTLINE PACKAGE (1.88) BASED ON 0.125 THICK STENCIL SYMM 8X (1.4) (R0.05) TYP 8 8X (0.45) 1 (1.98) SYMM BASED ON 0.125 THICK STENCIL 6X (0.65) 4 5 METAL COVERED SEE TABLE FOR BY SOLDER MASK DIFFERENT OPENINGS (4.4) FOR OTHER STENCIL THICKNESSES SOLDER PASTE EXAMPLE EXPOSED PAD 9: 100% PRINTED SOLDER COVERAGE BY AREA SCALE: 15X STENCIL SOLDER STENCIL THICKNESS OPENING 0.1 2.10 X 2.21 0.125 1.88 X 1.98 (SHOWN) 0.15 1.72 X 1.81 0.175 1.59 X 1.67 4218837/A 11/2019 NOTES: (continued) 10. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 11. Board assembly site may have different recommendations for stencil design. www.ti.com
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