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TPS7A4101DGNR产品简介:

ICGOO电子元器件商城为您提供TPS7A4101DGNR由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 TPS7A4101DGNR价格参考。Texas InstrumentsTPS7A4101DGNR封装/规格:PMIC - 稳压器 - 线性, Linear Voltage Regulator IC Positive Adjustable 1 Output 1.175 V ~ 48 V 50mA 8-MSOP-PowerPad。您可以下载TPS7A4101DGNR参考资料、Datasheet数据手册功能说明书,资料中有TPS7A4101DGNR 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)半导体

描述

IC REG LDO ADJ 50MA 8MSOP低压差稳压器 50Vin,50mA,Sgl Out LDO Linear Reg

产品分类

PMIC - 稳压器 - 线性

品牌

Texas Instruments

产品手册

点击此处下载产品Datasheet

产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

电源管理 IC,低压差稳压器,Texas Instruments TPS7A4101DGNR-

数据手册

点击此处下载产品Datasheet

产品型号

TPS7A4101DGNR

PSRR/纹波抑制—典型值

65 dB

产品种类

低压差稳压器

供应商器件封装

8-MSOP-PowerPad

其它名称

296-30081-6

包装

Digi-Reel®

参考电压

1.173 V

商标

Texas Instruments

回动电压—最大值

290 mV

安装类型

表面贴装

安装风格

SMD/SMT

封装

Reel

封装/外壳

8-TSSOP,8-MSOP(0.118",3.00mm 宽)裸焊盘

封装/箱体

HVSSOP-8

工作温度

-40°C ~ 125°C

工厂包装数量

2500

最大功率耗散

1.83 W

最大工作温度

+ 125 C

最大输入电压

50 V

最小工作温度

- 40 C

最小输入电压

7 V

标准包装

1

电压-跌落(典型值)

0.78V @ 50mA

电压-输入

7 V ~ 50 V

电压-输出

1.175 V ~ 48 V

电流-输出

50mA

电流-限制(最小值)

51mA

稳压器拓扑

正,可调式

稳压器数

1

系列

TPS7A4101

输出电压

1.175 V to 48 V

输出电流

50 mA

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PDF Datasheet 数据手册内容提取

Product Order Technical Tools & Support & Folder Now Documents Software Community TPS7A4101 SBVS183B–DECEMBER2011–REVISEDNOVEMBER2018 TPS7A4101 50-V Input Voltage, 50-mA, Very High Voltage Linear Regulator 1 Features 3 Description • WideInputVoltageRange:7Vto50V The TPS7A4101 is a very high voltage-tolerant linear 1 regulator that offers the benefits of a thermally- • Accuracy: enhanced package (HVSSOP-8), and is able to – Nominal:1% withstand continuous DC or transient input voltages – OverLine,Load,andTemperature:2.5% ofupto50V. • LowQuiescentCurrent:25 µA The TPS7A4101 is stable with any output • QuiescentCurrentatShutdown:4.1 µA capacitance greater than 4.7 µF and any input capacitance greater than 1 µF (over temperature and • MaximumOutputCurrent:50mA tolerance). Thus, implementations of this device • CMOSLogic-Level-CompatibleEnablePin require minimal board space because of its • AdjustableOutputVoltage:about1.175Vto48V miniaturized packaging (HVSSOP-8) and a potentially small output capacitor. In addition, the TPS7A4101 • StablewithCeramicCapacitors: offers an enable pin (EN) compatible with standard – InputCapacitance: ≥ 1 µF CMOSlogic,toenablealow-currentshutdownmode. – OutputCapacitance: ≥ 4.7 µF The TPS7A4101 has an internal thermal shutdown • DropoutVoltage:290mV and current limiting to protect the system during fault • Built-InCurrentLimitandThermalShutdown conditions. The HVSSOP-8 packages has an Protection operatingtemperaturerangeofTJ=–40°Cto125°C. • Package:HighThermalPerformanceHVSSOP-8 In addition, the TPS7A4101 is ideal for generating a PowerPAD™ low-voltage supply from intermediate voltage rails in telecom and industrial applications; not only can the • OperatingTemperatureRange:–40°Cto125°C device supply a well-regulated voltage rail, but the device can also withstand and maintain regulation 2 Applications during very high and fast voltage transients. These • Microprocessors,MicrocontrollersPoweredby features translate to simpler and more cost-effective IndustrialBusseswithHighVoltageTransients electrical surge-protection circuitry for a wide range of applications. • IndustrialAutomation • TelecomInfrastrucure DeviceInformation(1) • Automotive PARTNUMBER PACKAGE BODYSIZE(NOM) • LEDLighting TPS7A4101 HVSSOP(8)(2) 3.00mm×3.00mm • BiasPowerSupplies (1) For all available packages, see the orderable addendum at theendofthedatasheet. (2) HVSSOPisidenticaltoMSOP. TypicalApplicationDiagram 50 V V IN V IN OUT V IN OUT C IN Device CBYP R1 C OUT V EN FB EN GND R 2 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

TPS7A4101 SBVS183B–DECEMBER2011–REVISEDNOVEMBER2018 www.ti.com Table of Contents 1 Features.................................................................. 1 7.4 DeviceFunctionalModes..........................................9 2 Applications........................................................... 1 8 ApplicationandImplementation........................ 10 3 Description............................................................. 1 8.1 ApplicationInformation............................................10 4 RevisionHistory..................................................... 2 8.2 TypicalApplication .................................................11 5 PinConfigurationandFunctions......................... 3 9 PowerSupplyRecommendations...................... 12 6 Specifications......................................................... 3 10 Layout................................................................... 13 6.1 AbsoluteMaximumRatings......................................3 10.1 LayoutGuidelines.................................................13 6.2 ESDRatings..............................................................3 10.2 LayoutExample....................................................14 6.3 RecommendedOperatingConditions.......................4 11 DeviceandDocumentationSupport................. 15 6.4 ThermalInformation..................................................4 11.1 ReceivingNotificationofDocumentationUpdates15 6.5 ElectricalCharacteristics...........................................5 11.2 CommunityResources..........................................15 6.6 TypicalCharacteristics..............................................6 11.3 Trademarks...........................................................15 7 DetailedDescription.............................................. 8 11.4 ElectrostaticDischargeCaution............................15 7.1 Overview...................................................................8 11.5 Glossary................................................................15 7.2 FunctionalBlockDiagram.........................................8 12 Mechanical,Packaging,andOrderable Information........................................................... 15 7.3 FeatureDescription...................................................8 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionA(August2015)toRevisionB Page • ChangedMSOPtoHVSSOPthroughoutdocument ............................................................................................................. 1 • Changedminimumspecificationsof–55Vto–60Vandchangedmaximumspecificationsof55Vto60Vin VoltageparameterofAbsoluteMaximumRatingstable........................................................................................................ 3 • AddedparameternamestoRecommendedOperatingConditionstable............................................................................... 4 • DeletedT parameterfromElectricalCharacteristicstable.................................................................................................... 5 J • DeletedDissipationRatingstable........................................................................................................................................... 6 • ChangedT valuefordisabledmodeoperatingmodefrom165to170°C............................................................................. 9 J ChangesfromOriginal(December2011)toRevisionA Page • AddedESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection. ................................................................................................ 1 • ChangedmaximumRecommendedOperationConditionsvaluesforVIN,VOUT,andVEN............................................... 4 2 SubmitDocumentationFeedback Copyright©2011–2018,TexasInstrumentsIncorporated

TPS7A4101 www.ti.com SBVS183B–DECEMBER2011–REVISEDNOVEMBER2018 5 Pin Configuration and Functions DGNPackage 8-PinHVSSOP TopView OUT 1 8 IN FB 2 7 NC NC 3 6 NC GND 4 5 EN PinFunctions PIN I/O DESCRIPTION NAME NO. Regulatoroutput.Acapacitorgreaterthan4.7µFmustbetiedfromthispintogroundto OUT 1 O assurestability. Thispinistheinputtothecontrol-looperroramplifier.Thispinisusedtosettheoutput FB 2 I voltageofthedevice. NC 3,6,7 — Notinternallyconnected.ThispinmusteitherbeleftopenortiedtoGND. GND 4 — Ground Thispinturnstheregulatoronoroff. IfV ≥V theregulatorisenabled. EN 5 I EN EN_HI IfV ≤V ,theregulatorisdisabled. EN EN_LO Ifnotused,theENpincanbeconnectedtoIN.MakesurethatV ≤V atalltimes. EN IN IN 8 I Inputsupply Soldertoprinted-circuit-board(PCB)toenhancethermalperformance. ThePowerPADisinternallyconnectedtoGND. PowerPAD — — AlthoughthePowerPADcanbeleftfloating,TIhighlyrecommendsconnectingthe PowerPADtotheGNDplane. 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT INpintoGNDpin –0.3 60 OUTpintoGNDpin –0.3 60 OUTpintoINpin –60 0.3 Voltage FBpintoGNDpin –0.3 2 V FBpintoINpin –60 0.3 ENpintoINpin –60 0.3 ENpintoGNDpin –0.3 60 Current Peakoutput Internallylimited Operatingjunction,TJ –40 125 Temperature °C Storage,Tstg –65 150 (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedisnotimplied.Exposuretoabsolute- maximumratedconditionsforextendedperiodsmayaffectdevicereliability. 6.2 ESD Ratings VALUE UNIT Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±2500 V(ESD) Electrostaticdischarge Charged-devicemodel(CDM),perJEDECspecificationJESD22- V C101(2) ±500 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. Copyright©2011–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3

TPS7A4101 SBVS183B–DECEMBER2011–REVISEDNOVEMBER2018 www.ti.com 6.3 Recommended Operating Conditions overoperatingjunctiontemperaturerange(unlessotherwisenoted) MIN NOM MAX UNIT V Inputvoltage 7 50 V IN V Outputvoltage 1.161 48 V OUT V Enablepinvoltage 0 50 V EN I Outputcurrent 0 50 mA OUT 6.4 Thermal Information TPS7A4101 THERMALMETRIC(1) DGN(HVSSOP) UNIT 8PINS R Junction-to-ambientthermalresistance 66.7 °C/W θJA R Junction-to-case(top)thermalresistance 54.1 °C/W θJC(top) R Junction-to-boardthermalresistance 38.1 °C/W θJB ψ Junction-to-topcharacterizationparameter 2 °C/W JT ψ Junction-to-boardcharacterizationparameter 37.8 °C/W JB R Junction-to-case(bottom)thermalresistance 15.5 °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. 4 SubmitDocumentationFeedback Copyright©2011–2018,TexasInstrumentsIncorporated

TPS7A4101 www.ti.com SBVS183B–DECEMBER2011–REVISEDNOVEMBER2018 6.5 Electrical Characteristics atT =–40°Cto125°C,V =V +2VorV =7V(whicheverisgreater),V =V ,I =100µA,C =1µF,C = J IN OUT(NOM) IN EN IN OUT IN OUT 4.7µF,andFBtiedtoOUT(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V Inputvoltagerange 7 50 V IN V Internalreference T =25°C,V =V ,V =9V,I =25mA 1.161 1.173 1.185 V REF J FB REF IN OUT Outputvoltagerange(1) V ≥V +2V V 48 V IN OUT(NOM) REF Nominalaccuracy T =25°C,V =9V,I =25mA –1 1 %V V J IN OUT OUT OUT V +2V≤V ≤24V(2) Overallaccuracy OUT(NOM) IN –2.5 2.5 %V 100µA≤I ≤50mA OUT OUT ΔV Lineregulation 7V≤V ≤50V 0.03 %V O(ΔVI) IN OUT ΔV Loadregulation 100µA≤I ≤50mA 0.31 %V O(ΔVL) OUT OUT V =17V,V =18V,I =20mA 290 mV IN OUT(NOM) OUT V Dropoutvoltage DO V =17V,V =18V,I =50mA 0.78 1.3 V IN OUT(NOM) OUT V =90%V ,V =7V,T ≤85°C 51 117 200 OUT OUT(NOM) IN J I Currentlimit mA LIM V =90%V ,V =9V 51 128 200 OUT OUT(NOM) IN 7V≤V ≤50V,I =0mA 25 65 IN OUT I Groundcurrent µA GND I =50mA 25 OUT I Shutdownsupplycurrent V =0.4V 4.1 20 µA SHDN EN I Feedbackcurrent(3) –0.1 0.01 0.1 µA FB I Enablecurrent 7V≤V ≤50V,V =V 0.02 1 µA EN IN IN EN V Enablehigh-levelvoltage 1.5 V V EN_HI IN V Enablelow-levelvoltage 0 0.4 V EN_LO V =12V,V =V ,C =10µF, IN OUT(NOM) REF OUT 58 BW=10Hzto100kHz V Outputnoisevoltage µV NOISE RMS V =12V,V =5V,C =10µF, CIN (4)=10nOFU,T(BNWOM=) 10HztoOU1T00kHz 73 BYP V =12V,V =5V,C =10µF, PSRR Power-supplyrejectionratio CIN (4)=10nOFU,T(fN=OM1)00Hz OUT 65 dB BYP Shutdown,temperatureincreasing 170 T Thermalshutdowntemperature °C SD Reset,temperaturedecreasing 150 (1) Toensurestabilityatno-loadconditions,acurrentfromthefeedbackresistivenetworkgreaterthanorequalto10µAisrequired. (2) Maximuminputvoltageislimitedto24Vbecauseofthepackagepowerdissipationlimitationsatfullload(P≈(V –V )×I =(24 IN OUT OUT V–V )×50mA≈1.14W).Thedeviceiscapableofsourcingamaximumcurrentof50mAathigherinputvoltagesaslongasthe REF powerdissipatediswithinthethermallimitsofthepackageplusanyexternalheatsinking. (3) I >0flowsoutofthedevice. FB (4) C referstoabypasscapacitorconnectedtotheFBandOUTpins. BYP Copyright©2011–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5

TPS7A4101 SBVS183B–DECEMBER2011–REVISEDNOVEMBER2018 www.ti.com 6.6 Typical Characteristics atT =–40°Cto125°C,V =V +2VorV =9V(whicheverisgreater),V =V ,I =100µA,C =1µF,C = J IN OUT(NOM) IN EN IN OUT IN OUT 4.7µF,andFBtiedtoOUT(unlessotherwisenoted) 10 VIN= 12V, VOUT= 5V −40°C +105°C DI = 1mA®29mA®1mA 7.5 +25°C +125°C OUT C = 10mF, C = 10nF +85°C OUT BYP 5 50mV/div VOUT %) 2.5 ()M O 0 N (OUT −2.5 V −5 I OUT −7.5 10mA/div −10 5 10 15 20 25 30 35 40 45 50 Time (100ms/div) Input Voltage (V) G001 Figure1.LoadTransientResponse Figure2.LineRegulation 1.275 100 −40°C +105°C −40°C +25°C +125°C +25°C +85°C 80 +85°C 1.225 +105°C +125°C 60 V) A) V (FB 1.175 I (µQ 40 1.125 20 IOUT = 0 mA 1.075 0 5 10 15 20 25 30 35 40 45 50 5 10 15 20 25 30 35 40 45 50 Input Voltage (V) Input Voltage (V) G002 G003 Figure3.FeedbackVoltage Figure4.QuiescentCurrentvsInputVoltage 100 100 − 40°C 90 90 + 25°C 80 80 + 85°C + 105°C 70 70 + 125°C I (nA)FB 456000 I (µA)GND 456000 30 30 20 20 10 10 0 0 −40 −25 −10 5 20 35 50 65 80 95 110 125 0 10 20 30 40 50 Temperature (°C) Output Current (mA) Figure5.FeedbackCurrent Figure6.GroundCurrent 6 SubmitDocumentationFeedback Copyright©2011–2018,TexasInstrumentsIncorporated

TPS7A4101 www.ti.com SBVS183B–DECEMBER2011–REVISEDNOVEMBER2018 Typical Characteristics (continued) atT =–40°Cto125°C,V =V +2VorV =9V(whicheverisgreater),V =V ,I =100µA,C =1µF,C = J IN OUT(NOM) IN EN IN OUT IN OUT 4.7µF,andFBtiedtoOUT(unlessotherwisenoted) 2 2.5 − 40°C + 105°C 1.75 + 25°C + 125°C + 85°C 2 1.5 (V)OP 1.215 (V)N 1.5 Vsub (EN_HI) DR VE V 1 0.75 0.5 0.5 Vsub (EN_LO) 0.25 0 0 0 10 20 30 40 50 −40 −25 −10 5 20 35 50 65 80 95 110 125 Output Current (mA) Temperature (°C) Figure7.DropoutVoltage Figure8.EnableThresholdVoltage 10 200 160 1 z) H 120 V/ mA) me ( 0.1 (CL s I 80 oi N −40°C 0.01 VIN = 12V + 25°C VOUT = VREF 40 + 85°C COUT = 10m F IOUT = 100m A,VNOISE = 60m VRMS + 105°C CBYP = 10nF IOUT = 50mA,VNOISE = 100m VRMS + 125°C 0.001 0 10 100 1k 10k 100k 1M 10M 6 9 12 15 18 21 24 Frequency (Hz) Input Voltage (V) Figure9.OutputSpectralNoiseDensity Figure10.CurrentLimit 100 90 80 70 B) 60 d R ( 50 R PS 40 30 VIN = 12V 20 VOUT = 5V 10 CCOBYUPT == 1100nm FF IIOOUUTT == 5100m0mAA 0 10 100 1k 10k 100k 1M 10M Frequency (Hz) Figure11.Power-SupplyRejectionRatio Copyright©2011–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7

TPS7A4101 SBVS183B–DECEMBER2011–REVISEDNOVEMBER2018 www.ti.com 7 Detailed Description 7.1 Overview The TPS7A4101 belongs to a family of linear regulators that use an innovative BiCMOS process technology to achieveveryhighmaximuminputandoutputvoltages. This process not only allows the TPS7A4101 to maintain regulation during very fast high-voltage transients up to 50 V, but this process also allows the TPS7A4101 to regulate from a continuous high-voltage input rail. Unlike other regulators created using bipolar technology, the TPS7A4101 ground current is also constant over its output currentrange,resultinginincreasedefficiencyandlowerpowerconsumption. These features, combined with a high thermal performance HVSSOP-8 PowerPAD package, make this device idealforindustrialandtelecomapplications. 7.2 Functional Block Diagram IN OUT UVLO Pass Device Thermal Shutdown Current Limit Error Enable Amp EN FB 7.3 Feature Description 7.3.1 EnablePinOperation TheTPS7A4101providesanenablepin(EN)featurethatturnsontheregulatorwhenV >1.5V. EN 7.3.2 ThermalProtection Thermal protection disables the output when the junction temperature rises to approximately 170°C, allowing the device to cool. When the junction temperature cools to approximately 150°C, the output circuitry is enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits the dissipation of the regulator, thus providing protection from damage as a resultofoverheating. Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heatsink. For reliable operation, limit junction temperature to a maximum of 125°C. To estimate the margin of safety in a complete design (including heatsink), increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. For good reliability, trigger thermal protection at least 35°C above the maximum expected ambient condition of your particular application. This configuration produces a worst-casejunctiontemperatureof125°Catthehighestexpectedambienttemperatureandworst-caseload. The internal protection circuitry of the TPS7A4101 is designed to protect against overload conditions. The protection circuitry is not intended to replace proper heatsinking. Continuously running the device into thermal shutdowndegradesdevicereliability. 8 SubmitDocumentationFeedback Copyright©2011–2018,TexasInstrumentsIncorporated

TPS7A4101 www.ti.com SBVS183B–DECEMBER2011–REVISEDNOVEMBER2018 7.4 Device Functional Modes 7.4.1 NormalOperation Thedeviceregulatestothenominaloutputvoltageunderthefollowingconditions: • TheinputvoltageisatleastashighasV . IN(min) • Theinputvoltageisgreaterthanthenominaloutputvoltageaddedtothedropoutvoltage. • The enable voltage has previously exceeded the enable rising threshold voltage and has not decreased belowtheenablefallingthreshold. • Theoutputcurrentislessthanthecurrentlimit. • Thedevicejunctiontemperatureislessthanthemaximumspecifiedjunctiontemperature. 7.4.2 DropoutOperation If the input voltage is lower than the nominal output voltage plus the specified dropout voltage, but all other conditions are met for normal operation, the device operates in dropout mode. In this mode of operation, the output voltage is the same as the input voltage minus the dropout voltage. The transient performance of the device is significantly degraded because the pass device (as a bipolar junction transistor, or BJT) is in saturation and no longer controls the current through the LDO. Line or load transients in dropout can result in large output voltagedeviations. 7.4.3 Disabled Thedeviceisdisabledunderthefollowingconditions: • The enable voltage is less than the enable falling threshold voltage or has not yet exceeded the enable rising threshold. • Thedevicejunctiontemperatureisgreaterthanthethermalshutdowntemperature. Table1liststheconditionsthatleadtothedifferentmodesofoperation. Table1.DeviceFunctionalModeComparison PARAMETER OPERATINGMODE V V I T IN EN OUT J V >V +V and Normalmode IN OUT(nom) DO V >V I <I T <125°C V >V EN EN_HI OUT LIM J IN IN(min) Dropoutmode V <V <V +V V >V — T <125°C IN(min) IN OUT(nom) DO EN EN_HI J Disabledmode — V <V — T >170°C (anytrueconditiondisablesthedevice) EN EN_LO J Copyright©2011–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9

TPS7A4101 SBVS183B–DECEMBER2011–REVISEDNOVEMBER2018 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 8.1 Application Information 8.1.1 AdjustableOperation The TPS7A4101 has an output voltage range of approximately 1.175 V to 48 V. The nominal output voltage of thedeviceissetbytwoexternalresistors,asshowninFigure12. VIN VOUT IN OUT C IN 10mF Device C10B YnPF R1 C OUT EN FB 10mF GND R 2 Figure12. AdjustableOperationforMaximumACPerformance R and R can be calculated for any output voltage range using the formula shown in Equation 1. To ensure 1 2 stabilityunderno-loadconditions,thisresistivenetworkmustprovideacurrentgreaterthanorequalto10 µA. V V R = R OUT -1 , where OUT ³10mA 1 2 V R + R REF 1 2 (1) If greater voltage accuracy is required, take into account the output voltage offset contributions because of the feedbackpincurrentanduse0.1%toleranceresistors. 8.1.2 TransientVoltageProtection One of the primary applications of the TPS7A4101 is to provide transient voltage protection to sensitive circuitry thatmaybedamagedinthepresenceofhigh-voltagespikes. This transient voltage protection can be more cost-effective and compact compared to topologies that use a transientvoltagesuppression(TVS)block. 10 SubmitDocumentationFeedback Copyright©2011–2018,TexasInstrumentsIncorporated

TPS7A4101 www.ti.com SBVS183B–DECEMBER2011–REVISEDNOVEMBER2018 8.2 Typical Application VIN IN OUT VOUT C 10INmF Device C10B YnPF R1 C Where: RV1O+U RT2³10mA, and OUT VEN EN GND FB 10mF R1= R2 VVOUT -1 REF R 2 Figure13. ExampleCircuittoMaximizeTransientPerformance 8.2.1 DesignRequirements Forthisdesignexample,usethefollowingparameterslistedinTable2. Table2.DesignParameters PARAMETER VALUE V 12V,with50Vsurgetolerance IN V 5V(ideal),4.981V(actual) OUT I 28mA OUT Accuracy 5% R1,R2 162kΩ,49.9kΩ 8.2.2 DetailedDesignProcedure The maximum value of total feedback resistance can be calculated to be 500 kΩ. Equation 1 was used to calculateR1andR2,andstandard1%resistorswereselectedtokeeptheaccuracywithinthe5%allocation.10- uF ceramic input and output capacitors were selected, along with a 10-nF bypass capacitor for optimal AC performance. 8.2.2.1 CapacitorRecommendations Low equivalent series resistance (ESR) capacitors should be used for the input, output, and bypass capacitors. Ceramic capacitors with X7R and X5R dielectrics are preferred. These dielectrics offer more stable characteristics. Ceramic X7R capacitors offer improved over-temperature performance, while ceramic X5R capacitorsarethemostcost-effectiveandareavailableinhighervalues. HighESRcapacitorsmaydegradePSRR. 8.2.2.2 InputandOutputCapacitorRequirements TheTPS7A4101highvoltagelinearregulatorachievesstabilitywithaminimumoutputcapacitanceof4.7 µFand input capacitance of 1 µF; however, TI highly recommends using 10-µF output and input capacitors to maximize ACperformance. 8.2.2.3 BypassCapacitorRequirements Although a bypass capacitor (C ) is not needed to achieve stability, TI highly recommends using a 10-nF BYP bypasscapacitortomaximizeACperformance(includinglinetransient,noiseandPSRR). 8.2.2.4 MaximumACPerformance To maximize line transient, noise, and PSRR performance, TI recommends including 10-µF (or higher) input and output capacitors, and a 10-nF bypass capacitor; see Figure 12. The solution shown delivers minimum noise levelsof58µV andpower-supplyrejectionlevelsabove36dBfrom10Hzto10MHz. RMS 8.2.2.5 TransientResponse As with any regulator, increasing the size of the output capacitor reduces over/undershoot magnitude but increasesdurationofthetransientresponse. Copyright©2011–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11

TPS7A4101 SBVS183B–DECEMBER2011–REVISEDNOVEMBER2018 www.ti.com The presence of the C capacitor may greatly improve the TPS7A4101 line transient response, as noted in BYP Figure1. 8.2.3 ApplicationCurve V = 5V, I = 28mA,C = 10mF OUT OUT OUT V Slew Rate = 220V/ms IN DV = 12V®55V IN CBYP= 0nF VOUT 100mV/div C = 10nF V BYP OUT 100mV/div V IN 50V/div Time (1ms/div) Figure14.LineTransientResponsevsC BYP 9 Power Supply Recommendations The input supply for the LDO should not exceed its recommended operating conditions (7 V to 50 V). The input voltage should provide adequate headroom for the device to have a regulated output. If the input supply is noisy, additional input capacitors with low ESR can help improve the output noise performance. The input and output supplies should also be bypassed with 10-µF capacitors located near the input and output pins. There should be noothercomponentslocatedbetweenthesecapacitorsandthepins. 12 SubmitDocumentationFeedback Copyright©2011–2018,TexasInstrumentsIncorporated

TPS7A4101 www.ti.com SBVS183B–DECEMBER2011–REVISEDNOVEMBER2018 10 Layout 10.1 Layout Guidelines To improve AC performance such as PSRR, output noise, and transient response, TI recommends designing the board with separate ground planes for IN and OUT, with each ground plane connected only at the GND pin of the device. In addition, the ground connection for the output capacitor should connect directly to the GND pin of thedevice. Equivalent series inductance (ESL) and ESR must be minimized to maximize performance and ensure stability. Every capacitor (C , C , C ) must be placed as close as possible to the device and on the same side of the IN OUT BYP PCBastheregulatoritself. DonotplaceanyofthecapacitorsontheoppositesideofthePCBfromwheretheregulatorisinstalled.Theuse of vias and long traces is strongly discouraged because they may impact system performance negatively and evencauseinstability. If possible, and to ensure the maximum performance denoted in this product data sheet, use the same layout patternusedforTPS7A4101evaluationboard,availableatwww.ti.com. 10.1.1 ThermalConsiderations Thermal protection disables the output when the junction temperature rises to approximately 170°C, allowing the device to cool. When the junction temperature cools to approximately 150°C, the output circuitry is enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits the dissipation of the regulator, thus providing protection from damage as a resultofoverheating. Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heatsink. For reliable operation, junction temperature should be limited to a maximum of 125°C. To estimate the margin of safety in a complete design (including heatsink), increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. For good reliability, thermal protection should trigger at least 35°C above the maximum expected ambient condition of the particular application. This configuration produces a worst-case junction temperature of 125°C at the highest expected ambient temperature andworst-caseload. The internal protection circuitry of the TPS7A4101 has been designed to protect against overload conditions. This circuitry is not intended to replace proper heatsinking. Continuously running the TPS7A4101 into thermal shutdowndegradesdevicereliability. 10.1.2 PowerDissipation The ability to remove heat from the die is different for each package type, presenting different considerations in the PCB layout. The PCB area around the device that is free of other components moves the heat from the device to the ambient air. Performance data for JEDEC low- and high-K boards are given in the Thermal Information table. Using heavier copper increases the effectiveness in removing heat from the device. The additionofplatedthrough-holestoheatdissipatinglayersalsoimprovestheheatsinkeffectiveness. Powerdissipationdependsoninputvoltageandloadconditions.Powerdissipation(P )isequaltotheproductof D theoutputcurrenttimesthevoltagedropacrosstheoutputpasselement,asshowninEquation2: P = (V -V ) I D IN OUT OUT (2) 10.1.3 PackageMounting Solder pad footprint recommendations for the TPS7A4101 are available at the end of this document and at www.ti.com. Copyright©2011–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13

TPS7A4101 SBVS183B–DECEMBER2011–REVISEDNOVEMBER2018 www.ti.com 10.2 Layout Example Input GND Plane Vout Cin OUT 1 8 IN R1 Sense Line Cout FB 2 7 NC Vin Thermal Pad R2 NC 3 6 NC GND 4 5 EN Output GND Plane Figure15. RecommendedLayoutExample 14 SubmitDocumentationFeedback Copyright©2011–2018,TexasInstrumentsIncorporated

TPS7A4101 www.ti.com SBVS183B–DECEMBER2011–REVISEDNOVEMBER2018 11 Device and Documentation Support 11.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 11.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 11.3 Trademarks PowerPAD,E2EaretrademarksofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 11.4 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage. ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemore susceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications. 11.5 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©2011–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15

PACKAGE OPTION ADDENDUM www.ti.com 15-Oct-2018 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS7A4101DGNR ACTIVE MSOP- DGN 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 SBB PowerPAD & no Sb/Br) TPS7A4101DGNT ACTIVE MSOP- DGN 8 250 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 SBB PowerPAD & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 15-Oct-2018 Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 16-Oct-2018 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS7A4101DGNR MSOP- DGN 8 2500 330.0 12.4 5.3 3.3 1.3 8.0 12.0 Q1 Power PAD TPS7A4101DGNT MSOP- DGN 8 250 180.0 12.4 5.3 3.3 1.3 8.0 12.0 Q1 Power PAD PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 16-Oct-2018 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS7A4101DGNR MSOP-PowerPAD DGN 8 2500 346.0 346.0 35.0 TPS7A4101DGNT MSOP-PowerPAD DGN 8 250 203.0 203.0 35.0 PackMaterials-Page2

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