TPS775xx, TPS776xx www.ti.com.............................................................................................................................................. SLVS232J–SEPTEMBER1999–REVISEDMARCH2009 TPS775xx with RESET Output, TPS776xx with PG Output FAST-TRANSIENT-RESPONSE 500mA LOW-DROPOUT VOLTAGE REGULATORS FEATURES DESCRIPTION 1 • OpenDrainPower-OnResetwith200msDelay The TPS775xx and TPS776xx devices are designed 23 (TPS775xx) to have a fast transient response and be stable with a • OpenDrainPowerGood(TPS776xx) 10m F low ESR capacitor. This combination provides highperformanceatareasonablecost. • 500mALow-DropoutVoltageRegulator • AvailableinFixedOutputandAdjustable Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically Versions 169mV at an output current of 500mA for the • DropoutVoltageto169mV(Typ)at500mA TPS77x33) and is directly proportional to the output (TPS77x33) current.Additionally,since the PMOS pass element is • Ultralow85m ATypicalQuiescentCurrent a voltage-driven device, the quiescent current is very • FastTransientResponse low and independent of output loading (typically 85m A over the full range of output current, 0mA to 500mA). • 2%ToleranceOverSpecifiedConditionsfor These two key specifications yield a significant Fixed-OutputVersions improvement in operating life for battery-powered • 8-PinSOICand20-PinTSSOPPowerPAD™ systems. This LDO family also features a sleep (PWP)Packages mode; applying a TTL high signal to EN (enable) • ThermalShutdownProtection shuts down the regulator, reducing the quiescent currentto1m AatT =+25°C. J APPLICATIONS The RESET output of the TPS775xx initiates a reset • FPGAPower in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal • DSPCoreandI/OVoltages comparator in the TPS775xx monitors the output voltage of the regulator to detect an undervoltage TypicalApplicationCircuit conditionontheregulatedoutputvoltage. (FixedVoltageOptions) Power good (PG) of the TPS776xx is an active high VIN 6 IN RESEPTG/ 16 RESET/PG oreusteptuto,rwahliocwh-bcaanttebryeiunsdeicdattoor.implement a power-on 7 IN 14 The TPS775xx and TPS776xx are offered in 1.5V, OUT VOUT 1.6V (TPS77516 only), 1.8V, 2.5V, 2.8V (TPS77628 0.1mF 5 13 EN OUT +10CmOFUT(1) oandljyu)s,taabnledv3e.r3sVionfi(xperdo-gvroalmtamgeabvleerosvioenrsthaenrdanigneaonf GND 1.5V to 5.5V for the TPS77501 and 1.2V to 5.5V for 3 the TPS77601). Output voltage tolerance is specified asamaximum of 2% over line, load, and temperature ranges. The TPS775xx and TPS776xx families are availablein8-pinSOICand20-pinTSSOPpackages. 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. PowerPADisatrademarkofTexasInstruments. 2 Allothertrademarksarethepropertyoftheirrespectiveowners. 3 PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©1999–2009,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

TPS775xx, TPS776xx SLVS232J–SEPTEMBER1999–REVISEDMARCH2009.............................................................................................................................................. www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage. ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemore susceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications. ORDERINGINFORMATION(1) PRODUCT V (2) OUT TPS775xxyyyz,TPS776xxyyyz XXisnominaloutputvoltage(forexample,28=2.8V,285=2.85V,01=Adjustable). YYYispackagedesignator. Zispackagequantity. (1) ForthemostcurrentpackageandorderinginformationseethePackageOptionAddendumattheendofthisdocument,orseetheTI websiteatwww.ti.com. (2) Customfixedoutputvoltagesareavailable;minimumorderquantitiesmayapply.Contactfactoryfordetailsandavailability. ABSOLUTE MAXIMUM RATINGS Overoperatingtemperaturerange(unlessotherwisenoted)(1) PARAMETER TPS775xx,TPS776xx UNIT Inputvoltagerange,V (2) –0.3to+13.5 V IN VoltagerangeatEN –0.3to+16.5 V MaximumRESETvoltage(TPS775xx) 16.5 V MaximumPGvoltage(TPS776xx) 16.5 V Peakoutputcurrent Internallylimited VoltagerangeatOUT,FB 7 V Continuoustotalpowerdissipation SeeDissipationRatingsTable Operatingjunctiontemperaturerange,T –40to+125 °C J Storagejunctiontemperaturerange,T –65to+150 °C STG ESDrating,HBM 2 kV (1) Stressesabovetheseratingsmaycausepermanentdamagetothedevice.Exposuretoabsolutemaximumconditionsforextended periodsmaydegradedevicereliability.Thesearestressratingsonly,andfunctionaloperationofthedeviceattheseoranyother conditionsbeyondthosespecifiedisnotimplied. (2) Allvoltagesarewithrespecttonetworkterminalground. DISSIPATION RATINGS AIRFLOW DERATINGFACTOR BOARD PACKAGE (CFM) T <+25°C(mW) ABOVET =+25°C T =+70°C(mW) T =+85°C(mW) A A A A 0 568 5.68mW/°C 312 227 — D 250 904 9.04mW/°C 497 362 0 2350 23.5mW/°C 1300 940 Low-K(1) PWP 300 3460 34.6mW/°C 1900 1400 0 2380 23.8mW/°C 1300 952 High-K(2) PWP 300 5790 57.9mW/°C 3200 2300 (1) Thisparameterismeasuredwiththerecommendedcopperheatsinkpatternona1-layer,5in×5inprintedcircuitboard(PCB),1-ounce copper,2in×2incoverage(4in2). (2) Thisparameterismeasuredwiththerecommendedcopperheatsinkpatternona8-layer,1.5in×2inPCB,1-ouncecopperwithlayers 1,2,4,5,7,and8at5%coverage(0.9in2)andlayers3and6at100%coverage(6in2).Formoreinformation,refertoTItechnicalbrief SLMA002. 2 SubmitDocumentationFeedback Copyright©1999–2009,TexasInstrumentsIncorporated

TPS775xx, TPS776xx www.ti.com.............................................................................................................................................. SLVS232J–SEPTEMBER1999–REVISEDMARCH2009 ELECTRICAL CHARACTERISTICS Overrecommendedoperatingtemperaturerange(T =–40°Cto+125°C),V =V +1V;I =1mA,V =0V,C = J IN OUT(TYP) OUT EN OUT 10m F,unlessotherwisenoted.TypicalvaluesareatT =+25°C. J PARAMETER TESTCONDITIONS MIN TYP MAX UNIT VIN Inputvoltagerange 2.7 10 V TPS77501 1.5 5.5 V VOUT Outputvoltagerange TPS77601 1.2 5.5 V VOUT Accuracy V10OmUAT+<1IOVUT≤<VI5N0≤0m10AV(1) –2.0 +2.0 % IGND Groundpincurrent IOUT=10mA 85 m A IOUT=500mA 125 ΔVOUT%/ΔVIN Outputvoltagelineregulation VOUT+1V≤VIN≤10V(1) 0.01 %/V ΔVOUT%/ΔIOUT Loadregulation 3 mV VN OBWutp=ut2n0o0iHseztvool1ta0g0ekHz TPS77x18 IC=500mA,COUT=10m F 53 m VRMS TPS77628 IOUT=500mA 285 410 mV VDO Dropoutvoltage(2) TPS77533 IOUT=500mA 169 287 mV TPS77633 IOUT=500mA 169 287 mV ICL Outputcurrentlimit VOUT=0V 1.2 1.6 1.9 A TSD Shutdowntemperature 150 °C TJ Operatingjunctiontemperaturerange –40 +125 °C EN=VIN,atTJ=+25°C, 1 ISTBY Standbycurrent 2.7V<VIN<10V m A EN=VIN,2.7V<VIN<10V 10 IFB FBinputcurrent TPS77x01 FB=1.5V 2 nA VEN(HI) High-levelenableinputvoltage 1.7 V VEN(LO) Low-levelenableinputvoltage 0.9 V PSRR Power-supplyripplerejection f=100Hz,COUT=10m F 60 dB MinimuminputvoltageforvalidRESET IOUT(RESET)=300m A 1.1 V Tripthresholdvoltage VOUTdecreasing 92 98 %VOUT RESET Hysteresisvoltage MeasuredatVOUT 0.5 %VOUT (TPS775xx) Outputlowvoltage VIN=2.7V,IOUT(RESET)=1mA 0.15 0.4 V Leakagecurrent V(RESET)=5V 1 m A RESETtime-outdelay 200 ms MinimuminputvoltageforvalidPG IOUT(PG)=300m A 1.1 V Tripthresholdvoltage VOUTdecreasing 92 98 %VOUT PG (TPS776xx) Hysteresisvoltage MeasuredatVOUT 0.5 %VOUT Outputlowvoltage VIN=2.7V,IOUT(PG)=1mA 0.15 0.4 V Leakagecurrent V(PG)=5V 1 m A EN=0V –1 0 1 Inputcurrent(EN) m A EN=VIN –1 1 (1) MinimumV =V +V or2.7V,whicheverisgreater. IN OUT DO (2) V isnotmeasuredforfixedoutputversionswithV <2.8VbecausemimimumV =2.7V. DO OUT(NOM) IN Copyright©1999–2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3

TPS775xx, TPS776xx SLVS232J–SEPTEMBER1999–REVISEDMARCH2009.............................................................................................................................................. www.ti.com FUNCTIONAL BLOCK DIAGRAMS AdjustableVoltageVersions IN EN PG orRESET _ + OUT + 200ms Delay _ (forRESETOption) R1 V = 1.183V ref FB/NC R 2 GND External to the device FixedVoltageVersions IN EN PG orRESET _ + OUT + 200ms Delay _ (forRESETOption) R1 V = 1.183V ref R 2 GND 4 SubmitDocumentationFeedback Copyright©1999–2009,TexasInstrumentsIncorporated

TPS775xx, TPS776xx www.ti.com.............................................................................................................................................. SLVS232J–SEPTEMBER1999–REVISEDMARCH2009 PIN CONFIGURATIONS TSSOP-20 SOIC-8 PWP D (TOPVIEW) (TOPVIEW) GND/HSINK 1 20 GND/HSINK GND 1 8 RESET/PG GND/HSINK 2 19 GND/HSINK EN 2 7 FB/NC GND 3 18 NC IN 3 6 OUT NC 4 17 NC IN 4 5 OUT EN 5 16 RESET/PG IN 6 15 FB/NC IN 7 14 OUT NC 8 13 OUT GND/HSINK 9 12 GND/HSINK GND/HSINK 10 11 GND/HSINK Table1. PINDESCRIPTIONS TPS775xx,TPS776xx TSSOP-20 SOIC-8(D) (PWP) NAME PINNO. PINNO. DESCRIPTION EN 2 5 Negativepolarityenable(EN)input Adjustablevoltageversiononly;feedbackvoltageforsettingoutputvoltageofthedevice. FB 7 15 Notinternallyconnectedonadjustableversions. 1,2,3,9,10, GND 1 11,12,19, Ground 20 IN 3,4 6,7 Inputvoltage OUT 5,6 13,14 Regulatedoutputvoltage RESET 8 16 TPS775xxdevicesonly;open-drainRESEToutput. PG 8 16 TPS776xxdevicesonly;open-drainpower-good(PG)output. NC — 4,8,17,18 Nointernalconnection PAD/TAB — — Shouldbesolderedtogroundplaneandusedforheatsinking. Copyright©1999–2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5

TPS775xx, TPS776xx SLVS232J–SEPTEMBER1999–REVISEDMARCH2009.............................................................................................................................................. www.ti.com TPS775xxRESETTimingDiagram V IN (1) (1) V V res res t VOUT VIT+(2) VIT+(2) Threshold Voltage Less than 5% of the VIT-(2) output voltage VIT-(2) t RESET 200ms Delay 200ms Delay Output Output Output Undefined Undefined t (1) V is the minimum input voltage for a valid RESET. The symbol V is not currently listed within EIA or JEDEC res res standardsforsemiconductorsymbology. (2) V :Tripvoltageistypically5%lowerthantheoutputvoltage(95%V ).V toV isthehysteresisvoltage. IT OUT IT– IT+ TYPICAL CHARACTERISTICS TableofGraphs FIGURENO. vsOutputCurrent Figure3,Figure4,Figure5 V OutputVoltage vsFree-AirTemperature Figure6,Figure7,Figure8 OUT vsTime Figure20 I GroundCurrent vsFree-AirTemperature Figure9 GND PSRR Power-SupplyRippleRejection vsFrequency Figure10 OutputSpectralNoiseDensity vsFrequency Figure11 Z OutputImpedance vsFrequency Figure12 OUT vsInputVoltage Figure13 V DropoutVoltage DO vsFree-AirTemperature Figure14 V InputVoltage(Min) vsOutputVoltage Figure15 IN LINE LineTransientResponse Figure16,Figure18 LOAD LoadTransientResponse Figure17,Figure19 ESR EquivalentSeriesResistance vsOutputCurrent Figure22,Figure23 6 SubmitDocumentationFeedback Copyright©1999–2009,TexasInstrumentsIncorporated

TPS775xx, TPS776xx www.ti.com.............................................................................................................................................. SLVS232J–SEPTEMBER1999–REVISEDMARCH2009 TYPICAL CHARACTERISTICS Overoperatingtemperaturerange(T=–40°Cto+125°C)unlessotherwisenoted.TypicalvaluesareatT =+25°C. J J TPS77x33 TPS77x15 OUTPUTVOLTAGE OUTPUTVOLTAGE vsOUTPUTCURRENT vsOUTPUTCURRENT 3.2835 1.4985 V = 4.3V V = 2.7V IN IN T = +25°C T = +25°C A A 3.2830 1.4980 V 3.2825 V 1.4975 - - e e g g a a olt 3.2820 olt 1.4970 V V ut ut p p ut 3.2815 ut 1.4965 O O - - T T U U O O V 3.2810 V 1.4960 3.2805 1.4955 3.2800 1.4950 0.0 0.1 0.2 0.3 0.4 0.5 0.0 0.1 0.2 0.3 0.4 0.5 I -Output Current-A I -Output Current-A OUT OUT Figure3. Figure4. TPS77x25 TPS77x33 OUTPUTVOLTAGE OUTPUTVOLTAGE vsOUTPUTCURRENT vsFREE-AIRTEMPERATURE 2.4960 3.32 V = 3.5V IN TA= +25°C VIN= 4.3V 2.4955 3.31 2.4950 V V 3.30 - - e e g 2.4945 g I = 500mA a a OUT olt olt 3.29 V V ut 2.4940 ut p p I = 1mA ut ut 3.28 OUT O O - 2.4935 - UT UT O O V V 3.27 2.4930 3.26 2.4925 2.4920 3.25 0.0 0.1 0.2 0.3 0.4 0.5 -60 -40 -20 0 20 40 60 80 100 120 140 IOUT-Output Current-A TA-Free-Air Temperature-°C Figure5. Figure6. Copyright©1999–2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7

TPS775xx, TPS776xx SLVS232J–SEPTEMBER1999–REVISEDMARCH2009.............................................................................................................................................. www.ti.com TYPICAL CHARACTERISTICS (continued) Overoperatingtemperaturerange(T=–40°Cto+125°C)unlessotherwisenoted.TypicalvaluesareatT =+25°C. J J TPS77x15 TPS77x25 OUTPUTVOLTAGE OUTPUTVOLTAGE vsFREE-AIRTEMPERATURE vsFREE-AIRTEMPERATURE 1.515 2.515 VIN= 2.7V VIN= 3.5V 2.510 1.510 V 2.505 - V e 1.505 - g e a g Output Volt 1.500 IOUT= 500mA utput Volta 22..540905 IOUT= 500mA - O IOUT= 1mA VOUT 1.495 IOUT= 1mA -VOUT 2.490 1.490 2.485 1.485 2.480 -60 -40 -20 0 20 40 60 80 100 120 140 -60 -40 -20 0 20 40 60 80 100 120 140 T -Free-Air Temperature-°C T -Free-Air Temperature-°C A A Figure7. Figure8. TPS77xxx TPS77x33 GROUNDCURRENT POWER-SUPPLYRIPPLEREJECTION vsFREE-AIRTEMPERATURE vsFREQUENCY 100 90 V = 4.3V V = 2.7V IN IN 80 C = 10mF B OUT d TA= +25°C 95 - 70 n o cti e 60 A ej m R -d Current 90 IOUT= 1mA pply Ripple 5400 un 85 Su 30 Gro IOUT= 500mA ower 20 P - 80 R 10 R S P 0 75 -10 -60 -40 -20 0 20 40 60 80 100 120 140 101 102 103 104 105 106 TA-Free-Air Temperature-°C f-Frequency-Hz Figure9. Figure10. 8 SubmitDocumentationFeedback Copyright©1999–2009,TexasInstrumentsIncorporated

TPS775xx, TPS776xx www.ti.com.............................................................................................................................................. SLVS232J–SEPTEMBER1999–REVISEDMARCH2009 TYPICAL CHARACTERISTICS (continued) Overoperatingtemperaturerange(T=–40°Cto+125°C)unlessotherwisenoted.TypicalvaluesareatT =+25°C. J J TPS77x33 TPS77x33 OUTPUTSPECTRALNOISEDENSITY OUTPUTIMPEDANCE vsFREQUENCY vsFREQUENCY 10-5 100 V = 4.3V IN V = 4.3V IN C = 10mF OUT C = 10mF OUT T = +25°C z A TA= +25°C H Ö V/ m W -sity 10-6 IOUT= 7mA -nce IOUT= 1mA n a e d D e se mp -1 Noi IOUT= 500mA ut I 10 ectral 10-7 -Outp Sp UT ut ZO p Out IOUT= 500mA -8 10 -2 102 103 104 105 10 101 102 103 104 105 106 f-Frequency-Hz f-Frequency-Hz Figure11. Figure12. TPS77x01 TPS77x33 DROPOUTVOLTAGE DROPOUTVOLTAGE vsINPUTVOLTAGE vsFREE-AIRTEMPERATURE 350 3 10 I = 500mA OUT C = 10mF OUT 300 2 10 I = 500mA V OUT m 250 V m - e - g T = +125°C e out Volta 200 TA= +25°C A ut Voltag 101 op 150 po IOUT= 10mA -Dr T =-40°C Dro 100 O A - D 100 O V D V -1 10 50 I = 0mA OUT 0 -2 2.5 3.0 3.5 4.0 4.5 5.0 10 -60 -40 -20 0 20 40 60 80 100 120 140 V -Input Voltage-V IN T -Free-Air Temperature-°C A Figure13. Figure14. Copyright©1999–2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9

TPS775xx, TPS776xx SLVS232J–SEPTEMBER1999–REVISEDMARCH2009.............................................................................................................................................. www.ti.com TYPICAL CHARACTERISTICS (continued) Overoperatingtemperaturerange(T=–40°Cto+125°C)unlessotherwisenoted.TypicalvaluesareatT =+25°C. J J INPUTVOLTAGE(MIN) TPS77x15 vsOUTPUTVOLTAGE LINETRANSIENTRESPONSE 4 V I = 0.5A - OUT e 3.7 g a olt V ut V TA= +25°C np I -age TA= +125°C -VIN 2.7 olt ut V 3 -IVnpIN 2.7 TA=-40°C Change in-oltagemV 100 - V UTut VOutp -10 COUT= 10m F D O TA= +25°C 2 1.50 1.75 2.0 2.25 2.50 2.75 3.0 3.25 3.5 0 20 40 60 80 100 120 140 160 180 200 VOUT-Output Voltage-V t-Time-m s Figure15. Figure16. TPS77x15 TPS77x33 LOADTRANSIENTRESPONSE LINETRANSIENTRESPONSE nmV CESOURT == 12/x24x71m0F0mW -V COUT= 10m F D-VChange iOUT-Output Voltage -55000 VVIONU=T =2 .17.V5V -VInput VoltageIN 5.3 TA= +25°C 4.3 A m V - nm nt e i- 10 ut Curre 500 -ChangVoltage 0 Outp 0 VOUTutput -10 - D O T U O I 0 20 40 60 80 100 120 140 160 180 200 0 20 40 60 80 100 120 140 160 180 200 t-Time-m s t-Time-m s Figure17. Figure18. 10 SubmitDocumentationFeedback Copyright©1999–2009,TexasInstrumentsIncorporated

TPS775xx, TPS776xx www.ti.com.............................................................................................................................................. SLVS232J–SEPTEMBER1999–REVISEDMARCH2009 TYPICAL CHARACTERISTICS (continued) Overoperatingtemperaturerange(T=–40°Cto+125°C)unlessotherwisenoted.TypicalvaluesareatT =+25°C. J J TPS77x33 TPS77x33OUTPUTVOLTAGE LOADTRANSIENTRESPONSE vsTIME(ATSTARTUP) 4 -Change inUT-ut VoltagemV 500 CEVVIOSONUUR=TT ===4 . 1332/.Vx234xV71m0F0mW -utput VoltageV 32 CITOAOUUT=T =+= 25 1500°0CmmFA DVOOutp -50 -OUT 1 O V A 0 m - nt V ut Curre 500 -Pulse utp ble -O 0 Ena T U O I 0 20 40 60 80 100 120 140 160 180 200 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 t-Time-m s t-Time-ms Figure19. Figure20. Copyright©1999–2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11

TPS775xx, TPS776xx SLVS232J–SEPTEMBER1999–REVISEDMARCH2009.............................................................................................................................................. www.ti.com TYPICAL CHARACTERISTICS (continued) Overoperatingtemperaturerange(T=–40°Cto+125°C)unlessotherwisenoted.TypicalvaluesareatT =+25°C. J J TestCircuitforTypicalRegionsofStability(Figure22andFigure23)(FixedOutputOptions) VIN IN To Load OUT + COUT RL EN R GND ESR Figure21. TYPICALREGIONOFSTABILITY TYPICALREGIONOFSTABILITY EQUIVALENTSERIESRESISTANCE(1) EQUIVALENTSERIESRESISTANCE(1) vsOUTPUTCURRENT vsOUTPUTCURRENT 10 10 RegionofInstability RegionofInstability W- W- nce nce uivalent Series Resista 0.11 VCVTAOIONUU==TT +==42 . 3325.V2°3CmVF RegionofStability uivalent Series Resista 0.11 VCVTJOIONUU==TT + ==41 . 23325.V23°mVCF RegionofStability q q E E - - R R S S E E RegionofInstability RegionofInstability 0.01 0.01 0 100 200 300 400 500 0 100 200 300 400 500 IOUT-Output Current-mA IOUT-Output Current-mA (1) Equivalent series resistance (ESR) refers to (1) Equivalent series resistance (ESR) refers to the total series resistance, including the ESR the total series resistance, including the ESR of the capacitor, any series resistance added of the capacitor, any series resistance added externally,andPWBtraceresistancetoC . externally,andPWBtraceresistancetoC . OUT OUT Figure22. Figure23. 12 SubmitDocumentationFeedback Copyright©1999–2009,TexasInstrumentsIncorporated

TPS775xx, TPS776xx www.ti.com.............................................................................................................................................. SLVS232J–SEPTEMBER1999–REVISEDMARCH2009 APPLICATION INFORMATION The TPS775xx and TPS776xx feature very low quiescent current, which remains virtually constant even with varying loads. Conventional LDO regulators use a pnp pass element, the base current of which is directly proportional to the load current through the regulator (I = I /b ). The TPS775xx and TPS776xx use a PMOS B C transistor to pass current; because the gate of the PMOS is voltage driven, operating current is low and invariableoverthefullloadrange. Another pitfall associated with the pnp-pass element is its tendency to saturate when the device goes into dropout. The resulting drop in b forces an increase in I to maintain the load. During power up, this I increase B B translates to large start-up currents. Systems with limited supply current may fail to start up. In battery-powered systems, it means rapid battery discharge when the voltage decays below the minimum required for regulation. TheTPS775xxandTPS776xxquiescentcurrentsremainlowevenwhentheregulator drops out, eliminating both problems. The TPS775xx and TPS776xx families also feature a shutdown mode that places the output in the high-impedance state (essentially equal to the feedback-divider resistance) and reduces quiescent current to 2m A.Iftheshutdownfeatureisnotused,ENshouldbetiedtoground. Minimum Load Requirements TheTPS775xxandTPS776xxfamiliesarestableatzeroload;nominimumloadisrequiredforoperation. FB—Pin Connection (Adjustable Version Only) The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option. The output voltage is sensed through a resistor divider network to close the loop as it is shown in Figure 25. Normally, this connection should be as short as possible; however, the connection can be made near a critical circuit to improve performance at that point. Internally, FB connects to a high-impedance wide-bandwidth amplifier and noise pickup feeds through to the regulator output. Routing the FB connection to minimize/avoid noise pickup is essential. External Capacitor Requirements An input capacitor is not usually required; however, a ceramic bypass capacitor (0.047m F or larger) improves load transient response and noise rejection if the TPS775xx or TPS776xx are located more than a few inches from the power supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps)loadtransientswithfastrisetimesareanticipated. Like all low dropout regulators, the TPS775xx and TPS776xx require an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance value is 10m F and the ESR (equivalent series resistance) must be between 50mΩ and 1.5Ω. Capacitor values 10m F or larger are acceptable, provided the ESR is less than 1.5Ω. Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramiccapacitorsareallsuitable,providedtheymeettherequirementsdescribedpreviously. V 6 IN RESET/ 16 RESET/PG IN PG 7 IN 250kW 14 OUT V OUT C 1 5 13 0.1mF EN OUT C OUT + 10mF GND 3 Figure24.TypicalApplicationCircuit(FixedVersions) Copyright©1999–2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13

TPS775xx, TPS776xx SLVS232J–SEPTEMBER1999–REVISEDMARCH2009.............................................................................................................................................. www.ti.com Programming the TPS77x01 Adjustable LDO Regulator The output voltage of the TPS77x01 adjustable regulator is programmed using an external resistor divider as showninFigure25.TheoutputvoltageiscalculatedusingEquation1: R V = V x (1 + 1 ) OUT ref R2 (1) Where: • V =1.1834Vtyp(theinternalreferencevoltage) ref Resistors R and R should be chosen for approximately 10m A divider current. Lower value resistors can be 1 2 used, but offer no inherent advantage and waste more power. Higher values should be avoided as leakage currents at FB increase the output voltage error. The recommended design procedure is to choose R = 110kΩ 2 tosetthedividercurrentatapproximately10m AandthencalculateR usingEquation2: 1 V R = ( OUT -1) x R 1 V 2 ref (2) TPS77x01 OUTPUT VOLTAGE PROGRAMMING GUIDE V IN RESET/ RESETor PG Output OUTPUT IN 0.1mF PG VOLTAGE R1 R2 UNIT 250kW 2.5V 121 110 kW OUT V 3.3V 196 110 kW OUT >1.7V 3.6V 226 110 kW EN R1 <0.9V 4.75V 332 110 kW FB/NC C OUT GND R 2 Figure25.TPS77x01AdjustableLDORegulatorProgramming Reset Indicator The TPS775xx features a RESET output that can be used to monitor the status of the regulator. The internal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal regulated value, the RESET output transistor turns on, taking the signal low. The open-drain output requires a pullup resistor. If not used, it can be left floating. RESET can be used to drive power-on reset circuitry or as a low-battery indicator. RESET does not assert itself when the regulated output voltage falls outside the specified 2% tolerance, but instead reports an output voltage low relative to its nominal regulated value (refer to Timing Diagramforstart-upsequence). Power-Good Indicator The TPS776xx features a power-good (PG) output that can be used to monitor the status of the regulator. The internal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal regulated value, the PG output transistor turns on, taking the signal low. The open-drain output requires a pullup resistor. If not used, it can be left floating. PG can be used to drive power-on reset circuitry or used as a low-batteryindicator. 14 SubmitDocumentationFeedback Copyright©1999–2009,TexasInstrumentsIncorporated

TPS775xx, TPS776xx www.ti.com.............................................................................................................................................. SLVS232J–SEPTEMBER1999–REVISEDMARCH2009 Regulator Protection The TPS775xx and TPS776xx PMOS-pass transistors have a built-in back diode that conducts reverse currents when the input voltage drops below the output voltage (for example, during power down). Current is conducted from the output to the input and is not internally limited. When extended reverse voltage is anticipated, external limitingmaybeappropriate. The TPS775xx and TPS776xx also feature internal current limiting and thermal protection. During normal operation, the TPS775xx and TPS776xx limit output current to approximately 1.7A. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds +150°C(typ), thermal-protection circuitry shuts it down. Once thedevicehascooledbelow+130°C(typ),regulatoroperationresumes. Power Dissipation and Junction Temperature Specified regulator operation is assured to a junction temperature of +125°C; the maximum junction temperature should be restricted to +125°C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, P , and the actual dissipation, P , which must be less than or D(max) D equaltoP . D(max) Themaximum-power-dissipationlimitisdeterminedusingthefollowingequation: T -T P = J(max) A D(max) R qJA where: • T isthemaximumallowablejunctiontemperature J(max) • Rq JAisthethermalresistancejunction-to-ambientforthepackage,andiscalculatedas 1 derating factor fromthedissipationratingtables • T istheambienttemperature A Theregulatordissipationiscalculatedusing: P = (V -V ) x I D IN OUT OUT Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the thermalprotectioncircuit. Copyright©1999–2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS77501D ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77501 & no Sb/Br) TPS77501DR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77501 & no Sb/Br) TPS77501PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77501 & no Sb/Br) TPS77501PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77501 & no Sb/Br) TPS77515D ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77515 & no Sb/Br) TPS77515DG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77515 & no Sb/Br) TPS77515DR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77515 & no Sb/Br) TPS77515PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77515 & no Sb/Br) TPS77515PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77515 & no Sb/Br) TPS77516D ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 77516 & no Sb/Br) TPS77516DG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 77516 & no Sb/Br) TPS77516DR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 77516 & no Sb/Br) TPS77516PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 PT77516 & no Sb/Br) TPS77516PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 PT77516 & no Sb/Br) TPS77516PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 PT77516 & no Sb/Br) TPS77518D ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77518 & no Sb/Br) TPS77518DR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77518 & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS77518PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77518 & no Sb/Br) TPS77518PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77518 & no Sb/Br) TPS77518PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77518 & no Sb/Br) TPS77525D ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77525 & no Sb/Br) TPS77525DR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77525 & no Sb/Br) TPS77525PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77525 & no Sb/Br) TPS77533D ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77533 & no Sb/Br) TPS77533DR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77533 & no Sb/Br) TPS77533PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77533 & no Sb/Br) TPS77533PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77533 & no Sb/Br) TPS77601D ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77601 & no Sb/Br) TPS77601DG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77601 & no Sb/Br) TPS77601DR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77601 & no Sb/Br) TPS77601DRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77601 & no Sb/Br) TPS77601PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77601 & no Sb/Br) TPS77601PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77601 & no Sb/Br) TPS77615D ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77615 & no Sb/Br) TPS77615DG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77615 & no Sb/Br) Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS77615DR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77615 & no Sb/Br) TPS77615DRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77615 & no Sb/Br) TPS77615PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77615 & no Sb/Br) TPS77618D ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77618 & no Sb/Br) TPS77618DR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77618 & no Sb/Br) TPS77618DRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77618 & no Sb/Br) TPS77618PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77618 & no Sb/Br) TPS77618PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77618 & no Sb/Br) TPS77618PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77618 & no Sb/Br) TPS77625D ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77625 & no Sb/Br) TPS77625DG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77625 & no Sb/Br) TPS77625DR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77625 & no Sb/Br) TPS77625DRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77625 & no Sb/Br) TPS77625PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77625 & no Sb/Br) TPS77625PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77625 & no Sb/Br) TPS77625PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77625 & no Sb/Br) TPS77628D ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77628 & no Sb/Br) TPS77628PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77628 & no Sb/Br) Addendum-Page 3

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS77633D ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77633 & no Sb/Br) TPS77633DG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77633 & no Sb/Br) TPS77633DR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77633 & no Sb/Br) TPS77633DRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 77633 & no Sb/Br) TPS77633PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77633 & no Sb/Br) TPS77633PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77633 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Addendum-Page 4

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TPS775, TPS776 : •Automotive: TPS775-Q1, TPS776-Q1 NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 5

PACKAGE MATERIALS INFORMATION www.ti.com 20-Feb-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS77501DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77501PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS77515DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77515PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS77516DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77516PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS77518DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77518PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS77525DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77533DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77533PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS77601DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77601PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS77615DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77618DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77618PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS77625DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77625PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 20-Feb-2019 Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS77633DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77633PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS77501DR SOIC D 8 2500 350.0 350.0 43.0 TPS77501PWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 TPS77515DR SOIC D 8 2500 350.0 350.0 43.0 TPS77515PWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 TPS77516DR SOIC D 8 2500 350.0 350.0 43.0 TPS77516PWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 TPS77518DR SOIC D 8 2500 350.0 350.0 43.0 TPS77518PWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 TPS77525DR SOIC D 8 2500 350.0 350.0 43.0 TPS77533DR SOIC D 8 2500 350.0 350.0 43.0 TPS77533PWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 TPS77601DR SOIC D 8 2500 350.0 350.0 43.0 TPS77601PWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 TPS77615DR SOIC D 8 2500 350.0 350.0 43.0 TPS77618DR SOIC D 8 2500 350.0 350.0 43.0 PackMaterials-Page2

PACKAGE MATERIALS INFORMATION www.ti.com 20-Feb-2019 Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS77618PWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 TPS77625DR SOIC D 8 2500 350.0 350.0 43.0 TPS77625PWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 TPS77633DR SOIC D 8 2500 350.0 350.0 43.0 TPS77633PWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 PackMaterials-Page3

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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