TPS76901-EP www.ti.com SLVSA53A–NOVEMBER2009–REVISEDDECEMBER2009 ULTRALOW-POWER 100-mA LOW DROPOUT LINEAR REGULATORS CheckforSamples:TPS76901-EP FEATURES SUPPORTS EXTREME TEMPERATURE 1 APPLICATIONS • 100-mALow-DropoutRegulator • ControlledBaseline • AvailableinAdjustableVersions • OneAssembly/TestSite • Only335-μAQuiescentCurrentWith100mA at150°C • OneFabricationSite • AvailableinExtreme(–55°C/150°C) • 1-μAQuiescentCurrentinStandbyMode TemperatureRange(1) • DropoutVoltageTypically71mVat100mA • ExtendedProductLifeCycle • OverCurrentLimitation • ExtendedProduct-ChangeNotification • ProductTraceability APPLICATIONS • TexasInstruments'hightemperatureproducts • Down-HoleDrilling utilizehighlyoptimizedsilicon(die)solutions • HighTemperatureEnvironments withdesignandprocessenhancementsto maximizeperformanceoverextended temperatures. DBVPACKAGE (TOPVIEW) IN 1 5 OUT GND 2 EN 3 4 NC/FB (1) Customtemperaturerangesavailable DESCRIPTION The TPS76901 low-dropout (LDO) voltage regulator offers the benefits of low dropout voltage, ultralow-power operation, and miniaturized packaging. This regulator features low dropout voltages and ultralow quiescent current compared to conventional LDO regulators. The TPS76901 is ideal for micropower operations and where boardspaceisatapremium. A combination of new circuit design and process innovation has enabled the usual PNP pass transistor to be replaced by a PMOS pass element. Because the PMOS pass element behaves as a low-value resistor, the dropout voltage is very low, and is directly proportional to the load current. Since the PMOS pass element is a voltage-driven device, the quiescent current is ultralow (28 μA maximum) and is stable over the entire range of output load current (0 mA to 100 mA). Intended for use in portable systems such as laptops and cellular phones, the ultralow-dropout voltage feature and ultralow-power operation result in a significant increase in system batteryoperatinglife. The TPS76901 also features a logic-enabled sleep mode to shut down the regulator, reducing quiescent current to 1 μA, typical at T = 25°C. The TPS76901 is a variable version programmable over the range of 1.2 V to J 4.5V. 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2009,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

TPS76901-EP SLVSA53A–NOVEMBER2009–REVISEDDECEMBER2009 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage. ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemore susceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications. ORDERINGINFORMATION(1) T PACKAGE(2) ORDERABLEPARTNUMBER TOP-SIDEMARKING A –55°Cto150°C DBV TPS76901SDBVTEP PCFS (1) Forthemostcurrentpackageandorderinginformation,seethePackageOptionAddendumattheendofthisdocument,orseetheTI Websiteatwww.ti.com. (2) Packagedrawings,standardpackingquantities,thermaldata,symbolization,andPCBdesignguidelinesareavailableat www.ti.com/sc/package. FUNCTIONALBLOCKDIAGRAM IN OUT EN Current Limit V REF FB GND ABSOLUTE MAXIMUM RATINGS(1) overoperatingfree-airtemperaturerange(unlessotherwisenoted) VALUE UNIT V Inputvoltagerange(2) –0.3to13.5 V REF VoltagerangeatEN –0.3toV +0.3 V I VoltageonOUT,FB 7 V Peakoutputcurrent Internallylimited ESDrating,HBM 2 kV Continuoustotalpowerdissipation SeeDissipationRatingsTable T Operatingvirtualjunctiontemperaturerange –55to150 °C J (1) Stressesbeyondthoselistedunderabsolutemaximumratingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderrecommendedoperating conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Allvoltagevaluesarewithrespecttonetworkgroundterminal. 2 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated ProductFolderLink(s):TPS76901-EP

TPS76901-EP www.ti.com SLVSA53A–NOVEMBER2009–REVISEDDECEMBER2009 THERMAL CHARACTERISTICS DERATINGFACTOR BOARD PACKAGE R R θJC θJA ABOVET =25°C A LowK(1) DBV 65.8°C/W 259°C/W 3.9mW/°C HighK(2) DBV 65.8°C/W 180°C/W 5.6mW/°C (1) TheJEDECLowK(1s)boarddesignusedtoderivethisdatawasa3-inchx3-inch,twolayerboardwith2-ouncecoppertracesontop oftheboard. (2) TheJEDECHighK(2s2p)boarddesignusedtoderivethisdatawasa3-inchx3-inch,multilayerboardwith1-ounceinternalpowerand groundplanesand2-ouncecoppertracesontopandbottomoftheboard. RECOMMENDED OPERATING CONDITIONS overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN NOM MAX UNIT V Inputvotlage(1) 5 10 V I V Ouputvoltagerange 1.2 4.5 V O I Continuousoutputcurrent(2) 0 100 mA O T Operatingjunctiontemperature –55 150 °C J (1) Tocalculatetheminimuminputvoltageforyourmaximumoutputcurrent,usethefollowingformula: XXXXV(min)=V (max)+V (maxload). I O DO (2) Continuousoutputcurrentandoperatingjunctiontemperaturearelimitedbyinternalprotectioncircuitry,butitisnotrecommendedthat thedeviceoperateunderconditionsbeyondthosespecifiedinthistableforextendedperiodsoftime. ELECTRICAL CHARACTERISTICS overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT Outputvoltage TJ=25°C VO VO (10μAto100mAload)(1) 12.V≤VO≤4.5V T =–55°Cto150°C 0.97V 1.03V V J O O EN=0V, T =25°C 17 QuiescentCurrent 0mA<IO<100mA J IQ (GNDcurrent)(1) (2) EN=4V, μA T =–55°Cto150°C 28 I =100mA J O EN=0V, TJ=25°C 12 Loadregulation mV IO=0to100mA TJ=150°C 13.5 O(ΔuVtpOu/VtOv)o(l2t)agelineregulation 5V≤VI≤10V(1) TTJJ==–255°5C°Cto150°C 0.04 0.1 % BW=300Hzto50kHz, V Outputnoisevoltage T =25°C 190 μVms N C =10μF J O T =25°C 350 Outputcurrentlimit V =0V(1) J mA O T =–55°Cto150°C 750 J T =25°C 1 J I Standbycurrent EN=V,5V≤V ≤10V μA STDBY I I T =–55°Cto150°C 2.4 J I FBinputcurrent FB=1.18V T =–55°Cto150°C –1 1 μA FB J V Highlevelenableinputvoltage 5V≤V ≤10V T =25°C 1.7 V IH I J T =25°C 0.9 J V Lowlevelenableinputvoltage 5V≤V ≤10V V IL I T =150°C 0.75 J f=1kHz, PSRR Powersupplyripplerejection CO=10μF(1) TJ=25°C 60 dB EN=0V –1 0 1 I Inputcurrent T =–55°Cto150°C μA IN J EN=V –1 1 I (1) MinimumINoperatingvoltageis5V.MaximumINvoltage10V,minimumoutputcurrent10μA,maximumoutputcurrent100mA. (2) LineRegulation(%)=(ΔV )/(ΔV )x100 OUT IN Copyright©2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLink(s):TPS76901-EP

TPS76901-EP SLVSA53A–NOVEMBER2009–REVISEDDECEMBER2009 www.ti.com DEVICE INFORMATION TERMINALFUNCTIONS TERMINAL I/O DESCRIPTION NAME NO. IN 1 I Input GND 2 - Ground EN 3 I Enable FB 4 I Feedback OUT 5 O Output TYPICAL CHARACTERISTICS V OUT vs TEMPERATURE (V =5V,Load=100mA) IN 3.8 3.7 3.6 V - UT O V 3.5 3.4 3.3 25 125 150 Temperature-°C Figure1. 4 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated ProductFolderLink(s):TPS76901-EP

TPS76901-EP www.ti.com SLVSA53A–NOVEMBER2009–REVISEDDECEMBER2009 TYPICAL CHARACTERISTICS (continued) OUTPUTIMPEDANCE vs FREQUENCY 2 VI=4.3V 1.8 CO=4.7µF ESR=0.3Ω 1.6 TA=25°C Ω e - 1.4 c an 1.2 d e p m 1 ut I p 0.8 ut - O 0.6 IO=1mA O Z 0.4 IO=100mA 0.2 0 10 100 1k 10k 100k 1M f - Frequency - Hz Figure2. LDOSTARTUPTIME EN VO 0 20 40 60 80 100 120 140 160 180 200 t -Time -µs Figure3. Copyright©2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLink(s):TPS76901-EP

TPS76901-EP SLVSA53A–NOVEMBER2009–REVISEDDECEMBER2009 www.ti.com TYPICAL CHARACTERISTICS (continued) 1000 WirebondVoiding 100 FailMode s ar e Y - e lif 10 d ElectromigrationFailMode e at m sti E 1 0.1 100 110 120 130 140 150 160 170 ContinuousT -°C J Figure4.TPS76901SDBVTEPOperatingLifeDeratingChart Note: 1. Seedatasheetforabsolutemaximumandminimumrecommendedoperatingconditions. 2. Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnectlife). 6 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated ProductFolderLink(s):TPS76901-EP

TPS76901-EP www.ti.com SLVSA53A–NOVEMBER2009–REVISEDDECEMBER2009 APPLICATION INFORMATION(1) The TPS76901 low-dropout (LDO) regulator has been optimized for use in battery-operated equipment. It features extremely low dropout voltages, low quiescent current (17 μA nominally), and enables inputs to reduce supplycurrentsto1μAwhentheregulatorsareturnedoff. DEVICE OPERATION The TPS76901 uses a PMOS pass element to dramatically reduce both dropout voltage and supply current over moreconventionalPNP-pass-elementLDOdesigns.ThePMOSpasselementisavoltage-controlleddeviceand, unlike a PNP transistor, it does not require increased drive current as output current increases. Supply current in theTPS76901isessentiallyconstantfromnoloadtomaximumload. Current limiting prevents damage by excessive output current. The device switches into a constant-current mode at approximately 350 mA; further load reduces the output voltage instead of increasing the output current. The PMOSpasselementincludesabackgatediodethatconductsreversecurrentwhentheinputvoltageleveldrops belowtheoutputvoltagelevel. A voltage of 1.7 V or greater on the EN input will disable the TPS76901 internal circuitry, reducing the supply current to 1 μA. A voltage of less than 0.9 V on the EN input will enable the TPS76901 and will enable normal operation to resume. The EN input does not include any deliberate hysteresis, and it exhibits an actual switching thresholdofapproximately1.5V. AtypicalapplicationcircuitisshowninFigure5. TPS76901 1 VI IN FB 4 5 C1 OUT VO 1µF 3 EN + 4.7 µF GND 2 ESR=0.2Ω Figure5. TypicalApplicationCircuit EXTERNAL CAPACITOR REQUIREMENTS Although not required, a 0.047-μF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the TPS76901, is recommended to improve transient response and noise rejection. A higher-value electrolytic input capacitor may be necessary if large, fast-rise-time load transients are anticipated andthedeviceislocatedseveralinchesfromthepowersource. Like all low dropout regulators, the TPS76901 requires an output capacitor connected between OUT and GND to stabilizetheinternalcontrolloop.Theminimumrecommendedcapacitanceis4.7μF.TheESR(equivalentseries resistance) of the capacitor should be between 0.2 Ω and 10 Ω. to ensure stability. Capacitor values larger than 4.7 μF are acceptable, and allow the use of smaller ESR values. Capacitances less than 4.7 μF are not recommended because they require careful selection of ESR to ensure stability. Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramic capacitors are all suitable, provided they meet the requirements described above. Most of the commercially available 4.7-μF surface-mount solid tantalum capacitors, including devices from Sprague, Kemet, and Nichico, meet the ESR requirements stated above. Multilayer ceramic capacitors may have very small equivalent series resistances and may thus require the addition of a low value seriesresistortoensurestability. (1) Applicationinformationisprovidedforcommercialtemperatureasareferenceandnotforhightemperature. Copyright©2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLink(s):TPS76901-EP

TPS76901-EP SLVSA53A–NOVEMBER2009–REVISEDDECEMBER2009 www.ti.com Table1.CAPACITORSELECTION PARTNO. MANUFACTURER VALUE MAXESR(1) SIZE(HxLxW)(1) T494B475K016AS KEMET 4.7μF 1.5Ω 1.9x3.5x2.8 195D106x0016x2T SPRAGUE 10μF 1.5Ω 1.3x7.0x2.7 695D106x003562T SPRAGUE 10μF 1.3Ω 2.5x7.6x2.5 TPSC475K035R0600 AVX 4.7μF 0.6Ω 2.6x6.0x3.2 (1) Sizeisinmm.ESRismaximumresistanceinOhmsat100kHzandT =25°C.ContactmanufacturerforminimumESRvalues. A OUTPUT VOLTAGE PROGRAMMING The output voltage of the TPS76901 adjustable regulator is programmed using an external resistor divider as showninFigure6.Theoutputvoltageiscalculatedusing: ( −R1) V = V • 1 + O REF R2 (1) Where: V =1.127Vtyp(theinternalreferencevoltage) REF Resistors R1 and R2 should be chosen for approximately 7-μA divider current. Lower value resistors can be used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage currents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 169 kΩ tosetthedividercurrentat7μAandthencalculateR1using: ( V ) R1 = −O - 1 •R2 V REF (2) TPS76901 1 VI IN 1 µF 5 OUT VO ≥1.7V 3 R1 EN ≤ 4 0.9V FB 4.7 µF GND R2 2 ESR=0.2Ω Note: 1. Theabovecalculationsholdgoodforroomtemperaturevaluesonly. Figure6. AdjustableLDOReulatorProgramming REGULATOR PROTECTION The TPS76901 PMOS-pass transistor has a built-in back diode that conducts reverse current when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be appropriate. The TPS76901 features internal current limiting protection. During normal operation, the TPS76901 limits output current to approximately 350 mA. When current limiting engages, the output voltage scales back linearly until the overcurrentconditionends. 8 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated ProductFolderLink(s):TPS76901-EP

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS76901SDBVTEP ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 150 PCFS & no Sb/Br) V62/10607-01XE ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 150 PCFS & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 OTHER QUALIFIED VERSIONS OF TPS76901-EP : NOTE: Qualified Version Definitions: Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 20-Jan-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS76901SDBVTEP SOT-23 DBV 5 250 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 20-Jan-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS76901SDBVTEP SOT-23 DBV 5 250 203.0 203.0 32.0 PackMaterials-Page2

PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 1.45 B A 0.90 PIN 1 INDEX AREA 1 5 2X 0.95 3.05 2.75 1.9 1.9 2 4 3 0.5 5X 0.3 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com

EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM 2 (1.9) 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com

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