TPS75801,, TPS758A01 TPS75815, TPS75818 TPS75825, TPS75833 www.ti.com SLVS330F–JUNE2001–REVISEDAPRIL2007 FAST-TRANSIENT RESPONSE, 3A, LOW-DROPOUT VOLTAGE REGULATORS FEATURES Quiescent current is 125m A at full load and drops to • 3ALow-DropoutVoltageRegulator less than 1m A when the device is disabled. The TPS758xx is designed to have fast transient • Availablein1.5V,1.8V,2.5V,and3.3V responseforlargeloadcurrentchanges. Fixed-OutputandAdjustableVersions Because the PMOS device behaves as a low-value • DropoutVoltageTypically150mVat3A resistor, the dropout voltage is very low (typically (TPS75833) 150mV at an output current of 3A for the TPS75833) • V andPinoutCompatiblewithMIC29302 and is directly proportional to the output current. REF (TPS758A01) Additionally, since the PMOS pass element is a • Low125m ATypicalQuiescentCurrent voltage-driven device, the quiescent current is very low and independent of output loading (typically • FastTransientResponse 125m A over the full range of output current). These • 3%ToleranceOverSpecifiedConditionsfor two key specifications yield a significant Fixed-OutputVersions improvement in operating life for battery-powered • Availablein5-PinTO-220andTO-263 systems. Surface-MountPackages The device is enabled when EN (enable) is • ThermalShutdownProtection connected to a high voltage level (> 2V). Applying a low voltage level (< 0.7V) to EN shuts down the regulator, reducing the quiescent current to less than DESCRIPTION 1m AatT =+25(cid:176) C. J The TPS758xx family of 3A low dropout (LDO) The TPS758xx is offered in 1.5V, 1.8V, 2.5V, and regulators contains four fixed voltage option 3.3V fixed-voltage versions and in an adjustable regulators and an adjustable voltage option version (programmable over the range of 1.22V to regulator.Thesedevicesarecapableofsupplying 3A 5V). Output voltage tolerance is specified as a of output current with a dropout of 150mV maximum of 3% over line, load, and temperature (TPS75833). Therefore, the device is capable of ranges. The TPS758xx family is available in a 5-pin performinga3.3Vto2.5Vconversion. TO-220(KC)andTO-263(KTT)packages. TO−220(KC)PACKAGE TPS75833 (TOPVIEW) DROPOUTVOLTAGE vs TPS75815 EN 1 JUNCTIONTEMPERATURE LOADTRANSIENTRESPONSE IN 2 250 150 OUFTBGP/NNUDCTEINN TO−26(3T(12O345KPTTV)IEPWAC)KAGE V−DropoutVoltage−mVDO21105050000 IVOO==33A.3V −ChangeinOutputVoltage−mV-- 1-1105505000000 VCOO==11.050Vm F ddti=0.75sA 3 utputCurrent−A GND 3 VO −O OUTPUT 4 0 D 0 IO FB/NC 5 - 40- 25- 10 5 20 35 50 65 80 85110125 0 20 40 60 80 100120140160180200 TJ−JunctionTemperature−(cid:1)C t−Time−m s Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. PowerPADisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2001–2007,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

TPS75801,, TPS758A01 TPS75815, TPS75818 TPS75825, TPS75833 www.ti.com SLVS330F–JUNE2001–REVISEDAPRIL2007 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERINGINFORMATION(1) PRODUCT V OUT TPS758xxyyyz XXisnominaloutputvoltage(forexample,25=2.5V,01=Adjustable). or YYYispackagedesignator. TPS758A01yyyz(2) Zispackagequantity. (1) Forthemostcurrentspecificationandpackageinformation,refertothePackageOptionAddendumlocatedattheendofthisdatasheet orseetheTIwebsiteatwww.ti.com. (2) TPS758A01availableinadjustableversiononly.SeeTPS758A01ReferenceVoltageinElectricalCharacteristicsfordifferentV REF range. ABSOLUTE MAXIMUM RATINGS Overoperatingjunctiontemperaturerange(unlessotherwisenoted)(1)(2) TPS758xx UNIT Inputvoltagerange,V –0.3to6 V IN VoltagerangeatEN –0.3to6 V Peakoutputcurrent Internallylimited Continuoustotalpowerdissipation SeeDissipationRatingsTable Outputvoltage,V (OUT,FB) 5.5 V OUT Operatingjunctiontemperaturerange,T –40to+150 (cid:176) C J Storagetemperaturerange,T –65to+150 (cid:176) C STG ESDrating,HBM 2 kV ESDrating,CDM 500 V (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedisnotimplied.Exposureto absolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Allvoltagevaluesarewithrespecttonetworkterminalground. DISSIPATION RATINGS TABLE PACKAGE RQ JC((cid:176) C/W) RQ JA((cid:176) C/W)(1) TO-220 2 58.7(2) TO-263 2 38.7(3) (1) Forbothpackages,theRQ JAvalueswerecomputedusingaJEDECHigh-Kboard(2S2P)witha1-ounceinternalcopperplaneand groundplane.Therewasnoairflowacrossthepackages. (2) RQ JAwascomputedassumingavertical,free-standingTO-220packagewithpinssolderedtotheboard.Thereisnoheatsinkattached tothepackage. (3) RQ JAwascomputedassumingahorizontally-mountedTO-263packagewithpinssolderedtotheboard.Thereisnocopperpad underneaththepackage. 2 SubmitDocumentationFeedback

TPS75801,, TPS758A01 TPS75815, TPS75818 TPS75825, TPS75833 www.ti.com SLVS330F–JUNE2001–REVISEDAPRIL2007 ELECTRICAL CHARACTERISTICS Overrecommendedoperatingjunctiontemperaturerange(T =–40(cid:176) Cto+125(cid:176) C),V =V +1V,I =1mA, J IN OUT(nom) OUT V =V ,C =100m F(unlessotherwisenoted).TypicalvaluesareatT =+25(cid:176) C. EN IN OUT J PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V Inputvoltagerange(1) 2.8 5.5 V IN TPS75801 1.225 V V Referencevoltage REF TPS758A01 1.24 V Outputvoltagerange V 5 V REF V TPS75801 V +1V£ V £ 5.5V,1mA£ I £ 3A –3 +3 % OUT Accuracy(1) OUT IN OUT TPS758A01 V +1V£ V £ 5.5V,1mA£ I £ 3A –3 +3 % OUT IN OUT D V %/D V Lineregulation(1) V +1V£ V <5.5V 0.04 0.1 %/V OUT IN OUT IN D V %/D I Loadregulation 1mA£ I £ 3A 0.15 % OUT OUT OUT V Dropoutvoltage (2) V =3.2V,I =3A 150 300 mV DO IN OUT I Outputcurrentlimit V =0V 5.5 10 14 A CL OUT I Groundpincurrent 1mA£ I £ 3A 125 200 m A GND OUT I Shutdowncurrent(I ) V =0V 0.1 3 m A SHDN GND EN I FBpincurrent FB=1.5V –1 1 m A FB Power-supplyrejectionratio PSRR f=100Hz,V =2.8V,V =1.5V,I =3A 62 dB (ripplerejection) IN OUT OUT V Outputnoisevoltage BW=300Hzto50kHz,V =2.8V,V =1.5V 35 m V N IN OUT RMS V (HI) Enablehigh(enabled) 2 V EN V (LO) Enablelow(shutdown) 0.7 V EN V =V –1 1 m A EN IN I (HI) Enablepincurrent(enabled) EN V =0V –1 0 1 m A EN Outputdischargetransistorcurrent T =+25(cid:176) C,V =1.5V 10 25 mA J OUT Undervoltagelockout T =+25(cid:176) C,V rising 2.2 2.75 V J IN UVLO Hysteresis V falling 100 mV IN T Thermalshutdowntemperature +150 (cid:176) C SD T Operatingjunctiontemperature –40 +125 (cid:176) C J (1) MinimumV =V +V or2.8V,whicheverisgreater. IN OUT DO (2) V =V –0.1V.V isnotmeasuredfordeviceswithV <2.9VbecauseminimumV =2.8V. IN OUT(nom) DO OUT(nom) IN SubmitDocumentationFeedback 3

TPS75801,, TPS758A01 TPS75815, TPS75818 TPS75825, TPS75833 www.ti.com SLVS330F–JUNE2001–REVISEDAPRIL2007 FUNCTIONAL BLOCK DIAGRAMS ADJUSTABLEVOLTAGEVERSION IN OUT UVLO Current Sense ILIM SHUTDOWN R GND - + 1 FB EN UVLO R2 Thermal Shutdown V = 1.22 V REF Bandgap Reference FIXEDVOLTAGEVERSIONS IN OUT UVLO Current Sense ILIM SHUTDOWN R GND - + 1 EN UVLO R2 Thermal Shutdown V = 1.22 V REF Bandgap Reference Table1.TERMINALFUNCTIONS TPS758xx NAME PINNO. DESCRIPTION EN 1 Enableinput IN 2 Inputsupply GND 3 Ground OUT 4 Regulatedoutputvoltage;seeOutputCapacitorsectionforoutputcapacitorrequirements. FB/NC 5 Feedbackvoltageforadjustabledevice.ConnecttoGNDorleaveopenforfixedV devices. OUT 4 SubmitDocumentationFeedback

TPS75801,, TPS758A01 TPS75815, TPS75818 TPS75825, TPS75833 www.ti.com SLVS330F–JUNE2001–REVISEDAPRIL2007 TYPICAL CHARACTERISTICS TPS75833 TPS75815 OUTPUTVOLTAGE OUTPUTVOLTAGE vs vs OUTPUTCURRENT OUTPUTCURRENT 3.345 1.545 VI = 4.3 V VI = 2.8 V TJ = 25°C TJ = 25°C 3.330 1.530 V V − 3.315 − 1.515 e e g g a a olt olt V 3.3 V 1.5 ut ut p p ut ut O O − 3.285 − 1.485 O O V V 3.270 1.470 3.255 1.455 0 1 2 3 0 1 2 3 IO − Output Current − A IO − Output Current − A Figure1. Figure2. TPS75833 TPS75815 OUTPUTVOLTAGE OUTPUTVOLTAGE vs vs JUNCTIONTEMPERATURE JUNCTIONTEMPERATURE 3.345 1.545 VI = 4.3 V VI = 2.8 V 3.33 1.530 V V − 3.315 − 1.515 e e g g a a olt olt V 3.3 V 1.5 ut ut p p ut ut O O − 3.285 − 1.485 O O V V 3.270 1.470 3.255 1.455 −40 −25 10 5 20 35 50 65 80 95 110125 −40−25 −10 5 20 35 50 65 80 95 110 125 TJ − Junction Temperature − °C TJ − Junction Temperature − °C Figure3. Figure4. SubmitDocumentationFeedback 5

TPS75801,, TPS758A01 TPS75815, TPS75818 TPS75825, TPS75833 www.ti.com SLVS330F–JUNE2001–REVISEDAPRIL2007 TYPICAL CHARACTERISTICS (continued) TPS758xx TPS75833 GROUNDCURRENT POWER-SUPPLYRIPPLEREJECTION vs vs JUNCTIONTEMPERATURE FREQUENCY 150 90 VI = 5 V VI = 4.3 V IO = 3 A dB 80 Co = 100 m F n − TJ = 25°C o 70 ecti IO = 1 mA A 125 Rej 60 mnt − pple 50 urre y Ri 40 C pl und Sup 30 ro 100 er G w 20 Po IO = 3 A R − 10 R PS 0 75 −40 −25 −10 5 20 35 50 65 80 95 110 125 10 100 1k 10k 100k 1M 10M TJ − Junction Temperature − °C f − Frequency − Hz Figure5. Figure6. TPS75833 TPS75833 OUTPUTSPECTRALNOISEDENSITY OUTPUTIMPEDANCE vs vs FREQUENCY FREQUENCY 2.5 100 mV/Hznsity − 2 VVCTJIOo = === 4 213.530.3° 0CV Vm F Wnce − 110 VCITOJIo == == 14 21 .5m30° 0CVA m F IO = 1 mA e De 1.5 IO = 3 A peda 0.1 s m Noi IO = 1 mA ut I 0.01 ctral 1 Outp IO = 3 A pe − 0.001 S o ut z p 0.5 ut O 0.0001 0 0.00001 1100 100 1k 10k 100k 10 100 1k 10k 100k 1M 10M f − Frequency − Hz f − Frequency − Hz Figure7. Figure8. 6 SubmitDocumentationFeedback

TPS75801,, TPS758A01 TPS75815, TPS75818 TPS75825, TPS75833 www.ti.com SLVS330F–JUNE2001–REVISEDAPRIL2007 TYPICAL CHARACTERISTICS (continued) TPS75801 TPS75833 DROPOUTVOLTAGE DROPOUTVOLTAGE vs vs INPUTVOLTAGE JUNCTIONTEMPERATURE 250 250 IO = 3 A VO= 3.3 V TJ = 125°C IO = 3 A 200 V 200 V m m ge − TJ = 25°C age − olta 150 Volt 150 ut V TJ = −40°C out o p p o − Dro 100 − Dr 100 O O VD VD 50 50 0 0 2.5 3 3.5 4 4.5 5 −40 −25 −10 5 20 35 50 65 80 95 110 125 VI − Input Voltage − V TJ − Junction Temperature − °C Figure9. Figure10. MINIMUMREQUIREDINPUTVOLTAGE vs TPS75815 OUTPUTVOLTAGE LINETRANSIENTRESPONSE 4 V = 1.5 V IO = 3 A mV IO= 3 A − V TJ = 125°C e − 50 COo= 100m F Voltage TJ = 25°C ut Voltag 0 nput TJ = −40°C Outp −50 equired I 2.83 hange in −100 − V R C e mum V − O 3.8Voltag Mini D put − VI 2.8− In VI 2 0 50 100 150 200 250 300 350 400 450 500 1.5 1.75 2 2.25 2.5 2.75 3 3.25 3.5 t − Time −m s VO − Output Voltage − V Figure11. Figure12. SubmitDocumentationFeedback 7

TPS75801,, TPS758A01 TPS75815, TPS75818 TPS75825, TPS75833 www.ti.com SLVS330F–JUNE2001–REVISEDAPRIL2007 TYPICAL CHARACTERISTICS (continued) TPS75815 TPS75833 LOADTRANSIENTRESPONSE LINETRANSIENTRESPONSE 150 100 V Output Voltage − m 150000 VCOo == 110.50 Vm F Output Voltage − mV −55000 VICOOo=== 3 13 A0.30 Vm F nge in −50 nge in −100 − Cha −100 ddti(cid:1)0.7(cid:1)5sA A − Cha ge − V DVO−150 3 Current − DV O 54..33nput Volta 0 ut − I p ut VI O − 0 50 100 150 200 250 300 350 400 450 500 0 20 40 60 t 8−0 Tim10e0 − 1m 2s0 140 160 180 200 I O t − Time −m s Figure13. Figure14. TPS75833 TPS75833 OUTPUTVOLTAGEANDENABLEVOLTAGE LOADTRANSIENTRESPONSE TIME(START-UP) age − mV 200 VCOo == 130.30 Vm F oltage − V 3.3 VITOJI === 1420.53 °m CVA Volt 100 ut V put utp ut 0 O O − e in −100 ddti(cid:1)0.7(cid:1)5sA VO 0 g A an − − ChO 4 urrent ge − V 4.3 V 2 C a 0 D ut olt p V 0 Out ble I − O Ena 0 20 40 60 80 100 120 140 160 180 200 0 0.2 0.4 0.6 0.8 1 t − Time − m s t − Time (Start-Up) − ms Figure15. Figure16. 8 SubmitDocumentationFeedback

TPS75801,, TPS758A01 TPS75815, TPS75818 TPS75825, TPS75833 www.ti.com SLVS330F–JUNE2001–REVISEDAPRIL2007 To Load VI IN OUT + Co RL EN GND ESR Figure17.TestCircuitforTypicalRegionsofStability(Figure18andFigure19)(FixedOutputOptions) TYPICALREGIONOFSTABILITY TYPICALREGIONOFSTABILITY EQUIVALENTSERIESRESISTANCE(A) EQUIVALENTSERIESRESISTANCE(A) vs vs OUTPUTCURRENT OUTPUTCURRENT 10 10 Co = 680 m F Co = 47 m F Wce − TJ = 25°C We − TJ = 25°C n c a n Resist 1 esista 1 es Region of Stability s R Region of Stability Seri erie ent nt S val ale 0.2 qui 0.1 uiv E q SR − R − E Region of Instability E S E 0.015 Region of Instability 0.01 0.01 0 1 2 3 0 1 2 3 IO − Output Current − A IO − Output Current − A Figure18. Figure19. A. Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, anyseriesresistanceaddedexternally,andprintedwiringboard(PWB)traceresistancetoC OUT. SubmitDocumentationFeedback 9

TPS75801,, TPS758A01 TPS75815, TPS75818 TPS75825, TPS75833 www.ti.com SLVS330F–JUNE2001–REVISEDAPRIL2007 DETAILED DESCRIPTION The TPS758xx family includes four fixed-output voltage regulators (1.5V, 1.8V, 2.5V, and 3.3V), and an adjustableregulator,theTPS75801(adjustablefrom1.22Vto5V).Thebandgapvoltageistypically1.22V. Pin Functions Enable(EN) The EN terminal is an input which enables or shuts down the device. If EN is a low voltage level (< 0.7V), the device will be in shutdown or sleep mode. When EN goes to a high voltage level (> 2V), the device will be enabled. Feedback(FB) FBisan input terminal used for the adjustable-output option and must be connected to the output terminal either directly, in order to generate the minimum output voltage of 1.22V, or through an external feedback resistor divider for other output voltages. The FB connection should be as short as possible. It is essential to route the terminal so that it minimizes/avoids noise pickup. Adding RC networks between the FB terminal and V to OUT filternoiseisnotrecommendedbecauseitmaycausetheregulatortooscillate. InputVoltage(IN) TheV terminalisaninputtotheregulator. IN OutputVoltage(OUTPUT) TheV terminalisanoutputfromtheregulator. OUTPUT APPLICATION INFORMATION Programming the TPS75801 Adjustable LDO Regulator The output voltage of the TPS75801 adjustable regulator is programmed using an external resistor divider as showninFigure20.Theoutputvoltageiscalculatedusing: (cid:4) R1(cid:5) VO(cid:3)VREF(cid:1) 1(cid:2)R2 (1) Where: V =1.224Vtyp(theinternalreferencevoltage). REF Resistors R1 and R2 should be chosen for approximately 40m A divider current. Lower value resistors can be used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage currents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 30.1kW tosetthedividercurrentat40m AandthencalculateR1using: (cid:4) V (cid:5) R1(cid:3) O (cid:2)1 (cid:1)R2 V REF (2) 10 SubmitDocumentationFeedback

TPS75801,, TPS758A01 TPS75815, TPS75818 TPS75825, TPS75833 www.ti.com SLVS330F–JUNE2001–REVISEDAPRIL2007 APPLICATION INFORMATION (continued) TPS75801 OUTPUT VOLTAGE PROGRAMMING GUIDE VI IN 1 m F OUTPUT R1 R2 UNIT VOLTAGE EN OUT VO 2.5 V 31.6 30.1 kW ≥ 2 V ≤ 0.7 V R1 Co 3.3 V 51 30.1 kW FB 3.6 V 58.3 30.1 kW GND R2 Figure20.TPS75801AdjustableLDORegulatorProgramming Regulator Protection The TPS758xx PMOS-pass transistor has a built-in back diode that conducts reverse currents when the input voltage drops below the output voltage (for example, during power down). Current is conducted from the output to the input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be appropriate. The TPS758xx also features internal current limiting and thermal protection. During normal operation, the TPS758xx limits output current to approximately 10A. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds –150(cid:176) C (typ), thermal-protection circuitry shuts it down. Once the device has cooled below +130(cid:176) C(typ),regulatoroperationresumes. Input Capacitor For a typical application, a ceramic input bypass capacitor (0.22m F to 1m F) is recommended to ensure device stability. This capacitor should be as close as possible to the input pin. Due to the impedance of the input supply, large transient currents will cause the input voltage to droop. If this droop causes the input voltage to drop below the UVLO threshold, the device will turn off. Therefore, it is recommended that a larger capacitor be placed in parallel with the ceramic bypass capacitor at the regulator input. The size of this capacitor depends on the output current, response time of the main power supply, and the distance of the main power supply to the regulator. At a minimum, the capacitor should be sized to ensure that the input voltage does not drop below the minimumUVLOthresholdvoltageduringnormaloperatingconditions. Output Capacitor As with most LDO regulators, the TPS758xx requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance value is 47m F with an ESR (equivalent series resistance) of at least 200mW . As shown in Figure 21, most capacitor and ESR combinations with a product of 47–6 x 0.2 = 9.4–6 or larger will be stable, provided the capacitor value is at least 47m F. Solid tantalum electrolytic and aluminum electrolytic capacitors are all suitable, provided they meet the requirements describedinthissection.Largercapacitorsprovideawiderrangeofstabilityandbetterloadtransientresponse. This information and the ESR graphs shown in Figure 18, Figure 19, and Figure 21, is included to assist in selection of suitable capacitance for the user's application. When necessary to achieve low height requirements with high output current and/or high load capacitance, several higher ESR capacitors can be used in parallel to meettheseguidelines. SubmitDocumentationFeedback 11

TPS75801,, TPS758A01 TPS75815, TPS75818 TPS75825, TPS75833 www.ti.com SLVS330F–JUNE2001–REVISEDAPRIL2007 APPLICATION INFORMATION (continued) 1000 Region of Stability F m− e c n a cit ESR min x Co = Constant pa 100 a C ut p ut 47 O Region of Instability Y = ESRmin x Co 10 0.01 0.1 0.2 ESR − Equivalent Series Resistance − W Figure21.OutputCapacitancevsEquivalentSeriesResistance THERMAL INFORMATION The amount of heat that an LDO linear regulator generates is directly proportional to the amount of power it dissipates during operation. All integrated circuits have a maximum allowable junction temperature (T max) J above which normal operation is not assured. A system designer must design the operating environment so that the operating junction temperature (T ) does not exceed the maximum junction temperature (T max). The two J J main environmental variables that a designer can use to improve thermal performance are air flow and external heatsinks.Thepurposeofthisinformationisto aid the designer in determining the proper operating environment foralinearregulatorthatisoperatingataspecificpowerlevel. Ingeneral,themaximumexpectedpower(P )consumedbyalinearregulatoriscomputedas: D(max) PDmax(cid:4)(cid:5)VI(avg)(cid:3)VO(avg)(cid:6)(cid:1)IO(avg)(cid:2)VI(avg)(cid:1)I(Q) (3) Where: • V istheaverageinputvoltage. I(avg) • V istheaverageoutputvoltage. O(avg) • I istheaverageoutputcurrent. O(avg) • I isthequiescentcurrent. (Q) For most TI LDO regulators, the quiescent current is insignificant compared to the average output current; therefore, the term V · I can be neglected. The operating junction temperature is computed by adding the I(avg) (Q) ambient temperature (T ) and the increase in temperature due to the regulator power dissipation. The A temperature rise is computed by multiplying the maximum expected power dissipation by the sum of the thermal resistances between the junction and the case (R ), the case to heatsink (R ), and the heatsink to ambient Q JC Q CS (R ). Thermal resistances are measures of how effectively an object dissipates heat. Typically, the larger the Q SA device,themoresurfaceareaavailableforpowerdissipationandthelowertheobject'sthermalresistance. Figure 22 illustrates these thermal resistances for (a) a TO-220 package attached to a heatsink, and (b) a TO-263packagemountedonaJEDECHigh-Kboard. 12 SubmitDocumentationFeedback

TPS75801,, TPS758A01 TPS75815, TPS75818 TPS75825, TPS75833 www.ti.com SLVS330F–JUNE2001–REVISEDAPRIL2007 THERMAL INFORMATION (continued) C B A TJ A Rq JC A B B TC Rq CS C Rq SA C TA TO−220 Package TO−263 Package (a) (b) Figure22.ThermalResistances Equation4summarizesthecomputation: TJ(cid:2)TA(cid:1)PDmax(cid:3)(cid:4)R(cid:1)JC(cid:1)R(cid:1)CS(cid:1)R(cid:1)SA(cid:5) (4) The R is specific to each regulator as determined by its package, lead frame, and die size provided in the Q JC regulator's data sheet. The R is a function of the type and size of heatsink. For example, black body radiator Q SA typeheatsinks,liketheoneattachedtothe TO-220 package in Figure 22(a), can have R values ranging from Q CS 5(cid:176) C/W for very large heatsinks to 50(cid:176) C/W for very small heatsinks. The R is a function of how the package is Q CS attached to the heatsink. For example, if a thermal compound is used to attach a heatsink to a TO-220 package, R of1(cid:176) C/Wisreasonable. Q CS Even if no external black body radiator type heatsink is attached to the package, the board on which the regulator is mounted will provide some heatsinking through the pin solder connections. Some packages, like the TO-263 and TI's TSSOP PowerPAD™ packages, use a copper plane underneath the package or the circuit board ground plane for additional heatsinking to improve their thermal performance. Computer-aided thermal modeling can be used to compute very accurate approximations of integrated circuit thermal performance in different operating environments (for example, different types of circuit boards, different types and sizes of heatsinks, different air flows, etc.). Using these models, the three thermal resistances can be combined into one thermal resistance between junction and ambient (R ). This R is valid only for the specific operating Q JA Q JA environmentusedinthecomputermodel. Equation4simplifiesintoEquation5: T (cid:2)T (cid:1)P max(cid:3)R J A D (cid:1)JA (5) RearrangingEquation5resultsinEquation6: T (cid:1)T R (cid:2) J A (cid:1)JA P max D (6) Using Equation 5 and the computer model generated curves shown in Figure 23 and Figure 26, a designer can quickly compute the required heatsink thermal resistance/board area for a given ambient temperature, power dissipation,andoperatingenvironment. SubmitDocumentationFeedback 13

TPS75801,, TPS758A01 TPS75815, TPS75818 TPS75825, TPS75833 www.ti.com SLVS330F–JUNE2001–REVISEDAPRIL2007 THERMAL INFORMATION (continued) TO-220 Power Dissipation The TO-220 package provides an effective means of managing power dissipation in through-hole applications. The TO-220 package dimensions are provided in the mechanical drawings at the end of this data sheet. A heatsinkcanbeusedwiththeTO-220packagetoeffectivelylowerthejunction-to-ambientthermalresistance. To illustrate, the TPS75825 in a TO-220 package was chosen. For this example, the average input voltage is 3.3V, the average output voltage is 2.5V, the average output current is 3A, the ambient temperature +55(cid:176) C, the air flow is 150 LFM, and the operating environment is the same as documented below. Neglecting the quiescent current,themaximumaveragepoweris: P max(cid:3)(3.3(cid:2)2.5)V(cid:1)3A(cid:3)2.4W D (7) SubstitutingT maxforT inEquation6resultsinEquation8: J J (125(cid:1)55)(cid:1)C R max(cid:2) (cid:2)29(cid:1)C(cid:3)W (cid:1)JA 2.4W (8) From Figure 23, R vs Heatsink Thermal Resistance, a heatsink with R = 22(cid:176) C/W is required to dissipate Q JA Q SA 2.4W. The model operating environment used in the computer model to construct Figure 23 consisted of a standard JEDEC High-K board (2S2P) with a 1-ounce internal copper plane and ground plane. Since the package pins were soldered to the board, 450mm2 of the board was modeled as a heatsink. Figure 24 shows thesideviewoftheoperatingenvironmentusedinthecomputermodel. 65 Natural Convection W 55 C/ ° − Air Flow = 150 LFM e 45 nc Air Flow = 250 LFM a st Air Flow = 500 LFM esi 35 R al m er 25 h T − A J 15 Rq No Heatsink 5 25 20 15 10 5 0 Rq SA − Heatsink Thermal Resistance − °C/W Figure23.ThermalResistancevsHeatsinkThermalResistance 14 SubmitDocumentationFeedback

TPS75801,, TPS758A01 TPS75815, TPS75818 TPS75825, TPS75833 www.ti.com SLVS330F–JUNE2001–REVISEDAPRIL2007 THERMAL INFORMATION (continued) 0.21 mm 0.21 mm 1 oz. Copper 1 oz. Copper Power Plane Ground Plane Figure24.TO-220ThermalResistance From the data in Figure 23 and rearranging Equation 6, the maximum power dissipation for a different heatsink R andaspecificambienttemperaturecanbecomputed(seeFigure25). Q SA 10 TA = 55°C W Air Flow = 500 LFM − mit Air Flow = 250 LFM Li n atio Air Flow = 150 LFM p si s Di er w o P − D P Natural Convection No Heatsink 1 20 10 0 Rq SA − Heatsink Thermal Resistance − °C/W Figure25.PowerDissipationvsHeatsinkThermalResistance SubmitDocumentationFeedback 15

TPS75801,, TPS758A01 TPS75815, TPS75818 TPS75825, TPS75833 www.ti.com SLVS330F–JUNE2001–REVISEDAPRIL2007 THERMAL INFORMATION (continued) TO-263 Power Dissipation The TO-263 package provides an effective means of managing power dissipation in surface-mount applications. The TO-263 package dimensions are provided in the mechanical drawings at the end of the data sheet. The addition of a copper plane directly underneath the TO-263 package enhances the thermal performance of the package. To illustrate, the TPS75825 in a TO-263 package was chosen. For this example, the average input voltage is 3.3V, the average output voltage is 2.5V, the average output current is 3A, the ambient temperature +55(cid:176) C, the air flow is 150 LFM, and the operating environment is the same as documented below. Neglecting the quiescent current,themaximumaveragepoweris: P max(cid:3)(3.3(cid:2)2.5)V(cid:1)3A(cid:3)2.4W D (9) SubstitutingT maxforT inEquation6resultsinEquation10: J J (125(cid:1)55)(cid:1)C R max(cid:2) (cid:2)29(cid:1)C(cid:3)W (cid:1)JA 2.4W (10) From Figure 26, R vs Copper Heatsink Area, the ground plane needs to be 2cm2 for the part to dissipate Q JA 2.4W. The model operating environment used in the computer model to construct Figure 26 consisted of a standard JEDEC High-K board (2S2P) with a 1-ounce internal copper plane and ground plane. The package is soldered to a 2-ounce copper pad. The pad is tied through thermal vias to the 1-ounce ground plane. Figure 27 showsthesideviewoftheoperatingenvironmentusedinthecomputermodel. 40 No Air Flow W C/ 35 ° − e 150 LFM c n a st 30 si Re 250 LFM al m er 25 h T − A J Rq 20 15 0 0.01 0.1 1 10 100 Copper Heatsink Area − cm2 Figure26.ThermalResistancevsCopperHeatsinkArea 16 SubmitDocumentationFeedback

TPS75801,, TPS758A01 TPS75815, TPS75818 TPS75825, TPS75833 www.ti.com SLVS330F–JUNE2001–REVISEDAPRIL2007 THERMAL INFORMATION (continued) 2 oz. Copper Solder Pad With 25 Thermal Vias 1 oz. Copper Power Plane 1 oz. Copper Ground Plane Thermal Vias, 0.3 mm Diameter, 1.5 mm Pitch Figure27.TO-263ThermalResistance The maximum power dissipation for a different ground plane area and a specific ambient temperature can be computedfromthedatainFigure26andfromrearrangingEquation6(seeFigure28). 5 TA = 55°C W − n atio 4 250 LFM p si s Di er 150 LFM w 3 o P m u m xi No Air Flow a M 2 − D P 1 0 0.01 0.1 1 10 100 Copper Heatsink Area − cm2 Figure28.MaximumPowerDissipationvsCopperHeatsinkArea SubmitDocumentationFeedback 17

PACKAGE OPTION ADDENDUM www.ti.com 17-Feb-2019 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS75801KC ACTIVE TO-220 KC 5 50 Green (RoHS CU SN N / A for Pkg Type -40 to 85 75801 & no Sb/Br) TPS75801KTTR ACTIVE DDPAK/ KTT 5 500 Green (RoHS CU SN Level-2-260C-1 YEAR -40 to 85 75801 TO-263 & no Sb/Br) TPS75801KTTRG3 ACTIVE DDPAK/ KTT 5 500 Green (RoHS CU SN Level-2-260C-1 YEAR -40 to 85 75801 TO-263 & no Sb/Br) TPS75801KTTTG3 OBSOLETE DDPAK/ KTT 5 TBD Call TI Call TI -40 to 85 75801 TO-263 TPS75815KC ACTIVE TO-220 KC 5 50 Green (RoHS CU SN N / A for Pkg Type -40 to 85 75815 & no Sb/Br) TPS75815KTTR ACTIVE DDPAK/ KTT 5 500 Green (RoHS CU SN Level-2-260C-1 YEAR -40 to 85 75815 TO-263 & no Sb/Br) TPS75818KC ACTIVE TO-220 KC 5 50 Green (RoHS CU SN N / A for Pkg Type -40 to 85 75818 & no Sb/Br) TPS75818KTTR ACTIVE DDPAK/ KTT 5 500 Green (RoHS CU SN Level-2-260C-1 YEAR -40 to 85 75818 TO-263 & no Sb/Br) TPS75825KC ACTIVE TO-220 KC 5 50 Green (RoHS CU SN N / A for Pkg Type -40 to 85 75825 & no Sb/Br) TPS75825KTTR ACTIVE DDPAK/ KTT 5 500 Green (RoHS CU SN Level-2-260C-1 YEAR -40 to 85 75825 TO-263 & no Sb/Br) TPS75825KTTRG3 ACTIVE DDPAK/ KTT 5 500 Green (RoHS CU SN Level-2-260C-1 YEAR -40 to 85 75825 TO-263 & no Sb/Br) TPS75825KTTTG3 OBSOLETE DDPAK/ KTT 5 TBD Call TI Call TI 75825 TO-263 TPS75833KC ACTIVE TO-220 KC 5 50 Green (RoHS CU SN N / A for Pkg Type -40 to 85 75833 & no Sb/Br) TPS75833KCG3 ACTIVE TO-220 KC 5 50 Green (RoHS CU SN N / A for Pkg Type -40 to 85 75833 & no Sb/Br) TPS75833KTTR ACTIVE DDPAK/ KTT 5 500 Green (RoHS CU SN Level-2-260C-1 YEAR -40 to 85 75833 TO-263 & no Sb/Br) TPS758A01KTTR ACTIVE DDPAK/ KTT 5 500 Green (RoHS CU SN Level-2-260C-1 YEAR -40 to 125 758A01 TO-263 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 17-Feb-2019 LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 16-Feb-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS75801KTTR DDPAK/ KTT 5 500 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 TO-263 TPS75815KTTR DDPAK/ KTT 5 500 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 TO-263 TPS75818KTTR DDPAK/ KTT 5 500 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 TO-263 TPS75825KTTR DDPAK/ KTT 5 500 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 TO-263 TPS75833KTTR DDPAK/ KTT 5 500 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 TO-263 TPS758A01KTTR DDPAK/ KTT 5 500 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 TO-263 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 16-Feb-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS75801KTTR DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 TPS75815KTTR DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 TPS75818KTTR DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 TPS75825KTTR DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 TPS75833KTTR DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 TPS758A01KTTR DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 PackMaterials-Page2

PACKAGE OUTLINE KC0005A TO-220 - 16.51 mm max height SCALE 0.850 TO-220 4.83 B 4.06 10.67 1.40 AAAAA 8.89 3.05 9.65 1.14 6.86 2.54 6.86 (6.275) 5.69 3.71-3.96 OPTIONAL 12.88 CHAMFER 10.08 16.51 2X (R1) MAX OPTIONAL 9.25 7.67 (4.25) C PIN 1 ID (OPTIONAL) NOTE 3 14.73 12.29 1 5 0.61 1.02 5X 0.30 0.64 3.05 0.25 C A B 2.03 4X 1.7 6.8 1 5 4215009/A 01/2017 NOTES: 1. All controlling linear dimensions are in inches. Dimensions in brackets are in millimeters. Any dimension in brackets or parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Shape may vary per different assembly sites. www.ti.com

EXAMPLE BOARD LAYOUT KC0005A TO-220 - 16.51 mm max height TO-220 4X (1.45) PKG 0.07 MAX METAL 0.07 MAX ALL AROUND (1.45) TYP ALL AROUND PKG (2) 4X (2) 1 5 (R0.05) TYP SOLDER MASK FULL R (1.7) TYP OPENING, TYP TYP 5X ( 1.2) (6.8) LAND PATTERN NON-SOLDER MASK DEFINED SCALE:12X 4215009/A 01/2017 www.ti.com

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