Product Sample & Technical Tools & Support & Folder Buy Documents Software Community TPS74701-Q1 SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 TPS74701-Q1 500-mA Low-Dropout Linear Regulator With Programmable Soft Start 1 Features 3 Description • QualifiedforAutomotiveApplications TheTPS74701-Q1low-dropout(LDO)linearregulator 1 provides an easy-to-use, robust power management • AEC-Q100TestGuidanceWiththeFollowing: solution for a wide variety of applications. User- – DeviceTemperatureGrade1: –40°Cto125°C programmable soft start minimizes stress on the input – DeviceHBMESDClassificationLevel2 power source by reducing capacitive inrush current on start-up. The soft start is monotonic and well- – DeviceCDMESDClassificationC4A suited for powering many different types of • VOUTRange:0.8Vto3.6V processors and ASICs. The enable input and power • Ultra-LowV Range:0.8Vto5.5V good output allow easy sequencing with external IN regulators.Thiscompleteflexibilitypermitstheuserto • V Range:2.7Vto5.5V BIAS configure a solution that meets the sequencing • LowDropout:50mVTypicalat500mA, requirements of FPGAs, DSPs, and other VBIAS=5V applicationswithspecialstart-uprequirements. • PowerGood(PG)OutputAllowsSupply A precision reference and error amplifier deliver 2% MonitoringorProvidesaSequencingSignalfor accuracy over load, line, temperature, and process. OtherSupplies The device is stable with any type of capacitor • 2%AccuracyOverLine,Load,andTemperature greater than or equal to 2.2 µF, and is fully specified • ProgrammableSoftStartProvidesLinearVoltage from –40°C to 125°C. The TPS74701-Q1 is offered in a small 3-mm × 3-mm 10-pin VSON package for Start-Up compatibilitywiththeTPS74801-Q1. • V PermitsLowV OperationWithGood BIAS IN TransientResponse DeviceInformation(1) • StableWithAnyOutputCapacitor≥ 2.2 µF PARTNUMBER PACKAGE BODYSIZE(NOM) • AvailableinaSmall3-mm× 3-mm×1-mm10-Pin TPS74701-Q1 VSON(10) 3.00mm×3.00mm VSONPackage (1) For all available packages, see the orderable addendum at theendofthedatasheet. 2 Applications • FPGAApplications • DSPCoreandI/OVoltages • Post-RegulationApplications • ApplicationsWithSpecialStart-UpTimeor SequencingRequirements • Hot-SwapandInrushControls TurnonResponse TypicalApplicationCircuit(Adjustable) C = 0nF VIN IN PG SS C = 560pF CIN BIAS R3 SS EN TPS74701-Q1OUT VOUT 0.5V/div CSS= 5600pF VOUT VBIAS SS R1 C C GND FB OUT BIAS CSS R2 3.8V V EN Copyright © 2016,Texas Instruments Incorporated 1V/div 1.8V Time (2ms/div) 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

TPS74701-Q1 SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 www.ti.com Table of Contents 1 Features.................................................................. 1 8 ApplicationandImplementation........................ 15 2 Applications........................................................... 1 8.1 ApplicationInformation............................................15 3 Description............................................................. 1 8.2 TypicalApplication..................................................15 4 RevisionHistory..................................................... 2 9 PowerSupplyRecommendations...................... 19 5 PinConfigurationandFunctions......................... 3 10 Layout................................................................... 19 6 Specifications......................................................... 4 10.1 LayoutGuidelines.................................................19 6.1 AbsoluteMaximumRatings......................................4 10.2 LayoutExample....................................................19 6.2 ESDRatings..............................................................4 10.3 PowerDissipation.................................................19 6.3 RecommendedOperatingConditions.......................4 11 DeviceandDocumentationSupport................. 23 6.4 ThermalInformation..................................................5 11.1 DeviceSupport......................................................23 6.5 ElectricalCharacteristics...........................................5 11.2 ReceivingNotificationofDocumentationUpdates23 6.6 TypicalCharacteristics..............................................7 11.3 CommunityResources..........................................23 7 DetailedDescription............................................ 11 11.4 Trademarks...........................................................23 7.1 Overview.................................................................11 11.5 ElectrostaticDischargeCaution............................23 7.2 FunctionalBlockDiagram.......................................11 11.6 Glossary................................................................23 7.3 FeatureDescription.................................................11 12 Mechanical,Packaging,andOrderable Information........................................................... 23 7.4 DeviceFunctionalModes........................................14 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionA(September2010)toRevisionB Page • AddedESDRatingstable,RecommendedOperatingConditionstable,FeatureDescriptionsection,Device FunctionalModes,ApplicationandImplementationsection,PowerSupplyRecommendationssection,Layout section,DeviceandDocumentationSupportsection,andMechanical,Packaging,andOrderableInformationsection......1 • DeletedOrderingInformationtable;seePOAattheendofthedatasheet........................................................................... 1 2 SubmitDocumentationFeedback Copyright©2010–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS74701-Q1

TPS74701-Q1 www.ti.com SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 5 Pin Configuration and Functions DRCPackage 10-PinVSON TopView IN 1 10 OUT IN 2 9 OUT PG 3 Thermal 8 FB Pad BIAS 4 7 SS EN 5 6 GND Not to scale PinFunctions PIN I/O DESCRIPTION NAME NO. BIAS 4 I Biasinputvoltageforerroramplifier,reference,andinternalcontrolcircuits. Enablepin.Drivingthispinhighenablestheregulator.Drivingthispinlowputstheregulator EN 5 I intoshutdownmode.Thispinmustnotbeleftunconnected. Feedbackpin.Thefeedbackconnectiontothecentertapofanexternalresistordivider FB 8 I networkthatsetstheoutputvoltage.Thispinmustnotbeleftfloating. GND 6 — Ground IN 1,2 I Inputtothedevice. Regulatedoutputvoltage.Asmallcapacitor(totaltypicalcapacitance≥2.2µF,ceramic)is OUT 9,10 O neededfromthispintogroundtoassurestability. PowerGoodpin.Anopen-drain,active-highoutputthatindicatesthestatusofV .When OUT V exceedsthePGtripthreshold,thePGpingoesintoahigh-impedancestate.When OUT V isbelowthisthresholdthepinisdriventoalow-impedancestate.Apullupresistorfrom PG 3 O OUT 10kΩto1MΩmustbeconnectedfromthispintoasupplyofupto5.5V.Thesupplycanbe higherthantheinputvoltage.Alternatively,thePGpincanbeleftunconnectedifoutput monitoringisnotnecessary. Soft-Startpin.Acapacitorconnectedonthispintogroundsetsthestart-uptime.Ifthispinis SS 7 — leftunconnected,theregulatoroutputsoft-startramptimeistypically200µs. ThermalPad — — Mustbesolderedtothegroundplaneforincreasedthermalperformance. Copyright©2010–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:TPS74701-Q1

TPS74701-Q1 SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings AtT =–40°Cto125°C,unlessotherwisenoted.AllvoltagesarewithrespecttoGND.(1) J MIN MAX UNIT V ,V Inputvoltage –0.3 6 V IN BIAS V Enablevoltage –0.3 6 V EN V Powergoodvoltage –0.3 6 V PG V Soft-startvoltage –0.3 6 V SS V Feedbackvoltage –0.3 6 V FB V Outputvoltage –0.3 V +0.3 V OUT IN I PGsinkcurrent 0 1.5 mA PG I Maximumoutputcurrent Internallylimited OUT Outputshort-circuitduration Indefinite P Continuoustotalpowerdissipation SeeThermalInformation DISS T Operatingjunctiontemperature –40 125 °C J T Storagetemperature –55 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings onlyandfunctionaloperationofthedeviceattheseconditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsfor extendedperiodsmayaffectdevicereliability. 6.2 ESD Ratings VALUE UNIT Human-bodymodel(HBM),perAECQ100-002(1) ±2000 V Electrostaticdischarge V (ESD) Charged-devicemodel(CDM),perAECQ100-011 ±500 (1) AECQ100-002indicatesthatHBMstressingshallbeinaccordancewiththeANSI/ESDA/JEDECJS-001specification. 6.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V Inputsupplyvoltage V +V (VIN) 5.5 V IN OUT DO V Enablesupplyvoltage 0 V V EN IN V (1) BIASsupplyvoltage V +V (VBIAS)(2) 5.5 V BIAS OUT DO V Outputvoltage 0.8 3.3 V OUT I Outputcurrent 0 500 mA OUT C Outputcapacitor 2.2 µF OUT C (3) Inputcapacitor 1 µF IN C BIAScapacitor 0.1 µF BIAS T Operatingjunctiontemperature –40 125 °C J (1) BIASsupplyisrequiredwhenVINisbelowVOUT+1.62V. (2) V hasaminimumvoltageof2.7VorV +V (VBIAS),whicheverishigher. BIAS OUT DO (3) IfV andV areconnectedtothesamesupply,therecommendedminimumcapacitorforthesupplyis4.7µF. IN BIAS 4 SubmitDocumentationFeedback Copyright©2010–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS74701-Q1

TPS74701-Q1 www.ti.com SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 6.4 Thermal Information TPS74701-Q1 THERMALMETRIC(1)(2) DRC(VSON) UNIT 10PINS R Junction-to-ambientthermalresistance 50.4 °C/W θJA R Junction-to-case(top)thermalresistance 70 °C/W θJC(top) R Junction-to-boardthermalresistance 17.7 °C/W θJB ψ Junction-to-topcharacterizationparameter 0.7 °C/W JT ψ Junction-to-boardcharacterizationparameter 16.9 °C/W JB R Junction-to-case(bottom)thermalresistance 5.9 °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. (2) ForthermalestimatesofthisdevicebasedonPCBcopperarea,seetheTIPCBThermalCalculator. 6.5 Electrical Characteristics AtV =1.1V,V =V +0.3V,C =0.1µF,C =C =10µF,C =1nF,I =50mA,V =5V,andT =–40°C EN IN OUT BIAS IN OUT NR OUT BIAS J to125°C,unlessotherwisenoted.TypicalvaluesareatT =25°C. J PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V Inputvoltagerange V +V 5.5 V IN OUT DO V Biaspinvoltagerange 2.7 5.5 V BIAS V Internalreference(Adj.) T =25°C 0.796 0.8 0.804 V REF J Outputvoltagerange V =5V,I =500mA V 3.6 V IN OUT REF VOUT Accuracy(1) 2.97V≤VBIAS≤5.5V, –2% ±0.5% 2% 50mA≤I ≤500mA OUT V /V Lineregulation V +0.3≤V ≤5.5V 0.03 %/V OUT IN OUT(NOM) IN V /I Loadregulation 50mA≤I ≤500mA 0.09 %/A OUT OUT OUT VDO VINdropoutvoltage(2) IVOBUIATS=–5V00OUmTA(N,OM)≥1.62V(3) 50 120 mV V dropoutvoltage(2) I =500mA,V =V 1.31 1.39 V BIAS OUT IN BIAS I Currentlimit V =80%×V 800 1350 mA CL OUT OUT(NOM) I Biaspincurrent 1 2 mA BIAS I Shutdownsupplycurrent(I ) V ≤0.4V 1 50 µA SHDN GND EN I Feedbackpincurrent –1 0.15 1 µA FB 1kHz,I =500mA, OUT 60 Power-supplyrejection VIN=1.8V,VOUT=1.5V dB (VINtoVOUT) 300kHz,IOUT=500mA, 30 V =1.8V,V =1.5V IN OUT PSRR 1kHz,I =500mA, OUT 50 Power-supplyrejection VIN=1.8V,VOUT=1.5V dB (VBIAStoVOUT) 300kHz,IOUT=500mA, 30 V =1.8V,V =1.5V IN OUT 100Hzto100kHz, Noise Outputnoisevoltage 25×V µV I =500mA,C =0.001µF OUT RMS OUT SS t Minimumstart-uptime R forI =1A,C =open 200 µs STR LOAD OUT SS I Soft-startchargingcurrent V =0.4V 440 nA SS SS V Enableinputhighlevel 1.1 5.5 V EN,HI V Enableinputlowlevel 0 0.4 V EN,LO V Enablepinhysteresis 50 mV EN,HYS V Enablepindeglitchtime 20 µs EN,DG I Enablepincurrent V =5V 0.1 1 µA EN EN (1) Adjustabledevicestestedat0.8V;resistortoleranceisnottakenintoaccount. (2) DropoutisdefinedasthevoltagefromV toV whenV is3%belownominal. IN OUT OUT (3) 1.62VisatestconditionofthisdeviceandcanbeadjustedbyreferringtoFigure6. Copyright©2010–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:TPS74701-Q1

TPS74701-Q1 SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 www.ti.com Electrical Characteristics (continued) AtV =1.1V,V =V +0.3V,C =0.1µF,C =C =10µF,C =1nF,I =50mA,V =5V,andT =–40°C EN IN OUT BIAS IN OUT NR OUT BIAS J to125°C,unlessotherwisenoted.TypicalvaluesareatT =25°C. J PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V PGtripthreshold V decreasing 85 90 94 %V IT OUT OUT V PGtriphysteresis 3 %V HYS OUT V PGoutputlowvoltage I =1mA(sinking),V <V 0.3 V PG,LO PG OUT IT I PGleakagecurrent V =5.25V,V >V 0.1 1 µA PG,LKG PG OUT IT T Operatingjunctiontemperature –40 125 °C J Shutdown,temperatureincreasing 165 T Thermalshutdowntemperature °C SD Reset,temperaturedecreasing 140 6 SubmitDocumentationFeedback Copyright©2010–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS74701-Q1

TPS74701-Q1 www.ti.com SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 6.6 Typical Characteristics AtT =25°C,V =V +0.3V,V =5V,I =50mA,V =V ,C =1µF,C =4.7µF,andC =10µF, J IN OUT(TYP) BIAS OUT EN IN IN BIAS OUT unlessotherwisenoted. 0.20 0.5 0.4 0.15 0.3 0.10 %) -40°C %) 0.2 ( ( -40°C UT 0.05 UT 0.1 O O V V n 0 n 0 ange i -0.05 +25°C +125°C ange i -0.1 +125°C +25°C Ch -0.01 Ch -0.2 -0.3 -0.15 -0.4 -0.20 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 V -V (V) V -V (V) IN OUT BIAS OUT Figure1.V LineRegulation Figure2.V LineRegulation IN BIAS 1.2 0.5 0.4 1.0 0.3 %) %) 0.2 ( 0.8 ( +125°C UT UT 0.1 O O V V n 0.6 n 0 Change i 0.4 Change i --00..12 -40°C +25°C -0.3 0.2 -0.4 0 -0.5 0 10 20 30 40 50 0 100 200 300 400 500 I (mA) I (mA) OUT OUT Figure3.LoadRegulation Figure4.LoadRegulation 100 200 I = 0.5A OUT 90 180 80 160 V) V) m 70 m 140 ) (UT 60 ()UT 120 O O V 50 V 100 - - +25°C (VIN 40 +125°C (VIN 80 +125°C VDO 30 +25°C VDO 60 20 40 -40°C 10 20 -40°C 0 0 0 100 200 300 400 500 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 I (mA) V -V (V) OUT BIAS OUT Figure5.DropoutVoltagevsI andTemperature(T ) Figure6.DropoutVoltagevs(V –V )and OUT J BIAS OUT Temperature(T ) J Copyright©2010–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:TPS74701-Q1

TPS74701-Q1 SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 www.ti.com Typical Characteristics (continued) 2200 90 2000 B) 80 d I = 0.1A mV) 1800 atio ( 70 OUT -V) (SOUT 11640000 +125°C Rejection R 654000 V(VDOBIA 11200000 +25°C -40°C wer-Supply 3200 VVIONU=T =1 .18.V2V IOUT= 0.5A 800 Po 10 VBIAS= 5V C = 1nF SS 600 0 0 100 200 300 400 500 10 100 1k 10k 100k 1M 10M I (mA) Frequency (Hz) OUT Figure7.V DropoutVoltagevsI andTemperature Figure8.V PSRRvsFrequency BIAS OUT BIAS (T ) J 90 90 B) 80 B) 80 d d atio ( 70 atio ( 70 1kHz R R ction 6500 IOUT= 100mA ction 6500 10kHz e e ej ej R 40 R 40 pply 30 pply 30 100kHz u V = 1.8V u S IN S 500kHz Power- 2100 VCCOOSSUUTT=== 1 11n.0F2mVF IOUT= 500mA Power- 2100 IOVUTOCU=ST S5=0= 01 1m.2nAVF 0 0 10 100 1k 10k 100k 1M 10M 0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 Frequency (Hz) V -V (V) IN OUT Figure9.V PSRRvsFrequency Figure10.V PSRRvs(V –V ) IN IN IN OUT 1 2.0 ÖV/)Hz IVOOUUTT== 1 10.02mVA 1.8 +125°C m 1.6 y ( sit 1.4 n e De CSS= 0nF mA) 1.2 ois 0.1 (S 1.0 ctral N IBIA 00..86 +25°C Spe CSS= 10nF C = 1nF 0.4 -40°C ut SS utp 0.2 O 0.01 0 100 1k 10k 100k 0 100 200 300 400 500 Frequency (Hz) I (mA) OUT Figure11.NoiseSpectralDensity Figure12.BiasPinCurrentvsI andTemperature(T ) OUT J 8 SubmitDocumentationFeedback Copyright©2010–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS74701-Q1

TPS74701-Q1 www.ti.com SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 Typical Characteristics (continued) 2.0 500 1.8 +125°C 475 1.6 450 1.4 mA) 1.2 +25°C A) 425 I(BIAS 10..08 I(nSS 430705 0.6 -40°C 350 0.4 325 0.2 0 300 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 -50 -25 0 25 50 75 100 125 V (V) Junction Temperature (°C) BIAS Figure13.BiasPinCurrentvsV andTemperature(T ) Figure14.Soft-StartChargingCurrent(I )vsTemperature BIAS J SS (T ) J 1.0 1.5 V = 0.8V OUT 0.9 1.4 V) ge ( 0.8 1.3 +125°C G Volta 00..76 mit (A) 11..21 ow-Level P 000...543 Current Li 100...098 -40°C +25°C L OL 0.2 0.7 V 0.1 0.6 0 0.5 0 2 4 6 8 10 12 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 PG Current (mA) VBIAS-VOUT(V) Figure15.Low-LevelPGVoltagevsCurrent Figure16.CurrentLimitvs(VBIAS–VOUT) C = 1nF SS COUT= 2.2mF (Ceramic) COUT= 2.2mF (Ceramic) 50mV/div 50mV/div C = 1nF SS 3.8V 5.0V 1V/div 1V/div 3.3V 1V/ms 1.8V 1V/ms Time (50ms/div) Time (50ms/div) I =1A,V =V =1.8V,V =1.5V I =1A,V =V =1.8V,V =1.5V OUT EN IN OUT OUT EN IN OUT Figure17.V LineTransient Figure18.V LineTransient BIAS IN Copyright©2010–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:TPS74701-Q1

TPS74701-Q1 SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 www.ti.com Typical Characteristics (continued) C = 470mF (OSCON) C = 0nF OUT SS 100mV/div C = 560pF SS C = 1nF SS 0.5V/div CSS= 5600pF VOUT 100mV/div C = 10mF (Ceramic) OUT 100mV/div C = 2.2mF (Ceramic) 3.8V OUT V EN 1V/div 1.8V 500mA/div 50mA 1A/ms Time (50ms/div) Time (2ms/div) I =1A,V =V =1.8V,V =1.5V I =1A,V =V =1.8V,V =1.5V OUT EN IN OUT OUT EN IN OUT Figure19.OutputLoadTransientResponse Figure20.TurnonResponse V = V = V IN BIAS EN v di V/ 1 V OUT V PG Time (20ms/div) I =1A,V =V =1.8V,V =1.5V OUT EN IN OUT Figure21.PowerUpandPowerDown 10 SubmitDocumentationFeedback Copyright©2010–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS74701-Q1

TPS74701-Q1 www.ti.com SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 7 Detailed Description 7.1 Overview The TPS74701-Q1 is a low-dropout regulator that features soft-start capability. This regulator use a low current bias input to power all internal control circuitry, allowing the NMOS pass transistor to regulate very low input and outputvoltages. TheuseofanNMOS-passFEToffersseveralcriticaladvantagesformanyapplications.UnlikeaPMOStopology device, the output capacitor has little effect on loop stability. This architecture allows the TPS74701 to be stable with any capacitor type of value 2.2 µF or greater. Transient response is also superior to PMOS topologies, particularlyforlowVINapplications. The TPS74701-Q1 features a programmable voltage-controlled soft-start circuit that provides a smooth, monotonic start-up and limits start-up inrush currents that may be caused by large capacitive loads. A power good (PG) output is available to allow supply monitoring and sequencing of other supplies. An enable (EN) pin with hysteresis and deglitch allows slow-ramping signals to be used for sequencing the device. The low VIN and VOUT capability allows for inexpensive, easy-to-design, and efficient linear regulation between the multiple supplyvoltagesoftenpresentinprocessor-intensivesystems. 7.2 Functional Block Diagram Current OUT IN Limit VOUT BIAS UVLO Thermal 0.44µA Limit R1 SS C SS Soft-Start 0.8V Discharge Reference FB PG Hysteresis EN and Deglitch R2 0.9 × V REF GND Copyright © 2016,Texas Instruments Incorporated 7.3 Feature Description 7.3.1 TransientResponse The TPS74701-Q1 was designed to have excellent transient response for most applications with a small amount of output capacitance. In some cases, the transient response may be limited by the transient response of the input supply. This limitation is especially true in applications where the difference between the input and output is less than 300 mV. In this case, adding additional input capacitance improves the transient response much more than just adding additional output capacitance would do. With a solid input supply, adding additional output capacitance reduces undershoot and overshoot during a transient event; see Figure 19. Because the TPS74701- Q1 is stable with output capacitors as low as 2.2 µF, many applications may then need very little capacitance at the LDO output. For these applications, local bypass capacitance for the powered device may be sufficient to meet the transient requirements of the application. This design reduces the total solution cost by avoiding the needtouseexpensive,high-valuecapacitorsattheLDOoutput. Copyright©2010–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:TPS74701-Q1

TPS74701-Q1 SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 www.ti.com Feature Description (continued) 7.3.2 DropoutVoltage The TPS74701-Q1 offers very low dropout performance, making it well-suited for high-current, low V /low V IN OUT applications. The low dropout of the TPS74701-Q1 allows the device to be used in place of a DC-DC converter andstillachievegoodefficiency.Thisfeatureprovidesdesignerswiththepowerarchitecturefortheirapplications toachievethesmallest,simplest,andlowestcostsolution. There are two different specifications for dropout voltage with the TPS74701-Q1. The first specification (shown in Figure 22) is referred to as V Dropout and is used when an external bias voltage is applied to achieve low IN dropout. This specification assumes that V is at least 1.62 V(1) above V , which is the case for V when BIAS OUT BIAS powered by a 3.3-V rail with 5% tolerance and with V = 1.5 V. If V is higher than V + 1.62 V(1), V OUT BIAS OUT IN dropoutislessthanspecified. BIAS IN V = 5V ±5% BIAS V = 1.8V IN V = 1.5V OUT I = 500 mA Reference OUT Efficiency = 83% OUT V OUT C OUT FB Simplified Block Diagram Figure22. TypicalApplicationoftheTPS74701-Q1UsinganAuxiliaryBiasRail The second specification (shown in Figure 23) is referred to as V Dropout and applies to applications where BIAS IN and BIAS are tied together. This option allows the device to be used in applications where an auxiliary bias voltage is not available or low dropout is not required. Dropout is limited by BIAS in these applications because V provides the gate drive to the pass FET; therefore, V must be 1.39 V above V . Because of this BIAS BIAS OUT usage, IN and BIAS tied together easily consume huge power. Pay attention not to exceed the power rating of theICpackage. V IN V = 3.3V ±5% BIAS IN BIAS V = 3.3V ± 5V IN V = 1.5V OUT I = 500 mA Reference OUT Efficiency = 45% OUT V OUT C OUT FB Simplified Block Diagram Figure23. TypicalApplicationoftheTPS74701-Q1WithoutanAuxiliaryBiasRail (1) 1.62VisatestconditionofthisdeviceandcanbeadjustedbyreferringtoFigure6. 12 SubmitDocumentationFeedback Copyright©2010–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS74701-Q1

TPS74701-Q1 www.ti.com SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 Feature Description (continued) 7.3.3 OutputNoise The TPS74701-Q1 provides low output noise when a soft-start capacitor is used. When the device reaches the endofthesoft-startcycle,thesoft-startcapacitorservesasafilterfortheinternalreference.Byusinga0.001-µF soft-start capacitor, the output noise is reduced by half and is typically 30 µV for a 1.2-V output (10 Hz to RMS 100 kHz). Further increasing C has little effect on noise. Because most of the output noise is generated by the SS internal reference, the noise is a function of the set output voltage. The RMS noise with a 0.001-µF soft-start capacitorisgiveninEquation1: V (mV ) = 25(mVRMS)x V (V) N RMS OUT V (1) The low output noise of the TPS74701-Q1 makes it a good choice for powering transceivers, PLLs, or other noise-sensitivecircuitry. 7.3.4 EnableandShutdown The enable (EN) pin is active high and is compatible with standard digital signaling levels. V below 0.4 V turns EN the regulator off, while V above 1.1 V turns the regulator on. Unlike many regulators, the enable circuitry has EN hysteresis and deglitching for use with relatively slowly ramping analog signals. This configuration allows the TPS74701-Q1 to be enabled by connecting the output of another supply to the EN pin. The enable circuitry typically has 50 mV of hysteresis and a deglitch circuit to help avoid ON and OFF cycling as a result of small glitchesintheV signal. EN The enable threshold is typically 0.8 V and varies with temperature and process variations. Temperature variation is approximately –1 mV/°C; process variation accounts for most of the rest of the variation to the 0.4-V and 1.1-V limits. If precise turnon timing is required, a fast rise-time signal must be used to enable the TPS74701-Q1. Ifnotused,ENcanbeconnectedtoeitherINorBIAS.IfENisconnectedtoIN,itmustbeconnectedascloseas possible to the largest capacitance on the input to prevent voltage droops on that line from triggering the enable circuit. 7.3.5 PowerGood The power good (PG) pin is an open-drain output and can be connected to any 5.5 V or lower rail through an external pullup resistor. This pin requires at least 1.1 V on V to have a valid output. The PG output is high- BIAS impedancewhenV isgreaterthanV +V .IfV dropsbelowV orifV dropsbelow1.9V,theopen- OUT IT HYS OUT IT BIAS drain output turns on and pulls the PG output low. The PG pin also asserts when the device is disabled. The recommended operating condition of the PG pin sink current is up to 1 mA, so the pullup resistor for PG must be intherangeof10kΩto1MΩ.Ifoutputvoltagemonitoringisnotneeded,thePGpincanbeleftfloating. 7.3.6 InternalCurrentLimit The TPS74701-Q1 features a factory-trimmed, accurate current limit that is flat over temperature and supply voltage. The current limit allows the device to supply surges of up to 1 A and maintain regulation. The current limitrespondsinabout10µstoreducethecurrentduringashort-circuitfault. The internal current limit protection circuitry of the TPS74701-Q1 is designed to protect against overload conditions. It is not intended to allow operation above the rated current of the device. Continuously running the TPS74701-Q1abovetheratedcurrentdegradesdevicereliability. 7.3.7 ThermalProtection Thermal protection disables the output when the junction temperature rises to approximately 160°C, allowing the device to cool. When the junction temperature cools to approximately 140°C, the output circuitry is enabled. Depending on power dissipation, thermal resistance, and ambient temperature the thermal protection circuit may cycle ON and OFF. This cycling limits the dissipation of the regulator, protecting it from damage as a result of overheating. Copyright©2010–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:TPS74701-Q1

TPS74701-Q1 SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 www.ti.com Feature Description (continued) Activation of the thermal protection circuit indicates excessive power dissipation or inadequate heat sinking. For reliable operation, junction temperature should be limited to 125°C maximum. To estimate the margin of safety in a complete design (including heat sink), increase the ambient temperature until thermal protection is triggered; use worst-case loads and signal conditions. For good reliability, thermal protection should trigger at least 40°C abovethemaximumexpectedambientconditionoftheapplication.Thisconditionproducesaworst-casejunction temperatureof125°Catthehighestexpectedambienttemperatureandworst-caseload. The internal protection circuitry of the TPS74701-Q1 is designed to protect against overload conditions. It is not intendedtoreplaceproperheatsinking.ContinuouslyrunningtheTPS74701-Q1intothermalshutdowndegrades devicereliability. 7.4 Device Functional Modes 7.4.1 NormalOperation Thedeviceregulatestothenominaloutputvoltageunderthefollowingconditions: • Theinputvoltageandbiasvoltagearebothatleastattherespectiveminimumspecifications. • The enable voltage has previously exceeded the enable rising threshold voltage and has not decreased belowtheenablefallingthreshold. • Theoutputcurrentislessthanthecurrentlimit. • Thedevicejunctiontemperatureislessthanthemaximumspecifiedjunctiontemperature. 7.4.2 DropoutOperation If the input voltage is lower than the nominal output voltage plus the specified dropout voltage, but all other conditions are met for normal operation, the device operates in dropout mode. In this condition, the output voltage is the same as the input voltage minus the dropout voltage. The transient performance of the device is significantly degraded because the pass device is in a triode state and no longer controls the current through the LDO.Lineorloadtransientsindropoutcanresultinlargeoutputvoltagedeviations. 7.4.3 Disabled Thedeviceisdisabledunderthefollowingconditions: • Theinputorbiasvoltagesarebelowtherespectiveminimumspecifications. • The enable voltage is less than the enable falling threshold voltage or has not yet exceeded the enable rising threshold. • Thedevicejunctiontemperatureisgreaterthanthethermalshutdowntemperature. Table1showstheconditionsthatleadtothedifferentmodesofoperation. Table1.DeviceFunctionalModeComparison PARAMETER OPERATINGMODE V V V I T IN EN BIAS OUT J V >V +V Normalmode IN OUT(nom) DO V >V V ≥V +1.39V I <I T <125°C (VIN) EN EN,HI BIAS OUT OUT CL J V <V +V Dropoutmode IN OUT(nom) DO V >V V <V +1.39V — T <125°C (VIN) EN EN,HI BIAS OUT J Disabledmode(any trueconditionthe V <V V <V V <V — T >165°C IN IN(min) EN EN,LO BIAS BIAS(min) J device) 14 SubmitDocumentationFeedback Copyright©2010–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS74701-Q1

TPS74701-Q1 www.ti.com SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 8.1 Application Information The TPS74701-Q1 device is a 500-mA low-dropout regulator with soft-start function integrated. Based on the end-application,differentoutputvoltagecouldbeachievedwithdifferentvaluesofexternalcomponents. 8.2 Typical Application Figure24illustratesthetypicalapplicationcircuitfortheTPS74701-Q1adjustableoutputdevice. VIN IN PG C1µINF BIAS R3 EN TPS74701-Q1OUT VOUT VBIAS SS R1 COUT CBIAS GND FB 10µF 1µF CSS R2 V = 0.8 ×(1 + R1 ) OUT R 2 Copyright © 2016,Texas Instruments Incorporated Figure24. TypicalApplicationCircuitfortheTPS74701-Q1 R and R can be calculated for any output voltage using the formula shown in Figure 24. See Table 3 for 1 2 sampleresistorvaluesofcommonoutputvoltages.Toachievethemaximumaccuracyspecifications,R mustbe 2 lessthanorequalto4.99kΩ. 8.2.1 DesignRequirements Forthisdesignexample,usetheparametersinTable2. Table2.DesignParameters PARAMETER EXAMPLEVALUE Inputvoltage 1.8V±10% Outputvoltage 1.5V±3% Enablevoltage 1.8V±10% BIASvoltage 3.3V±10% Outputcurrent 500mA Outputcapacitor 10µF Start-uptime <2ms 8.2.2 DetailedDesignProcedure 1. Select R1 and R2 based on the required output voltage. Table 3 gives example calculations for many commonoutputvoltages. 2. Select C to be the highest capacitance while still achieving the desired start-up time. Table 4 gives SS examplesofthiscalculation.Figure26givesexamplesofturnonresponsewithdifferentC capacitorvalue. SS 3. Select a minimum of a 2.2-µF ceramic output capacitor. Increased output capacitance helps the output load Copyright©2010–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:TPS74701-Q1

TPS74701-Q1 SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 www.ti.com transient response. Figure 27 gives examples of the load transient response with different output capacitor valuesandtypes. 8.2.2.1 Input,Output,andBiasCapacitorRequirements The device is designed to be stable for all available types and values of output capacitors greater than or equal to2.2µF.Thedeviceisalsostablewithmultiplecapacitorsinparallel,whichcanbeofanytypeorvalue. The capacitance required on the IN and BIAS pins strongly depends on the input supply source impedance. To counteract any inductance in the input, the minimum recommended capacitor for V and V is 1 µF. If V and IN BIAS IN V are connected to the same supply, the recommended minimum capacitor for V is 4.7 µF. Good-quality, BIAS BIAS low-ESR capacitors should be used on the input; ceramic X5R and X7R capacitors are preferred. These capacitorsmustbeplacedasclosethepinsaspossibleforoptimumperformance. Table3.Standard1%ResistorValuesforProgrammingtheOutputVoltage(1) R (kΩ) R (kΩ) V (V) 1 2 OUT Short Open 0.8 0.619 4.99 0.9 1.13 4.53 1 1.37 4.42 1.05 1.87 4.99 1.1 2.49 4.99 1.2 4.12 4.75 1.5 3.57 2.87 1.8 3.57 1.69 2.5 3.57 1.15 3.3 (1) V =0.8×(1+R /R ). OUT 1 2 Table4.StandardCapacitorValuesforProgrammingtheSoft-StartTime(1) C SOFT-STARTTIME SS Open 0.1ms 270pF 0.5ms 560pF 1ms 2.7nF 5ms 5.6nF 10ms 0.01µF 18ms (1) t (s)=0.8×C (F)/4.4×10–7. SS SS 8.2.2.2 ProgrammableSoft-Start The TPS74701-Q1 features a programmable, monotonic, voltage-controlled soft start that is set with an external capacitor (C ). This feature is important for many applications because it eliminates power-up initialization SS problems when powering FPGAs, DSPs, or other processors. The controlled voltage ramp of the output also reducespeakinrushcurrentduringstart-up,minimizingstart-uptransienteventstotheinputpowerbus. To achieve a linear and monotonic soft start, the TPS74701-Q1 error amplifier tracks the voltage ramp of the external soft-start capacitor until the voltage exceeds the internal reference. The soft-start ramp time depends on the soft-start charging current (I ), soft-start capacitance (C ), and the internal reference voltage (V ), and SS SS REF canbecalculatedusingEquation2: (V ´C ) t = REF SS SS I SS (2) If large output capacitors are used, the device current limit (I ) and the output capacitor may set the start-up CL time.Inthiscase,thestart-uptimeisgivenbyEquation3: 16 SubmitDocumentationFeedback Copyright©2010–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS74701-Q1

TPS74701-Q1 www.ti.com SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 (V ´C ) OUT(NOM) OUT t = SSCL I CL(MIN) where • V isthenominaloutputvoltage, OUT(NOM) • C istheoutputcapacitance,and OUT • I istheminimumcurrentlimitforthedevice. (3) CL(MIN) In applications where monotonic start-up is required, the soft-start time given by Equation 2 must be set greater thanEquation3. Themaximumrecommendedsoft-startcapacitoris0.015µF.Largersoft-startcapacitorscanbeusedanddonot damage the device; however, the soft-start capacitor discharge circuit may not be able to fully discharge the soft- startcapacitorwhenenabled.Soft-startcapacitorslargerthan0.015 µFcouldbeaprobleminapplicationswhere it is necessary to rapidly pulse the enable pin and still require the device to soft-start from ground. C must be SS low-leakage; X7R, X5R, or C0G dielectric materials are preferred. See Table 4 for suggested soft-start capacitor values. 8.2.2.3 SequencingRequirements V , V , and V can be sequenced in any order without causing damage to the device. However, for the soft- IN BIAS EN start function to work as intended, certain sequencing rules must be applied. Connecting EN to IN is acceptable for most applications, as long as V is greater than 1.1 V and the ramp rate of V and V is faster than the IN IN BIAS set soft-start ramp rate. If the ramp rate of the input sources is slower than the set soft-start time, the output tracks the slower supply minus the dropout voltage until it reaches the set output voltage. If EN is connected to BIAS, the device soft-starts as programmed, provided that V is present before V . If V and V are IN BIAS BIAS EN present before V is applied and the set soft-start time has expired, then V tracks V . If the soft-start time IN OUT IN has not expired, the output tracks V until V reaches the value set by the charging soft-start capacitor. IN OUT Figure 25 shows the use of an RC-delay circuit to hold off V until V has ramped. This technique can also EN BIAS be used to drive EN from V . An external control signal can also be used to enable the device after V and IN IN V arepresent. BIAS NOTE WhenV andV arepresentandV isnotsupplied,thisdeviceoutputsapproximately BIAS EN IN 50 µA of current from OUT. Although this condition does not cause any damage to the device, the output current may charge up the OUT node if total resistance between OUT andGND(includingexternalfeedbackresistors)isgreaterthan10kΩ. VIN IN OUT VOUT CIN R1 C BIAS TPS74701-Q1 FB OUT VBIAS R R2 C EN GND SS BIAS C CSS Copyright © 2016,Texas Instruments Incorporated Figure25. Soft-StartDelayUsinganRCCircuittoEnabletheDevice Copyright©2010–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:TPS74701-Q1

TPS74701-Q1 SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 www.ti.com 8.2.3 ApplicationCurves C = 470mF (OSCON) C = 0nF OUT SS 100mV/div C = 560pF SS C = 1nF SS 0.5V/div CSS= 5600pF VOUT 100mV/div C = 10mF (Ceramic) OUT 100mV/div C = 2.2mF (Ceramic) 3.8V OUT V EN 1V/div 1.8V 500mA/div 50mA 1A/ms Time (50ms/div) Time (2ms/div) Figure26.OutputLoadTransientResponse Figure27.TurnonResponse 18 SubmitDocumentationFeedback Copyright©2010–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS74701-Q1

TPS74701-Q1 www.ti.com SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 9 Power Supply Recommendations TheTPS74701-Q1isdesignedtooperatefromaninputvoltageupto5.5V,providedthebiasrailisatleast1.39 V higher than the input supply and dropout requirements are met. The bias rail and the input supply must both provideadequateheadroomandcurrentforthedevicetooperatenormally. Connect a low-output impedance power supply directly to the IN pin of the TPS74701. This supply must have at least 1 µF of capacitance near the IN pin for optimal performance. A supply with similar requirements must also beconnecteddirectlytothebiasrailwithaseparate1 µForlargercapacitor.IftheINpinistiedtothebiaspin,a minimum 4.7 µF of capacitance is needed for performance. To increase the overall PSRR of the solution at higherfrequencies,useapi-filterorferritebeadbeforetheinputcapacitor. 10 Layout 10.1 Layout Guidelines An optimal layout can greatly improve transient performance, PSRR, and noise. To minimize the voltage drop on the input of the device during load transients, the capacitance on IN and BIAS should be connected as close as possible to the device. This capacitance also minimizes the effects of parasitic inductance and resistance of the input source and can therefore improve stability. To achieve optimal transient performance and accuracy, the top side of R in Figure 24 should be connected as close as possible to the load. If BIAS is connected to IN, TI 1 recommends connecting BIAS as close to the sense point of the input supply as possible. This connection minimizesthevoltagedroponBIASduringtransientconditionsandcanimprovetheturnonresponse. 10.2 Layout Example CIN Input GND Plane IN 1 10 OUT Vout Vin IN 2 9 OUT R1 COUT PG 3 8 FB CBIAS BIAS 4 7 SS Css R2 EN 5 6 GND Output GND Plane C ,C ,andC are0603casesizecapacitors,whileC ,R ,andR are0402casesize. IN OUT BIAS SS 1 2 Figure28. LayoutRecommendation 10.3 Power Dissipation Knowingthedevicepowerdissipationandpropersizingofthethermalplanethatisconnectedtothethermalpad is critical to avoiding thermal shutdown and ensuring reliable operation. Power dissipation of the device depends oninputvoltageandloadconditionsandcanbecalculatedusingEquation4: P = (V -V )´I D IN OUT OUT (4) Power dissipation can be minimized and greater efficiency can be achieved by using the lowest possible input voltagenecessarytoachievetherequiredoutputvoltageregulation. Copyright©2010–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:TPS74701-Q1

TPS74701-Q1 SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 www.ti.com Power Dissipation (continued) On the VSON (DRC) package, the primary conduction path for heat is through the exposed pad to the printed- circuit board (PCB). The pad can be connected to ground or be left floating; however, it should be attached to an appropriate amount of copper PCB area to ensure the device does not overheat. The maximum junction to ambient thermal resistance depends on the maximum ambient temperature, maximum device junction temperature,andpowerdissipationofthedevice,andcanbecalculatedusingEquation5: (+125°C-T ) R = A qJA P D (5) Knowing the maximum R and system air flow, the minimum amount of PCB copper area needed for θJA appropriateheatsinkingcanbecalculatedusingFigure29throughFigure31. PCB Cross Section PCB Top View T J RqJC T C RqCS 0.062" T S RqSA 0.5 in2 4-layer, 0.062”FR4. 1.0 in2 Vias are 0.012”diameter, plated. T A Top/Bottom layers are 2oz. copper. Inner layers are 1oz. copper. 2.0 in2 RqJA= RqJC+RqCS+RqSA 90 85 80 0 LFM 75 150 LFM W) 70 °(C/ 65 250 LFM qJA 60 55 50 45 40 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 Area (in2) Figure29. DRC(3x3VSON)PCBLayoutandCorrespondingR Data,NoViasUnderThermalPad θJA 20 SubmitDocumentationFeedback Copyright©2010–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS74701-Q1

TPS74701-Q1 www.ti.com SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 PCB Cross Section PCB Top View T J RqJC T C RqCS 0.062" T S RqSA 0.5 in2 4-layer, 0.062”FR4. 1.0 in2 Vias are 0.012”diameter, plated. T A Top/Bottom layers are 2oz. copper. Inner layers are 1oz. copper. 2.0 in2 RqJA= RqJC+RqCS+RqSA 90 85 80 75 W) 70 °(C/ 65 0 LFM qJA 60 150 LFM 55 50 45 250 LFM 40 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 Area (in2) Figure30. DRC(3x3VSON)PCBLayoutandCorrespondingR Data,ViasUnderThermalPad θJA Copyright©2010–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:TPS74701-Q1

TPS74701-Q1 SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 www.ti.com PCB Cross Section PCB Top View T J RqJC T C RqCS 0.062" T S 4-layer, 0.062”FR4. RqSA 0.5 in2 Vias are 0.012”diameter, plated. T A Top/Bottom layers are 2oz. copper. 1.0 in2 Inner layers are 1oz. copper. RqJA= RqJC+RqCS+RqSA 2.0 in2 90 85 80 75 0 LFM W) 70 °(C/ 65 qJA 60 150 LFM 55 250 LFM 50 45 40 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 Area (in2) Figure31. DRC(3x3VSON)PCBLayoutandCorrespondingR Data,TopLayerOnly θJA 22 SubmitDocumentationFeedback Copyright©2010–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS74701-Q1

TPS74701-Q1 www.ti.com SBVS141B–APRIL2010–REVISEDSEPTEMBER2016 11 Device and Documentation Support 11.1 Device Support 11.1.1 DevelopmentSupport Fordevelopmentsupport,seethefollowing: • TPS74801-Q1 • TIPCBThermalCalculator 11.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert meto register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 11.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 11.4 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 11.5 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 11.6 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©2010–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:TPS74701-Q1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS74701QDRCRQ1 ACTIVE VSON DRC 10 3000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 PAE & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TPS74701-Q1 : Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 •Catalog: TPS74701 NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 9-Mar-2016 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS74701QDRCRQ1 VSON DRC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 9-Mar-2016 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS74701QDRCRQ1 VSON DRC 10 3000 367.0 367.0 35.0 PackMaterials-Page2

GENERIC PACKAGE VIEW DRC 10 VSON - 1 mm max height PLASTIC SMALL OUTLINE - NO LEAD Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4204102-3/M

PACKAGE OUTLINE DRC0010J VSON - 1 mm max height SCALE 4.000 PLASTIC SMALL OUTLINE - NO LEAD 3.1 B A 2.9 PIN 1 INDEX AREA 3.1 2.9 1.0 C 0.8 SEATING PLANE 0.05 0.00 0.08 C 1.65 0.1 2X (0.5) (0.2) TYP EXPOSED 4X (0.25) THERMAL PAD 5 6 2X 11 SYMM 2 2.4 0.1 10 1 8X 0.5 0.30 10X 0.18 PIN 1 ID SYMM 0.1 C A B (OPTIONAL) 0.5 0.05 C 10X 0.3 4218878/B 07/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance. www.ti.com

EXAMPLE BOARD LAYOUT DRC0010J VSON - 1 mm max height PLASTIC SMALL OUTLINE - NO LEAD (1.65) (0.5) 10X (0.6) 1 10 10X (0.24) 11 SYMM (2.4) (3.4) (0.95) 8X (0.5) 6 5 (R0.05) TYP ( 0.2) VIA TYP (0.25) (0.575) SYMM (2.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:20X 0.07 MIN 0.07 MAX EXPOSED METAL ALL AROUND ALL AROUND EXPOSED METAL SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4218878/B 07/2018 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. www.ti.com

EXAMPLE STENCIL DESIGN DRC0010J VSON - 1 mm max height PLASTIC SMALL OUTLINE - NO LEAD 2X (1.5) (0.5) SYMM EXPOSED METAL 11 TYP 10X (0.6) 1 10 (1.53) 10X (0.24) 2X (1.06) SYMM (0.63) 8X (0.5) 6 5 (R0.05) TYP 4X (0.34) 4X (0.25) (2.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 11: 80% PRINTED SOLDER COVERAGE BY AREA SCALE:25X 4218878/B 07/2018 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

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