Product Order Technical Tools & Support & Folder Now Documents Software Community TPS737 SBVS067R–JANUARY2006–REVISEDDECEMBER2019 TPS737xx 1-A Low-Dropout Regulator With Reverse Current Protection 1 Features 3 Description • StableWith1-μForLargerCeramicOutput The TPS737xx family of linear low-dropout (LDO) 1 voltage regulators uses an NMOS pass element in a Capacitor voltage-follower configuration. This topology is • InputVoltageRange:2.2Vto5.5V relatively insensitive to output capacitor value and • UltralowDropoutVoltage:130mVTypicalat1A ESR, allowing a wide variety of load configurations. • ExcellentLoadTransientResponse—EvenWith Load transient response is excellent, even with a small 1-μF ceramic output capacitor. The NMOS Only1-μFOutputCapacitor topologyalsoallowsverylowdropout. • NMOSTopologyDeliversLowReverseLeakage Current The TPS737xx family uses an advanced BiCMOS process to yield high precision while delivering very • 1%InitialAccuracy low dropout voltages and low ground pin current. • 3%OverallAccuracyOverLine,Load,and Current consumption, when not enabled, is less than Temperature 20 nA and ideal for portable applications. These • LessThan20nATypicalI inShutdownMode devices are protected by thermal shutdown and Q foldbackcurrentlimit. • ThermalShutdownandCurrentLimitforFault Protection For applications that require higher output voltage • AvailableinMultipleOutputVoltageVersions accuracy, consider TI's TPS7A37xx family of 1% overallaccuracy,1-Alow-dropoutvoltageregulators. – AdjustableOutput:1.20Vto5.5V – CustomOutputsAvailableUsingFactory DeviceInformation(1) Package-LevelProgramming PARTNUMBER PACKAGE BODYSIZE(NOM) VSON(8) 3.00mm×3.00mm 2 Applications TPS737xx SOT-223(6) 6.50mm×3.50mm • Point-of-LoadRegulationforDSPs,FPGAs, WSON(6) 2.00mm×2.00mm ASICs,andMicroprocessors (1) For all available packages, see the orderable addendum at • Post-RegulationforSwitchingSupplies theendofthedatasheet. • PortableandBattery-PoweredEquipment space TypicalApplicationCircuit Optional VIN IN OUT VOUT TPS737xx 1.0mF EN GND FB ON OFF 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

TPS737 SBVS067R–JANUARY2006–REVISEDDECEMBER2019 www.ti.com Table of Contents 1 Features.................................................................. 1 8 ApplicationandImplementation........................ 16 2 Applications........................................................... 1 8.1 ApplicationInformation............................................16 3 Description............................................................. 1 8.2 TypicalApplication..................................................16 4 RevisionHistory..................................................... 2 8.3 WhatToDoandWhatNotToDo...........................18 5 PinConfigurationandFunctions......................... 4 9 PowerSupplyRecommendations...................... 18 6 Specifications......................................................... 5 10 Layout................................................................... 19 6.1 AbsoluteMaximumRatings......................................5 10.1 LayoutGuidelines.................................................19 6.2 ESDRatings ............................................................5 10.2 LayoutExample....................................................21 6.3 RecommendedOperatingConditions.......................5 11 DeviceandDocumentationSupport................. 22 6.4 ThermalInformation..................................................6 11.1 DeviceSupport......................................................22 6.5 ElectricalCharacteristics...........................................7 11.2 DocumentationSupport .......................................22 6.6 TypicalCharacteristics..............................................8 11.3 ReceivingNotificationofDocumentationUpdates22 7 DetailedDescription............................................ 13 11.4 SupportResources...............................................22 7.1 Overview.................................................................13 11.5 Trademarks...........................................................22 7.2 FunctionalBlockDiagrams.....................................13 11.6 ElectrostaticDischargeCaution............................23 7.3 FeatureDescription.................................................14 11.7 Glossary................................................................23 7.4 DeviceFunctionalModes........................................15 12 Mechanical,Packaging,andOrderable Information........................................................... 23 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionQ(May2015)toRevisionR Page • ChangedWSONtoVSONandVSONtoWSONinheaderrowofPinFunctionstable ....................................................... 4 • ChangedunitfromVto%inV parameterofElectricalCharacteristicstable .................................................................. 7 OUT ChangesfromRevisionP(July2013)toRevisionQ Page • AddedESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection ................................................................................................. 1 • Changed"free-airtemperature"to"junctiontemperature"inAbsoluteMaximumRatingsconditionstatement ...................5 • Changed"free-airtemperature"to"junctiontemperature"inRecommendedOperatingConditionscondition statement ............................................................................................................................................................................... 5 • ChangedInternalReferenceparameter(V )typicalvaluesfrom1.2Vto1.204V.............................................................. 7 FB ChangesfromRevisionO(June2012)toRevisionP Page • AddedlastparagraphtoDescriptionsection.......................................................................................................................... 1 ChangesfromRevisionN(June2011)toRevisionO Page • ChangedThermalInformationtabledataandfootnote2b..................................................................................................... 6 • ChangedV InternalreferenceparameterinElectricalCharacteristicstable....................................................................... 7 FB • ChangedtitleofFigure6........................................................................................................................................................ 8 2 SubmitDocumentationFeedback Copyright©2006–2019,TexasInstrumentsIncorporated ProductFolderLinks:TPS737

TPS737 www.ti.com SBVS067R–JANUARY2006–REVISEDDECEMBER2019 ChangesfromRevisionM(October,2010)toRevisionN Page • Addedfootnote(3)toThermalInformationtable.................................................................................................................... 7 • AddedfootnotetoFigure38................................................................................................................................................. 21 ChangesfromRevisionL(August,2010)toRevisionM Page • CorrectedtypoinFigure38.................................................................................................................................................. 21 Copyright©2006–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:TPS737

TPS737 SBVS067R–JANUARY2006–REVISEDDECEMBER2019 www.ti.com 5 Pin Configuration and Functions DCQPackage DRBPackage 6-PinSOT-223 8-PinVSON TopView TopView OUT 1 8 IN 6 TAB IS GND N/C 2 7 N/C NR/FB 3 6 N/C 1 2 3 4 5 GND 4 5 EN IN GND EN OUT NR/FB DRVPackage(1) 6-PinWSON TopView OUT 1 6 IN NR/FB 2 5 N/C GND 3 4 EN (1) Powerdissipationmaylimitoperatingrange.CheckThermalInformationtable. PinFunctions PIN I/O DESCRIPTION NAME SOT-223 VSON WSON IN 1 8 6 I Unregulatedinputsupply GND 3,6 4,Pad 3,Pad — Ground Drivingtheenablepin(EN)highturnsontheregulator.Drivingthispinlow putstheregulatorintoshutdownmode.RefertotheEnablePinand EN 5 5 4 I ShutdownsectionunderApplicationInformationformoredetails.ENmustnot beleftfloatingandcanbeconnectedtoINifnotused. Fixedvoltageversionsonly—connectinganexternalcapacitortothispin NR 4 3 2 — bypassesnoisegeneratedbytheinternalbandgap,reducingoutputnoiseto verylowlevels. I Adjustablevoltageversiononly—thisistheinputtothecontrollooperror FB 4 3 2 amplifier,andisusedtosettheoutputvoltageofthedevice. O Regulatoroutput.A1.0-μForlargercapacitorofanytypeisrequiredfor OUT 2 1 1 stability. NC — 2,6,7 5 — Notconnected 4 SubmitDocumentationFeedback Copyright©2006–2019,TexasInstrumentsIncorporated ProductFolderLinks:TPS737

TPS737 www.ti.com SBVS067R–JANUARY2006–REVISEDDECEMBER2019 6 Specifications 6.1 Absolute Maximum Ratings overoperatingjunctiontemperaturerange(unlessotherwisenoted) (1) MIN MAX UNIT V –0.3 6 IN V –0.3 6 EN Voltage V V –0.3 5.5 OUT V ,V –0.3 6 NR FB Peakoutputcurrent I Internallylimited OUT Outputshort-circuitduration Indefinite Continuoustotalpower P SeeThermalInformation dissipation DISS Junctionrange,T –55 150 J Temperature °C Storagerange,T –65 150 stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. 6.2 ESD Ratings VALUE UNIT Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001,all pins(1) ±2000 V Electrostaticdischarge V (ESD) Chargeddevicemodel(CDM),perJEDECspecification JESD22-C101,allpins(2) ±500 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions overoperatingjunctiontemperaturerange(unlessotherwisenoted) MIN NOM MAX UNIT V Inputsupplyvoltagerange 2.2 5.5 V IN I Outputcurrent 0 1 A OUT T Operatingjunctiontemperature –40 125 °C J Copyright©2006–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:TPS737

TPS737 SBVS067R–JANUARY2006–REVISEDDECEMBER2019 www.ti.com 6.4 Thermal Information TPS737xx(2) THERMALMETRIC(1) DRB[VSON] [SODTC-Q223] [WSDORNV](3) UNIT 8PINS 6PINS 6PINS R Junction-to-ambientthermalresistance(4) 49.5 53.1 67.2 °C/W θJA R Junction-to-case(top)thermalresistance(5) 58.9 35.2 87.6 °C/W θJC(top) R Junction-to-boardthermalresistance(6) 25.1 7.8 36.8 °C/W θJB ψ Junction-to-topcharacterizationparameter(7) 1.7 2.9 1.8 °C/W JT ψ Junction-to-boardcharacterizationparameter(8) 25.2 7.7 37.2 °C/W JB R Junction-to-case(bottom)thermalresistance(9) 8.6 N/A 7.7 °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICpackagethermalmetricsapplication report. (2) ThermaldatafortheDRB,DCQ,andDRVpackagesarederivedbythermalsimulationsbasedonJEDEC-standardmethodologyas specifiedintheJESD51series.Thefollowingassumptionsareusedinthesimulations: (a) i. DRB: The exposed pad is connected to the PCB ground layer through a 2 × 2 thermal via array. . ii. DCQ: The exposed pad is connected to the PCB ground layer through a 3 × 2 thermal via array. .iii.DRV:TheexposedpadisconnectedtothePCBgroundlayerthrougha2×2thermalviaarray.Duetosizelimitationofthermal pad,0.8-mmpitcharrayisusedwhichisofftheJEDECstandard. (b)Thetopcopperlayerhasadetailedcoppertracepattern.Thebottomcopperlayerisassumedtohavea20%thermalconductivityof copper,representinga20%coppercoverage. (c)ThesedataweregeneratedwithonlyasingledeviceatthecenterofaJEDEChigh-K(2s2p)boardwith3-inch×3-inchcopperarea. To understand the effects of the copper area on thermal performance, see the Power Dissipation and Estimating Junction Temperaturesectionsofthisdatasheet. (3) Powerdissipationmaylimitoperatingrange. (4) Thejunction-to-ambientthermalresistanceundernaturalconvectionisobtainedinasimulationonaJEDEC-standard,high-Kboard,as specifiedinJESD51-7,inanenvironmentdescribedinJESD51-2a. (5) Thejunction-to-case(top)thermalresistanceisobtainedbysimulatingacoldplatetestonthetopofthepackage.NospecificJEDEC- standardtestexists,butaclosedescriptioncanbefoundintheANSISEMIstandardG30-88. (6) Thejunction-to-boardthermalresistanceisobtainedbysimulatinginanenvironmentwitharingcoldplatefixturetocontrolthePCB temperature,asdescribedinJESD51-8. (7) Thejunction-to-topcharacterizationparameter,ψ ,estimatesthejunctiontemperatureofadeviceinarealsystemandisextracted JT fromthesimulationdatatoobtainθ usingaproceduredescribedinJESD51-2a(sections6and7). JA (8) Thejunction-to-boardcharacterizationparameter,ψ ,estimatesthejunctiontemperatureofadeviceinarealsystemandisextracted JB fromthesimulationdatatoobtainθ usingaproceduredescribedinJESD51-2a(sections6and7). JA (9) Thejunction-to-case(bottom)thermalresistanceisobtainedbysimulatingacoldplatetestontheexposed(power)pad.Nospecific JEDECstandardtestexists,butaclosedescriptioncanbefoundintheANSISEMIstandardG30-88. 6 SubmitDocumentationFeedback Copyright©2006–2019,TexasInstrumentsIncorporated ProductFolderLinks:TPS737

TPS737 www.ti.com SBVS067R–JANUARY2006–REVISEDDECEMBER2019 6.5 Electrical Characteristics Overoperatingtemperaturerange(T =–40°Cto125°C),V =V +1V(1),I =10mA,V =2.2V,and J IN OUT(nom) OUT EN C =2.2μF,unlessotherwisenoted.TypicalvaluesareatT =25°C. OUT J PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V Inputvoltagerange(1)(2) 2.2 5.5 V IN Internalreference T =25°C 1.198 1.204 1.21 (DCQpackage) J V V FB Internalreference T =25°C 1.192 1.204 1.216 (DRBandDRVpackages) J Outputvoltagerange (TPS73701)(3) VFB 5.5–VDO V Nominal T =25°C –1 1 J 5.36V<V <5.5V,V =5.08 IN OUT V V, OUT Accuracy(1),(4) 10mA<IOUT<800mA, –2 2 % –40°C<T <85°C, J TPS73701(DCQ) OverV ,I , V +0.5V≤V ≤5.5V; IN OUT OUT IN –3 ±0.5% 3 andT 10mA≤I ≤1A OUT ΔV Lineregulation(1) V +0.5V≤V ≤5.5V 0.01 %/V OUT(ΔVIN) OUT(nom) IN 1mA≤I ≤1A 0.002 OUT ΔV Loadregulation %/mA OUT(ΔIOUT) 10mA≤I ≤1A 0.0005 OUT Dropoutvoltage(5) V I =1A 130 500 mV DO (V =V –0.1V) OUT IN OUT(nom) Z Outputimpedanceindropout 2.2V≤V ≤V +V 0.25 Ω OUT(DO) IN OUT DO I Outputcurrentlimit V =0.9×V 1.05 1.6 2.2 A CL OUT OUT(nom) I Short-circuitcurrent V =0V 450 mA OS OUT I Reverseleakagecurrent(6)(–I ) V ≤0.5V,0V≤V ≤V 0.1 μA REV IN EN IN OUT I =10mA 400 OUT I GNDpincurrent μA GND I =1A 1300 OUT I Shutdowncurrent[I ] V ≤0.5V,V ≤V ≤5.5 20 nA SHDN GND EN OUT IN I FBpincurrent(TPS73701) 0.1 0.6 μA FB Power-supplyrejectionratio f=100Hz,IOUT=1A 58 PSRR dB (ripplerejection) f=10kHz,I =1A 37 OUT Outputnoisevoltage V C =10μF 27×V μV n BW=10Hzto100kHz OUT OUT RMS V =3V,R =30Ω,C =1 t Start-uptime OUT L OUT 600 μs STR μF V ENpinhigh(enabled) 1.7 V V EN(HI) IN V ENpinlow(shutdown) 0 0.5 V EN(LO) I ENpincurrent(enabled) V =5.5V 20 nA EN(HI) EN Shutdown,temperatureincreasing 160 T Thermalshutdowntemperature °C sd Reset,temperaturedecreasing 140 T Operatingjunctiontemperature –40 125 °C J (1) MinimumV =V +V or2.2V,whicheverisgreater. IN OUT DO (2) ForV <1.6V,whenV ≤1.6V,theoutputlockstoV andmayresultinanover-voltageconditionontheoutput.Toavoidthis OUT(nom) IN IN situation,disablethedevicebeforepoweringdownV . IN (3) TPS73701istestedatV =1.2V. OUT (4) Toleranceofexternalresistorsnotincludedinthisspecification. (5) V isnotmeasuredforfixedoutputversionswithV <2.3VbecauseminimumV =2.2V. DO OUT(nom) IN (6) Fixed-voltageversionsonly;refertotheApplicationInformationsectionformoreinformation. Copyright©2006–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:TPS737

TPS737 SBVS067R–JANUARY2006–REVISEDDECEMBER2019 www.ti.com 6.6 Typical Characteristics ForallvoltageversionsatT =25°C,V =V +1V,I =10mA,V =2.2V,andC =2.2μF,unlessotherwise J IN OUT(nom) OUT EN OUT noted. 0.5 0.20 0.4 Referred to IOUT= 10mA Referred to VIN= VOUT+ 1.0V at IOUT= 10mA 0.15 0.3 -40°C +25°C 0.10 (%)UT 00..21 +125°C (%)UT 0.05 +125°C +25°C O O V V n 0 n 0 nge i -0.1 nge i -0.05 ha -0.2 ha -40°C C C -0.10 -0.3 -0.4 -0.15 -0.5 -0.20 0 100 200 300 400 500 600 700 800 900 1000 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 I (mA) V -V (V) OUT IN OUT Figure1.LoadRegulation Figure2.LineRegulation 200 200 V = 2.5V 180 OUT 180 160 160 +125°C +25°C 140 140 V) 120 V) 120 m m ( 100 ( 100 O O VD 80 VD 80 60 60 -40°C 40 40 20 20 0 0 0 100 200 300 400 500 600 700 800 900 1000 -50 -25 0 25 50 75 100 125 150 I (mA) Temperature (°C) OUT Figure3. DropoutVoltagevsOutputCurrent Figure4. DropoutVoltagevsTemperature 30 18 I = 10mA I = 10mA OUT OUT 16 25 14 %) %) Units ( 20 Units ( 1120 nt of 15 nt of 8 e e erc 10 erc 6 P P 4 5 2 0 0 -1.0-0.9-0.8-0.7-0.6-0.5-0.4-0.3-0.2-0.100.10.20.30.40.50.60.70.80.91.0 -100-90-80-70-60-50-40-30-20-100102030405060708090100 V Error(%) Worst Case dV /dT (ppm/°C) OUT OUT Figure5.OutputVoltageHistogram Figure6.OutputVoltageDriftHistogram 8 SubmitDocumentationFeedback Copyright©2006–2019,TexasInstrumentsIncorporated ProductFolderLinks:TPS737

TPS737 www.ti.com SBVS067R–JANUARY2006–REVISEDDECEMBER2019 Typical Characteristics (continued) ForallvoltageversionsatT =25°C,V =V +1V,I =10mA,V =2.2V,andC =2.2μF,unlessotherwise J IN OUT(nom) OUT EN OUT noted. 2500 3000 I = 1A OUT V = 5.0V IN 2500 2000 V = 5.0V IN 2000 A) A) 1500 (m V = 3.3V (mND VIN= 3.3V IGND 1500 IN IG 1000 1000 VIN= 2.2V VIN= 2.2V 500 500 0 0 0 200 400 600 800 1000 -50 -25 0 25 50 75 100 125 I (mA) Temperature (°C) OUT Figure7. GroundPinCurrentvsOutputCurrent Figure8. GroundPinCurrentvsTemperature 1 2.00 V = 0.5V ENABLE 1.80 V = V + 0.5V I IN OUT CL 1.60 A) 1.40 A) ent ( 1.20 (m 0.1 urr 1.00 D C IGN put 0.80 Out 0.60 I SC 0.40 0.20 V = 3.3V OUT 0.01 0 -50 -25 0 25 50 75 100 125 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 Temperature(°C) Output Voltage (V) Figure9. GroundPinCurrentinShutdownvsTemperature Figure10.CurrentLimitvsV (Foldback) OUT 2.0 2.0 V = 1.2V 1.9 1.9 OUT 1.8 1.8 A) 1.7 A) 1.7 mit ( 1.6 mit ( 1.6 Li 1.5 Li 1.5 nt nt urre 1.4 urre 1.4 C 1.3 C 1.3 1.2 1.2 1.1 1.1 1.0 1.0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 -50 -25 0 25 50 75 100 125 V (V) Temperature (°C) IN Figure11. CurrentLimitvsV Figure12. CurrentLimitvsTemperature IN Copyright©2006–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:TPS737

TPS737 SBVS067R–JANUARY2006–REVISEDDECEMBER2019 www.ti.com Typical Characteristics (continued) ForallvoltageversionsatT =25°C,V =V +1V,I =10mA,V =2.2V,andC =2.2μF,unlessotherwise J IN OUT(nom) OUT EN OUT noted. 90 40 I = 100mA I = 1mA 80 COUT = Any COUT = 1mF 35 OUT OUT 70 B) IOUT= 1mA 30 e Rejection (d 654000 ICOOUUTT== 1 AmnAy COUT= 10mF IOC= O10=0 1mmAF PSRR (dB) 221505 pl 30 Rip 10 Frequency = 10kHz 20 IOUT= 100mA COUT= 10mF C = 10mF 10 OUT 5 VOUT= 2.5V I = 100mA 0 0 OUT 10 100 1k 10k 100k 1M 10M 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Frequency (Hz) VIN-VOUT(V) Figure13. PSRR(RippleRejection)vsFrequency Figure14.PSRR(RippleRejection)vs(V –V ) IN OUT 1 60 C = 1mF 55 OUT 50 Hz) ms) 45 ÖV/ 0.1 Vr 40 m( COUT= 10mF (u eN VN 35 V = 2.5V 30 OUT C = 0μF OUT 25 R1= 39.2kΩ IOUT= 150mA 10Hz < Frequency < 100kHz 0.01 20 10 100 1k 10k 100k 10p 100p 1n 10n Frequency (Hz) C (F) FF Figure15.NoiseSpectralDensity Figure16.TPS73701RMSNoiseVoltagevsC FB 60 140 V =5.0V OUT 50 120 V =5.0V OUT 100 40 s) s) (uVrmN 30 VOUT=3.3V (uVrmN 8600 VOUT=3.3V V V 20 40 V =1.5V V =1.5V OUT OUT 10 20 CNR=0.01μF COUT=0μF 10Hz<Frequency<100kHz 10Hz<Frequency<100kHz 0 0 0.1 1 10 1p 10p 100p 1n 10n C (mF) C (F) OUT NR Figure17. RMSNoiseVoltagevsC Figure18. RMSNoiseVoltagevsC OUT NR 10 SubmitDocumentationFeedback Copyright©2006–2019,TexasInstrumentsIncorporated ProductFolderLinks:TPS737

TPS737 www.ti.com SBVS067R–JANUARY2006–REVISEDDECEMBER2019 Typical Characteristics (continued) ForallvoltageversionsatT =25°C,V =V +1V,I =10mA,V =2.2V,andC =2.2μF,unlessotherwise J IN OUT(nom) OUT EN OUT noted. C = 10nF C = 10nF NR NR COUT= 10mF V 200mV/div OUT COUT= 10mF 100mV/div V OUT 1A 5.3V 10mA 4.3V IOUT VIN 10ms/div 10ms/div Figure19.TPS73733LoadTransientResponse Figure20.TPS73733LineTransientResponse V RL= 20W OUT COUT= 10mF 1V/div RCLOU=T 2=0 1WmF 1V/div RCLOU=T 2=0 1WmF RL= 20W COUT= 10mF V OUT 2V 2V V EN 1V/div 1V/div 0V 0V V EN 100ms/div 100ms/div Figure21.TPS73701TurnonResponse Figure22.TPS73701TurnoffResponse 6 10 5 V IN 4 V OUT 1 3 A) n Volts 2 (BLE A 1 EN I 0.1 0 -1 -2 0.01 50ms/div -50 -25 0 25 50 75 100 125 Temperature(°C) Figure23.TPS73701,VOUT=3.3-VPowerUpandPower Figure24. IENvsTemperature Down Copyright©2006–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:TPS737

TPS737 SBVS067R–JANUARY2006–REVISEDDECEMBER2019 www.ti.com Typical Characteristics (continued) ForallvoltageversionsatT =25°C,V =V +1V,I =10mA,V =2.2V,andC =2.2μF,unlessotherwise J IN OUT(nom) OUT EN OUT noted. 60 160 55 140 50 120 45 100 )MS A) VR 40 (n 80 ( B VN 35 IF 60 V = 2.5V 30 OUT 40 C = 0mF OUT 25 R1= 39.2kW 20 10Hz < Frequency < 100kHz 20 0 10p 100p 1n 10n -50 -25 0 25 50 75 100 125 C (F) Temperature (°C) FB Figure25.TPS73701RMSNoiseVoltagevsCFB Figure26.TPS73701IFBvsTemperature C = 10nF V = 2.5V FB OUT 100mV/div R1= 39.2kW COUT= 10mF VOUT 100mV/div COUT= 10mF CFB= 10nF VOUT 4.5V 250mA 3.5V I V OUT IN 10mA 10ms/div 5ms/div Figure27.TPS73701LoadTransient,AdjustableVersion Figure28.TPS73701LineTransient,AdjustableVersion 12 SubmitDocumentationFeedback Copyright©2006–2019,TexasInstrumentsIncorporated ProductFolderLinks:TPS737

TPS737 www.ti.com SBVS067R–JANUARY2006–REVISEDDECEMBER2019 7 Detailed Description 7.1 Overview The TPS737xx belongs to a family of new generation LDO regulators that use an NMOS pass transistor to achieve ultralow dropout performance, reverse current blockage, and freedom from output capacitor constraints. These features combined with an enable input make the TPS737xx ideal for portable applications. This regulator family offers a wide selection of fixed-output voltage versions and an adjustable-output version. All versions have thermalandovercurrentprotection,includingfoldbackcurrent-limit. 7.2 Functional Block Diagrams IN 4MHz ChargePump EN Thermal Protection Ref Servo 27kW Bandgap Error Amp Current Limit OUT 8kW GND R 1 R1+R2=80kW R2 NR Figure29. Fixed-VoltageVersion Copyright©2006–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:TPS737

TPS737 SBVS067R–JANUARY2006–REVISEDDECEMBER2019 www.ti.com Functional Block Diagrams (continued) IN Standard 1% Resistor Values for Common Output Voltages VOUT R1 R2 4-MHZ ChargePump 1.2 V Short Open 1.5 V 23.2 kW 95.3 kW EN Thermal 1.8 V 28.0 kW 56.2 kW Protection Ref 2.5 V 39.2 kW 36.5 kW Servo 2.8 V 44.2 kW 33.2 kW 27kW 3.0 V 46.4 kW 30.9 kW Bandgap Error 3.3 V 52.3 kW 30.1 kW Amp OUT NOTE: VOUT= (R1+ R2)/R2´1.204; Current R1|| R2@19kWfor best Limit accuracy. GND 8kW 80kW R 1 FB R 2 Figure30. Adjustable-VoltageVersion 7.3 Feature Description 7.3.1 OutputNoise A precision bandgap reference is used to generate the internal reference voltage, V . This reference is the ref dominant noise source within the TPS737xx and it generates approximately 32 μV (10 Hz to 100 kHz) at the RMS reference output (NR). The regulator control loop gains up the reference noise with the same gain as the referencevoltage,sothatthenoisevoltageoftheregulatorisapproximatelygivenby: (R +R ) V V =32mV ´ 1 2 =32mV ´ OUT N RMS RMS R V 2 REF (1) BecausethevalueofV is1.2V,thisrelationshipreducesto: R æmV ö VN(mVRMS)=27ç RMS ÷´VOUT(V) è V ø (2) forthecaseofnoC . NR An internal 27-kΩ resistor in series with the noise reduction pin (NR) forms a low-pass filter for the voltage reference when an external noise reduction capacitor, C , is connected from NR to ground. For C = 10 nF, NR NR the total noise in the 10-Hz to 100-kHz bandwidth is reduced by a factor of approximately 3.2, giving the approximaterelationship: ( m V ) V (mV ) = 8.5 RMS xV (V) N RMS V OUT (3) forC =10nF. NR ThisnoisereductioneffectisshownasRMSNoiseVoltagevsC intheTypicalCharacteristicssection. NR 14 SubmitDocumentationFeedback Copyright©2006–2019,TexasInstrumentsIncorporated ProductFolderLinks:TPS737

TPS737 www.ti.com SBVS067R–JANUARY2006–REVISEDDECEMBER2019 Feature Description (continued) The TPS73701 adjustable version does not have the NR pin available. However, connecting a feedback capacitor, C , from the output to the feedback pin (FB) reduces output noise and improve load transient FB performance.Thiscapacitorshouldbelimitedto0.1µF. The TPS737xx uses an internal charge pump to develop an internal supply voltage sufficient to drive the gate of the NMOS pass element above V . The charge pump generates approximately 250 μV of switching noise at OUT approximately 4 MHz; however, charge-pump noise contribution is negligible at the output of the regulator for mostvaluesofI andC . OUT OUT 7.3.2 InternalCurrentLimit The TPS737xx internal current limit helps protect the regulator during fault conditions. Foldback current-limit helps to protect the regulator from damage during output short-circuit conditions by reducing current-limit when V dropsbelow0.5V.SeeFigure10intheTypicalCharacteristicssection. OUT Note from Figure 10 that approximately –0.2 V of V results in a current-limit of 0 mA. Therefore, if OUT is OUT forced below –0.2 V before EN goes high, the device may not start up. In applications that work with both a positiveandnegativevoltagesupply,the TPS737xxshouldbeenabledfirst. 7.3.3 EnablePinandShutdown The enable pin (EN) is active high and is compatible with standard TTL-CMOS levels. V below 0.5 V EN (maximum) turns the regulator off and drops the GND pin current to approximately 10 nA. When EN is used to shutdown the regulator, all charge is removed from the pass transistor gate, and the output ramps back up to a regulatedV (seeFigure21). OUT When shutdown capability is not required, EN can be connected to V . However, the pass gate may not be IN discharged using this configuration, and the pass transistor may be left on (enhanced) for a significant time after V hasbeenremoved.Thisscenariocanresult in reverse current flow (if the IN pin is low impedance) and faster IN ramp times upon power up. In addition, for V ramp times slower than a few milliseconds, the output may IN overshootuponpowerup. Note that current limit foldback can prevent device start-up under some conditions. See the Internal Current Limit sectionformoreinformation. 7.3.4 ReverseCurrent The NMOS pass element of the TPS737xx provides inherent protection against current flow from the output of the regulator to the input when the gate of the pass device is pulled low. To ensure that all charge is removed from the gate of the pass element, the EN pin must be driven low before the input voltage is removed. If the EN pinisnotdrivenlow,thepasselementmaybeleftonbecauseofstoredchargeonthegate. After the EN pin is driven low, no bias voltage is needed on any pin for reverse current blocking. Reverse current is specified as the current flowing out of the IN pin because of voltage applied on the OUT pin. There is additional current flowing into the OUT pin as a result of the 80-kΩ internal resistor divider to ground (see Figure29andFigure30). FortheTPS73701,reversecurrentmayflowwhenV ismorethan1.0VaboveV . FB IN 7.4 Device Functional Modes DrivingtheENpinover1.7Vturnsontheregulator.Driving the EN pin below 0.5 V causes the regulator to enter shutdownmode.Inshutdown,thecurrentconsumptionofthedeviceisreducedto20nA,typically. Copyright©2006–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:TPS737

TPS737 SBVS067R–JANUARY2006–REVISEDDECEMBER2019 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 8.1 Application Information The TPS737xx family of LDO regulators use an NMOS pass transistor to achieve ultra-low-dropout performance, reverse current blockage, and freedom from output capacitor constraints. These features, combined with low noise and an enable input, make the TPS737xx ideal for portable applications. This regulator family offers a wide selection of fixed-output voltage versions and an adjustable-output version. All versions have thermal and overcurrentprotection,includingfoldbackcurrent-limit. 8.2 Typical Application Figure 31 shows the basic circuit connections for the fixed-voltage models. Figure 32 gives the connections for theadjustableoutputversion(TPS73701). VIN IN OUT VOUT TPS737xx EN GND ON OFF Figure31. TypicalApplicationCircuitforFixed-VoltageVersions Optional input capacitor. May improve source Output capacitor impedance, noise, or PSRR. must be³1.0mF. VIN IN OUT VOUT TPS73701 R C 1 FB EN GND FB ON R OFF 2 (R +R) Optional capacitor VOUT= 1R 2 x 1.204 reduces output noise 2 and improves transient response. Figure32. TypicalApplicationCircuitforAdjustable-VoltageVersion 8.2.1 DesignRequirements R and R can be calculated for any output voltage using the formula shown in Figure 32. Sample resistor values 1 2 forcommonoutputvoltagesareshowninFigure30. For best accuracy, make the parallel combination of R and R approximately equal to 19 kΩ. This 19 kΩ, in 1 2 addition to the internal 8-kΩ resistor, presents the same impedance to the error amp as the 27-kΩ bandgap referenceoutput.Thisimpedancehelpscompensateforleakagesintotheerrorampterminals. 8.2.2 DetailedDesignProcedure Provide an input supply with adequate headroom to account for dropout and output current to compensate for the GND terminal current and to power the load. Further, select adequate input and output capacitors as discussedinInputandOutputCapacitorRequirements. 16 SubmitDocumentationFeedback Copyright©2006–2019,TexasInstrumentsIncorporated ProductFolderLinks:TPS737

TPS737 www.ti.com SBVS067R–JANUARY2006–REVISEDDECEMBER2019 Typical Application (continued) 8.2.2.1 InputandOutputCapacitorRequirements Although an input capacitor is not required for stability if input impedance is very low, it is good analog design practice to connect a 0.1-μF to 1-μF low equivalent series resistance (ESR) capacitor across the input supply near the regulator. This capacitor counteracts reactive input sources and improves transient response, noise rejection, and ripple rejection. A higher-value capacitor may be necessary if large, fast rise-time load transients areanticipatedorthedeviceislocatedseveralinchesfromthepowersource. The TPS737xx requires a 1-μF output capacitor for stability. It is designed to be stable for all available types and values of capacitors. In applications where multiple low-ESR capacitors are in parallel, ringing may occur when the product of C and total ESR drops below 50 nF. Total ESR includes all parasitic resistances, including OUT capacitorESRandboard,socket,andsolderjointresistance.Inmostapplications,thesumofcapacitorESRand traceresistancemeetsthisrequirement. 8.2.2.2 DropoutVoltage The TPS737xx uses an NMOS pass transistor to achieve extremely low dropout. When (V – V ) is less than IN OUT the dropout voltage (V ), the NMOS pass device is in its linear region of operation and the input-to-output DO resistanceistheR oftheNMOSpasselement. DS(on) For large step changes in load current, the TPS737xx requires a larger voltage drop from V to V to avoid IN OUT degraded transient response. The boundary of this transient dropout region is approximately twice the DC dropout.Valuesof(V –V )abovethislineensurenormaltransientresponse. IN OUT Operating in the transient dropout region can cause an increase in recovery time. The time required to recover from a load transient is a function of the magnitude of the change in load current rate, the rate of change in load current, and the available headroom (V -to-V voltage drop). Under worst-case conditions [full-scale IN OUT instantaneous load change with (V – V ) close to DC dropout levels], the TPS737xx can take a couple of IN OUT hundredmicrosecondstoreturntothespecifiedregulationaccuracy. 8.2.2.3 TransientResponse The low open-loop output impedance provided by the NMOS pass element in a voltage follower configuration allows operation without a 1-µF output capacitor. As with any regulator, the addition of additional capacitance from the OUT pin to ground reduces undershoot magnitude but increases its duration. In the adjustable version, theadditionofacapacitor,C ,fromtheOUTpintotheFBpinwillalsoimprovethetransientresponse. FB The TPS737xx does not have active pulldown when the output is over-voltage. This architecture allows applications that connect higher voltage sources, such as alternate power supplies, to the output. This architecturealsoresultsinanoutputovershootofseveralpercentiftheload current quickly drops to zero when a capacitor is connected to the output. The duration of overshoot can be reduced by adding a load resistor. The overshoot decays at a rate determined by output capacitor C and the internal/external load resistance. The OUT rateofdecayisgivenby: (Fixedvoltageversion) dV V = OUT dT C ´80kWPR OUT LOAD (4) (Adjustablevoltageversion) dV V = OUT dT C ´80kWP(R +R )PR OUT 1 2 LOAD (5) Copyright©2006–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:TPS737

TPS737 SBVS067R–JANUARY2006–REVISEDDECEMBER2019 www.ti.com Typical Application (continued) 8.2.3 ApplicationCurves 90 1 I = 100mA I = 1mA 80 COOUUTT= Any COOUUTT= 1mF COUT= 1mF 70 B) IOUT= 1mA ple Rejection (d 65430000 ICOOUUTT== 1 AmnAy COUT= 10mF IOC= O10=0 1mmAF mÖeV/(Hz)N0.1 COUT= 10mF p Ri 20 I = 100mA OUT C = 10mF 10 OUT I = 150mA OUT 0 0.01 10 100 1k 10k 100k 1M 10M 10 100 1k 10k 100k Frequency (Hz) Frequency (Hz) Figure33.PSRR(RippleRejection)vsFrequency Figure34.NoiseSpectralDensity 6 5 V IN 4 V OUT 3 s olt 2 V 1 0 -1 -2 50ms/div Figure35.TPS73701,V =3.3-VPowerUpandPowerDown OUT 8.3 What To Do and What Not To Do Placeatleastone1-μFceramiccapacitorascloseaspossibletotheOUTterminaloftheregulator. Donotplacetheoutputcapacitormorethan10-mmawayfromtheregulator. Connect a 1-μF low equivalent series resistance (ESR) capacitor across the IN terminal and GND input of the regulatorforimprovedtransientperformance. Donotexceedtheabsolutemaximumratings. 9 Power Supply Recommendations The device is designed to operate from an input voltage supply range between 2.2 V and 5.5 V. The input voltage range provides adequate headroom in order for the device to have a regulated output. This input supply must be well regulated. If the input supply is noisy, additional input capacitors with low ESR help improve the outputnoiseperformance. 18 SubmitDocumentationFeedback Copyright©2006–2019,TexasInstrumentsIncorporated ProductFolderLinks:TPS737

TPS737 www.ti.com SBVS067R–JANUARY2006–REVISEDDECEMBER2019 10 Layout 10.1 Layout Guidelines To improve AC performance such as PSRR, output noise, and transient response, TI recommends designing the printed-circuit-board (PCB) with separate ground planes for V and V , with each ground plane connected IN OUT only at the GND pin of the device. In addition, the ground connection for the bypass capacitor should connect directlytotheGNDpinofthedevice. 10.1.1 PowerDissipation Knowing the device power dissipation and proper sizing of the thermal plane that is connected to the tab or pad iscriticaltoavoidingthermalshutdownandensuringreliableoperation. Power dissipation of the device depends on input voltage and load conditions and can be calculated using Equation6: P (cid:11)V (cid:16)V (cid:12)uI D IN OUT OUT (6) Power dissipation can be minimized and greater efficiency can be achieved by using the lowest possible input voltagenecessarytoachievetherequiredoutputvoltageregulation. OnbothSON(DRB)andSON(DRV)packages,theprimaryconductionpathforheatisthrough the exposed pad to the printed circuit board (PCB). The pad can be connected to ground or be left floating; however, it should be attached to an appropriate amount of copper PCB area to ensure the device does not overheat. On the SOT-223 (DCQ) package, the primary conduction path for heat is through the tab to the PCB. That tab should be connected to ground. The maximum junction-to-ambient thermal resistance depends on the maximum ambient temperature, maximum device junction temperature, and power dissipation of the device and can be calculated usingEquation7: (cid:11)(cid:14)125qC(cid:16)T (cid:12) R A TJA P D (7) Knowing the maximum R , the minimum amount of PCB copper area needed for appropriate heatsinking can θJA beestimatedusingFigure36. 160 DCQ 140 DRV 120 DRB W) 100 °(C/ 80 A qJ 60 40 20 0 0 1 2 3 4 5 6 7 8 9 10 Board Copper Area (in2) Note: θ valueatboardsizeof9in2(thatis,3in×3in)isaJEDECstandard. JA Figure36. θ vsBoardSize JA Figure36showsthevariationof θ asa function of ground plane copper area in the board. It is intended only as JA a guideline to demonstrate the effects of heat spreading in the ground plane and should not be used to estimate actualthermalperformanceinrealapplicationenvironments. NOTE When the device is mounted on an application PCB, TI strongly recommends using Ψ JT andΨ ,asexplainedinthesection. JB Copyright©2006–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:TPS737

TPS737 SBVS067R–JANUARY2006–REVISEDDECEMBER2019 www.ti.com Layout Guidelines (continued) 10.1.2 ThermalProtection Thermal protection disables the output when the junction temperature rises to approximately 160°C, allowing the device to cool. When the junction temperature cools to approximately 140°C, the output circuitry is again enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage due to overheating. Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heatsink. For reliable operation, junction temperature should be limited to 125°C maximum. To estimate the margin of safety in a complete design (including heatsink), increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. For good reliability, thermal protection should trigger at least 35°C above the maximum expected ambient condition of your application. This produces a worst- casejunctiontemperatureof125°Catthehighestexpectedambienttemperatureandworst-caseload. The internal protection circuitry of the TPS737xx has been designed to protect against overload conditions. It was not intended to replace proper heatsinking. Continuously running the TPS737xx into thermal shutdown degradesdevicereliability. 10.1.3 EstimatingJunctionTemperature Using the thermal metrics Ψ and Ψ , as shown in the Thermal Information table, the junction temperature can JT JB be estimated with corresponding formulas (given in Equation 8). For backward compatibility, an older θ ,Top JC parameterislistedaswell. Y : T = T +Y ·P JT J T JT D Y : T = T +Y ·P JB J B JB D (8) Where P is the power dissipation shown by Equation 6, T is the temperature at the center-top of the IC D T package, and T is the PCB temperature measured 1-mm away from the IC package on the PCB surface (as B Figure38shows). NOTE Both T and T can be measured on actual application boards using a thermo-gun (an T B infraredthermometer). For more information about measuring T and T , see the application note, Using New Thermal Metrics T B (SBVA025),availablefordownloadatwww.ti.com. By looking at Figure 37, the new thermal metrics (Ψ and Ψ ) have very little dependency on board size. That JT JB is, using Ψ or Ψ with Equation 8 is a good way to estimate T by simply measuring T or T , regardless of the JT JB J T B applicationboardsize. 35 30 DRV W) 25 DCQ YJB C/ DRB °( 20 B YJ d 15 DRV anT DCQ YJT YJ 10 DRB 5 0 0 1 2 3 4 5 6 7 8 9 10 Board Copper Area (in2) Figure37. Ψ andΨ vsBoardSize JT JB 20 SubmitDocumentationFeedback Copyright©2006–2019,TexasInstrumentsIncorporated ProductFolderLinks:TPS737

TPS737 www.ti.com SBVS067R–JANUARY2006–REVISEDDECEMBER2019 Layout Guidelines (continued) For a more detailed discussion of why TI does not recommend using θ to determine thermal characteristics, JC(top) refer to application report, Using New Thermal Metrics (SBVA025), available for download at www.ti.com. For further information, refer to application report, IC Package Thermal Metrics (SPRA953), also available on the TI website. T B X 1mm T on top T T on top of IC T of IC TBon PCB TBon PCB surface surface T T X 1mm 1mm See note (1) (a) Example DRB (SON) Package Measurement (b) Example DRV (SON) Package Measurement (c) Example DCQ (SOT-223) Package Measurement (1) Powerdissipationmaylimitoperatingrange.CheckThermalInformationtable. Figure38. MeasuringPointsforT andT T B 10.2 Layout Example GND PLANE C OUT V OUT TPS73701 VIN DRV 1 6 C R FF 1 2 5 N/C CIN R 2 3 4 GND PLANE Figure39. LayoutExample Copyright©2006–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:TPS737

TPS737 SBVS067R–JANUARY2006–REVISEDDECEMBER2019 www.ti.com 11 Device and Documentation Support 11.1 Device Support 11.1.1 DevelopmentSupport 11.1.1.1 EvaluationModules An evaluation module (EVM) is available to assist in the initial circuit performance evaluation using the TPS737xx. The TPS73701DRVEVM-529 evaluation module (and related user's guide) can be requested at the TexasInstrumentswebsitethroughtheproductfoldersorpurchaseddirectlyfromtheTIeStore. 11.1.1.2 SpiceModels Computer simulation of circuit performance using SPICE is often useful when analyzing the performance of analog circuits and systems. A SPICE model for the TPS737 is available through the product folders under Tools &Software. 11.1.2 DeviceNomenclature Table1.OrderingInformation(1) PRODUCT V (1) OUT xxisnominaloutputvoltage(forexample,25=2.5V,01=Adjustable (2)). TPS737xxyyyz yyyisthepackagedesignator. zisthepackagequantity. (1) ForthemostcurrentpackageandorderinginformationseethePackageOptionAddendumattheendofthisdocument,orseethe deviceproductfolderatwww.ti.com. (2) Forfixed1.20-Voperation,tieFBtoOUT. 11.2 Documentation Support 11.2.1 RelatedDocumentation • TexasInstruments,UsingNewThermalMetricsapplicationreport • TexasInstruments,TPS73701DRVEVM-529User'sGuideuserguide • TexasInstruments,TMS320DM644xPowerReferenceDesign applicationreport • TexasInstruments,TPS73x01DRBEVM-518User'sGuideuserguide 11.3 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 11.4 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight fromtheexperts.Searchexistinganswersoraskyourownquestiontogetthequickdesignhelpyouneed. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do notnecessarilyreflectTI'sviews;seeTI'sTermsofUse. 11.5 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 22 SubmitDocumentationFeedback Copyright©2006–2019,TexasInstrumentsIncorporated ProductFolderLinks:TPS737

TPS737 www.ti.com SBVS067R–JANUARY2006–REVISEDDECEMBER2019 11.6 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage. ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemore susceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications. 11.7 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©2006–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:TPS737

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS73701DCQ ACTIVE SOT-223 DCQ 6 78 Green (RoHS SN Level-2-260C-1 YEAR -40 to 125 TPS73701 & no Sb/Br) TPS73701DCQG4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 TPS73701 & no Sb/Br) TPS73701DCQR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS SN Level-2-260C-1 YEAR -40 to 125 TPS73701 & no Sb/Br) TPS73701DCQRG4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 TPS73701 & no Sb/Br) TPS73701DRBR ACTIVE SON DRB 8 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 BZN & no Sb/Br) TPS73701DRBRG4 ACTIVE SON DRB 8 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 BZN & no Sb/Br) TPS73701DRBT ACTIVE SON DRB 8 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 BZN & no Sb/Br) TPS73701DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 QTN & no Sb/Br) TPS73701DRVT ACTIVE WSON DRV 6 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 QTN & no Sb/Br) TPS73718DCQ ACTIVE SOT-223 DCQ 6 78 Green (RoHS SN Level-2-260C-1 YEAR -40 to 125 TPS73718 & no Sb/Br) TPS73718DCQG4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 TPS73718 & no Sb/Br) TPS73718DCQR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS SN Level-2-260C-1 YEAR -40 to 125 TPS73718 & no Sb/Br) TPS73718DCQRG4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 TPS73718 & no Sb/Br) TPS73718DRBR ACTIVE SON DRB 8 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 RAL & no Sb/Br) TPS73718DRBT ACTIVE SON DRB 8 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 RAL & no Sb/Br) TPS73725DCQ ACTIVE SOT-223 DCQ 6 78 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 TPS73725 & no Sb/Br) TPS73725DCQR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS SN Level-2-260C-1 YEAR -40 to 125 TPS73725 & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS73725DCQRG4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 TPS73725 & no Sb/Br) TPS73730DRBR ACTIVE SON DRB 8 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 CVT & no Sb/Br) TPS73730DRBT ACTIVE SON DRB 8 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 CVT & no Sb/Br) TPS73733DCQ ACTIVE SOT-223 DCQ 6 78 Green (RoHS SN Level-2-260C-1 YEAR -40 to 125 TPS73733 & no Sb/Br) TPS73733DCQG4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 TPS73733 & no Sb/Br) TPS73733DCQR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS SN Level-2-260C-1 YEAR -40 to 125 TPS73733 & no Sb/Br) TPS73733DCQRG4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 TPS73733 & no Sb/Br) TPS73733DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 SIJ & no Sb/Br) TPS73733DRVT ACTIVE WSON DRV 6 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 SIJ & no Sb/Br) TPS73734DCQ ACTIVE SOT-223 DCQ 6 78 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 OCH & no Sb/Br) TPS73734DCQR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 OCH & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TPS737 : •Automotive: TPS737-Q1 NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 17-May-2020 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS73701DCQR SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3 TPS73701DCQRG4 SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3 TPS73701DRBR SON DRB 8 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS73701DRBR SON DRB 8 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS73701DRBR SON DRB 8 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS73701DRBT SON DRB 8 250 180.0 12.5 3.3 3.3 1.1 8.0 12.0 Q2 TPS73701DRBT SON DRB 8 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS73701DRVR WSON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS73701DRVT WSON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS73718DCQR SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3 TPS73718DCQRG4 SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3 TPS73718DRBR SON DRB 8 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS73718DRBT SON DRB 8 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS73725DCQR SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3 TPS73725DCQRG4 SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3 TPS73730DRBR SON DRB 8 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS73730DRBT SON DRB 8 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS73733DCQR SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 17-May-2020 Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS73733DCQRG4 SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3 TPS73733DRVR WSON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS73733DRVT WSON DRV 6 250 180.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS73734DCQR SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS73701DCQR SOT-223 DCQ 6 2500 367.0 367.0 35.0 TPS73701DCQRG4 SOT-223 DCQ 6 2500 346.0 346.0 29.0 TPS73701DRBR SON DRB 8 3000 552.0 367.0 36.0 TPS73701DRBR SON DRB 8 3000 338.0 355.0 50.0 TPS73701DRBR SON DRB 8 3000 367.0 367.0 35.0 TPS73701DRBT SON DRB 8 250 338.0 355.0 50.0 TPS73701DRBT SON DRB 8 250 552.0 185.0 36.0 TPS73701DRVR WSON DRV 6 3000 195.0 200.0 45.0 TPS73701DRVT WSON DRV 6 250 195.0 200.0 45.0 TPS73718DCQR SOT-223 DCQ 6 2500 367.0 367.0 35.0 TPS73718DCQRG4 SOT-223 DCQ 6 2500 346.0 346.0 29.0 TPS73718DRBR SON DRB 8 3000 367.0 367.0 35.0 TPS73718DRBT SON DRB 8 250 210.0 185.0 35.0 PackMaterials-Page2

PACKAGE MATERIALS INFORMATION www.ti.com 17-May-2020 Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS73725DCQR SOT-223 DCQ 6 2500 367.0 367.0 35.0 TPS73725DCQRG4 SOT-223 DCQ 6 2500 346.0 346.0 41.0 TPS73730DRBR SON DRB 8 3000 367.0 367.0 35.0 TPS73730DRBT SON DRB 8 250 210.0 185.0 35.0 TPS73733DCQR SOT-223 DCQ 6 2500 367.0 367.0 35.0 TPS73733DCQRG4 SOT-223 DCQ 6 2500 346.0 346.0 41.0 TPS73733DRVR WSON DRV 6 3000 195.0 200.0 45.0 TPS73733DRVT WSON DRV 6 250 195.0 200.0 45.0 TPS73734DCQR SOT-223 DCQ 6 2500 346.0 346.0 41.0 PackMaterials-Page3

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PACKAGE OUTLINE DRB0008A VSON - 1 mm max height SCALE 4.000 PLASTIC SMALL OUTLINE - NO LEAD 3.1 B A 2.9 PIN 1 INDEX AREA 3.1 2.9 C 1 MAX SEATING PLANE 0.05 0.08 C DIM A 0.00 OPT 1 OPT 2 1.5 0.1 (0.1) (0.2) 4X (0.23) EXPOSED (DIM A) TYP THERMAL PAD 4 5 2X 1.95 1.75 0.1 8 1 6X 0.65 0.37 8X 0.25 PIN 1 ID 0.1 C A B (OPTIONAL) (0.65) 0.05 C 0.5 8X 0.3 4218875/A 01/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. www.ti.com

EXAMPLE BOARD LAYOUT DRB0008A VSON - 1 mm max height PLASTIC SMALL OUTLINE - NO LEAD (1.5) (0.65) SYMM 8X (0.6) (0.825) 8X (0.31) 1 8 SYMM (1.75) (0.625) 6X (0.65) 4 5 (R0.05) TYP ( 0.2) VIA TYP (0.23) (0.5) (2.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:20X 0.07 MAX 0.07 MIN ALL AROUND ALL AROUND EXPOSED EXPOSED METAL METAL SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4218875/A 01/2018 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. www.ti.com

EXAMPLE STENCIL DESIGN DRB0008A VSON - 1 mm max height PLASTIC SMALL OUTLINE - NO LEAD (0.65) 4X (0.23) SYMM METAL TYP 8X (0.6) 4X (0.725) 8X (0.31) 1 8 (2.674) SYMM (1.55) 6X (0.65) 4 5 (R0.05) TYP (1.34) (2.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 84% PRINTED SOLDER COVERAGE BY AREA SCALE:25X 4218875/A 01/2018 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

GENERIC PACKAGE VIEW DRV 6 WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4206925/F

PACKAGE OUTLINE DRV0006D WSON - 0.8 mm max height SCALE 5.500 PLASTIC SMALL OUTLINE - NO LEAD B 2.1 A 1.9 PIN 1 INDEX AREA 2.1 1.9 0.8 C 0.7 SEATING PLANE 0.08 C (0.2) TYP 1 0.1 0.05 EXPOSED 0.00 THERMAL PAD 3 4 2X 7 1.3 1.6 0.1 6 1 4X 0.65 0.35 6X PIN 1 ID 0.3 0.25 6X (OPTIONAL) 0.2 0.1 C A B 0.05 C 4225563/A 12/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. www.ti.com

EXAMPLE BOARD LAYOUT DRV0006D WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD 6X (0.45) (1) 1 7 6X (0.3) 6 SYMM (1.6) (1.1) 4X (0.65) 4 3 (R0.05) TYP SYMM ( 0.2) VIA (1.95) TYP LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:25X 0.07 MAX 0.07 MIN ALL AROUND ALL AROUND EXPOSED EXPOSED METAL METAL SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK (PREFERRED) DEFINED SOLDER MASK DETAILS 4225563/A 12/2019 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If some or all are implemented, recommended via locations are shown. www.ti.com

EXAMPLE STENCIL DESIGN DRV0006D WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD SYMM 6X (0.45) METAL 1 7 6X (0.3) 6 (0.45) SYMM 4X (0.65) (0.7) 4 3 (R0.05) TYP (1) (1.95) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD #7 88% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:30X 4225563/A 12/2019 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

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