TPS73601-EP, TPS73615-EP, TPS73618-EP TPS73625-EP, TPS73630-EP, TPS73632-EP, TPS73633-EP www.ti.com.................................................................................................................................................. SGLS326C–APRIL2006–REVISEDFEBRUARY2009 CAP-FREE NMOS 400 mA LOW-DROPOUT REGULATORS WITH REVERSE CURRENT PROTECTION FEATURES – AdjustableOutputfrom1.2Vto5.5V 1 • ControlledBaseline – CustomOutputsAvailable 2 – OneAssembly APPLICATIONS – OneTestSite • Portable/Battery-PoweredEquipment – OneFabricationSite • Post-RegulationforSwitchingSupplies • ExtendedTemperaturePerformanceof • Noise-SensitiveCircuitrySuchasVCOs –55°Cto125°C • PointofLoadRegulationforDSPs,FPGAs, • EnhancedDiminishingManufacturingSources ASICs,andMicroprocessors (DMS)Support • EnhancedProduct-ChangeNotification • QualificationPedigree (1) Optional Optional • StableWithNoOutputCapacitororAnyValue VIN IN OUT VOUT orTypeofCapacitor TPS736xx • InputVoltageRangeof1.7Vto5.5V EN GND NR • Ultra-LowDropoutVoltage:75mVTypical • ExcellentLoadTransientResponse—Withor Optional WithoutOptionalOutputCapacitor • NewNMOSTopologyDeliversLowReverse Typical Application Circuit for Fixed-Voltage Versions LeakageCurrent • LowNoise:30m V Typical RMS (10Hzto100kHz) • 0.5%InitialAccuracy • 1%OverallAccuracyOverLine,Load,and Temperature • LessThan1-m AMaxI inShutdownMode Q • ThermalShutdownandSpecifiedMin/Max CurrentLimitProtection • AvailableinMultipleOutputVoltageVersions – FixedOutputsof1.2Vto3.3V (1) ComponentqualificationinaccordancewithJEDECand industrystandardstoensurereliableoperationoveran extendedtemperaturerange.Thisincludes,butisnotlimited to,HighlyAcceleratedStressTest(HAST)orbiased85/85, temperaturecycle,autoclaveorunbiasedHAST, electromigration,bondintermetalliclife,andmoldcompound life.Suchqualificationtestingshouldnotbeviewedas justifyinguseofthiscomponentbeyondspecified performanceandenvironmentallimits. N/C - No internal connection 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. Alltrademarksarethepropertyoftheirrespectiveowners. 2 PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2006–2009,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

TPS73601-EP, TPS73615-EP, TPS73618-EP TPS73625-EP, TPS73630-EP, TPS73632-EP, TPS73633-EP SGLS326C–APRIL2006–REVISEDFEBRUARY2009.................................................................................................................................................. www.ti.com DESCRIPTION The TPS736xx family of low-dropout (LDO) linear voltage regulators uses a new topology—an NMOS pass element in a voltage-follower configuration. This topology is stable using output capacitors with low ESR and allows operation without a capacitor. It also provides high reverse blockage (low reverse current) and ground-pin currentthatisnearlyconstantoverallvaluesofoutputcurrent. The TPS736xx uses an advanced BiCMOS process to yield high precision while delivering low dropout voltages and low ground-pin current. Current consumption, when not enabled, is under 1 m A and ideal for portable applications. The low output noise (30 m V with 0.1-m F C ) is ideal for powering VCOs. These devices are RMS NR protectedbythermalshutdownandfoldbackcurrentlimit. This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage. ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemore susceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications. PRODUCTINFORMATION PRODUCT V (1) OUT xxisnormaloutputvoltage(forexample,25=2.5V,01=Adjustable(2)). TPS736xxMyyyREP yyyispackagedesignator. zispackagequantity. (1) Additionaloutputvoltagesfrom1.25Vto4.3Vin100mVincrementsareavailableonaquick-turnbasisusinginnovativefactory EEPROMprogramming.Minimumorderquantitiesapply;contactTIfordetailsandavailability. (2) Forfixed1.2-Voperation,tieFBtoOUT. ORDERINGINFORMATION(1) T PACKAGE(2) ORDERABLEPARTNUMBER TOP-SIDEMARKING A TPS73601MDBVREP PJRM TPS73615MDBVREP T59 TPS73618MDBVREP T60 SOT23-DBV TPS73625MDBVREP T61 –55°Cto125°C TPS73630MDBVREP T62 TPS73632MDBVREP T63 TPS73633MDBVREP T64 SOT223-DCQ TPS73601MDCQREP PWZM SON-DRB TPS73601MDRBREP PMNM (1) Forthemostcurrentpackageandorderinginformation,seethePackageOptionAddendumattheendofthisdocument,orseetheTI websiteatwww.ti.com. (2) Packagedrawings,thermaldata,andsymbolizationareavailableatwww.ti.com/packaging. TERMINALFUNCTIONS SOT23 SOT223 3x3SON NAME (DBV) (DCQ) (DRB) DESCRIPTION PINNO. PINNO. PINNO. IN 1 1 8 Unregulatedinputsupply GND 2 3,6 4,Pad Ground EN 3 5 5 Enable.DrivingENhighturnsontheregulator.Drivingthispinlowputstheregulatorinto shutdownmode.SeetheShutdownsectionunderApplicationsInformationformoredetails. ENcanbeconnectedtoINifnotused. NR 4 4 3 Fixed-voltageversionsonly.Connectinganexternalcapacitortothispinbypassesnoise generatedbytheinternalbandgap,reducingoutputnoisetolowlevels. FB 4 4 3 Feedback.Adjustable-voltageversiononly.Thisistheinputtothecontrollooperror amplifierandisusedtosettheoutputvoltageofthedevice. OUT 5 2 1 Outputoftheregulator.Therearenooutputcapacitorrequirementsforstability. 2 SubmitDocumentationFeedback Copyright©2006–2009,TexasInstrumentsIncorporated ProductFolderLink(s):TPS73601-EP TPS73615-EP TPS73618-EPTPS73625-EP TPS73630-EP TPS73632-EP TPS73633-EP

TPS73601-EP, TPS73615-EP, TPS73618-EP TPS73625-EP, TPS73630-EP, TPS73632-EP, TPS73633-EP www.ti.com.................................................................................................................................................. SGLS326C–APRIL2006–REVISEDFEBRUARY2009 16 14 12 e d lif 10 e at m sti 8 e s r a Ye 6 4 2 0 100 110 120 130 140 150 160 Continuous TJ − (cid:1)C A. T =T ×W+T (Standard.JESD51conditions) J JA A Figure1.TPS736xxDBVzEPEstimatedDeviceLifeatElevatedTemperaturesElectromigrationFailMode Copyright©2006–2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLink(s):TPS73601-EP TPS73615-EP TPS73618-EPTPS73625-EP TPS73630-EP TPS73632-EP TPS73633-EP

TPS73601-EP, TPS73615-EP, TPS73618-EP TPS73625-EP, TPS73630-EP, TPS73632-EP, TPS73633-EP SGLS326C–APRIL2006–REVISEDFEBRUARY2009.................................................................................................................................................. www.ti.com ABSOLUTE MAXIMUM RATINGS overoperatingfree-airtemperaturerangeunlessotherwisenoted(1) UNIT V range –0.3to6 V IN V range –0.3to6 V EN V range –0.3to5.5 V OUT Peakoutputcurrent Internallylimited Outputshort-circuitduration Indefinite Continuoustotalpowerdissipation SeeDissipationRatingsTable Junctiontemperaturerange,T –55to150 °C J Storagetemperaturerange –65to150 °C Human-BodyModel-HBM 2 kV ESDrating Charged-DeviceModel-CDM 500 V (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedundertheElectricalCharacteristics isnotimplied.Exposuretoabsolutemaximumratedconditionsforextendedperiodsmayaffectdevicereliability. POWER DISSIPATION RATINGS(1) DERATINGFACTOR T ≤25°C T =70°C T =85°C BOARD PACKAGE Rq JC Rq JA ABOVET =25°C POWAERRATING POWAERRATING POWAERRATING A Low-K(2) DBV 64°C/W 255°C/W 3.9mW/°C 392mW 216mW 157mW High-K(3) DBV 64°C/W 180°C/W 5.6mW/°C 556mW 306mW 222mW Low-K(2) DCQ 15°C/W 53°C/W 18.9mW/°C 1887mW 1038mW 755mW High-K(3) DCQ 15°C/W 45°C/W 22.2mW/°C 2222mW 1222mW 889mW High-K(3)(4) DRB 1.2°C/W 40°C/W 25.0mW/°C 2500mW 1375mW 1000mW (1) SeetheThermalProtectionsectionformoreinformationrelatedtothermaldesign. (2) TheJEDECLow-K(1s)boarddesignusedtoderivethisdatawasa3in×3in,two-layerboardwith2ozcoppertracesontopofthe board. (3) TheJEDECHigh-K(2s2p)boarddesignusedtoderivethisdatawasa3in×3in,multilayerboardwith1ozinternalpowerandground planes,and2-ozcoppertracesonthetopandbottomoftheboard. (4) Basedonpreliminarythermalsimulations. 4 SubmitDocumentationFeedback Copyright©2006–2009,TexasInstrumentsIncorporated ProductFolderLink(s):TPS73601-EP TPS73615-EP TPS73618-EPTPS73625-EP TPS73630-EP TPS73632-EP TPS73633-EP

TPS73601-EP, TPS73615-EP, TPS73618-EP TPS73625-EP, TPS73630-EP, TPS73632-EP, TPS73633-EP www.ti.com.................................................................................................................................................. SGLS326C–APRIL2006–REVISEDFEBRUARY2009 ELECTRICAL CHARACTERISTICS overoperatingtemperaturerange(T =–55°Cto125°C),V =V +0.5V(1),I =10mA,V =1.7V,and A IN OUT(nom) OUT EN C =0.1m F(unlessotherwisenoted).TypicalvaluesareatT =25°C. OUT J PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V Inputvoltagerange(1) (2) 1.7 5.5 V IN V Internalreference(TPS73601) T =25°C 1.198 1.2 1.21 V FB J Outputvoltagerange 5.5– V V (TPS73601) FB V DO V Nominal T =25°C –0.5% 0.5% OUT J Accuracy(1) OverV ,I , V +0.5V≤V ≤5.5V, IN OUT OUT IN –1% ±0.5% 1% andT 10mA≤I ≤400mA OUT ΔV %/ΔV Lineregulation(1) V +0.5V≤V ≤5.5V 0.01 %/V OUT IN O(nom) IN 1mA≤I ≤400mA 0.002 OUT ΔV %/ΔI Loadregulation %/mA OUT OUT 10mA≤I ≤400mA 0.0005 OUT Dropoutvoltage(3) V I =400mA 75 200 mV DO (V =V –0.1V) OUT IN OUT(nom) Z (DO) Outputimpedanceindropout 1.7V≤V ≤V +V 0.25 Ω O IN OUT DO I Outputcurrentlimit V =0.9×V 400 650 800 mA CL OUT OUT(nom) I Short-circuitcurrent V =0V 450 mA SC OUT I Reverseleakagecurrent(4)(–I ) V ≤0.5V,0V≤V ≤V 0.1 15 m A REV IN EN IN OUT I =10mA(I ) 400 550 I Ground-pincurrent OUT Q m A GND I =400mA 800 1000 OUT I Shutdowncurrent(I ) V ≤0.5V,V ≤V ≤5.5V 0.02 1 m A SHDN GND EN OUT IN I FBpincurrent(TPS73601) 0.1 0.45 m A FB Power-supplyrejectionratio f=100Hz,IOUT=400mA 58 PSRR dB (ripplerejection) f=10kHz,I =400mA 37 OUT V Outputnoisevoltage COUT=10m F,NoCNR 27×VOUT m V N BW=10Hzto100kHz C =10m F,C =0.01m F 8.5×V RMS OUT NR OUT tSTR Startuptime VCOUT==03.0V1,mRFL=30Ω,COUT=1m F, 600 m s NR V (HI) Enablehigh(enabled) 1.7 V V EN IN V (LO) Enablelow(shutdown) 0 0.5 V EN I (HI) Enablepincurrent(enabled) V =5.5V 0.02 0.1 m A EN EN Shutdown,temperatureincreasing 160 T Thermalshutdowntemperature °C SD Reset,temperaturedecreasing 140 T Operatingambienttemperature -55 125 °C A (1) MinimumV =V +V or1.7V,whicheverisgreater. IN OUT DO (2) ForV <1.6V,whenV ≤1.6V,theoutputlockstoV andmayresultinadamagingover-voltagelevelontheoutput.Toavoid OUT(nom) IN IN thissituation,disablethedevicebeforepoweringdowntheV . IN (3) V isnotmeasuredfortheTPS73615(V =1.5V)sinceminimumV =1.7V. DO OUT(nom) IN (4) SeetheApplicationssectionformoreinformation. Copyright©2006–2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLink(s):TPS73601-EP TPS73615-EP TPS73618-EPTPS73625-EP TPS73630-EP TPS73632-EP TPS73633-EP

TPS73601-EP, TPS73615-EP, TPS73618-EP TPS73625-EP, TPS73630-EP, TPS73632-EP, TPS73633-EP SGLS326C–APRIL2006–REVISEDFEBRUARY2009.................................................................................................................................................. www.ti.com FUNCTIONAL BLOCK DIAGRAMS IN 4-MHz Charge Pump EN Thermal Protection Ref Servo 27 k(cid:1) Bandgap Error Amp Current Limit OUT GND 8 k(cid:1) R1 R1 + R2 = 80 k(cid:1) R2 NR Figure2.Fixed-VoltageVersion IN Standard 1% Resistor Values for Common Output Voltages VO R1 R2 4-MHz Charge Pump 1.2 V Short Open 1.5 V 23.2 kW 95.3 kW EN Thermal 1.8 V 28 kW 56.2 kW Protection Ref 2.5 V 39.2 kW 36.5 kW Servo 2.8 V 44.2 kW 33.2 kW 27 k(cid:1) 3 V 46.4 kW 30.9 kW Bandgap Error 3.3 V 52.3 kW 30.1 kW Amp OUT NOTE: VOUT = (R1 + R2)/R2 × 1.204; Current R1R2 @ 19 kW for best Limit accuracy GND 8 k(cid:1) 80 k(cid:1) R1 FB R2 Figure3.Adjustable-VoltageVersion 6 SubmitDocumentationFeedback Copyright©2006–2009,TexasInstrumentsIncorporated ProductFolderLink(s):TPS73601-EP TPS73615-EP TPS73618-EPTPS73625-EP TPS73630-EP TPS73632-EP TPS73633-EP

TPS73601-EP, TPS73615-EP, TPS73618-EP TPS73625-EP, TPS73630-EP, TPS73632-EP, TPS73633-EP www.ti.com.................................................................................................................................................. SGLS326C–APRIL2006–REVISEDFEBRUARY2009 TYPICAL CHARACTERISTICS Forallvoltageversions,T =25°C,V =V +0.5V,I =10mA,V =1.7V,andC =0.1m F J IN OUT(nom) OUT EN OUT (unlessotherwisenoted) LOADREGULATION LINEREGULATION 0.5 0.20 0.4 ReferredtoIOUT=10mA 0.15 Referred to VIN = VOUT + 0.5 V at IOUT = 10 mA 0.3 −40°C (%)UT 00..21 2152°5C°C (%)UT 00..1005 125°C 25°C O O V V n 0 n 0 ngei - 0.1 ngei - 0.05 ha - 0.2 ha −40°C C C - 0.10 - 0.3 - 0.4 - 0.15 - 0.5 - 0.20 0 50 100 150 200 250 300 350 400 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 IOUT(mA) VIN- VOUT(V) Figure4. Figure5. DROPOUTVOLTAGEvsOUTPUTCURRENT DROPOUTVOLTAGEvsTEMPERATURE 100 100 TPS73625DBV TPS73625DBV 125°C IOUT = 400 mA 80 80 mV) 60 25°C mV) 60 ( ( O O VD 40 VD 40 −40°C 20 20 0 0 0 50 100 150 200 250 300 350 400 - 50 - 25 0 25 50 75 100 125 IOUT(mA) Temperature (°C) Figure6. Figure7. OUTPUTVOLTAGEACCURACYHISTOGRAM OUTPUTVOLTAGEDRIFTHISTOGRAM 30 18 IOUT = 10 mA 16 IOUT = 10 mA 25 AllVoltageVersions 14 %) %) ( 20 ( 12 s s Unit Unit 10 15 of of 8 nt nt e e erc 10 erc 6 P P 4 5 2 0 0 098765432101234567890 000000000000000000000 1.0.0.0.0.0.0.0.0.0. 0.0.0.0.0.0.0.0.0.1. 10987654321 12345678910 --------V-OU-TError(%) -----W-or-st -Ca-se -dVOUT/dT (ppm/°C) Figure8. Figure9. Copyright©2006–2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLink(s):TPS73601-EP TPS73615-EP TPS73618-EPTPS73625-EP TPS73630-EP TPS73632-EP TPS73633-EP

TPS73601-EP, TPS73615-EP, TPS73618-EP TPS73625-EP, TPS73630-EP, TPS73632-EP, TPS73633-EP SGLS326C–APRIL2006–REVISEDFEBRUARY2009.................................................................................................................................................. www.ti.com TYPICAL CHARACTERISTICS (continued) Forallvoltageversions,T =25°C,V =V +0.5V,I =10mA,V =1.7V,andC =0.1m F J IN OUT(nom) OUT EN OUT (unlessotherwisenoted) GROUND-PINCURRENTvsOUTPUTCURRENT GROUNDPINCURRENTvsTEMPERATURE 1000 1000 900 900 IOUT = 400 mA 800 800 700 700 A) 600 A) 600 m( 500 m( 500 D D N N G400 G400 I I 300 300 200 VIN = 5.5 V 200 VIN = 5.5 V VIN = 4 V VIN = 3 V 100 VIN = 2 V 100 VIN = 2 V 0 0 0 100 200 300 400 - 50 - 25 0 25 50 75 100 125 IOUT(mA) Temperature (°C) Figure10. Figure11. CURRENTLIMITvsV GROUNDPINCURRENTinSHUTDOWN OUT (FOLDBACK) vsTEMPERATURE 800 1 700 VVEINN =A BVLOE =+ 00..55 VV I CL 600 A) m 500 Limit( 400 ISC m(A)D0.1 nt GN urre 300 I C 200 100 TPS73633 0 0.01 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 - 50 - 25 0 25 50 75 100 125 V (V) Temperature (°C) OUT Figure12. Figure13. CURRENTLIMITvsV CURRENTLIMITvsTEMPERATURE IN 800 800 750 750 700 700 A) A) m 650 m 650 ( ( mit mit Li 600 Li 600 nt nt e 550 e 550 urr urr C C 500 500 450 450 400 400 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 - 50 - 25 0 25 50 75 100 125 V (V) Temperature (°C) IN Figure14. Figure15. 8 SubmitDocumentationFeedback Copyright©2006–2009,TexasInstrumentsIncorporated ProductFolderLink(s):TPS73601-EP TPS73615-EP TPS73618-EPTPS73625-EP TPS73630-EP TPS73632-EP TPS73633-EP

TPS73601-EP, TPS73615-EP, TPS73618-EP TPS73625-EP, TPS73630-EP, TPS73632-EP, TPS73633-EP www.ti.com.................................................................................................................................................. SGLS326C–APRIL2006–REVISEDFEBRUARY2009 TYPICAL CHARACTERISTICS (continued) Forallvoltageversions,T =25°C,V =V +0.5V,I =10mA,V =1.7V,andC =0.1m F J IN OUT(nom) OUT EN OUT (unlessotherwisenoted) PSRR(RIPPLEREJECTION)vsFREQUENCY PSRR(RIPPLEREJECTION)vsV –V IN OUT 90 40 IOUT = 100 mA IOUT = 1 mA 80 COUT = Any COUT = 1 m F 35 70 IOUT = 1 mA 30 B) COUT = 10 m F d 60 ejection( 5400 ICOOUUTT = = 1 A mnAy IOUCT O=U 1T0 =0 1m mAF RR(dB) 2250 R S e P 15 pl 30 p Ri 20 IOUT = 100 mA 10 Frequency = 100 kHz 10 VIN = VOUT + 1 V ICOOUUTT = = A 0n ym F COUT = 10 m F 5 CVOOUUTT == 21.05 mVF 0 0 10 100 1k 10k 100k 1M 10M 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Frequency(Hz) VIN- VOUT(V) Figure16. Figure17. NOISESPECTRALDENSITY NOISESPECTRALDENSITY C =0m F C =0.01m F NR NR 1 1 COUT = 1 m F Hz) COUT = 0 m F Hz) COUT = 1 m F √ √ V/ 0.1 V/ 0.1 m( COUT = 10 m F m( N N e e COUT = 0 m F COUT = 10 m F IOUT = 150 mA IOUT = 150 mA 0.01 0.01 10 100 1k 10k 100k 10 100 1k 10k 100k Frequency(Hz) Frequency(Hz) Figure18. Figure19. RMSNOISEVOLTAGEvsC RMSNOISEVOLTAGEvsC OUT NR 60 140 VOUT = 5 V VOUT = 5 V 50 120 100 40 MS) VOUT = 3.3 V MS) 80 VOUT = 3.3 V R 30 R (N (N 60 V V 20 VOUT = 1.5 V 40 VOUT = 1.5 V 10 COUT = 0 m F 20 COUT = 0 m F 10 Hz < Frequency < 100 kHz 10 Hz < Frequency < 100 kHz 0 0 0.1 1 10 1p 10p 100p 1n 10n C (m F) C (F) OUT NR Figure20. Figure21. Copyright©2006–2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLink(s):TPS73601-EP TPS73615-EP TPS73618-EPTPS73625-EP TPS73630-EP TPS73632-EP TPS73633-EP

TPS73601-EP, TPS73615-EP, TPS73618-EP TPS73625-EP, TPS73630-EP, TPS73632-EP, TPS73633-EP SGLS326C–APRIL2006–REVISEDFEBRUARY2009.................................................................................................................................................. www.ti.com TYPICAL CHARACTERISTICS (continued) Forallvoltageversions,T =25°C,V =V +0.5V,I =10mA,V =1.7V,andC =0.1m F J IN OUT(nom) OUT EN OUT (unlessotherwisenoted) TPS73633 TPS73633 LOADTRANSIENTRESPONSE LINETRANSIENTRESPONSE VIN = 3.8 V COUT = 0 m F IOUT = 400 mA 100 mV/tick V OUT COUT = 0 m F COUT = 1 m F 50 mV/div VOUT 50 mV/tick V OUT COUT = 10 m F COUT = 100 m F 20 mV/tick VOUT 50 mV/div VOUT 400 mA 5.5 V dVIN= 0.5 V/m s 50 mA/tick I 4.5 V dt OUT 10 mA 1 V/div VIN 10 m s/div 10 m s/div Figure22. Figure23. TPS73633 TPS73633 TURNONRESPONSE TURNOFFRESPONSE RCLO U=T 1 = k 0W m F VOUT RCLO U=T 2 =0 1W 0 m F 1V/div RCLO U=T 2 =0 1W m F 1 V/div RCLO U=T 2 =0 1W m F RCLO U=T 2 =0 1W0 m F RCLO U=T 1 = k 0W m F VOUT 2 V 2 V V EN 1V/div 1 V/div 0 V 0 V VEN 100 m s/div 100 m s/div Figure24. Figure25. TPS73633 POWERUP/POWERDOWN I vsTEMPERATURE ENABLE 6 10 5 V IN 4 V OUT 1 3 A) n s ( Volt 2 BLE A 1 EN I 0.1 0 - 1 - 2 0.01 50 ms/div - 50 - 25 0 25 50 75 100 125 Temperature (°C) Figure26. Figure27. 10 SubmitDocumentationFeedback Copyright©2006–2009,TexasInstrumentsIncorporated ProductFolderLink(s):TPS73601-EP TPS73615-EP TPS73618-EPTPS73625-EP TPS73630-EP TPS73632-EP TPS73633-EP

TPS73601-EP, TPS73615-EP, TPS73618-EP TPS73625-EP, TPS73630-EP, TPS73632-EP, TPS73633-EP www.ti.com.................................................................................................................................................. SGLS326C–APRIL2006–REVISEDFEBRUARY2009 TYPICAL CHARACTERISTICS (continued) Forallvoltageversions,T =25°C,V =V +0.5V,I =10mA,V =1.7V,andC =0.1m F J IN OUT(nom) OUT EN OUT (unlessotherwisenoted) TPS73601 TPS73601 RMSNOISEVOLTAGEvsC I vsTEMPERATURE ADJ FB 60 160 55 140 50 120 45 100 V(rms)N 4305 I(nA)FB 8600 30 VOUT = 2.5 V 40 COUT = 0 m F 25 R1 = 39.2 kW 20 10 Hz < Frequency < 100 kHz 20 0 10p 100p 1n 10n - 50 - 25 0 25 50 75 100 125 C (F) Temperature (°C) FB Figure28. Figure29. TPS73601 TPS73601 LOADTRANSIENT,ADJUSTABLEVERSION LINETRANSIENT,ADJUSTABLEVERSION CFB = 10 nF VOUT = 2.5 V 200 mV/div R1 = 39.2 kW COUT = 0 m F VOUT 100 mV/div COUT = 0 m F CFB = 10 nF VOUT COUT = 10 m F 100 mV/div VOUT COUT = 10 m F 200 mV/div VOUT 4.5 V 400 mA 3.5 V 10 mA VIN IOUT 25 m s/div 5 m s/div Figure30. Figure31. Copyright©2006–2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLink(s):TPS73601-EP TPS73615-EP TPS73618-EPTPS73625-EP TPS73630-EP TPS73632-EP TPS73633-EP

TPS73601-EP, TPS73615-EP, TPS73618-EP TPS73625-EP, TPS73630-EP, TPS73632-EP, TPS73633-EP SGLS326C–APRIL2006–REVISEDFEBRUARY2009.................................................................................................................................................. www.ti.com APPLICATION INFORMATION supply near the regulator. This counteracts reactive The TPS736xx belongs to a family of new-generation input sources and improves transient response, noise LDO regulators that use an NMOS pass transistor to rejection, and ripple rejection. A higher-value achieve ultra-low-dropout performance, reverse capacitor may be necessary if large, fast rise-time current blockage, and freedom from output capacitor load transients are anticipated, or the device is constraints. These features, combined with low noise locatedseveralinchesfromthepowersource. and an enable input, make the TPS736xx ideal for portable applications. This regulator family offers a The TPS736xx does not require an output capacitor wide selection of fixed-output voltage versions and an for stability and has maximum phase margin with no adjustable-output version. All versions have thermal capacitor. It is designed to be stable for all available and overcurrent protection, including foldback current types and values of capacitors. In applications where limit. V − V < 0.5 V and multiple low ESR capacitors IN OUT are in parallel, ringing may occur when the product of Figure 32 shows the basic circuit connections for the C and total ESR drops below 50 Ω. Total ESR fixed-voltage models. Figure 33 shows the OUT includes all parasitic resistance, including capacitor connections for the adjustable-output version ESR and board, socket, and solder-joint resistance. (TPS73601). R and R can be calculated for any 1 2 In most applications, the sum of capacitor ESR and output voltage using the formula in Figure 33. Sample traceresistancemeetsthisrequirement. resistor values for common output voltages are shown in Figure 3. For the best accuracy, make the Output Noise parallel combination of R and R approximately 19 1 2 kΩ. A precision band-gap reference is used to generate the internal reference voltage, V . This reference is Optionalinputcapacitor. Optionaloutputcapacitor. REF the dominant noise source within the TPS736xx and Mayimprovesource Mayimproveloadtransient, it generates approximately 32 m V (10 Hz to impedance,noise,orPSRR. noise,orPSRR. RMS 100 kHz) at the reference output (NR). The regulator VIN IN OUT VOUT control loop gains up the reference noise with the TPS736xx same gain as the reference voltage, so that the noise EN GND NR voltageoftheregulatorisapproximatelygivenby: (R (cid:2)R ) V Optionalbypass V (cid:3)32(cid:1)V (cid:1) 1 2 (cid:3)32(cid:1)V (cid:1) OUT capacitortoreduce N RMS R2 RMS VREF (1) outputnoise Since the value of V is 1.2 V, this relationship REF Figure32.TypicalApplicationCircuitfor reducesto: Fixed-VoltageVersions (cid:3)(cid:1)V (cid:4) VN((cid:1)VRMS)(cid:2)27 VRMS (cid:1)VOUT(V) Optionalinputcapacitor. Optionaloutputcapacitor. (2) Mayimprovesource Mayimproveloadtransient, forthecaseofnoC . impedance,noise,orPSRR. noise,orPSRR. NR VIN IN OUT VOUT An internal 27-kΩ resistor in series with the noise reduction pin (NR) forms a low-pass filter for the TPS736xx R C 1 FB voltage reference when an external noise reduction EN GND FB capacitor, C , is connected from NR to ground. For NR C = 10 nF, the total noise in the 10-Hz to 100-kHz R NR 2 bandwidth is reduced by a factor of ~3.2, giving the (R +R) Optionalcapacitor approximaterelationship: VOUT= 1R 2 ×1.204 reducesoutputnoise 1 andimproves (cid:3)(cid:1)V (cid:4) transientresponse. VN((cid:1)VRMS)(cid:2)8.5 VRMS (cid:1)VOUT(V) (3) Figure33.TypicalApplicationCircuitfor Adjustable-VoltageVersions forC =10nF. NR This noise reduction effect is shown as RMS Noise Input and Output Capacitor Requirements VoltagevsC inFigure21. NR Although an input capacitor is not required for stability, it is good analog design practice to connect a 0.1-m F to 1-m F low ESR capacitor across the input 12 SubmitDocumentationFeedback Copyright©2006–2009,TexasInstrumentsIncorporated ProductFolderLink(s):TPS73601-EP TPS73615-EP TPS73618-EPTPS73625-EP TPS73630-EP TPS73632-EP TPS73633-EP

TPS73601-EP, TPS73615-EP, TPS73618-EP TPS73625-EP, TPS73630-EP, TPS73632-EP, TPS73633-EP www.ti.com.................................................................................................................................................. SGLS326C–APRIL2006–REVISEDFEBRUARY2009 The TPS73601 adjustable version does not have the avoid degraded transient response. The boundary of noise-reduction pin available. However, connecting a this transient dropout region is approximately twice feedbackcapacitor,C ,fromtheoutputtotheFBpin the dc dropout. Values of FB reduces output noise and improves load transient V – V above this line ensure normal transient IN OUT performance. response. The TPS736xx uses an internal charge pump to Operating in the transient dropout region can cause develop an internal supply voltage sufficient to drive an increase in recovery time. The time required to the gate of the NMOS pass element above V . The recover from a load transient is a function of the OUT charge pump generates ~250 m V of switching noise magnitude of the change in load current rate, the rate at ~4 MHz; however, charge-pump noise contribution of change in load current, and the available is negligible at the output of the regulator for most headroom (V to V voltage drop). Under IN OUT valuesofI andC . worst-case conditions [full-scale instantaneous load OUT OUT change with (V – V ) close to dc dropout levels], IN OUT Board Layout Recommendation to Improve the TPS736xx can take a couple of hundred PSRR and Noise Performance microseconds to return to the specified regulation accuracy. To improve ac performance such as PSRR, output noise,andtransient response, it is recommended that Transient Response the board be designed with separate ground planes for V and V , with each ground plane connected The low open-loop output impedance provided by the IN OUT only at the GND pin of the device. In addition, the NMOS pass element in a voltage-follower ground connection for the bypass capacitor should configuration allows operation without an output connectdirectlytotheGNDpinofthedevice. capacitor for many applications. As with any regulator, the addition of a capacitor (nominal value Internal Current Limit 1 m F) from the output pin to ground reduces undershoot magnitude but increases duration. In the The TPS736xx internal current limit helps protect the adjustable version, the addition of a capacitor, C , regulator during fault conditions. Foldback helps to FB from the output to the adjust pin also improves the protect the regulator from damage during output transientresponse. short-circuit conditions by reducing current limit when V drops below 0.5 V. See Figure 12 for a graph of The TPS736xx does not have active pulldown when OUT I vsV . the output is overvoltage. This allows applications OUT OUT that connect higher voltage sources, such as Shutdown alternate power supplies, to the output. This also results in an output overshoot of several percent if The enable (EN) pin is active high and is compatible load current quickly drops to zero when a capacitor is with standard TTL-CMOS levels. VEN below 0.5 V connected to the output. The duration of overshoot (max)turnstheregulatoroffand drops the ground-pin can be reduced by adding a load resistor. The current to approximately 10 nA. When shutdown overshoot decays at a rate determined by output capability is not required, EN can be connected to capacitor C and the internal/external load OUT VIN. When a pullup resistor is used, and operation resistance.Therateofdecayisgivenby: down to 1.8 V is required, use pullup resistor values Fixed-voltageversion: below50kΩ. V dV(cid:4)dt(cid:2) OUT C (cid:1)80k(cid:1)(cid:3)R Dropout Voltage OUT LOAD (4) The TPS736xx uses an NMOS pass transistor to Adjustable-voltageversion: V achieve extremely low dropout. When (VIN – VOUT) is dV(cid:5)dt(cid:3) OUT less than the dropout voltage (VDO), the NMOS pass COUT(cid:1)80k(cid:1)(cid:4)(R1(cid:2)R2)(cid:4)RLOAD (5) device is in its linear region of operation and the input-to-output resistance is the R of the NMOS DS-ON passelement. For large step changes in load current, the TPS736xx requires a larger voltage drop from V to V to IN OUT Copyright©2006–2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLink(s):TPS73601-EP TPS73615-EP TPS73618-EPTPS73625-EP TPS73630-EP TPS73632-EP TPS73633-EP

TPS73601-EP, TPS73615-EP, TPS73618-EP TPS73625-EP, TPS73630-EP, TPS73632-EP, TPS73633-EP SGLS326C–APRIL2006–REVISEDFEBRUARY2009.................................................................................................................................................. www.ti.com Reverse Current 35°C above the maximum expected ambient condition of the application. This produces a The NMOS pass element of the TPS736xx provides worst-case junction temperature of 125°C at the inherent protection against current flow from the highest expected ambient temperature and output of the regulator to the input when the gate of worst-caseload. the pass device is pulled low. To ensure that all charge is removed from the gate of the pass element, The internal protection circuitry of the TPS736xx has EN must be driven low before the input voltage is been designed to protect against overload conditions. removed.Ifthisisnotdone,the pass element may be It was not intended to replace proper heatsinking. leftonduetostoredchargeonthegate. Continuously running the TPS736xx into thermal shutdowndegradesreliability. After EN is driven low, no bias voltage is needed on any pin for reverse current blocking. Note that Power Dissipation reverse current is specified as the current flowing out of the IN pin due to voltage applied on the OUT pin. The ability to remove heat from the die is different for There is additional current flowing into the OUT pin each package type, presenting different due to the 80-kΩ internal resistor divider to ground considerations in the PCB layout. The PCB area (seeFigure2andFigure3). around the device that is free of other components moves the heat from the device to the ambient air. For the TPS73601, reverse current may flow when Performance data for JEDEC low- and high-K boards V ismorethan1VaboveV . FB IN are shown in the Power Dissipation Ratings table. Using heavier copper increases the effectiveness in Thermal Protection removing heat from the device. The addition of plated Thermal protection disables the output when the through-holes to heat-dissipating layers also junction temperature rises to approximately 160°C, improvestheheatsinkeffectiveness. allowing the device to cool. When the junction Power dissipation depends on input voltage and load temperature cools to approximately 140°C, the output conditions. Power dissipation is equal to the product circuitry is again enabled. Depending on power of the output current times the voltage drop across dissipation, thermal resistance, and ambient theoutputpasselement(V toV ): temperature, the thermal protection circuit may cycle IN OUT P (cid:3)(V (cid:2)V )(cid:1)I on and off. This limits the dissipation of the regulator, D IN OUT OUT (6) protectingitfromdamageduetooverheating. Power dissipation can be minimized by using the Any tendency to activate the thermal protection circuit lowest-possible input voltage necessary to ensure the indicates excessive power dissipation or an requiredoutputvoltage. inadequate heatsink. For reliable operation, junction temperature should be limited to 125°C maximum. To Package Mounting estimate the margin of safety in a complete design Solder-pad footprint recommendations for the (including heatsink), increase the ambient TPS736xx are presented in application bulletin Solder temperature until the thermal protection is triggered; Pad Recommendations for Surface-Mount Devices use worst-case loads and signal conditions. For good (AB-132), available from the TI web site at reliability, thermal protection should trigger at least www.ti.com. 14 SubmitDocumentationFeedback Copyright©2006–2009,TexasInstrumentsIncorporated ProductFolderLink(s):TPS73601-EP TPS73615-EP TPS73618-EPTPS73625-EP TPS73630-EP TPS73632-EP TPS73633-EP

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS73601MDBVREP ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 PJRM & no Sb/Br) TPS73601MDCQREP ACTIVE SOT-223 DCQ 6 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR -55 to 125 PWZM & no Sb/Br) TPS73601MDRBREP ACTIVE SON DRB 8 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -55 to 125 PMNM & no Sb/Br) TPS73615MDBVREP ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 T59 & no Sb/Br) TPS73618MDBVREP ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 T60 & no Sb/Br) TPS73625MDBVREP ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 T61 & no Sb/Br) TPS73630MDBVREP ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 T62 & no Sb/Br) TPS73632MDBVREP ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 T63 & no Sb/Br) TPS73633MDBVREP ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 T64 & no Sb/Br) TPS73633MDBVREPG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 T64 & no Sb/Br) V62/06626-01XE ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 PJRM & no Sb/Br) V62/06626-01YE ACTIVE SOT-223 DCQ 6 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR -55 to 125 PWZM & no Sb/Br) V62/06626-01ZE ACTIVE SON DRB 8 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -55 to 125 PMNM & no Sb/Br) V62/06626-02XE ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 T59 & no Sb/Br) V62/06626-03XE ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 T60 & no Sb/Br) V62/06626-04XE ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 T61 & no Sb/Br) V62/06626-05XE ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 T62 & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) V62/06626-06XE ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 T63 & no Sb/Br) V62/06626-07XE ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 T64 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2017 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS73601MDBVREP SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS73601MDCQREP SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3 TPS73601MDRBREP SON DRB 8 3000 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q2 TPS73615MDBVREP SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS73618MDBVREP SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS73625MDBVREP SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS73630MDBVREP SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS73632MDBVREP SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS73633MDBVREP SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2017 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS73601MDBVREP SOT-23 DBV 5 3000 203.0 203.0 35.0 TPS73601MDCQREP SOT-223 DCQ 6 2500 346.0 346.0 41.0 TPS73601MDRBREP SON DRB 8 3000 370.0 355.0 55.0 TPS73615MDBVREP SOT-23 DBV 5 3000 203.0 203.0 35.0 TPS73618MDBVREP SOT-23 DBV 5 3000 203.0 203.0 35.0 TPS73625MDBVREP SOT-23 DBV 5 3000 203.0 203.0 35.0 TPS73630MDBVREP SOT-23 DBV 5 3000 203.0 203.0 35.0 TPS73632MDBVREP SOT-23 DBV 5 3000 203.0 203.0 35.0 TPS73633MDBVREP SOT-23 DBV 5 3000 203.0 203.0 35.0 PackMaterials-Page2

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PACKAGE OUTLINE DRB0008A VSON - 1 mm max height SCALE 4.000 PLASTIC SMALL OUTLINE - NO LEAD 3.1 B A 2.9 PIN 1 INDEX AREA 3.1 2.9 C 1 MAX SEATING PLANE 0.05 0.08 C DIM A 0.00 OPT 1 OPT 2 1.5 0.1 (0.1) (0.2) 4X (0.23) EXPOSED (DIM A) TYP THERMAL PAD 4 5 2X 1.95 1.75 0.1 8 1 6X 0.65 0.37 8X 0.25 PIN 1 ID 0.1 C A B (OPTIONAL) (0.65) 0.05 C 0.5 8X 0.3 4218875/A 01/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. www.ti.com

EXAMPLE BOARD LAYOUT DRB0008A VSON - 1 mm max height PLASTIC SMALL OUTLINE - NO LEAD (1.5) (0.65) SYMM 8X (0.6) (0.825) 8X (0.31) 1 8 SYMM (1.75) (0.625) 6X (0.65) 4 5 (R0.05) TYP ( 0.2) VIA TYP (0.23) (0.5) (2.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:20X 0.07 MAX 0.07 MIN ALL AROUND ALL AROUND EXPOSED EXPOSED METAL METAL SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4218875/A 01/2018 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. www.ti.com

EXAMPLE STENCIL DESIGN DRB0008A VSON - 1 mm max height PLASTIC SMALL OUTLINE - NO LEAD (0.65) 4X (0.23) SYMM METAL TYP 8X (0.6) 4X (0.725) 8X (0.31) 1 8 (2.674) SYMM (1.55) 6X (0.65) 4 5 (R0.05) TYP (1.34) (2.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 84% PRINTED SOLDER COVERAGE BY AREA SCALE:25X 4218875/A 01/2018 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 1.45 B A 0.90 PIN 1 INDEX AREA 1 5 2X 0.95 3.05 2.75 1.9 1.9 2 4 3 0.5 5X 0.3 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com

EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM 2 (1.9) 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com

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