Product Sample & Technical Tools & Support & Folder Buy Documents Software Community TPS730 SBVS054J–NOVEMBER2004–REVISEDAPRIL2015 TPS730 Low-Noise, High PSRR, RF, 200-mA Low-Dropout Linear Regulators 1 Features 3 Description • 200-mARFLow-DropoutRegulator The TPS730 family of low-dropout (LDO) low-power 1 linear voltage regulators features high power-supply WithEnable rejection ratio (PSRR), low noise, fast start-up, and • AvailableinFixedVoltagesfrom1.8Vto3.3V excellent line and load transient responses in a small andAdjustableVoltages(1.22Vto5.5V) SOT-23 package. NanoStar™ packaging gives an • HighPSRR(68dBat100Hz) ultrasmall footprint as well as an ultralow profile and package weight, making it ideal for portable • LowNoise(33μV ,TPS73018) RMS applications such as handsets and PDAs. Each • FastStart-UpTime(50 μs) device in the family is stable, with a small, 2.2-μF • StableWitha2.2-μFCeramicCapacitor ceramic capacitor on the output. The TPS730 family • ExcellentLoad/LineTransientResponse uses an advanced, proprietary BiCMOS fabrication process to yield low dropout voltages (for example, • VeryLowDropoutVoltage(120mVat200mA) 120 mV at 200 mA, TPS73030). Each device • 5-and6-PinSOT-23(DBV),andWaferChip achievesfaststart-uptimes(approximately50μswith Scale(YZQ)Packages a 0.001-μF bypass capacitor) while consuming low quiescent current (170 μA typical). Moreover, when 2 Applications the device is placed in standby mode, the supply current is reduced to less than 1 μA. The TPS73018 • RF:VCOs,Receivers,ADCs exhibits approximately 33 μV of output voltage RMS • Audio noise at 1.8 V output with a 0.01-μF bypass • CellularandCordlessTelephones capacitor. Applications with analog components that • Bluetooth®,WirelessLAN are noise-sensitive, such as portable RF electronics, benefit from the high PSRR and low-noise features • HandheldOrganizers,PDAs aswellasthefastresponsetime. DeviceInformation(1) PARTNUMBER PACKAGE BODYSIZE(NOM) SOT-23(5) 2.90mm×1.60mm TPS730 SOT-23(6) 2.90mm×1.60mm DSBGA(5) 1.35mm×1.00mm (1) For all available packages, see the orderable addendum at theendofthedatasheet. SimplifiedSchematic RippleRejectionvsFrequency VIN VIN IN OUT VOUT VOUT 10900 TPS730xx IOUT=200mA 0.1m F EN GND NR 2.2m F 80 0.01m F(1) B) 70 d on ( 60 cti NOTE:(1)Thiscapacitorisoptional. eje 50 R ple 40 IOUT=10mA Rip 30 20 VIN=3.8V 10 COUT=10mF 0 CNR=0.01mF 10 100 1k 10k 100k 1M 10M Frequency (Hz) 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

TPS730 SBVS054J–NOVEMBER2004–REVISEDAPRIL2015 www.ti.com Table of Contents 1 Features.................................................................. 1 8.1 ApplicationInformation............................................11 2 Applications........................................................... 1 8.2 TypicalApplication..................................................13 3 Description............................................................. 1 8.3 Do'sandDon'ts.......................................................14 4 RevisionHistory..................................................... 2 9 PowerSupplyRecommendations...................... 15 5 PinConfigurationandFunctions......................... 3 10 Layout................................................................... 15 10.1 LayoutGuidelines.................................................15 6 Specifications......................................................... 4 10.2 LayoutExample....................................................15 6.1 AbsoluteMaximumRatings......................................4 10.3 ThermalConsiderations........................................16 6.2 ESDRatings ............................................................4 10.4 PowerDissipation.................................................16 6.3 RecommendedOperatingConditions.......................4 11 DeviceandDocumentationSupport................. 18 6.4 ThermalInformation..................................................4 6.5 ElectricalCharacteristics..........................................5 11.1 DeviceSupport......................................................18 6.6 TypicalCharacteristics..............................................6 11.2 DocumentationSupport........................................18 11.3 Trademarks...........................................................18 7 DetailedDescription.............................................. 9 11.4 ElectrostaticDischargeCaution............................18 7.1 Overview...................................................................9 11.5 Glossary................................................................18 7.2 FunctionalBlockDiagrams.......................................9 12 Mechanical,Packaging,andOrderable 7.3 FeatureDescription.................................................10 Information........................................................... 18 7.4 DeviceFunctionalModes........................................10 12.1 TPS730YZQNanostar™WaferChipScale 8 ApplicationandImplementation........................ 11 Information............................................................... 19 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionI(February,2011)toRevisionJ Page • AddedESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection ................................................................................................. 1 • ChangedfourthbulletofFeatureslisttolownoise ............................................................................................................... 1 • Changedfront-pagefigure..................................................................................................................................................... 1 • AddedPinConfigurationandFunctionssection.................................................................................................................... 3 • Changed"free-airtemperature"to"junctiontemperature"inAbsoluteMaximumRatingsconditionstatement ...................4 • DeletedDissipationRatingstable;addedThermalInformationtable ................................................................................... 4 • AddedconditionstatementtoTypicalCharacteristics........................................................................................................... 6 • MovedOrderingInformationtoDeviceNomenclaturesection ............................................................................................ 18 ChangesfromRevisionH(October,2007)toRevisionI Page • Correctedunitsiny-axisofFigure5....................................................................................................................................... 6 2 SubmitDocumentationFeedback Copyright©2004–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS730

TPS730 www.ti.com SBVS054J–NOVEMBER2004–REVISEDAPRIL2015 5 Pin Configuration and Functions DBVPackage 5-PinSOT-23 DBVPackage TopView 6-PinSOT-23 TopView IN 1 5 OUT IN 1 6 OUT GND 2 GND 2 5 FB EN 3 4 NR EN 3 4 NR Fixed Voltage Versions Adjustable Voltage Version YZQPackage 5-PinDSBGA TopView IN OUT C3 C1 B2 NR A3 A1 EN GND PinFunctions PIN NO. I/O DESCRIPTION NAME SOT-23 DSBGA Enablepin.Drivingtheenablepin(EN)highturnsontheregulator.Drivingthispinlowputs EN 3 A3 I theregulatorintoshutdownmode.ENcanbeconnectedtoINifnotused. Feedbackpin.Thisterminalisthefeedbackinputpinfortheadjustabledevice.Fixed-voltage FB 5 N/A I versionsintheDBVpackagedonothavethispin. GND 2 A1 — Regulatorground. IN 1 C3 I Inputtothedevice. OUT 6 C1 O Outputoftheregulator. NoiseReductionpin.Connectinganexternalcapacitortothispinfiltersnoisegeneratedby NR 4 B2 — theinternalbandgap.Thisconfigurationimprovespower-supplyrejectionandreducesoutput noise. Copyright©2004–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:TPS730

TPS730 SBVS054J–NOVEMBER2004–REVISEDAPRIL2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings overoperatingjunctiontemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT Inputrange,V –0.3 6 IN Voltage Enablerange,V –0.3 6 V EN Outputrange,V –0.3 6 OUT Current Peakoutput,I Internallylimited OUT(max) Continuoustotalpowerdissipation SeeThermalInformation DBVpackage –40 150 Junction,T J Temperature YZQpackage –40 125 °C Storage,T –65 150 stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. 6.2 ESD Ratings VALUE UNIT Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001,allpins(1) ±2000 V(ESD) Electrostaticdischarge Chargeddevicemodel(CDM),perJEDECspecificationJESD22-C101, V allpins(2) ±500 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions overoperatingjunctiontemperaturerange(unlessotherwisenoted). MIN NOM MAX UNIT V Inputsupplyvoltage 2.7 5.5 V IN V Enablesupplyvoltage 0 V V EN IN V Outputvoltage V 5 V OUT FB I Outputcurrent 0 200 mA OUT T Operatingjunctiontemperature –40 125 °C J C Inputcapacitor 0.1 1 µF IN C Outputcapacitor 2.2(1) 10 µF OUT C Noisereductioncapacitor 0 10 nF NR C Feed-forwardcapacitor 15 pF FF R Lowerfeedbackresistor 30.1 kΩ 2 (1) IfC isnotusedorV <1.8V,theminimumrecommendedC =4.7µF. FF OUT(nom) OUT 6.4 Thermal Information TPS73001 THERMALMETRIC(1) DBV(SOT-23) YZQ(DSBGA) UNIT 6PINS 5PINS R Junction-to-ambientthermalresistance 225.1 178.5 θJA R Junction-to-case(top)thermalresistance 78.4 1.4 θJC(top) R Junction-to-boardthermalresistance 54.7 62.1 °C/W θJB ψ Junction-to-topcharacterizationparameter 3.3 0.9 JT ψ Junction-to-boardcharacterizationparameter 53.8 62.1 JB (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953. 4 SubmitDocumentationFeedback Copyright©2004–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS730

TPS730 www.ti.com SBVS054J–NOVEMBER2004–REVISEDAPRIL2015 6.5 Electrical Characteristics OverrecommendedoperatingtemperaturerangeT =–40to+125°C,V =V ,V =V +1V(1),I =1mA,C = J EN IN IN OUT(nom) OUT OUT 10μF,C =0.01μF(unlessotherwisenoted).Typicalvaluesareat25°C. NR PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V Inputvoltagerange(1) 2.7 5.5 V IN I Continuousoutputcurrent 0 200 mA OUT V Internalreference(TPS73001) 1.201 1.225 1.25 V FB Outputvoltage TPS73001 V 5.5–V V V range FB DO OUT Outputvoltageaccuracy 0µA≤I ≤200mA,2.75V≤V ≤5.5V –2% V 2% V OUT IN OUT(nom) ΔV Lineregulation(1) V +1V≤V ≤5.5V 0.05 %/V OUT(ΔVIN) OUT IN ΔV Loadregulation 0µA≤I ≤200mA,T =25°C 5 mV OUT(ΔIOUT) OUT J Dropoutvoltage(2) V I =200mA 120 210 mV DO (V =V –0.1V) OUT IN OUT(nom) I Outputcurrentlimit V =0V 285 600 mA CL OUT I Groundpincurrent 0µA<I <200mA 170 250 μA GND OUT I Shutdowncurrent(3) V =0V,2.7V≤V ≤5.5V 0.07 1 μA SHUTDOWN EN IN I FBpincurrent V =1.8V 1 μA FB FB Power-supply PSRR TPS73028 f=100Hz,I =200mA,T =25°C 68 dB rejectionratio OUT J Outputnoise BW=200Hzto100kHz,I =200mA, V TPS73018 OUT 33 μV n voltage C =0.01μF RMS NR t Start-uptime TPS73018 R =14Ω,C =1µF,C =0.001μF 50 μs STR L OUT NR V High-levelenableinputvoltage 2.7V≤V ≤5.5V 1.7 V V EN(high) IN IN V Low-levelenableinputvoltage 2.7V≤V ≤5.5V 0 0.7 V EN(low) IN I ENpincurrent V =0V –1 1 μA EN EN Threshold,V rising 2.25 2.65 V CC UVLO Hysteresis 100 mV (1) MinimumV is2.7VorV +V ,whicheverisgreater. IN OUT DO (2) DropoutisnotmeasuredfortheTPS73018andTPS73025sinceminimumV =2.7V. IN (3) Foradjustableversions,thisappliesonlyafterV isapplied;thenV transitionshightolow. IN EN Copyright©2004–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:TPS730

TPS730 SBVS054J–NOVEMBER2004–REVISEDAPRIL2015 www.ti.com 6.6 Typical Characteristics OverrecommendedoperatingtemperaturerangeT =–40°Cto+125°C,V =V ,V =V +1V,I =1mA,C = J EN IN IN OUT(nom) OUT OUT 10μF,C =0.01μF,V =2.8V(unlessotherwisenoted).TypicalvaluesareatT =25°C. NR OUT(nom) J 2.805 2.805 2.804 VIN=3.8V COUT=10mF 2.800 2.803 TJ=25°C IOUT=1mA 2.802 2.795 2.801 V) V) (OUT 2.800 (OUT2.790 V 2.799 V IOUT=200mA 2.785 2.798 2.797 2.780 2.796 VIN=3.8V COUT=10mF 2.795 2.775 0 50 100 150 200 −40−25−105 20 35 50 65 80 95 110125 IOUT(mA) TJ(°C) Figure1.TPS73028OutputVoltagevsOutputCurrent Figure2.TPS73028OutputVoltagevsJunction Temperature 250 1.6 I(A)mGND 112050000 VCIONU=T3=.810VmF IOUITO=UT20=01mmAA √V)c/Hztral Noise Density (m 00111.....68024 CNCRN=RC0N=.0RC00=N.10VICRO00mIO.4NU=F0U7T1=0Tm=.m13=FF2.m810F00VmmFA e p 0.4 S 50 ut p 0.2 ut O 0 0 −40−25−105 20 35 50 65 80 95110125 100 1k 10k 100k TJ(°C) Frequency (Hz) Figure3.TPS73028GroundCurrentvsJunction Figure4.TPS73028OutputSpectralNoiseDensityvs Temperature Frequency 60 180 IVOU=T 2=0 20. 8m AV 160 VCIONU=T2=.710VmF 50 OUT )MS COUT= 10mF 140 R mV 40 120 Noise ( 30 (mV) 100 IOUT=200mA Output 20 VDO 6800 S M R 10 40 IOUT=10mA 20 BW = 100 Hz to 100 kHz 0 0 0.001 0.01 0.1 −40−25−10 5 20 35 50 65 80 95110125 CNR(mF) TJ(°C) Figure5.RootMeanSquareOutputNoisevsCNR Figure6.TPS73028DropoutVoltagevsJunction Temperature 6 SubmitDocumentationFeedback Copyright©2004–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS730

TPS730 www.ti.com SBVS054J–NOVEMBER2004–REVISEDAPRIL2015 Typical Characteristics (continued) OverrecommendedoperatingtemperaturerangeT =–40°Cto+125°C,V =V ,V =V +1V,I =1mA,C = J EN IN IN OUT(nom) OUT OUT 10μF,C =0.01μF,V =2.8V(unlessotherwisenoted).TypicalvaluesareatT =25°C. NR OUT(nom) J 100 90 4 IOUT=200mA 80 V) ction (dB) 6700 V(EN 20 VVICOIOONUUUT=TT=3==2.8220..0V82mVmFA Reje 50 CNR=0.001mF TJ=25°C ple 40 IOUT=10mA 3 Rip 30 V) 2 12000 VCCIONNRU=T=3=0.81.00V1mmFF V(OUT 10 CCNNRR==00.0.010m4F7mF 10 100 1k 10k 100k 1M 10M 0 20 40 60 80 100120140160180200 Frequency (Hz) Time (ms) Figure7.TPS73028RippleRejectionvsFrequency Figure8.TPS73028OutputVoltage,EnableVoltagevsTime (Start-Up) VIN=3.8V mV) 4.8 V) 20 COUT=10mF (OUT (mUT 0 V 3.8 VO −20 IOUT=200mA D COUT=2.2mF −40 V) 20 CNR=0.01mF ddvt =0m.4sV 300 ddti =0.m02sA m 0 A) 200 ( m VIN -20 (OUT 100 1mA I 0 0 10 20 30 40 50 60 70 80 90 100 0 50100 150200 250300 350400450500 Time (ms) Time (ms) Figure9.TPS73028LineTransientResponse Figure10.TPS73028LoadTransientResponse 250 VOUT=3V RL=15W 200 TJ=125°C div V) 150 mV/ (m TJ=25°C O 0 D 50 V 100 VIN VOUT TJ=−55°C 50 0 1s/div 0 20 40 60 80 100120140160180 200 IOUT(mA) Figure11.PowerUpandPowerDown Figure12.DropoutVoltagevsOutputCurrent Copyright©2004–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:TPS730

TPS730 SBVS054J–NOVEMBER2004–REVISEDAPRIL2015 www.ti.com Typical Characteristics (continued) OverrecommendedoperatingtemperaturerangeT =–40°Cto+125°C,V =V ,V =V +1V,I =1mA,C = J EN IN IN OUT(nom) OUT OUT 10μF,C =0.01μF,V =2.8V(unlessotherwisenoted).TypicalvaluesareatT =25°C. NR OUT(nom) J Wnce () 100 CVTJION =U = T− 54=.0 52° .CV2, tmVoF O1U2T5 °≥C 1.5 V Wnce () 100 CVTJION =U = T− 5=4.0 51° 0CV mtoF 125°C sta 10 sta 10 si Region of Instability si Region of Instability e e R R s s e e eri eri nt S 1 nt S 1 e e al al v v ui 0.1 ui 0.1 q q R, E Region of Stability R, E Region of Stability S S E E 0.01 0.01 0 0.02 0.04 0.06 0.08 0.20 0 0.02 0.04 0.06 0.08 0.20 IOUT (A) IOUT (A) Figure13.TypicalRegionsofStabilityEquivalentSeries Figure14.TypicalRegionsofStabilityEquivalentSeries Resistance(ESR)vsOutputCurrent Resistance(ESR)vsOutputCurrent 8 SubmitDocumentationFeedback Copyright©2004–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS730

TPS730 www.ti.com SBVS054J–NOVEMBER2004–REVISEDAPRIL2015 7 Detailed Description 7.1 Overview The TPS730 family of low-dropout (LDO) regulators has been optimized for use in noise-sensitive, battery- operated equipment. The device features extremely low dropout voltages, high PSRR, ultra-low output noise, low quiescent current (170 μA typically), and enable-input to reduce supply currents to less than 1 μA when the regulatoristurnedoff. 7.2 Functional Block Diagrams IN OUT UVLO Current 59 k 2.45V Sense ILIM SHUTDOWN R1 GND _ + FB EN R2 UVLO Thermal Shutdown External to QuickStart the Device IN RBeafnedregnacpe 250 kW Vref NR 1.22V Figure15. TPS730BlockDiagram(Adjustable-VoltageVersion) IN OUT UVLO 2.45V Current Sense GND SHUTDOWN ILIM R1 _ + EN UVLO R2 Thermal Shutdown QuickStart R2 = 40 kW Bandgap 250 kW Vref IN Reference NR 1.22V Figure16. TPS730BlockDiagram(Fixed-VoltageVersions) Copyright©2004–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:TPS730

TPS730 SBVS054J–NOVEMBER2004–REVISEDAPRIL2015 www.ti.com 7.3 Feature Description 7.3.1 UndervoltageLockout(UVLO) The TPS730 uses an undervoltage lockout (UVLO) circuit that disables the output until the input voltage is greater than the rising UVLO voltage. This circuit ensures that the device does not exhibit any unpredictable behaviorwhenthesupplyvoltageislowerthantheoperationalrangeoftheinternalcircuitry,V . IN(min) 7.3.2 Shutdown The enable pin (EN) is active high. Enable the device by forcing the EN pin to exceed V (1.7 V, minimum). EN(high) Turn off the device by forcing the EN pin to drop below 0.7 V. If shutdown capability is not required, connect EN toIN. 7.3.3 FoldbackCurrentLimit The TPS730 features internal current limiting and thermal protection. During normal operation, the TPS730 limits output current to approximately 400 mA. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, do not exceedthepowerdissipationratingsofthepackageortheabsolutemaximumvoltageratingsofthedevice. 7.4 Device Functional Modes 7.4.1 NormalOperation Thedeviceregulatestothenominaloutputvoltageunderthefollowingconditions: • TheinputvoltageisatleastashighasV . IN(min) • Theinputvoltageisgreaterthanthenominaloutputvoltageaddedtothedropoutvoltage. • TheenablevoltageisgreaterthanV . EN(min) • Theoutputcurrentislessthanthecurrentlimit. • Thedevicejunctiontemperatureislessthanthemaximumspecifiedjunctiontemperature. 7.4.2 DropoutOperation If the input voltage is lower than the nominal output voltage plus the specified dropout voltage, but all other conditions are met for normal operation, the device operates in dropout mode. In this mode of operation, the output voltage is the same as the input voltage minus the dropout voltage. The transient performance of the deviceissignificantlydegradedbecausethepassdeviceisinthelinearregionandnolongercontrolsthecurrent throughtheLDO.Lineorloadtransientsindropoutcanresultinlargeoutputvoltagedeviations. 7.4.3 Disabled Thedeviceisdisabledunderthefollowingconditions: • The enable voltage is less than the enable falling threshold voltage or has not yet exceeded the enable rising threshold. • Thedevicejunctiontemperatureisgreaterthanthethermalshutdowntemperature. • TheinputvoltageislessthanUVLO . falling Table1showstheconditionsthatleadtothedifferentmodesofoperation. Table1.DeviceFunctionalModeComparison PARAMETER OPERATINGMODE V V I T IN EN OUT J V >V +V and Normalmode IN OUT(nom) DO V >V I <I T <125°C V >V EN EN(high) OUT LIM J IN IN(min) Dropoutmode V <V <V +V V >V — T <125°C IN(min) IN OUT(nom) DO EN EN(high) J Disabledmode (anytrueconditiondisablesthe V <UVLO V <V — T >165°C(1) IN falling EN EN(low) J device) (1) Approximatevalueforthermalshutdown. 10 SubmitDocumentationFeedback Copyright©2004–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS730

TPS730 www.ti.com SBVS054J–NOVEMBER2004–REVISEDAPRIL2015 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 8.1 Application Information The TPS730 family of low-dropout (LDO) regulators has been optimized for use in noise-sensitive battery- operated equipment. The device features extremely low dropout voltages, high PSRR, ultra-low output noise, low quiescent current (170 μA typically), and enable-input to reduce supply currents to less than 1 μA when the regulatoristurnedoff. 8.1.1 AdjustableOperation The output voltage of the TPS73001 adjustable regulator is programmed using an external resistor divider as showninFigure17.TheoutputvoltageiscalculatedusingEquation1: § R · V V u¨1(cid:14) 1 ¸ OUT REF © R2 ¹ Where: • V =1.225Vtypical(theinternalreferencevoltage) (1) REF Resistors R and R should be chosen for approximately 50-μA divider current. Lower value resistors can be 1 2 used for improved noise performance, but the solution consumes more power. Higher resistors values can cause accuracy issues and other problems. The recommended design procedure is to choose R = 30.1 kΩ to set the 2 dividercurrentat50μA,C =15pFforstability,andthencalculateR usingEquation2: 1 1 V R = OUT -1 ´R 1 V 2 REF (2) To improve the stability of the adjustable version, TI suggests placing a small compensation capacitor between OUTandFB.Foroutputvoltages< 1.8V,thevalueofthiscapacitorshouldbe100pF.Foroutputvoltages >1.8 V,useEquation3tocalculatetheapproximatevalueofthiscapacitor. (3u10(cid:16)7)u(R (cid:14)R ) C 1 2 1 (R1uR2) (3) Figure 17 shows the suggested value of this capacitor for several resistor ratios. If this capacitor is not used (such as in a unity-gain configuration) or if an output voltage < 1.8 V is chosen, then the minimum recommended outputcapacitoris4.7μFinsteadof2.2 μF. OUTPUT VOLTAGE PROGRAMMING GUIDE VIN IN OUT VOUT TPS73001 OUTPUT 1mF EN R1 C1 VOLTAGE R1 R2 C1 2.2mF NR GND FB 1.22V short open 0pF 0.01mF R2 2.5V 31.6kW 30.1kW 22pF 3.3V 51kW 30.1kW 15pF 3.6V 59kW 30.1kW 15pF Figure17. TPS73001AdjustableLDORegulatorProgramming Copyright©2004–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:TPS730

TPS730 SBVS054J–NOVEMBER2004–REVISEDAPRIL2015 www.ti.com Application Information (continued) 8.1.2 CapacitorRecommendations Low equivalent series resistance (ESR) capacitors should be used for the input, output, noise reduction, and bypass capacitors. Ceramic capacitors with X7R and X5R dielectrics are preferred. These dielectrics offer more stable characteristics. Ceramic X7R capacitors offer improved overtemperature performance, while ceramic X5R capacitorsaremorecost-effectiveandareavailableinhighervalues. 8.1.3 InputandOutputCapacitorRequirements A 0.1-μF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the TPS730, is required for stability and improves transient response, noise rejection, and ripple rejection. A higher- value input capacitor may be necessary if large, fast-rise-time load transients are anticipated or the device is locatedseveralinchesfromthepowersource. Like most low-dropout regulators, the TPS730 requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance is 2.2 μF. Any 2.2-μF or larger ceramic capacitor is suitable, provided the capacitance does not vary significantly over temperature. If load current is not expected to exceed 100 mA, a 1-μF ceramic capacitor can be used. If a feed-forward capacitor is not used (such as in a unity-gain configuration) or if an output voltage less than 1.8 V is chosen, then the minimum recommended output capacitor is 4.7 μF instead of 2.2 μF. Table 2 lists the recommended output capacitorsizesforseveralcommonconfigurations. Table2.OutputCapacitorSizing CONDITION C (µF) OUT V <1.8VorC =0nF 4.7 OUT FF V >1.8V,I >100mA 2.2 OUT OUT V >1.8V,I <100mA 1 OUT OUT 8.1.4 NoiseReductionandFeed-ForwardCapacitorRequirements The internal voltage reference is a key source of noise in an LDO regulator. The TPS730 has an NR pin which is connected to the voltage reference through a 250-kΩ internal resistor. The 250-kΩ internal resistor, in conjunction with an external bypass capacitor connected to the NR pin, creates a low-pass filter to reduce the voltage reference noise and, therefore, the noise at the regulator output. In order for the regulator to operate properly, the current flow out of the NR pin must be at a minimum, because any leakage current creates an IR drop across the internal resistor thus creating an output error. Therefore, the bypass capacitor must have minimal leakage current. The bypass capacitor should be no more than 0.1 μF to ensure that it is fully charged duringthequick-starttimeprovidedbytheinternalswitchshownintheFunctionalBlockDiagramsection. As an example, the TPS73018 exhibits only 33 μV of output voltage noise using a 0.01-μF ceramic bypass RMS capacitoranda2.2-μFceramicoutputcapacitor.Notethattheoutputstartsupslowerasthebypasscapacitance increases due to the RC time constant at the NR pin that is created by the internal 250-kΩ resistor and external capacitor. A feed-forward capacitor is recommended to improve the stability of the device. If R = 30.1 kΩ, set C to 15 pF 2 1 for optimal performance. For voltages less than 1.8 V, the value of this capacitor should be 100 pF. For voltages greaterthan1.8V,theapproximatevalueofthiscapacitorcanbecalculatedasshowninEquation3. 8.1.5 ReverseCurrentOperation The TPS730 PMOS-pass transistor has a built-in back diode that conducts reverse current when the input voltage drops below the output voltage (for example, during power-down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be appropriate. If extended reverse voltage operation in anticipated, external limiting to 5% of the rated outputcurrentisrecommended. 12 SubmitDocumentationFeedback Copyright©2004–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS730

TPS730 www.ti.com SBVS054J–NOVEMBER2004–REVISEDAPRIL2015 8.2 Typical Application AtypicalapplicationcircuitisshowninFigure18. VIN VIN IN OUT VOUT VOUT TPS730xx 0.1m F EN GND NR 2.2m F 0.01m F(1) NOTE:(1)Thiscapacitorisoptional. Figure18. TypicalApplicationCircuit 8.2.1 DesignRequirements Table3liststhedesignrequirements. Table3.DesignParameters PARAMETER DESIGNREQUIREMENT Inputvoltage 4.2Vto3V(LithiumIonbattery) Outputvoltage 1.8V,±1% DCoutputcurrent 10mA Peakoutputcurrent 75mA Maximumambienttemperature 65°C 8.2.2 DetailedDesignProcedure Pick the desired output voltage option. An input capacitor of 0.1 µF is used as the battery is connected to the input through a via and a short 10-mil (0.01-in) trace. An output capacitor of 10 µF is used to provide optimal response time for the load transient. Verify that the maximum junction temperature is not exceed by referring to Figure24. 8.2.3 ApplicationCurves 4 4.8 V) V) m (N 2 VIN=3.8V (T VE VOUT=2.8V OU 0 IOUT=200mA V 3.8 COUT=2.2mF IOUT=200mA 3 CNR=0.001mF TJ=25°C 20 CCONRUT==0.20.12mmFF ddvt =0m.4sV V) (V)OUT 12 CNR=0.0047mF V(mIN -200 V CNR=0.01mF 0 0 20 40 60 80 100120140160180200 0 10 20 30 40 50 60 70 80 90 100 Time (ms) Time (ms) Figure19.TPS73028OutputVoltage,EnableVoltagevs Figure20.TPS73028LineTransientResponse Time(Start-Up) Copyright©2004–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:TPS730

TPS730 SBVS054J–NOVEMBER2004–REVISEDAPRIL2015 www.ti.com 100 (mV)UT 200 VCIONU=T3=.810VmF Wsistance () 10 CVTJION =U = T− 5=4.0 51° 0CV mtoF 125R°Cegion of Instability VO −20 Re D s e −40 eri 300 ddti =0.m02sA alent S 1 mA) 200 quiv 0.1 (UT 100 1mA R, E Region of Stability IO ES 0 0.01 0 50100 150200 250300 350400450500 0 0.02 0.04 0.06 0.08 0.20 Time (ms) IOUT (A) Figure21.TPS73028LoadTransientResponse Figure22.TypicalRegionsofStabilityEquivalentSeries Resistance(ESR)vsOutputCurrent 8.3 Do's and Don'ts Do place at least one, low-ESR, 2.2-μF capacitor as close as possible between the OUT pin of the regulator and theGNDpin. Do place at least one, low-ESR, 0.1-μF capacitor as close as possible between the IN pin of the regulator and theGNDpin. Doprovideadequatethermalpathsawayfromthedevice. Donotplacetheinputoroutputcapacitormorethan10mmawayfromtheregulator. Donotexceedtheabsolutemaximumratings. DonotfloattheEnable(EN)pin. DonotresistivelyorinductivelyloadtheNRpin. Donotlettheoutputvoltagegetmorethan0.3Vabovetheinputvoltage. 14 SubmitDocumentationFeedback Copyright©2004–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS730

TPS730 www.ti.com SBVS054J–NOVEMBER2004–REVISEDAPRIL2015 9 Power Supply Recommendations These devices are designed to operate from an input voltage supply range from 2.7 V to 5.5 V. The input voltage range must provide adequate headroom in order for the device to have a regulated output. This input supply must be well-regulated and stable. A 0.1-µF input capacitor is required for stability; if the input supply is noisy, additionalinputcapacitorswithlowESRcanhelpimprovetheoutputnoiseperformance. 10 Layout 10.1 Layout Guidelines Layout is a critical part of good power-supply design. There are several signal paths that conduct fast-changing currents or voltages that can interact with stray inductance or parasitic capacitance to generate noise or degrade the power-supply performance. To help eliminate these problems, the IN pin should be bypassed to ground with alowESRceramicbypasscapacitorwithanX5RorX7Rdielectric. Equivalent series inductance (ESL) and equivalent series resistance (ESR) must be minimized to maximize performanceandensurestability.Everycapacitor(C ,C ,C ,C )mustbeplacedascloseaspossibleto IN OUT NR/SS FF thedeviceandonthesamesideofthePCBastheregulatoritself. DonotplaceanyofthecapacitorsontheoppositesideofthePCBfromwheretheregulatorisinstalled.Theuse of vias and long traces is strongly discouraged because these circuits may impact system performance negatively,andevencauseinstability. 10.1.1 BoardLayoutRecommendationstoImprovePSRRandNoisePerformance To improve AC measurements like PSRR, output noise, and transient response, TI recommends designing the board with separate ground planes for V and V , with each ground plane connected only at the GND pin of IN OUT the device. In addition, the ground connection for the bypass capacitor should connect directly to the GND pin of thedevice. 10.2 Layout Example Output Ground Output Plane Input Plane IN OUT GND FB EN NR Input Ground NR and FB Ground Denotes via Figure23. LayoutExample(DBVPackage) Copyright©2004–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:TPS730

TPS730 SBVS054J–NOVEMBER2004–REVISEDAPRIL2015 www.ti.com 10.3 Thermal Considerations Thermal protection disables the output when the junction temperature rises to approximately 165°C, allowing the device to cool. When the junction temperature cools to approximately 140°C, the output circuitry is again enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits regulator dissipation, protecting the device from damage as a resultofoverheating. Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heatsink.Forreliableoperation,junctiontemperaturemustbelimitedto125°Cmaximum.Toestimatethemargin of safety in a complete design (including heatsink), increase the ambient temperature until the thermal protection istriggered;useworst-caseloadsandsignalconditions. The TPS730 internal protection circuitry is designed to protect against overload conditions. This circuitry is not intended to replace proper heatsinking. Continuously running the TPS730 into thermal shutdown degrades devicereliability. 10.4 Power Dissipation Specified regulator operation is assured to a junction temperature of +125°C; the maximum junction temperature should be restricted to +125°C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, P , and the actual dissipation, P , which must be less than or D(max) D equaltoP . D(max) ThemaximumpowerdissipationlimitisdeterminedusingEquation4: T max(cid:16) T P J A D(max) R 4JA Where: • Tmaxisthemaximumallowablejunctiontemperature. J • R isthethermalresistancejunction-to-ambientforthepackage(seetheThermalInformationtable). θJA • T istheambienttemperature. (4) A TheregulatordissipationiscalculatedusingEquation5: PD (VIN (cid:16) VOUT)uIOUT (5) Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the thermal protectioncircuit. Figure 24 shows the maximum ambient temperature versus the power dissipation of the TPS730. This figure assumes the device is soldered on a JEDEC standard, high-K layout with no airflow over the board. Actual board thermal impedances vary widely. If the application requires high power dissipation, having a thorough understanding of the board temperature and thermal impedances is helpful to ensure the TPS730 does not operateaboveajunctiontemperatureof125°C. 125 DBV Package C) YZQ Package q e ( ur at er 100 p m e T nt e bi m A 75 m u m xi a M 50 0 0.1 0.2 0.3 0.4 0.5 Power Dissapation (W) Figure24. MaximumAmbientTemperaturevsPowerDissipation 16 SubmitDocumentationFeedback Copyright©2004–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS730

TPS730 www.ti.com SBVS054J–NOVEMBER2004–REVISEDAPRIL2015 Power Dissipation (continued) Estimating the junction temperature can be done by using the thermal metrics Ψ and Ψ , shown in the JT JB Thermal Information table. These metrics are a more accurate representation of the heat transfer characteristics ofthedieandthepackagethanR .ThejunctiontemperaturecanbeestimatedwithEquation6. θJA Y : T = T +Y ·P JT J T JT D Y : T = T +Y ·P JB J B JB D where • P isthepowerdissipationshownbyEquation5, D • T isthetemperatureatthecenter-topoftheICpackage, T • T isthePCBtemperaturemeasured1mmawayfromtheICpackageonthePCBsurface. (6) B NOTE Both T and T can be measured on actual application boards using a thermo-gun (an T B infraredthermometer). For more information about measuring T and T , see the application note Using New Thermal Metrics T B (SBVA025),availablefordownloadatwww.ti.com. Copyright©2004–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:TPS730

TPS730 SBVS054J–NOVEMBER2004–REVISEDAPRIL2015 www.ti.com 11 Device and Documentation Support 11.1 Device Support 11.1.1 DevelopmentSupport 11.1.1.1 SpiceModels Computer simulation of circuit performance using SPICE is often useful when analyzing the performance of analog circuits and systems. A SPICE model for the TPS730 is available through the product folders under Tools &Software. 11.1.2 DeviceNomenclature Table4.OrderingInformation(1)(2) PRODUCT V OUT TPS730xxyyyz XX(X)isthenominaloutputvoltage(forexample,28=2.8V;285=2.85V;01=adjustableversion). YYYisthepackagedesignator. Zisthepackagequantity.Risforreel(3000pieces),Tisfortape(250pieces). (1) ForthemostcurrentpackageandorderinginformationseethePackageOptionAddendumattheendofthisdocument,orvisitthe deviceproductfolderonwww.ti.com. (2) Outputvoltagesfrom1.2Vto4.8Vin50-mVincrementsareavailable.Contactthefactoryfordetailsandavailability. 11.2 Documentation Support 11.2.1 RelatedDocumentation • UsingNewThermalMetrics,SBVA025 • ProsandConsofUsingaFeedforwardCapacitorwithaLow-DropoutRegulator,SBVA042 11.3 Trademarks NanoStarisatrademarkofTexasInstruments. BluetoothisaregisteredtrademarkofBluetoothSig,Inc. Allothertrademarksarethepropertyoftheirrespectiveowners. 11.4 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 11.5 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 18 SubmitDocumentationFeedback Copyright©2004–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS730

TPS730 www.ti.com SBVS054J–NOVEMBER2004–REVISEDAPRIL2015 12.1 TPS730YZQ Nanostar™ Wafer Chip Scale Information 0,79 0,84 1,30 1,34 0.625 Max NOTES:A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. NanoStar package configuration. D. This package is tin-lead (SnPb); consult the factory for availability of lead-free material. NanoStar is a trademark of Texas Instruments. Figure25. Nanostar™WaferChipScalePackage Copyright©2004–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:TPS730

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS73001DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PGVI & no Sb/Br) TPS73001DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PGVI & no Sb/Br) TPS73001DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PGVI & no Sb/Br) TPS73001DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PGVI & no Sb/Br) TPS73018DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PHHI & no Sb/Br) TPS73018DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PHHI & no Sb/Br) TPS73018DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PHHI & no Sb/Br) TPS73018DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PHHI & no Sb/Br) TPS73025DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PGWI & no Sb/Br) TPS73025DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PGWI & no Sb/Br) TPS73025DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PGWI & no Sb/Br) TPS73025YZQR ACTIVE DSBGA YZQ 5 3000 TBD Call TI Call TI -40 to 125 E4 TPS73025YZQT ACTIVE DSBGA YZQ 5 250 TBD Call TI Call TI -40 to 125 E4 TPS730285DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PHII & no Sb/Br) TPS730285DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PHII & no Sb/Br) TPS730285DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PHII & no Sb/Br) TPS73028DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PGXI & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS73028DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PGXI & no Sb/Br) TPS73028DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PGXI & no Sb/Br) TPS73028DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PGXI & no Sb/Br) TPS73028YZQR ACTIVE DSBGA YZQ 5 3000 TBD Call TI Call TI -40 to 125 E2 TPS73028YZQT ACTIVE DSBGA YZQ 5 250 TBD Call TI Call TI -40 to 125 E2 TPS73030DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PGYI & no Sb/Br) TPS73030DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PGYI & no Sb/Br) TPS73033DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PHUI & no Sb/Br) TPS73033DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PHUI & no Sb/Br) TPS73033DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PHUI & no Sb/Br) TPS73033DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PHUI & no Sb/Br) TPS73047DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PETI & no Sb/Br) TPS73047DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 PETI & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 10-Aug-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS73001DBVR SOT-23 DBV 6 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS73001DBVR SOT-23 DBV 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS73001DBVT SOT-23 DBV 6 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS73018DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS73018DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS73025DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS73025DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS730285DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS730285DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS73028DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS73028DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS73030DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS73030DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS73033DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS73033DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS73047DBVR SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS73047DBVT SOT-23 DBV 5 250 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 10-Aug-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS73001DBVR SOT-23 DBV 6 3000 203.0 203.0 35.0 TPS73001DBVR SOT-23 DBV 6 3000 180.0 180.0 18.0 TPS73001DBVT SOT-23 DBV 6 250 180.0 180.0 18.0 TPS73018DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS73018DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS73025DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS73025DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS730285DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS730285DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS73028DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS73028DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS73030DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS73030DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS73033DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS73033DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS73047DBVR SOT-23 DBV 5 3000 203.0 203.0 35.0 TPS73047DBVT SOT-23 DBV 5 250 203.0 203.0 35.0 PackMaterials-Page2

PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 1.45 B A 0.90 PIN 1 INDEX AREA 1 5 2X 0.95 3.05 2.75 1.9 1.9 2 4 3 0.5 5X 0.3 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com

EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM 2 (1.9) 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com

PACKAGE OUTLINE DBV0006A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 B A 1.45 MAX PIN 1 INDEX AREA 1 6 2X 0.95 3.05 2.75 1.9 5 2 4 3 0.50 6X 0.25 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214840/B 03/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.15 per side. 4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation. 5. Refernce JEDEC MO-178. www.ti.com

EXAMPLE BOARD LAYOUT DBV0006A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 6X (1.1) 1 6X (0.6) 6 SYMM 2 5 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214840/B 03/2018 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBV0006A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 6X (1.1) 1 6X (0.6) 6 SYMM 2 5 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214840/B 03/2018 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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