TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E–MAY2002–REVISEDJUNE2010 LOW INPUT VOLTAGE, 1-A LOW-DROPOUT LINEAR REGULATORS WITH SUPERVISOR CheckforSamples:TPS72501,TPS72515,TPS72516,TPS72518,TPS72525 FEATURES DESCRIPTION 1 • 1-AOutputCurrent The TPS725xx family of 1-A low-dropout (LDO) linear • Availablein1.5-V,1.6-V,1.8-V,2.5-V regulators has fixed voltage options available that are Fixed-OutputandAdjustableVersions commonly used to power the latest DSPs, FPGAs, (1.2-Vto5.5-V) and microcontrollers. An adjustable option ranging from 1.22 V to 5.5 V is also available. The integrated • InputVoltageDownto1.8V supervisory circuitry provides an active low RESET • Low170-mVDropoutVoltageat1A signal when the output falls out of regulation. The no (TPS72525) capacitor/any capacitor feature allows the customer • StableWithAnyType/ValueOutputCapacitor to tailor output transient performance as needed. Therefore, compared to other regulators capable of • IntegratedSupervisor(SVS)With50-ms providing the same output current, this family of RESETDelayTime regulators can provide a stand-alone power supply • Low210-µAGroundCurrentatFullLoad solution or a post regulator for a switch mode power (TPS72525) supply. • Lessthan1-µAStandbyCurrent These regulators are ideal for higher current • ±2%OutputVoltageToleranceOverLine, applications. The family operates over a wide range Load,andTemperature(-40°Cto125°C) of input voltages (1.8 V to 6 V) and has very low dropout(170mVat1-A). • IntegratedUVLO Ground current is typically 210 µA at full load and • ThermalandOvercurrentProtection drops to less than 80µA at no load. Standby current • 5-LeadSOT223-5orDDPAKand8-PinSOP islessthan1µA. (TPS72501only)SurfaceMountPackage Each regulator option is available in either a APPLICATIONS SOT223-5, D (TPS72501 only), or DDPAK package. With a low input voltage and properly heatsinked • PCICards package, the regulator dissipates more power and • ModemBanks achieves higher efficiencies than similar regulators • TelecomBoards requiring 2.5 V or more minimum input voltage and • DSP,FPGA,andMicroprocessorPower higher quiescent currents. These features make it a Supplies viable power supply solution for portable, battery-poweredequipment. • Portable,Battery-PoweredApplications DCQ PACKAGE KTT PACKAGE D PACKAGE SOT223-5 DDPAK (TOP VIEW) (TOP VIEW) (TOP VIEW) ENABLE 1 OUT 1 8 IN IN 2 FB 2 7 GND GND 3 GND 3 6 GND OUT 4 1 2 3 4 5 NC 4 5 ENABLE RESET/FB 5 ENDTB BLIGNOUT/F NC − No internal connection A E N S E E R NOTE: TPS72501replacesRESETwithFB.TabisGNDfortheDCKandKTTpackages. 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2002–2010,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E–MAY2002–REVISEDJUNE2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage. ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemore susceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications. DESCRIPTION (CONTINUED) Althoughanoutputcapacitorisnotrequiredforstability,transientresponseandoutputnoiseareimprovedwitha 10-µFoutputcapacitor. Unlike some regulators that have a minimum current requirement, the TPS725 family is stable with no output load current. The low noise capability of this family, coupled with its high current operation and ease of power dissipation,makeitidealfortelecomboards,modembanks,andothernoise-sensitiveapplications. ORDERINGINFORMATION T VOLTAGE(1) SOT223-5(2) SYMBOL DDPAK(3) D(4) SYMBOL J Adjustable(1.2Vto5V) TPS72501DCQ PS72501 TPS72501KTT TPS72501D TPS72501 1.5V TPS72515DCQ PS72515 TPS72515KTT — TPS72515 -40°Cto 1.6V TPS72516DCQ PS72516 TPS72516KTT — TPS72516 125°C 1.8V TPS72518DCQ PS72518 TPS72518KTT — TPS72518 2.5V TPS72525DCQ PS72525 TPS72525KTT — TPS72525 (1) Othervoltageoptionsareavailableuponrequestfromthemanufacturer. (2) Toorderatapedandreeledpart,addthesuffixRtothepartnumber(e.g.,TPS72501DCQR). (3) Toordera50-piecereel,addthesuffixT(e.g.,TPS72501KTTT);toordera500-piecereel,addthesuffixR(e.g.,TPS72501KTTR). (4) Toorderatapedandreeledpart,addthesuffixRorT(2500or500)tothepartnumber(e.g.TPS72501DR) ABSOLUTE MAXIMUM RATINGS overoperatingfree-airtemperaturerangeunlessotherwisenoted(1) UNIT Inputvoltage,V (2) -0.3to7 V I VoltagerangeatEN,FB -0.3toV +0.3 V I VoltageonOUT,RESET 6 V ESDrating,HBM 2 kV Continuoustotalpowerdissipation SeeDissipationRatingsTable Operatingjunctiontemperaturerange,T -50to150 °C J Maximumjunctiontemperaturerange,T 150 °C J Storagetemperature,T -65to150 °C stg (1) Stressesbeyondthoselistedunderabsolutemaximumratingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderrecommendedoperating conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Allvoltagevaluesarewithrespecttonetworkgroundterminal. RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNIT Inputvoltage,V (1) 1.8 6 V I Continuousoutputcurrent,I 0 1 A O Operatingjunctiontemperature,T -40 125 °C J (1) MinimumV =V (nom)+V . I O DO 2 SubmitDocumentationFeedback Copyright©2002–2010,TexasInstrumentsIncorporated ProductFolderLink(s):TPS72501TPS72515 TPS72516TPS72518 TPS72525

TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E–MAY2002–REVISEDJUNE2010 PACKAGE DISSIPATION RATINGS PACKAGE BOARD R R qJC qJA DDPAK HighK(1) 2°C/W 23°C/W SOT223 LowK(2) 15°C/W 53°C/W D-8 HighK(1) 39.4°C/W 55°C/W (1) TheJEDEChigh-K(2s2p)boarddesignusedtoderivethisdatawasa3-inchx3-inch(7.5-cmx7.5-cm),multilayerboardwith1ounce internalpowerandgroundplanesand2ouncecoppertracesontopandbottomoftheboard. (2) TheJEDEClow-K(1s)boarddesignusedtoderivethisdatawasa3-inchx3-inch(7.5-cmx7.5-cm),two-layerboardwith2ounce coppertracesontopoftheboard. ELECTRICAL CHARACTERISTICS overrecommendedoperatingfree-airtemperaturerangeV =V +1V,I =1mA,EN=IN,C =1µF,C =1µF(unless I O(typ) O o i otherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT Bandgapvoltagereference 1.177 1.220 1.263 V TPS72501 0µA<I <1A(1) 1.22V≤V ≤5.5V 0.965V 1.035V Adjustable O O O O T =25°C 1.5 J TPS72515 0µA<I <1A 1.8V≤V ≤5.5V 1.47 1.53 O I T =25°C 1.6 J V Outputvoltage TPS72516 V O 0µA<I <1A 2.6V≤V ≤5.5V 1.568 1.632 O I T =25°C 1.8 J TPS72518 0µA<I <1A 2.8V≤V ≤5.5V 1.764 1.836 O I T =25°C 2.5 J TPS72525 0µA<I <1A 3.5V≤V ≤5.5V 2.45 2.55 O I I =0µA 75 120 O I Groundcurrent µA I =1A 210 300 O EN<0.4V T =25°C 0.2 J Standbycurrent µA EN<0.4V 1 BW=200Hzto100kHz, C =10µF,I =1 V Outputnoisevoltage o O 150 µV n T =25°C mA J PSRR Ripplerejection f=1kHz,C =10µF T =25°C 60 dB o J Currentlimit(2) 1.1 1.6 2.3 A Outputvoltagelineregulation (ΔV /V )(3) VO+1V<VI≤5.5V -0.15 0.02 0.15 %/V O O Outputvoltageloadregulation 0µA<I <1A -0.25 0.05 0.25 %/A O V ENhighlevelinput(2) 1.3 IH V V ENlowlevelinput(2) -0.2 0.4 IL I ENinputcurrent EN=0VorV 0.01 100 nA I I I Feedbackcurrent TPS72501 V =1.22 -100 100 nA (FB) (FB) UVLOthreshold V rising 1.45 1.57 1.70 V CC UVLOhysteresis T =25°C,V rising 50 mV J CC UVLOdeglitch T =25°C,V rising 10 µs J CC UVLOdelay T =25°C,V rising 100 µs J CC (1) MinimumINoperatingvoltageusedfortestingisV +1V. O(typ) (2) TestconditionincludesoutputvoltageV =V -15%andpulseduration=10ms. O O (3) V =(V +1)or1.8Vwhicheverisgreater. Imin O VO(cid:5)5.5V(cid:2)VImin(cid:6) Lineregulation(mV) (cid:3) (cid:5)%(cid:4)V(cid:6) (cid:1) 100 (cid:1)1000 Copyright©2002–2010,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLink(s):TPS72501TPS72515 TPS72516TPS72518 TPS72525

TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E–MAY2002–REVISEDJUNE2010 www.ti.com ELECTRICAL CHARACTERISTICS (continued) overrecommendedoperatingfree-airtemperaturerangeV =V +1V,I =1mA,EN=IN,C =1µF,C =1µF(unless I O(typ) O o i otherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT I =1A T =25°C 170 TPS72525 (4) O J I =1A 280 O V Dropoutvoltage mV DO I =1A T =25°C 210 TPS72518 (5) O J I =1A 320 O Minimuminputvoltageforvalid 1.3 V RESET Tripthresholdvoltage 90 93 96 %V O Hysteresisvoltage 10 mV RESET t delaytime 25 50 75 ms (RESET) Risingedgedeglitch 10 µs Outputlowvoltage(at700µA) -0.3 0.4 V Leakagecurrent 100 nA (4) DropoutvoltageisdefinedasthedifferentialvoltagebetweenV andV whenV drops100mVbelowthevaluemeasuredwith O I O V =V +1V. I O (5) DropoutvoltageisdefinedasthedifferentialvoltagebetweenV andV whenV drops100mVbelowthevaluemeasuredwith O I O V =V +1V. I O 4 SubmitDocumentationFeedback Copyright©2002–2010,TexasInstrumentsIncorporated ProductFolderLink(s):TPS72501TPS72515 TPS72516TPS72518 TPS72525

TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E–MAY2002–REVISEDJUNE2010 FUNCTIONALBLOCKDIAGRAM—ADJUSTABLEVERSION TPS72501 IN OUT EN Current 1.220 Limit/Thermal Protection Vref FB GND FUNCTIONALBLOCKDIAGRAM—FIXEDVERSION TPS72515/16/18/25 IN OUT EN Current 1.220 Limit/Thermal Vref Protection GND RESET Deglitch and Delay 0.93 × Vref TERMINALFUNCTIONS TERMINAL NO. NO.D I/O DESCRIPTION NAME CQ& D KTT ENABLE 5 1 I Enableinput FB 2 Feedback GND 3,6,7 3 Ground IN 8 2 I Inputsupplyvoltage RESET/FB — 5 O/I ThisterminalisthefeedbackpointfortheadjustableoptionTPS72501.Forallotheroptions,this terminalistheRESEToutputterminal.Whenusedwithapullupresistor,thisopen-drainoutput providestheactivelowRESETsignalwhentheregulatoroutputvoltagedropsmorethan5%below itsnominaloutputvoltage.TheRESETdelaytimeistypically50ms. NC 4 — Noconnection OUT 1 4 O Regulatedoutputvoltage Copyright©2002–2010,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLink(s):TPS72501TPS72515 TPS72516TPS72518 TPS72525

TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E–MAY2002–REVISEDJUNE2010 www.ti.com RESETTIMINGDIAGRAM IN VRES VRES (see Note A) t OUT VIT+(see Note B) VIT+(see Note B) Threshold Voltage VIT– VIT– (see Note B) (see Note B) t RESET OutpÎut Î 50 ms 50 ms ÎÎ Delay Delay ÎÎ ÎÎ OutputÎÎ ÎÎOutput Undefined Undefined ÎÎ ÎÎ ÎÎ ÎÎt NOTES:A. VRES is the minÎimumÎ input voltage for a valid RESET. The symbol VRES is not currently listed within EÎIA orÎ JEDEC standards for semiconductor symbology. B. VIT –Trip voltage is typically 7% lower than the output voltage (93%VO) VIT– to VIT+ is the hysteresis voltage. TYPICAL CHARACTERISTICS TPS72518 TPS72518 TPS72518 OUTPUTVOLTAGE OUTPUTVOLTAGE GROUNDCURRENT vs vs vs OUTPUTCURRENT JUNCTIONTEMPERATURE JUNCTIONTEMPERATURE 1.8015 1.805 250 1.801 VCTJIo === 221.5 8m° FVC V VCIo == 21. 8m FV A 200 VCTJIo === 221.5 8m° FVC IO = 1 A − Output Voltage − V 11..7890190.855 − Output Voltage − O11..789050 IO =IO 1 = A 0 mA mGround Current − 110500 IO = 0 mA O V 1.790 V 50 1.799 1.7985 1.785 0 0 0.2 0.4 0.6 0.8 1 −40−25−10 5 20 35 50 65 80 95 110125 −40−25−10 5 20 35 50 65 80 95110125 IO − Output Current − A TJ − Junction Temperature − °C TJ − Junction Temperature − °C Figure1. Figure2. Figure3. 6 SubmitDocumentationFeedback Copyright©2002–2010,TexasInstrumentsIncorporated ProductFolderLink(s):TPS72501TPS72515 TPS72516TPS72518 TPS72525

TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E–MAY2002–REVISEDJUNE2010 TYPICAL CHARACTERISTICS (continued) TPS72518 TPS72525 TPS72518 GROUNDCURRENT DCDROPOUTVOLTAGE DROPOUTVOLTAGE vs vs vs OUTPUTCURRENT OUTPUTCURRENT JUNCTIONTEMPERATURE 200 300 300 175 VO = 2.5 V (nom) VCOo == 11 .m7F V 250 V 250 V m A 150 m − mGround Current − 1102570505 − Dropout Voltage − O 112050000 TJ = 25°C TJ = 1T2J5 °=C −40°C − Dropout Voltage DO 112050000 IO = 1 A 25 VD 50 V 50 IO = 10 mA 0 0 0 0.01 0.1 1 10 100 1000 0 0.2 0.4 0.6 0.8 1 −40−25−10 5 20 35 50 65 80 95110125 IO − Output Current − mA IO − Output Current − A TJ − Junction Temperature − °C Figure4. Figure5. Figure6. MINIMUMREQUIRED INPUTVOLTAGE vs TPS72518 TPS72518 OUTPUTVOLTAGE LINETRANSIENTRESPONSE LOADTRANSIENTRESPONSE 4.5 V V uired Input Voltage − V 3.534 TJ = 25°CTJ = 125°C − Input Voltage − VI 23..88 ICOo == 11 0A m F DV− Change inOOutput Voltage − m−1100000 VCCOoi = == 1 12 0m.8 Fm VF m Req 2.5 − mV 100 nt − A 1 − MinimuVI 1.521.5 2 VO T−2J . O5=u −t4p0u°t3C Voltag3e.5 − V 4 4.5 − Output Voltage VO−10000 50 1001502t 0−0 T2im50e 3−0 m0s350400450500 − Output CurreIO 0.500 5 10 15t −2 0Tim2e5 − m3s0 35 40 45 50 Figure7. Figure8. Figure9. Copyright©2002–2010,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLink(s):TPS72501TPS72515 TPS72516TPS72518 TPS72525

TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E–MAY2002–REVISEDJUNE2010 www.ti.com TYPICAL CHARACTERISTICS (continued) TPS72518OUTPUTVOLTAGE, ENABLEVOLTAGE TPS72518 vs TPS72518 LOADTRASIENTRESPONSE TIME(START-UP) POWERUP/POWERDOWN V− Change inOutput Voltage − mV−1100000 VI = 2.8 V Enable Voltage − V 1023 VICOIo === 121 .08A mVF − Input Voltage − V 354 RCCLoi ===V 1I11 .m8mF FW D O Co = 1 m F VI 2 I − Output Current − AO 0.5100 5 10 15t 2−0 Tim25e − 3mC0sI =3 15 m F40 45 50 V − Output Voltage − VO10..552100 20 40 60 t8 −0 T1im00e1 −2 0m s140160180200 − Output Voltage − VVO 100 100200300VO4t 0−0 T5im00e 6−0 m0s7008009001000 Figure10. Figure11. Figure12. TPS72518OUTPUTSPECTRAL TPS72518 NOISEDENSITY RIPPLEREJECTION CURRENTLIMIT vs vs vs FREQUENCY FREQUENCY INPUTVOLTAGE 3.5 100 2000 mV/Hz 3 VCIo == 21.08 mVF B 9800 VVCIOO= ==2 .118.0 8V m,VF, 11890000 TJ = 125°C y − 2.5 − d 70 A 1700 ctral Noise Densit 1.512 IO = 1 A Ripple Rejection 53640000 10 m F / 1mA Current Limit − 1111345600000000 TJ = −40°CTJ = 25°C put Spe 0.5 IO = 1 mA 2100 10 m F / 1 A 11210000 Out 0 0 1000 10 100 1 k 10 k 100 k 10 100 1 k 10 k 100 k 1 M 1.5 2 2.5 3 3.5 4 4.5 5 5.5 f − Frequency − Hz f − Frequency − Hz VI − Input voltage − V Figure13. Figure14. Figure15. TPS72515GROUNDCURRENT DROPOUTVOLTAGE vs vs INPUTVOLTAGE INPUTVOLTAGE 600 300 500 V 250 TJ = 125°C m − TJ = 25°C A e 400 g 200 mCurrent − 300 I = 1 A pout Volta 150 ound 200 − Dro 100 Gr I = 0 A DO TJ = −40°C 100 V 50 0 0 0 1 2 3 4 5 6 1.5 2 2.5 3 3.5 4 4.5 5 5.5 VI − Input Voltage − V VI − Input Voltage − V Figure16. Figure17. 8 SubmitDocumentationFeedback Copyright©2002–2010,TexasInstrumentsIncorporated ProductFolderLink(s):TPS72501TPS72515 TPS72516TPS72518 TPS72525

TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E–MAY2002–REVISEDJUNE2010 APPLICATION INFORMATION The TPS725xx family of low-dropout (LDO) regulators has numerous features that make it applicable to a wide range of applications. The family operates with very low input voltage (≥1.8 V) and low dropout voltage (typically 200 mV at full load), making it an efficient stand-alone power supply or post regulator for battery or switch mode power supplies. Both the active low RESET and 1-A output current make the TPS725xx family ideal for powering processor and FPGA supplies. The TPS725xx family also has low output noise (typically 150 µV with 10-µF RMS outputcapacitor),makingitidealforuseintelecomequipment. External Capacitor Requirements A 1-µF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the TPS725xx, is required for stability. To improve transient response, noise rejection, and ripple rejection, an additional 10-µF or larger, low ESR capacitor is recommended. A higher-value, low ESR input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches from the powersource,especiallyiftheminimuminputvoltageof1.8Visused. Althoughanoutputcapacitorisnotrequiredforstability,transientresponseandoutputnoiseareimprovedwitha 10-µFoutputcapacitor. Programming the TPS72501 Adjustable LDO Regulator The output voltage of the TPS72501 adjustable regulator is programmed using an external resistor divider as showninFigure18.Theoutputvoltageiscalculatedusing: (cid:4) R1(cid:5) VO(cid:3)Vref(cid:1) 1(cid:2)R2 (1) Where: • V =V =1.22Vtypical(seetheelectricalcharacteristicsforV range) FB REF REF Resistors R1 and R2 should be chosen for approximately 10-µA divider current. Lower value resistors offer no inherent advantage and waste more power. Higher values should be avoided as leakage currents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 120kΩ to set the divider current at10µAandthencalculateR1using: (cid:4)V (cid:5) O R1(cid:3) (cid:2)1 (cid:1)R2 V ref (2) TPS72501 V IN OUT V I O 1mF R1 C O EN FB GND R2 R1 VO= 1.22 V´ 1 + R2 Figure18. TPS72501AdjustableTypicalApplicationDiagram Copyright©2002–2010,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLink(s):TPS72501TPS72515 TPS72516TPS72518 TPS72525

TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E–MAY2002–REVISEDJUNE2010 www.ti.com TPS725xx V IN OUT V I O 1mF 10 kW C O EN RESET GND Figure19. TPS72501FixedOutputTypicalApplicationDiagram Table1.OutputVoltageProgrammingGuide(Standard1%ResistorValues) PROGRAMVOLTAGE R1(kΩ) R2(kΩ) ACTUALVOLTAGE 1.8V 56.2 118 1.801 2.5V 127 121 2.5 3.3V 196 115 3.299 3.6V 205 105 3.602 Regulator Protection The TPS725xx pass element has a built-in back diode that safely conducts reverse current when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage is anticipated, external limiting might be appropriate. The TPS725xx also features internal current limiting and thermal protection. During normal operation, the TPS725xx limits output current to approximately 1.6 A. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure,careshouldbetakennottoexceedthepowerdissipationratingsofthepackage.Ifthetemperatureofthe device exceeds 165°C, thermal-protection circuitry shuts it down. Once the device has cooled down to below 145°C,regulatoroperationresumes. 10 SubmitDocumentationFeedback Copyright©2002–2010,TexasInstrumentsIncorporated ProductFolderLink(s):TPS72501TPS72515 TPS72516TPS72518 TPS72525

TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E–MAY2002–REVISEDJUNE2010 THERMAL INFORMATION The amount of heat that an LDO linear regulator generates is directly proportional to the amount of power it dissipates during operation. All integrated circuits have a maximum allowable junction temperature (T max) J above which normal operation is not assured. A system designer must design the operating environment so that the operating junction temperature (T ) does not exceed the maximum junction temperature (T max). The two J J main environmental variables that a designer can use to improve thermal performance are air flow and external heatsinks. The purpose of this information is to aid the designer in determining the proper operating environment foralinearregulatorthatisoperatingataspecificpowerlevel. Ingeneral,themaximumexpectedpower(P )consumedbyalinearregulatoriscomputedas: D(max) (cid:5) (cid:6) PDmax(cid:4) VI(avg)(cid:3)VO(avg) (cid:1)IO(avg) (cid:2) VI(avg)xI(Q) (3) Where: • V istheaverageinputvoltage. I(avg) • V istheaverageoutputvoltage. O(avg) • I istheaverageoutputcurrent. O(avg) • I isthequiescentcurrent. (Q) For most TI LDO regulators, the quiescent current is insignificant compared to the average output current; therefore, the term V x I can be neglected. The operating junction temperature is computed by adding the I(avg) (Q) ambient temperature (T ) and the increase in temperature due to the regulator's power dissipation. The A temperature rise is computed by multiplying the maximum expected power dissipation by the sum of the thermal resistances between the junction and the case (R ), the case to heatsink (R ), and the heatsink to ambient qJC qCS (R ). Thermal resistances are measures of how effectively an object dissipates heat. Typically, the larger the qSA device,themoresurfaceareaavailableforpowerdissipationandthelowertheobject'sthermalresistance. Figure 20 illustrates these thermal resistances for (a) a SOT223 package mounted in a JEDEC low-K board, and (b)aDDPAKpackagemountedonaJEDEChigh-Kboard. A TJ Rq JC A CIRCUIT BOARD COPPER AREA B C B TC B Rq CS A C Rq SA C DDPAK Package SOT223 Package TA (b) (a) Figure20. ThermalResistances Equation4summarizesthecomputation: TJ (cid:2) TA(cid:1)PDmaxx(cid:3)Rq JC (cid:1) Rq CS (cid:1) Rq SA(cid:4) (4) The R is specific to each regulator as determined by its package, lead frame, and die size provided in the qJC regulator's data sheet. The R is a function of the type and size of heatsink. For example, black body radiator qSA type heatsinks can have R values ranging from 5°C/W for very large heatsinks to 50°C/W for very small qCS heatsinks. The R is a function of how the package is attached to the heatsink. For example, if a thermal qCS compoundisusedtoattachaheatsinktoaSOT223package,R of1°C/Wisreasonable. qCS Copyright©2002–2010,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLink(s):TPS72501TPS72515 TPS72516TPS72518 TPS72525

TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E–MAY2002–REVISEDJUNE2010 www.ti.com Even if no external black body radiator type heatsink is attached to the package, the board on which the regulator is mounted provides some heatsinking through the pin solder connections. Some packages, like the DDPAK and SOT223 packages, use a copper plane underneath the package or the circuit board's ground plane for additional heatsinking to improve their thermal performance. Computer-aided thermal modeling can be used to compute very accurate approximations of an integrated circuit's thermal performance in different operating environments (e.g., different types of circuit boards, different types and sizes of heatsinks, different air flows, etc.). Using these models, the three thermal resistances can be combined into one thermal resistance between junction and ambient (R ). This R is valid only for the specific operating environment used in the computer qJA qJA model. Equation4simplifiesintoEquation5: TJ (cid:2) TA(cid:1)PDmaxx Rq JA (5) RearrangingEquation5givesEquation6: T –T J A Rq JA (cid:1) P max D (6) Using Equation 5 and the computer model generated curves shown in Figure 21 and Figure 24, a designer can quickly compute the required heatsink thermal resistance/board area for a given ambient temperature, power dissipation,andoperatingenvironment. DDPAK Power Dissipation The DDPAK package provides an effective means of managing power dissipation in surface mount applications. The DDPAK package dimensions are provided in the Mechanical Data section at the end of the data sheet. The addition of a copper plane directly underneath the DDPAK package enhances the thermal performance of the package. To illustrate, the TPS72525 in a DDPAK package was chosen. For this example, the average input voltage is 5 V, the output voltage is 2.5 V, the average output current is 1 A, the ambient temperature 55°C, the air flow is 150 LFM, and the operating environment is the same as documented below. Neglecting the quiescent current, themaximumaveragepoweris: PDmax (cid:2) (5 (cid:1) 2.5)Vx1A (cid:2) 2.5W (7) SubstitutingT maxforT intoEquation6givesEquation8: J J Rq JAmax (cid:2) (125 (cid:1) 55)°C(cid:3)2.5W (cid:2) 28°C(cid:3)W (8) From Figure 21, DDPAK Thermal Resistance vs Copper Heatsink Area, the ground plane needs to be 1 cm2 for the part to dissipate 2.5 W. The operating environment used in the computer model to construct Figure 21 consisted of a standard JEDEC High-K board (2S2P) with a 1 oz. internal copper plane and ground plane. The package is soldered to a 2 oz. copper pad. The pad is tied through thermal vias to the 1 oz. ground plane. Figure22showsthesideviewoftheoperatingenvironmentusedinthecomputermodel. 12 SubmitDocumentationFeedback Copyright©2002–2010,TexasInstrumentsIncorporated ProductFolderLink(s):TPS72501TPS72515 TPS72516TPS72518 TPS72525

TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E–MAY2002–REVISEDJUNE2010 40 No Air Flow W C/ 35 ° − e 150 LFM c n a st 30 si e R mal 250 LFM er 25 h T − A J Rq 20 15 0.1 1 10 100 Copper Heatsink Area − cm2 Figure21. DDPAKThermalResistancevsCopperHeatsinkArea 2 oz. Copper Solder Pad with 25 Thermal Vias 1 oz. Copper Power Plane 1 oz. Copper Ground Plane Thermal Vias, 0.3 mm Diameter, 1,5 mm Pitch Figure22. DDPAKThermalResistance From the data in Figure 23 and rearranging Equation 6, the maximum power dissipation for a different ground planeareaandaspecificambienttemperaturecanbecomputed. Copyright©2002–2010,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLink(s):TPS72501TPS72515 TPS72516TPS72518 TPS72525

TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E–MAY2002–REVISEDJUNE2010 www.ti.com 5 C TA = 55°C °5 W 12 − − ation 4 250 LFM ature sip per s m Di e er 150 LFM n T w 3 o Po cti m un u J m m xi No Air Flow u a m − M 2 axi D M P − M TJ 1 0.1 1 10 100 Copper Heatsink Area − cm2 Figure23. MaximumPowerDissipationvsCopperHeatsinkArea SOT223 Power Dissipation The SOT223 package provides an effective means of managing power dissipation in surface mount applications. The SOT223 package dimensions are provided in the Mechanical Data section at the end of the data sheet. The addition of a copper plane directly underneath the SOT223 package enhances the thermal performance of the package. To illustrate, the TPS72525 in a SOT223 package was chosen. For this example, the average input voltage is 3.3 V, the output voltage is 2.5 V, the average output current is 1 A, the ambient temperature 55°C, no air flow is present, and the operating environment is the same as documented below. Neglecting the quiescent current, the maximumaveragepoweris: PDmax (cid:2) (3.3 (cid:1) 2.5)Vx1A (cid:2) 800mW (9) SubstitutingT maxforT intoEquation6givesEquation10: J J Rq JAmax (cid:2) (125 (cid:1) 55)°C(cid:3)800mW (cid:2) 87.5°C(cid:3)W (10) From Figure 24, R vs PCB Copper Area, the ground plane needs to be 0.55 in2 for the part to dissipate 800 ΘJA mW. The operating environment used to construct Figure 24 consisted of a board with 1 oz. copper planes. The package is soldered to a 1 oz. copper pad on the top of the board. The pad is tied through thermal vias to the 1 oz.groundplane. 14 SubmitDocumentationFeedback Copyright©2002–2010,TexasInstrumentsIncorporated ProductFolderLink(s):TPS72501TPS72515 TPS72516TPS72518 TPS72525

TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E–MAY2002–REVISEDJUNE2010 180 No Air Flow 160 W C/ 140 ° − e c 120 n a st si 100 e R mal 80 er h T 60 − A J 40 Rq 20 0 0.1 1 10 PCB Copper Area − in2 Figure24. SOT223ThermalResistancevsPCBAREA From the data in Figure 24 and rearranging Equation 6, the maximum power dissipation for a different ground planeareaandaspecificambienttemperaturecanbecomputed(asshowninFigure25). 6 TA = 25°C W − 5 n o ati p 4 si s Di 4 in2 PCB Area r e w 3 o P m mu 2 0.5 in2 PCB Area xi a M − PD 1 0 0 25 50 75 100 125 150 TA − Ambient Temperature − °C Figure25. SOT223PowerDissipation Copyright©2002–2010,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLink(s):TPS72501TPS72515 TPS72516TPS72518 TPS72525

TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E–MAY2002–REVISEDJUNE2010 www.ti.com REVISION HISTORY NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionD(March2004)toRevisionE Page • DeletedFigure14,OutputImpedancevsFrequency ........................................................................................................... 8 • UpdatedFigure18 ................................................................................................................................................................ 9 • AddedFigure19 ................................................................................................................................................................. 10 • AddedTable1,OutputVoltageProgrammingGuide ......................................................................................................... 10 16 SubmitDocumentationFeedback Copyright©2002–2010,TexasInstrumentsIncorporated ProductFolderLink(s):TPS72501TPS72515 TPS72516TPS72518 TPS72525

PACKAGE OPTION ADDENDUM www.ti.com 4-Mar-2019 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS72501DCQ ACTIVE SOT-223 DCQ 6 78 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72501 & no Sb/Br) TPS72501DCQR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72501 & no Sb/Br) TPS72501DCQRG4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72501 & no Sb/Br) TPS72501KTTR ACTIVE DDPAK/ KTT 5 500 Green (RoHS CU SN | Call TI Level-2-260C-1 YEAR -40 to 125 TPS TO-263 & no Sb/Br) 72501 TPS72501KTTRG3 ACTIVE DDPAK/ KTT 5 500 Green (RoHS CU SN Level-2-260C-1 YEAR -40 to 125 TPS TO-263 & no Sb/Br) 72501 TPS72515DCQ ACTIVE SOT-223 DCQ 6 78 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72515 & no Sb/Br) TPS72515DCQG4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72515 & no Sb/Br) TPS72515DCQR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72515 & no Sb/Br) TPS72515DCQRG4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72515 & no Sb/Br) TPS72515KTTR ACTIVE DDPAK/ KTT 5 500 Green (RoHS CU SN | Call TI Level-2-260C-1 YEAR -40 to 125 TPS TO-263 & no Sb/Br) 72515 TPS72516DCQ ACTIVE SOT-223 DCQ 6 78 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72516 & no Sb/Br) TPS72516DCQR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72516 & no Sb/Br) TPS72516KTTT ACTIVE DDPAK/ KTT 5 50 Green (RoHS CU SN | Call TI Level-2-260C-1 YEAR -40 to 125 TPS TO-263 & no Sb/Br) 72516 TPS72518DCQ ACTIVE SOT-223 DCQ 6 78 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72518 & no Sb/Br) TPS72518DCQG4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72518 & no Sb/Br) TPS72518DCQR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72518 & no Sb/Br) TPS72518DCQRG4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72518 & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 4-Mar-2019 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS72518KTTR ACTIVE DDPAK/ KTT 5 500 Green (RoHS CU SN | Call TI Level-2-260C-1 YEAR -40 to 125 TPS TO-263 & no Sb/Br) 72518 TPS72525DCQ ACTIVE SOT-223 DCQ 6 78 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72525 & no Sb/Br) TPS72525DCQR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72525 & no Sb/Br) TPS72525DCQRG4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 PS72525 & no Sb/Br) TPS72525KTTR ACTIVE DDPAK/ KTT 5 500 Green (RoHS CU SN | Call TI Level-2-260C-1 YEAR -40 to 125 TPS TO-263 & no Sb/Br) 72525 TPS72525KTTRG3 ACTIVE DDPAK/ KTT 5 500 Green (RoHS CU SN Level-2-260C-1 YEAR -40 to 125 TPS TO-263 & no Sb/Br) 72525 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 4-Mar-2019 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 16-Feb-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS72501DCQR SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3 TPS72501KTTR DDPAK/ KTT 5 500 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 TO-263 TPS72515DCQR SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3 TPS72515KTTR DDPAK/ KTT 5 500 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 TO-263 TPS72516DCQR SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3 TPS72516KTTT DDPAK/ KTT 5 50 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 TO-263 TPS72518DCQR SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3 TPS72518KTTR DDPAK/ KTT 5 500 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 TO-263 TPS72525DCQR SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3 TPS72525KTTR DDPAK/ KTT 5 500 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 TO-263 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 16-Feb-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS72501DCQR SOT-223 DCQ 6 2500 346.0 346.0 29.0 TPS72501KTTR DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 TPS72515DCQR SOT-223 DCQ 6 2500 346.0 346.0 29.0 TPS72515KTTR DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 TPS72516DCQR SOT-223 DCQ 6 2500 346.0 346.0 41.0 TPS72516KTTT DDPAK/TO-263 KTT 5 50 367.0 367.0 45.0 TPS72518DCQR SOT-223 DCQ 6 2500 346.0 346.0 29.0 TPS72518KTTR DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 TPS72525DCQR SOT-223 DCQ 6 2500 346.0 346.0 29.0 TPS72525KTTR DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 PackMaterials-Page2

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