Product Order Technical Tools & Support & Reference Folder Now Documents Software Community Design TPS720 SBVS100E–JUNE2008–REVISEDSEPTEMBER2015 TPS720 350 mA, Ultra-Low V , RF Low-Dropout Linear Regulator With Bias Pin IN 1 Features The TPS720 supports a novel feature in which the output of the LDO regulates under light loads when • 350-mAHigh-PerformanceLDO 1 the IN pin is left floating. The light-load drive current • LowQuiescentCurrent:38 μA is sourced from V under this condition. This BIAS • ExcellentLoadTransientResponse: feature is particularly useful in power-saving ±15mVforI =0mAto350mAin1 μs applications where the DC-DC converter connected LOAD to the IN pin is disabled but the LDO is still required • ExcellentLineTransientResponse: toregulatethevoltagetoalightload. ΔV =±2mVforΔV =±600mVin1μs OUT BIAS ΔV =±200 μVforΔV = ±400mVin1μs The TPS720 is stable with ceramic capacitors and OUT IN uses an advanced BICMOS fabrication process that • LowNoise:48 μV (10Hzto100kHz) RMS yields a dropout of 110 mV at a 350-mA output load. • 80dBVIN PSRR(10Hzto10kHz) The TPS720 has the unique feature of providing a • 70dBV PSRR(10Hzto10kHz) monotonic V rise (overshoot limited to 3%) with BIAS OUT V inrush current limited to 100 mA + I with an • FastStart-UpTime:140 μs IN LOAD outputcapacitorof2.2 μF. • Built-InSoft-StartWithMonotonicV Riseand OUT Start-UpCurrentLimitedto100mA+I The TPS720 uses a precision voltage reference and LOAD feedback loop to achieve overall accuracy of 2% over • OvercurrentandThermalProtection load, line, process, and temperature extremes. An • LowDropout:110mVatILOAD=350mA ultra-small DSBGA package makes the TPS720 ideal • Stablewith2.2-μFOutputCapacitor for handheld applications. The TPS720 is also available in a SON-8 package. This family of devices • Availablein1.33mm× 0.96mmDSBGA-5and2 is fully specified over the temperature range of mm× 2mmSON-6Packages T =–40°Cto125°C. J 2 Applications DeviceInformation(1) • DigitalCameras PARTNUMBER PACKAGE BODYSIZE(NOM) • CellularCameraPhones DSBGA(5) 1.36mm×0.96mm TPS720 • WirelessLAN SON(6) 2.00mm×2.00mm • HandheldProducts (1) For all available packages, see the orderable addendum at theendofthedatasheet. 3 Description SimplifiedSchematic The TPS720 family of dual rail, low-dropout linear regulators (LDOs) offers outstanding ac performance VBATT C BIAS (PSRR, load and line transient response), while consumingaverylowquiescentcurrentof38μA. BIAS The V rail that powers the control circuit of the Standalone 1.8 V IN OUT 1.3 V V BIAS dc/dc CORE LDO draws very low current (on the order of the Converter TPS720xx quiescent current of the LDO) and can be connected or PMU CIN EN GND COUT to any power supply that is equal to or greater than 1.4 V above the output voltage. The main power path V EN is through V , which can be a lower voltage than IN V ; it can be as low as V + V , increasing the BIAS OUT DO efficiency of the solution in many power-sensitive applications. For example, V can be an output of a IN high-efficiency,DC-DCstep-downregulator. 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

TPS720 SBVS100E–JUNE2008–REVISEDSEPTEMBER2015 www.ti.com Table of Contents 1 Features.................................................................. 1 8.1 ApplicationInformation............................................14 2 Applications........................................................... 1 8.2 TypicalApplication..................................................15 3 Description............................................................. 1 9 PowerSupplyRecommendations...................... 17 4 RevisionHistory..................................................... 2 10 Layout................................................................... 17 5 PinConfigurationandFunctions......................... 3 10.1 LayoutGuidelines.................................................17 10.2 LayoutExample....................................................17 6 Specifications......................................................... 3 10.3 ThermalConsiderations........................................17 6.1 AbsoluteMaximumRatings......................................3 10.4 PowerDissipation.................................................18 6.2 ESDRatings..............................................................4 11 DeviceandDocumentationSupport................. 19 6.3 RecommendedOperatingConditions.......................4 6.4 ThermalInformation..................................................4 11.1 DeviceSupport ....................................................19 6.5 ElectricalCharacteristics...........................................5 11.2 DocumentationSupport........................................19 6.6 TypicalCharacteristics..............................................7 11.3 CommunityResources..........................................19 11.4 Trademarks...........................................................19 7 DetailedDescription............................................ 12 11.5 ElectrostaticDischargeCaution............................19 7.1 Overview.................................................................12 11.6 Glossary................................................................19 7.2 FunctionalBlockDiagram.......................................12 12 Mechanical,Packaging,andOrderable 7.3 FeatureDescription.................................................12 Information........................................................... 20 7.4 DeviceFunctionalModes........................................13 12.1 PackageMounting................................................20 8 ApplicationandImplementation........................ 14 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionD(August2009)toRevisionE Page • AddedESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection ................................................................................................. 1 ChangesfromRevisionC(September,2008)toRevisionD Page • AddedelectricalspecificationsforDRVpackage................................................................................................................... 5 • NotedelectricalspecificationsforYZUpackage.................................................................................................................... 5 2 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS720

TPS720 www.ti.com SBVS100E–JUNE2008–REVISEDSEPTEMBER2015 5 Pin Configuration and Functions DRVPackage 6-PinSONWithExposedThermalPad YZUPackage TopView 5-PinDSBGA TopView C3 C1 OUT 1 6 IN Thermal EN BIAS NC 2 (1) 5 GND B2 Pad EN 3 4 BIAS GND A3 A1 OUT IN (1) TIrecommendsconnectingtheSON(DRV) packagethermalpadtoground. PinFunctions PIN I/O DESCRIPTION NAME DRV YZU Outputpin.A2.2-μFceramiccapacitorisconnectedfromthispintoground,forstabilityandtoprovide OUT 1 A3 O loadtransients.SeeInputandOutputCapacitorRequirements. NC 2 — — Noconnection. Enablepin.AlogichighsignalonthispinturnsthedeviceonandregulatesthevoltagefromINto EN 3 C3 I OUT.Alogiclowonthispinturnsoffthedevice. Biassupplypin.TIrecommendsbypassingthisinputwithaceramiccapacitortogroundforbetter BIAS 4 C1 I transientperformance.SeeInputandOutputCapacitorRequirements. GND 5 B2 — Groundpin. Inputpin.Thispincanbeamaximumof4.5V;V mustnotexceedV .Bypassthisinputwitha IN 6 A1 I IN BIAS ceramiccapacitortoground.SeeInputandOutputCapacitorRequirements. 6 Specifications 6.1 Absolute Maximum Ratings AtT =–40°Cto125°C(unlessotherwisenoted).AllvoltagesarewithrespecttoGND.(1) J MIN MAX UNIT V (2) Inputvoltage(steady-state) –0.3 V or5(3) V IN BIAS V (4) Peaktransientinput 5.5 V IN_PEAK V Biasvoltage –0.3 6 V BIAS V Enablevoltage –0.3 6 V EN V Outputvoltage –0.3 5 V OUT I Peakoutputcurrent Internallylimited OUT Outputshortcircuitduration Indefinite P Totalcontinuouspowerdissipation SeeThermalInformation DISS T Operatingjunctiontemperature –55 125 °C J T Storagetemperature –55 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) ToensureproperoperationofthedeviceitisnecessarythatV ≤V underallconditions. IN BIAS (3) Whicheverisless. (4) Fordurationsnolongerthan1mseach,foratotalofnomorethan1000occurrencesoverthelifetimeofthedevice. Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:TPS720

TPS720 SBVS100E–JUNE2008–REVISEDSEPTEMBER2015 www.ti.com 6.2 ESD Ratings VALUE UNIT Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±2000 Charged-devicemodel(CDM),perJEDECspecificationJESD22- V(ESD) Electrostaticdischarge C101(2) ±500 V Machinemodel(MM) ±100 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions overoperatingjunction-airtemperaturerange(unlessotherwisenoted) MIN NOM MAX UNIT V Inputvoltage(steady-state) 1.1 V or4.5(1) V IN BIAS V Biasvoltage 2.5ororVOUT+1.4(2) 5.5 V BIAS V Outputvoltage 0.9 3.6 V OUT I Peakoutputcurrent 0 350 mA OUT C Inputcapacitance 1 µF IN C Biascapacitance 0.1 µF BIAS C (3) Outputcapacitance 2.2 µF OUT (1) Whicheverisless (2) Whicheverisgreater (3) MaximumESRshouldbelessthan250mΩ. 6.4 Thermal Information TPS720 THERMALMETRIC(1) DRV(SON) YZU(WSCP) UNIT 6PINS 5PINS R Junction-to-ambientthermalresistance 66.5 144.9 °C/W θJA R Junction-to-case(top)thermalresistance 86.2 1.1 °C/W θJC(top) R Junction-to-boardthermalresistance 36.1 27.5 °C/W θJB ψ Junction-to-topcharacterizationparameter 1.7 4.1 °C/W JT ψ Junction-to-boardcharacterizationparameter 36.6 27.4 °C/W JB R Junction-to-case(bottom)thermalresistance 7.4 N/A °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report,SPRA953. 4 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS720

TPS720 www.ti.com SBVS100E–JUNE2008–REVISEDSEPTEMBER2015 6.5 Electrical Characteristics Overoperatingtemperaturerange(T =–40°Cto125°C),V =(V +1.4V)or2.5V(whicheverisgreater);V ≥V + J BIAS OUT IN OUT 0.5V,I =1mA,V =1.1V,C =2.2μF,unlessotherwisenoted.TypicalvaluesareatT =25°C. OUT EN OUT J PARAMETER TESTCONDITIONS MIN TYP MAX UNIT VIN Inputvoltage 1.1(1) VBI4A.S5(o2r) V V Biasvoltage 2.5 5.5 V BIAS Outputvoltage(4) 0.9 3.6 V Nominal T =25°C –3 3 mV J V +1.4V≤V ≤5.5V, OverV ,V ,I , OUT BIAS BIAS IN OUT V +0.5V≤V ≤4.5V, –2% 2% T =–40°Cto125°C OUT IN J 0mA≤I ≤350mA OUT DRVpackageonly: V +1.4V≤V ≤5.5V, OverV ,V ,I , OUT BIAS BIAS IN OUT V +0.5V≤V ≤4.5V, –25 25 mV VOUT(3) Output TJ=–40°Cto125°C 0OmUAT ≤IOUT≤35I0NmA, accuracy V <1.2V OUT YZUpackageonly: V +1.4V≤V ≤5.5V, OverV ,V ,I , OUT BIAS BIAS IN OUT V +0.5V≤V ≤4.5V, –1% 1% T =–10°Cto85°C OUT IN J 0mA≤I ≤350mA OUT 1.6V≤V ≤3.3V OUT V +1.4V≤V ≤5.5V, V floating OUT BIAS ±1% IN 0μA≤I ≤500μA OUT ΔV /ΔV V lineregulation V =(V +0.5V)to4.5V,I =1mA 16 μV/V OUT IN IN IN OUT OUT V =(V +1.4V)or2.5V(whicheveris ΔV /ΔV V lineregulation BIAS OUT 16 μV/V OUT BIAS BIAS greater)to5.5V,I =1mA OUT V linetransient ΔV =400mV,t =t =1μs ±200 μV IN IN RISE FALL V linetransient ΔV =600mV,t =t =1μs ±0.8 mV BIAS BIAS RISE FALL ΔV /ΔI Loadregulation 0mA≤I ≤350mA(noloadtofullload) –15 μV/mA OUT OUT OUT Loadtransient 0mA≤I ≤350mA,t =t =1μs ±15 mV OUT RISE FALL V =V –0.1V, IN OUT(NOM) V V dropoutvoltage(5) (V –V )=1.4V, 110 200 mV DO_IN IN BIAS OUT(NOM) I =350mA OUT V V dropoutvoltage(6) V =V +0.3V,I =350mA 1.09 1.4 V DO_BIAS BIAS IN OUT(NOM) OUT I Outputcurrentlimit V =0.9×V 420 525 800 mA CL OUT OUT(NOM) I =100μA 38 OUT I Groundpincurrent μA GND I =0mAto350mA 54 80 OUT I Shutdowncurrent(I ) V ≤0.4V,T =–40°Cto85°C 0.5 2 μA SHDN GND EN J f=10Hz 85 f=100Hz 85 VIN–VOUT≥0.5V, f=1kHz 85 PSRR V power-supplyrejectionratio V =V +1.4V, dB IN BIAS OUT I =350mA f=10kHz 80 OUT f=100kHz 70 f=1MHz 50 (1) PerformancespecificationsareensureduptoaminimumV =V +0.5V. IN OUT (2) Whicheverisless. (3) MinimumV =(V +1.4V)or2.5V(whicheverisgreater)andV =V +0.5V. BIAS OUT IN OUT (4) V nominalvalueisfactoryprogrammablethroughtheonchipEEPROM. O (5) MeasuredfordeviceswithV ≥1.2V. OUT(NOM) (6) V –V withV =V –0.1V.MeasuredfordeviceswithV ≥1.8V. BIAS OUT OUT OUT(NOM) OUT(NOM) Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:TPS720

TPS720 SBVS100E–JUNE2008–REVISEDSEPTEMBER2015 www.ti.com Electrical Characteristics (continued) Overoperatingtemperaturerange(T =–40°Cto125°C),V =(V +1.4V)or2.5V(whicheverisgreater);V ≥V + J BIAS OUT IN OUT 0.5V,I =1mA,V =1.1V,C =2.2μF,unlessotherwisenoted.TypicalvaluesareatT =25°C. OUT EN OUT J PARAMETER TESTCONDITIONS MIN TYP MAX UNIT f=10Hz 80 f=100Hz 80 VIN–VOUT≥0.5V, f=1kHz 75 PSRR V power-supplyrejectionratio V =V +1.4V, dB BIAS BIAS OUT I =350mA f=10kHz 65 OUT f=100kHz 55 f=1MHz 35 BW=10Hzto100kHz,V ≥2.5V, V Outputnoisevoltage BIAS 48 μV N V =V +0.5V RMS IN OUT V =(V +1.4V)or2.5V(whicheveris 100+ I InrushcurrentonV BIAS OUT mA VIN_INRUSH IN greater),V =V +0.5V I IN OUT LOAD V =95%V ,I =350mA, t Start-uptime OUT OUT(NOM) OUT 140 μs STR C =2.2μF OUT V Enablepinhigh(enabled) 1.1 V EN(HI) V Enablepinlow(disabled) 0 0.4 V EN(LO) I Enablepincurrent V =5.5V,V =4.5V,V =5.5V 1 μA EN EN IN BIAS Undervoltagelockout V rising 2.41 2.45 2.49 V BIAS UVLO Hysteresis V falling 150 mV BIAS Shutdown,temperatureincreasing 160 T Thermalshutdowntemperature °C SD Reset,temperaturedecreasing 140 T Operatingjunctiontemperature –40 125 °C J 6 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS720

TPS720 www.ti.com SBVS100E–JUNE2008–REVISEDSEPTEMBER2015 6.6 Typical Characteristics Overoperatingtemperaturerange(T =–40°Cto125°C),V =(V +1.4V)or2.5V(whicheverisgreater);V =V + J BIAS OUT IN OUT 0.5V,I =1mA,V =1.1V,C =2.2μF,unlessotherwisenoted.TypicalvaluesareatT =25°C. OUT EN OUT J 1.40 1.40 1.38 1.38 1.36 1.36 +25°C -10°C +85°C -40°C +25°C -10°C +85°C -40°C 1.34 1.34 V) 1.32 V) 1.32 ( ( UT1.30 UT1.30 O O V 1.28 V 1.28 +105°C +105°C 1.26 1.26 +125°C +125°C 1.24 1.24 1.22 1.22 1.20 1.20 2.5 3.0 3.5 4.0 4.5 2.5 3.0 3.5 4.0 4.5 V (V) V (V) IN IN I =0mA I =350mA OUT OUT Figure1.V LineRegulation(TPS72013YZU) Figure2.V LineRegulation(TPS72013YZU) IN IN 1.40 1.40 1.38 1.38 1.36 1.36 +25°C -10°C +85°C -40°C +25°C -10°C +85°C -40°C 1.34 1.34 V) 1.32 V) 1.32 ( ( UT1.30 UT1.30 O O V 1.28 V 1.28 +105°C +105°C 1.26 1.26 +125°C +125°C 1.24 1.24 1.22 1.22 1.20 1.20 2.5 3.0 3.5 4.0 4.5 5.0 5.5 2.5 3.0 3.5 4.0 4.5 5.0 5.5 V (V) V (V) BIAS BIAS I =0mA I =350mA OUT OUT Figure3.V LineRegulation(TPS72013YZU) Figure4.V LineRegulation(TPS72013YZU) BIAS BIAS 1.40 1.40 1.38 1.38 1.36 1.36 +25°C -10°C +85°C -40°C +25°C -10°C +85°C -40°C 1.34 1.34 V) 1.32 V) 1.32 ( ( UT1.30 UT1.30 O O V 1.28 V 1.28 +105°C +105°C 1.26 1.26 +125°C +125°C 1.24 1.24 1.22 1.22 1.20 1.20 0 1 2 3 4 5 6 7 8 9 10 0 50 100 150 200 250 300 350 I (mA) I (mA) OUT OUT Figure5.LoadRegulationUnderLightLoads Figure6.LoadRegulation(TPS72013YZU) (TPS72013YZU) Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:TPS720

TPS720 SBVS100E–JUNE2008–REVISEDSEPTEMBER2015 www.ti.com Typical Characteristics (continued) Overoperatingtemperaturerange(T =–40°Cto125°C),V =(V +1.4V)or2.5V(whicheverisgreater);V =V + J BIAS OUT IN OUT 0.5V,I =1mA,V =1.1V,C =2.2μF,unlessotherwisenoted.TypicalvaluesareatT =25°C. OUT EN OUT J 1.40 1.40 1.38 TJ= +25°C 1.38 VBIAS= 2.7V 1.36 1.36 1.34 1.34 V = 3.0V V = 4.0V V = 5.0V T = +125°C mA) 1.32 BIAS BIAS BIAS (V) 1.32 J ( 1.30 T1.30 VOUT1.28 VOU1.28 TJ= -40°C T = +25°C 1.26 1.26 J T = 0°C 1.24 1.24 J 1.22 VBIAS= 2.7V VBIAS= 3.5V VBIAS= 4.5V 1.22 TJ= +85°C 1.20 VBIAS= 5.5V 1.20 TJ= +105°C 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 I (mA) I (mA) OUT OUT Figure7.LoadRegulationWithVINFloating(TPS72013YZU) Figure8.LoadRegulationWithVINFloating(TPS72013YZU) 160 1.15 1.14 140 +125°C 120 +105°C (V)UT 11..1132 O V(mV)DO_IN 1086000 -10°C -40°C = V- VASBIAS 1111....11001098 40 +25°C O_BI 1.07 D V 1.06 20 +85°C 1.05 VOUT= VOUT(NOM)-0.1 I = 350mA OUT 0 1.04 0 50 100 150 200 250 300 350 -40 -25 -10 5 20 35 50 65 80 95 110 125 I (mA) T (°C) OUT J Figure9.VINDropoutVoltagevsOutputCurrent Figure10.VBIASDropoutVoltagevsTemperature (TPS72013YZU) (TPS72033YZU) 1.345 50 I = 1mA 45 OUT 1.325 40 IOUT= 0mA IOUT= 1mA 35 V) 1.305 A) 30 ( m OUT (ND 25 +125°C +105°C +85°C +25°C -10°C -40°C V 1.285 IG 20 I = 350mA OUT 15 1.265 10 5 1.245 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 2.5 3.0 3.5 4.0 4.5 5.0 5.5 T (°C) V (V) J BIAS Figure11.OutputVoltagevsTemperature(TPS72013YZU) Figure12.GroundPinCurrentvsVBIASInputVoltage (TPS72013YZU) 8 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS720

TPS720 www.ti.com SBVS100E–JUNE2008–REVISEDSEPTEMBER2015 Typical Characteristics (continued) Overoperatingtemperaturerange(T =–40°Cto125°C),V =(V +1.4V)or2.5V(whicheverisgreater);V =V + J BIAS OUT IN OUT 0.5V,I =1mA,V =1.1V,C =2.2μF,unlessotherwisenoted.TypicalvaluesareatT =25°C. OUT EN OUT J 70 60 I = 350mA OUT 60 +125°C+105°C +85°C +25°C 50 50 40 A) 40 A) m m ( ( 30 D D GN 30 GN I I -10°C -40°C 20 20 10 10 0 0 0 50 100 150 200 250 300 350 -40 -25 -10 5 20 35 50 65 80 95 110 125 I (mA) T (°C) OUT J Figure13.GroundPinCurrentvsOutputCurrent Figure14.GroundPinCurrentvsTemperature (TPS72013YZU) (TPS72013YZU) 3.0 675 2.5 650 +25°C -10°C -40°C 2.0 A)m +25°C -10°C +85°C -40°C A) 625 I(SHDN 1.5 +125°C I(mCL 600 1.0 +85°C +105°C +125°C +105°C 575 0.5 0 550 2.5 3.0 3.5 4.0 4.5 5.0 5.5 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VBIAS(V) VBIAS(V) Figure15.ShutdownCurrentvsVBIASInputVoltage Figure16.CurrentLimitvsVBIASInputVoltage (TPS72013YZU) (TPS72013YZU) 675 120 (V -V ) = 0.5V +25°C -10°C -40°C 100 (VIBNIAS-OVUOTUT) = 1.4V IOUT= 0mA 650 80 A) 625 dB) I = 50mA I(mCL 600 PSRR ( 60 OUT IOUT= 350mA 40 +85°C +105°C +125°C 575 20 550 0 2.5 3.0 3.5 4.0 4.5 10 100 1k 10k 100k 1M 10M V (V) Frequency (Hz) IN Figure17.CurrentLimitvsVINInputVoltage Figure18.VINPower-SupplyRippleRejectionvsFrequency (TPS72013YZU) (TPS72015YZU) Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:TPS720

TPS720 SBVS100E–JUNE2008–REVISEDSEPTEMBER2015 www.ti.com Typical Characteristics (continued) Overoperatingtemperaturerange(T =–40°Cto125°C),V =(V +1.4V)or2.5V(whicheverisgreater);V =V + J BIAS OUT IN OUT 0.5V,I =1mA,V =1.1V,C =2.2μF,unlessotherwisenoted.TypicalvaluesareatT =25°C. OUT EN OUT J 100 100 I = 350mA (V -V ) = 350mV OUT IN OUT 80 80 I = 1mA OUT B) 60 B) 60 R (d (VIN-VOUT) = 300mV R (d R R S 40 S 40 P P (VIN-VOUT) = 250mV IOUT= 350mA 20 20 (V -V ) = 0.5V IN OUT (V -V ) = 1.4V BIAS OUT 0 0 10 100 1k 10k 100k 1M 10M 10 100 1k 10k 100k 1M 10M Frequency (Hz) Frequency (Hz) Figure19.VINPower-SupplyRippleRejection Figure20.VBIASPower-SupplyRippleRejectionvs vsFrequency(TPS72015YZU) Frequency(TPS72015YZU) 10 )z V = 1.3V H OUT Ö V/ I = 110mA m IN-PEAK y ( nsit 1 e D I se 50mA/div IN oi N al ectr 0.1 EN p put S 520000mmVV//ddiivv ut V O OUT 0.01 100 1k 10k 100k 20ms/div Frequency (Hz) V =1.8V V =1.3V V =2.7V IN OUT BIAS I =0mA OUT Figure21.OutputSpectralNoiseDensityvsFrequency Figure22.V InrushCurrent IN (TPS72015YZU) V = 1.3V OUT I = 400mA IN-PEAK V 1mV/div OUT I IN 200mA/div 2.0V EN 500mV/div V 1.6V 200mV/div 200mV/div IN V OUT 20ms/div 100ms/div VIN=1.8V VOUT=1.3V VBIAS=2.7V VIN=1.6to2V VOUT=1.3V VBIAS=2.7V IOUT=350mA VINSlewRate=1V/μs IOUT=350mA Figure23.VINInrushCurrent Figure24.VINLineTransientResponse 10 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS720

TPS720 www.ti.com SBVS100E–JUNE2008–REVISEDSEPTEMBER2015 Typical Characteristics (continued) Overoperatingtemperaturerange(T =–40°Cto125°C),V =(V +1.4V)or2.5V(whicheverisgreater);V =V + J BIAS OUT IN OUT 0.5V,I =1mA,V =1.1V,C =2.2μF,unlessotherwisenoted.TypicalvaluesareatT =25°C. OUT EN OUT J 1mV/div VOUT 10mV/div VOUT 3.3V 300mA 200mV/div VBIAS2.7V 100mA/div IOUT 0mA 100ms/div 100ms/div VIN=1.8V VOUT=1.3V VBIAS=2.7Vto3.3V VIN=1.8V VOUT=1.3V VBIAS=2.7V VBIASSlewRate=600m/μs IOUT=350mA tRISE=1μs Figure25.VBIASLineTransientResponse Figure26.LoadTransientResponse Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:TPS720

TPS720 SBVS100E–JUNE2008–REVISEDSEPTEMBER2015 www.ti.com 7 Detailed Description 7.1 Overview The TPS720 belongs to a family of new generation LDO regulators that use innovative circuitry to achieve ultra- wide bandwidth and high loop gain, resulting in extremely high PSRR (up to 1 MHz) at very low headroom (V – IN V ). The implementation of the BIAS pin on the TPS720 vastly improves efficiency of low V applications by OUT OUT allowing the use of a preregulated, low-voltage input supply. The TPS720 supports a novel feature in which the output of the LDO regulates under light loads (<500 μA) when the IN pin is left floating. The light-load drive current is sourced from V under this condition. This feature is particularly useful in power-saving applications BIAS where the DC-DC converter connected to the IN pin is disabled but the LDO is still required to regulate the voltage to a light load. These features, combined with low noise, low ground pin current, and ultra-small packaging, make this device ideal for portable applications. This family of regulators offers sub-bandgap output voltages,currentlimitandthermalprotection,andisfullyspecifiedfrom –40°Cto125°C. 7.2 Functional Block Diagram IN OUT Current Limit Thermal BIAS Shutdown UVLO EN Bandgap 7.3 Feature Description 7.3.1 InternalCurrentLimit The TPS720 internal current limits help protect the regulator during fault conditions. During current limit, the output sources a fixed amount of current that is largely independent of output voltage. In such a case, the output voltage is not regulated, and is V = I × R . The NMOS pass transistor dissipates (V – V ) × I OUT LIMIT LOAD IN OUT LIMIT until thermal shut down is triggered and the device is turned off. As the device cools down, it is turned on by the internal thermal shutdown circuit. If the fault condition continues, the device cycles between current limit and thermalshutdown.SeetheThermalConsiderationssectionformoredetails. TheNMOSpasselementintheTPS720hasabuilt-inbodydiodethatconductscurrentwhenthevoltageatOUT exceeds the voltage at IN. This current is not limited, so if extended reverse voltage operation is anticipated, externallimitingto5%ofratedoutputcurrentisrecommended. 7.3.2 InrushCurrentLimit The TPS720 family of LDO regulators implement a novel inrush current limit circuit architecture: the current drawn through the IN pin is limited to a finite value. This I charges the output to its final voltage. All the INRUSHLIMIT current drawn through V goes to charge the output capacitance when the load is disconnected. The following IN equationshowstheinrushcurrentlimitperformedbythecircuit: I (A)=C (μF)×0.0454545(V/μs)+I (A) (1) INRUSHLIMIT OUT LOAD 12 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS720

TPS720 www.ti.com SBVS100E–JUNE2008–REVISEDSEPTEMBER2015 Feature Description (continued) Assuming a C of 2.2 μF with the load disconnected (that is, I = 0) the I is calculated to be 100 OUT LOAD INRUSHLIMIT mA. The inrush current charges the LDO output capacitor. If the output of the LDO regulates to 1.3 V, then the LDOchargestheoutputcapacitortothefinaloutputvalueinapproximately28.6 μs. Another consideration is when a load is connected to the output of an LDO. The connected load tries to steer a portion of the current away from V . The TPS720 inrush current limit circuit employs a new technique that OUT supplies not only the I , but also the additional current needed by the load. If I = 350 mA, then the INRUSHLIMIT LOAD I calculatestobeapproximately450mA(fromEquation1). INRUSHLIMIT 7.3.3 Shutdown The enable pin (EN) is active high and is compatible with standard and low voltage, TTL-CMOS levels. When shutdowncapabilityisnotrequired,ENcanbeconnectedtotheINpin. 7.3.4 UndervoltageLockout(UVLO) The TPS720 uses an undervoltage lock-out circuit on the BIAS pin to keep the output shut off until the internal circuitry is operating properly. The UVLO circuit has a deglitch feature so that it typically ignores undershoot transientsontheinputiftheyarelessthan50-μsduration. 7.4 Device Functional Modes DrivingtheENpinover1.1Vturnsontheregulator.DrivingtheENpinbelow0.4Vcausestheregulatortoenter shutdownmode.Inshutdown,thecurrentconsumptionofthedeviceisreducedto500nA,typically. Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:TPS720

TPS720 SBVS100E–JUNE2008–REVISEDSEPTEMBER2015 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 8.1 Application Information 8.1.1 InputandOutputCapacitorRequirements Although an input capacitor is not required for stability on the IN pin, it is good analog design practice to connect a 0.1-μF to 1-μF low equivalent series resistance (ESR) capacitor across the IN pin input supply near the regulator. This capacitor counteracts reactive input sources and improves transient response, noise rejection, and ripple rejection. A higher-value capacitor may be necessary if large, fast rise-time load transients are anticipated, or if the device is located close to the power source. If source impedance is not sufficiently low, a 0.1-μFinputcapacitormaybenecessarytoensurestability. The BIAS pin does not require an input capacitor because it does not source high currents. However, if source impedanceisnotsufficientlylow,thenTIrecommendsasmall0.1-μFbypasscapacitor. The TPS720 is designed to be stable with standard ceramic capacitors with values of 2.2 μF or larger at the output. X5R- and X7R-type capacitors are best because they have minimal variation in value and ESR over temperature.MaximumESRshouldbelessthan250mΩ. 8.1.2 OutputRegulationWithINPinFloating The TPS720 supports a novel feature in which the output of the LDO regulates under light loads when the IN pin is left floating. Under normal conditions, when the IN pin is connected to a power source, the BIAS pin draws only tens of milliamperes. However, when the IN pin is floating, an innovative circuit is used that allows a maximum current of 500 μA to be drawn by the load through the BIAS pin, while maintaining the output in regulation. This feature is particularly useful in power-saving applications where a DC-DC converter connected to theINpinisdisabled,buttheLDOisrequiredtoregulatetheoutputvoltagetoalightload. Figure 27 shows an application example where a microcontroller is not turned off (to maintain the state of the internal memory), but where the regulated supply (shown as the TPS62xxx) is turned off to reduce power. In this case,theTPS720BIASpinprovidessufficientloadcurrenttomaintainaregulatedvoltagetothemicrocontroller. 2.5V to 5.5V 10mH BIAS VIN SW IN OUT TPS62xxx FB 10mF TPS720xx 2.2mF EN EN GND GND Microcontroller Control to turn on/off the dc/dc Output of dc/dc is floating when the TPS62xxx EN pin is low Figure27. ExampleofFloatingINPinRegulation 14 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS720

TPS720 www.ti.com SBVS100E–JUNE2008–REVISEDSEPTEMBER2015 Application Information (continued) 8.1.3 DropoutVoltage The TPS720 uses a NMOS pass transistor to achieve low dropout. When (V – V ) is less than the dropout IN OUT voltage (V ), the NMOS pass device is in the linear region of operation and the input-to-output resistance is the DO R of the NMOS pass element. V approximately scales with output current because the NMOS device DS(ON) DO behavesasaresistorindropout. As with any linear regulator, PSRR and transient response are degraded as (V – V ) approaches dropout. IN OUT ThiseffectisshowninFigure19. 8.1.4 TransientResponse As with any regulator, increasing the size of the output capacitor reduces overshoot and undershoot magnitude butincreasesdurationofthetransientresponse. 8.1.5 MinimumLoad The TPS720 is stable with no output load. Traditional LDOs suffer from low loop gain at very light output loads. The TPS720 employs an innovative, low-current mode circuit under very light or no-load conditions, resulting in improvedoutputvoltageregulationperformancereducedtozerooutputcurrent. 8.2 Typical Application V BATT C BIAS BIAS Standalone 1.8 V 1.3 V IN OUT V dc/dc CORE Converter TPS720xx or PMU CIN EN GND COUT V EN Figure28. TypicalApplicationSchematic 8.2.1 DesignRequirements Table1showstheparametersforthisdesignexample. Table1.DesignParameters DESIGNPARAMETER EXAMPLEVALUE V 1.8V IN V 2.7V BIAS V 1.3V OUT I 10-mAtypical,350-mApeak OUT Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:TPS720

TPS720 SBVS100E–JUNE2008–REVISEDSEPTEMBER2015 www.ti.com 8.2.2 DetailedDesignProcedures A small-size solution is desired, so select the minimum recommended component size. Set C = 1 µF, IN C =100nF,C =2.2µF. BIAS OUT 8.2.3 ApplicationCurves 1.40 1.40 1.38 1.38 1.36 1.36 +25°C -10°C +85°C -40°C +25°C -10°C +85°C -40°C 1.34 1.34 V) 1.32 V) 1.32 ( ( UT1.30 UT1.30 O O V 1.28 V 1.28 +105°C +105°C 1.26 1.26 +125°C +125°C 1.24 1.24 1.22 1.22 1.20 1.20 2.5 3.0 3.5 4.0 4.5 0 50 100 150 200 250 300 350 V (V) I (mA) IN OUT I =350mA OUT Figure29.V LineRegulation(TPS72013YZU) Figure30.LoadRegulation(TPS72013YZU) IN V = 1.3V OUT I = 400mA IN-PEAK V 1mV/div OUT I IN 200mA/div 2.0V EN 500mV/div V 1.6V 200mV/div 200mV/div IN V OUT 20ms/div 100ms/div VIN=1.8V VOUT=1.3V VBIAS=2.7V VIN=1.6to2V VOUT=1.3V VBIAS=2.7V IOUT=350mA VINSlewRate=1V/μs IOUT=350mA Figure31.VINInrushCurrent Figure32.VINLineTransientResponse 16 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS720

TPS720 www.ti.com SBVS100E–JUNE2008–REVISEDSEPTEMBER2015 9 Power Supply Recommendations The input supply and bias supply for the LDO must be within its recommended operating conditions and provide adequate headroom for the device to have a regulated output. The minimum capacitor requirements must be met, and if the input supply is noisy, then additional input capacitors with low ESR can help improve transient performance. 10 Layout 10.1 Layout Guidelines To improve AC performance such as PSRR, output noise, and transient response, TI recommends designing the board with separate ground planes for V and V , with the ground plane connected only at the GND pin of the IN OUT device.Inaddition,thegroundconnectionfortheoutputcapacitorshouldbeconnecteddirectlytotheGNDpinof the device. High equivalent series resistance (ESR) capacitors may degrade PSRR. The BIAS pin draws very littlecurrentandcanberoutedasasignal(makesuretoshielditfromhigh-frequencycoupling). 10.2 Layout Example Ground Plane To Enable To Bias Supply 4 BIAS EN 3 Signal CBIAS d a P 5 GND al NC 2 m er Th COUT CIN 6 IN OUT 1 To Input Supply To Load Ground Plane Figure33. RecommendedLayout 10.3 Thermal Considerations Thermal protection disables the output when the junction temperature rises to approximately 160°C, allowing the device to cool. When the junction temperature cools to approximately 140°C, the output circuitry is again enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage as a resultofoverheating. Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:TPS720

TPS720 SBVS100E–JUNE2008–REVISEDSEPTEMBER2015 www.ti.com Thermal Considerations (continued) Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heatsink. For reliable operation, junction temperature should be limited to 125°C maximum. To estimate the margin of safety in a complete design (including heatsink), increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. For good reliability, thermal protection should trigger at least 35°C above the maximum expected ambient condition of the particular application. This configuration produces a worst-case junction temperature of 125°C at the highest expected ambient temperature andworst-caseload. The internal protection circuitry of the TPS720 has been designed to protect against overload conditions. It was not intended to replace proper heatsinking. Continuously running the TPS720 into thermal shutdown degrades devicereliability. 10.4 Power Dissipation The ability to remove heat from the die is different for each package type, presenting different considerations in the printed-circuit-board (PCB) layout. The PCB area around the device that is free of other components moves theheatfromthedevicetotheambientair.PerformancedataforJEDEClow-andhigh-Kboardsaregiveninthe Thermal Information table. Using heavier copper increases the effectiveness in removing heat from the device. Theadditionofplatedthrough-holestoheat-dissipatinglayersalsoimprovestheheatsinkeffectiveness. Powerdissipationdependsoninputvoltageandloadconditions.Powerdissipation(P )isequaltotheproductof D theoutputcurrenttimesthevoltagedropacrosstheoutputpasselement(V toV ),asshowninEquation2: IN OUT P =(V –V )×I (2) D IN OUT OUT 18 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS720

TPS720 www.ti.com SBVS100E–JUNE2008–REVISEDSEPTEMBER2015 11 Device and Documentation Support 11.1 Device Support 11.1.1 DevelopmentSupport 11.1.1.1 EvaluationModule An evaluation module (EVM) is available to assist in the initial circuit performance evaluation using the TPS720. The TPS720xxDRVEVM evaluation module (and related user guide) can be requested at the Texas Instruments websitethroughtheproductfoldersorpurchaseddirectlyfromtheTIeStore. 11.1.2 DeviceNomenclature Table2.DeviceNomenclature(1)(2) PRODUCT V OUT xx(x)isthenominaloutputvoltage.Foroutputvoltageswitharesolutionof100mV,twodigitsareused intheorderingnumber;otherwise,threedigitsareused(forexample,28=2.8V;125=1.25V). TPS720xx(x) yyyisthepackagedesignator. zisthepackagequantity.Risforreel(3000pieces),Tisfortape(250pieces). (1) ForthemostcurrentpackageandorderinginformationseethePackageOptionAddendumattheendofthisdocument,orvisitthe deviceproductfolderonwww.ti.com. (2) Outputvoltagesfrom0.9Vto3.6Vin50-mVincrementsareavailable.Contactthefactoryfordetailsandavailability. 11.2 Documentation Support 11.2.1 RelatedDocumentation Forrelateddocumentationseethefollowing: • TPS720xxDRVEVMEvaluationModule,SBVU024 • UsingNewThermalMetrics,SBVA025 11.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 11.4 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 11.5 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 11.6 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:TPS720

TPS720 SBVS100E–JUNE2008–REVISEDSEPTEMBER2015 www.ti.com 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 12.1 Package Mounting Solder pad footprint recommendations for the TPS720 are available from the Texas Instruments website at www.ti.com. 0,994 0,934 1,362 1,302 NOTES: 1. Alllinear dimensions are in millimeters. 2. Thisdrawing is subject to change without notice. Figure34. YZUWaferChip-ScalePackageDimensions(inmm) 20 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:TPS720

PACKAGE OPTION ADDENDUM www.ti.com 4-Jul-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) Ball material (3) (4/5) (6) HPA01044DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 DAB & no Sb/Br) TPS72009YZUR ACTIVE DSBGA YZU 5 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 G3 & no Sb/Br) TPS72009YZUT ACTIVE DSBGA YZU 5 250 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 G3 & no Sb/Br) TPS720102YZUR ACTIVE DSBGA YZU 5 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 DI & no Sb/Br) TPS720102YZUT ACTIVE DSBGA YZU 5 250 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 DI & no Sb/Br) TPS720105DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 ODC & no Sb/Br) TPS720105DRVT ACTIVE WSON DRV 6 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 ODC & no Sb/Br) TPS720105YZUR ACTIVE DSBGA YZU 5 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 NM & no Sb/Br) TPS720105YZUT ACTIVE DSBGA YZU 5 250 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 NM & no Sb/Br) TPS72010DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 DAA & no Sb/Br) TPS72010DRVT ACTIVE WSON DRV 6 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 DAA & no Sb/Br) TPS720115DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 SHP & no Sb/Br) TPS720115DRVT ACTIVE WSON DRV 6 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 SHP & no Sb/Br) TPS72011DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 PAR & no Sb/Br) TPS72011DRVT ACTIVE WSON DRV 6 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 PAR & no Sb/Br) TPS72011YZUR ACTIVE DSBGA YZU 5 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 BQ & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 4-Jul-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) Ball material (3) (4/5) (6) TPS72011YZUT ACTIVE DSBGA YZU 5 250 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 BQ & no Sb/Br) TPS72012DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 DAB & no Sb/Br) TPS72012DRVT ACTIVE WSON DRV 6 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 DAB & no Sb/Br) TPS72012YZUR ACTIVE DSBGA YZU 5 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 NN & no Sb/Br) TPS72012YZUT ACTIVE DSBGA YZU 5 250 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 NN & no Sb/Br) TPS720132YZUR ACTIVE DSBGA YZU 5 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 7J & no Sb/Br) TPS720132YZUT ACTIVE DSBGA YZU 5 250 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 7J & no Sb/Br) TPS72013YZUR ACTIVE DSBGA YZU 5 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 FS & no Sb/Br) TPS72013YZUT ACTIVE DSBGA YZU 5 250 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 FS & no Sb/Br) TPS72015DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 DAC & no Sb/Br) TPS72015DRVT ACTIVE WSON DRV 6 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 DAC & no Sb/Br) TPS72015YZUR ACTIVE DSBGA YZU 5 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 FT & no Sb/Br) TPS72015YZUT ACTIVE DSBGA YZU 5 250 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 FT & no Sb/Br) TPS72017YZUR ACTIVE DSBGA YZU 5 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 GC & no Sb/Br) TPS72017YZUT ACTIVE DSBGA YZU 5 250 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 GC & no Sb/Br) TPS72018DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 DAD & no Sb/Br) TPS72018DRVT ACTIVE WSON DRV 6 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 DAD & no Sb/Br) Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 4-Jul-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) Ball material (3) (4/5) (6) TPS72018YZUR ACTIVE DSBGA YZU 5 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 GD & no Sb/Br) TPS72018YZUT ACTIVE DSBGA YZU 5 250 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 GD & no Sb/Br) TPS72023YZUR ACTIVE DSBGA YZU 5 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 6F & no Sb/Br) TPS72023YZUT ACTIVE DSBGA YZU 5 250 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 125 6F & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 3

PACKAGE OPTION ADDENDUM www.ti.com 4-Jul-2020 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TPS720 : •Automotive: TPS720-Q1 NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 4

PACKAGE MATERIALS INFORMATION www.ti.com 18-Jun-2020 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS72009YZUR DSBGA YZU 5 3000 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 TPS72009YZUT DSBGA YZU 5 250 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 TPS720102YZUR DSBGA YZU 5 3000 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 TPS720102YZUT DSBGA YZU 5 250 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 TPS720105DRVR WSON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS720105DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 TPS720105DRVT WSON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS720105DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 TPS720105YZUR DSBGA YZU 5 3000 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 TPS720105YZUT DSBGA YZU 5 250 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 TPS72010DRVR WSON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS72010DRVT WSON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS720115DRVR WSON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS720115DRVT WSON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS72011DRVR WSON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS72011DRVT WSON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS72011YZUR DSBGA YZU 5 3000 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 TPS72011YZUT DSBGA YZU 5 250 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 18-Jun-2020 Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS72012DRVR WSON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS72012DRVT WSON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS72012YZUR DSBGA YZU 5 3000 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 TPS72012YZUT DSBGA YZU 5 250 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 TPS720132YZUR DSBGA YZU 5 3000 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 TPS720132YZUT DSBGA YZU 5 250 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 TPS72013YZUR DSBGA YZU 5 3000 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 TPS72013YZUT DSBGA YZU 5 250 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 TPS72015DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 TPS72015DRVT WSON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS72015YZUR DSBGA YZU 5 3000 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 TPS72015YZUT DSBGA YZU 5 250 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 TPS72017YZUR DSBGA YZU 5 3000 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 TPS72017YZUT DSBGA YZU 5 250 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 TPS72018DRVR WSON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS72018DRVT WSON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS72018YZUR DSBGA YZU 5 3000 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 TPS72018YZUT DSBGA YZU 5 250 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 TPS72023YZUR DSBGA YZU 5 3000 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 TPS72023YZUT DSBGA YZU 5 250 180.0 8.4 1.07 1.42 0.74 4.0 8.0 Q1 PackMaterials-Page2

PACKAGE MATERIALS INFORMATION www.ti.com 18-Jun-2020 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS72009YZUR DSBGA YZU 5 3000 182.0 182.0 20.0 TPS72009YZUT DSBGA YZU 5 250 182.0 182.0 20.0 TPS720102YZUR DSBGA YZU 5 3000 182.0 182.0 20.0 TPS720102YZUT DSBGA YZU 5 250 182.0 182.0 20.0 TPS720105DRVR WSON DRV 6 3000 203.0 203.0 35.0 TPS720105DRVR WSON DRV 6 3000 182.0 182.0 20.0 TPS720105DRVT WSON DRV 6 250 203.0 203.0 35.0 TPS720105DRVT WSON DRV 6 250 182.0 182.0 20.0 TPS720105YZUR DSBGA YZU 5 3000 182.0 182.0 20.0 TPS720105YZUT DSBGA YZU 5 250 182.0 182.0 20.0 TPS72010DRVR WSON DRV 6 3000 203.0 203.0 35.0 TPS72010DRVT WSON DRV 6 250 203.0 203.0 35.0 TPS720115DRVR WSON DRV 6 3000 203.0 203.0 35.0 TPS720115DRVT WSON DRV 6 250 203.0 203.0 35.0 TPS72011DRVR WSON DRV 6 3000 203.0 203.0 35.0 TPS72011DRVT WSON DRV 6 250 203.0 203.0 35.0 TPS72011YZUR DSBGA YZU 5 3000 182.0 182.0 20.0 TPS72011YZUT DSBGA YZU 5 250 182.0 182.0 20.0 TPS72012DRVR WSON DRV 6 3000 203.0 203.0 35.0 TPS72012DRVT WSON DRV 6 250 203.0 203.0 35.0 TPS72012YZUR DSBGA YZU 5 3000 182.0 182.0 20.0 TPS72012YZUT DSBGA YZU 5 250 182.0 182.0 20.0 TPS720132YZUR DSBGA YZU 5 3000 182.0 182.0 20.0 TPS720132YZUT DSBGA YZU 5 250 182.0 182.0 20.0 TPS72013YZUR DSBGA YZU 5 3000 182.0 182.0 20.0 TPS72013YZUT DSBGA YZU 5 250 182.0 182.0 20.0 TPS72015DRVR WSON DRV 6 3000 182.0 182.0 20.0 TPS72015DRVT WSON DRV 6 250 203.0 203.0 35.0 TPS72015YZUR DSBGA YZU 5 3000 210.0 185.0 35.0 TPS72015YZUT DSBGA YZU 5 250 210.0 185.0 35.0 TPS72017YZUR DSBGA YZU 5 3000 210.0 185.0 35.0 TPS72017YZUT DSBGA YZU 5 250 210.0 185.0 35.0 TPS72018DRVR WSON DRV 6 3000 203.0 203.0 35.0 TPS72018DRVT WSON DRV 6 250 203.0 203.0 35.0 TPS72018YZUR DSBGA YZU 5 3000 210.0 185.0 35.0 TPS72018YZUT DSBGA YZU 5 250 210.0 185.0 35.0 TPS72023YZUR DSBGA YZU 5 3000 182.0 182.0 20.0 TPS72023YZUT DSBGA YZU 5 250 182.0 182.0 20.0 PackMaterials-Page3

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