TPS718xx TPS719xx www.ti.com..................................................................................................................................................... SBVS088C–FEBRUARY2007–REVISEDMAY2008 Dual, 200mA Output, Low Noise, High PSRR Low-Dropout Linear Regulators FEATURES DESCRIPTION 1 • Dual,200mAHigh-PerformanceLDOs The TPS718xx and TPS719xx families of low-dropout 23 • LowTotalQuiescentCurrent:90m AwithBoth (LDO) regulators offer a high power-supply rejection LDOsEnabled ratio (PSRR), low noise, fast start-up, and excellent line and load transient responses while consuming a • LowNoise:70m V /V RMS very low 90m A (typical) at no load ground current with • ActiveOutputPulldown(TPS719xx) both LDOs enabled. The TPS719xx also provides an • IndependentEnablesforEachLDO active pulldown circuit to quickly discharge output • PSRR:65dBat1kHz,45dBat1MHz loads. The TPS718xx and TPS719xx are stable with ceramic capacitors and use an advanced BiCMOS • AvailableinMultipleFixed-OutputVoltage fabrication process to yield a typical dropout voltage Combinationsfrom0.9Vto3.6VUsing of 230mV at 200mA output loads. The TPS718xx and InnovativeFactoryEEPROMProgramming TPS719xx also use a precision voltage reference and • FastStart-UpTime:160m s feedbacklooptoachieve3%overall accuracy over all load, line, process, and temperature variations. Both • Over-Current,Over-Temperatureand families of devices are fully specified from T = –40(cid:176) C Under-VoltageProtection to+125(cid:176) Candare offered in 2mm · 2mm SOJ N-6 and • LowDropout:230mVat200mA 6-ball Wafer Chip-Scale (WCSP) packages that are • Stablewith1m FCeramicOutputCapacitor ideal for applications such as mobile handsets and WLAN that require good thermal dissipation while • Availablein2mm· 2mmSON-6and6-Ball maintainingaverysmallfootprint. WCSPPackages APPLICATIONS • DigitalCamerasandCameraModules • CellularCameraandTVPhones • WirelessLAN,Bluetooth® • HandheldProducts 2.7V to 6.5V 0.9V to 3.6V TPS718xx, TPS719xx TPS718xx, TPS719xx TPS718Axx, TPS719Axx VIN IN OUT1 VOUT DRV Package YZC Package YZC Package 1mF 1mF 2mm x 2mm SON-6 6-BALL WCSP 6-BALL WCSP TPS718xx (Top View) (Top View) (Top View) TPS719xx On C2 C1 A1 A2 EN1 OUT1 1 6 EN1 EN1 OUT1 EN1 OUT1 Off 0.9V-3.6V OUT2 VOUT IN 2 GND 5 GND GND B2 B1 IN GND B1 B2 IN 1mF On EN2 OUT2 3 4 EN2 A2 A1 C1 C2 Off GND EN2 OUT2 EN2 OUT2 Typical Application Circuit 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsof TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. BluetoothisaregisteredtrademarkofBluetoothSIG,Inc. 2 Allothertrademarksarethepropertyoftheirrespectiveowners. 3 PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2007–2008,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

TPS718xx TPS719xx SBVS088C–FEBRUARY2007–REVISEDMAY2008..................................................................................................................................................... www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage. ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemore susceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications. ORDERINGINFORMATION(1) PRODUCT V (2)(3) OUT TPS718xx-yywwwz Adenotesdevicewithrotatedpin1orientationofwafer-chipscalepackage. TPS718Axx-yywwwz XXisnominaloutputvoltageforLDO1(forexample,28=2.8V). TPS719xx-yywwwz YYisnominaloutputvoltageforLDO2. TPS719Axx-yywwwz WWWispackagedesignator. Zistapeandreelquantity(R=3000,T=250). Examples:TPS71918–285DRVR XX=18=1.8V,YYY=285=2.85V TPS719185-33DRVR XXX=185=1.85V,YY=33=3.3V DRV=2mmx2mmSONpackage Z=R=3000piecereel (1) ForthemostcurrentpackageandorderinginformationseethePackageOptionAddendumattheendofthisdocument,orseetheTI websiteatwww.ti.com. (2) Bothoutputsareprogrammablefrom0.9Vto3.6Vin50mVincrements. (3) Outputvoltagesfrom0.9Vto3.6Vin50mVincrementsareavailablethroughtheuseofinnovativefactoryEEPROMprogramming; minimumorderquantitiesmayapply.Contactfactoryfordetailsandavailability. ABSOLUTE MAXIMUM RATINGS(1) Overoperatingtemperaturerange(unlessotherwisenoted).AllvoltagesarewithrespecttoGND. PARAMETER TPS718xx,TPS719xx UNIT Inputvoltagerange,V –0.3to+7.0 V IN Enablevoltagerange,V andV –0.3toV +0.3V V EN1 EN2 IN Outputvoltagerange,V –0.3to+7.0 V OUT Peakoutputcurrent Internallylimited Outputshort-circuitduration Indefinite Junctiontemperaturerange,T –55to+150 (cid:176) C J Storagetemperaturerange,T –55to+150 (cid:176) C STG Totalcontinuouspowerdissipation,P SeeDissipationRatingsTable DISS ESDrating,HBM 2 kV ESDrating,CDM 500 V (1) Stressesabovetheseratingsmaycausepermanentdamage.Exposuretoabsolutemaximumconditionsforextendedperiodsmay degradedevicereliability.Thesearestressratingsonly,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyond thosespecifiedisnotimplied. DISSIPATION RATINGS DERATINGFACTOR BOARD PACKAGE Rq JC Rq JA ABOVETA=+25(cid:176) C TA<+25(cid:176) C TA=+70(cid:176) C TA=+85(cid:176) C High-K(1) DRV 20(cid:176) C/W 95(cid:176) C/W 10.53mW/(cid:176) C 1053mW 579mW 421mW High-K(1) YZC 27(cid:176) C/W 190(cid:176) C/W 5.3mW/(cid:176) C 530mW 295mW 215mW (1) TheJEDEChigh-K(2s2p)boardusedtoderivethisdatawasa3in· 3in,multilayerboardwith1-ounceinternalpowerandground planesand2-ouncecoppertracesontopandbottomoftheboard. 2 SubmitDocumentationFeedback Copyright©2007–2008,TexasInstrumentsIncorporated ProductFolderLink(s):TPS718xxTPS719xx

TPS718xx TPS719xx www.ti.com..................................................................................................................................................... SBVS088C–FEBRUARY2007–REVISEDMAY2008 ELECTRICAL CHARACTERISTICS Overoperatingtemperaturerange(T =–40(cid:176) Cto+125(cid:176) C),V =V +0.5Vor2.7V,whicheverisgreater; J IN OUT(TYP) I =0.5mA,V =V =V ,C =1.0m F,unlessotherwisenoted.TypicalvaluesareatT =+25(cid:176) C. OUT EN1 EN2 IN OUT J PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V Inputvoltagerange(1) 2.7 6.5 V IN V ,V Outputvoltagerange 0.9 3.6 V OUT1 OUT2 Nominal T =+25(cid:176) C ±2.5 mV J VOUT1,VOUT2 Outputaccuracy OverVIN,IOUT, VOUT+0.5V≤VIN≤6.5V –3.0 +3.0 % Temp 0mA≤I ≤200mA OUT ΔV /ΔV Lineregulation VOUT(NOM)+0.5V≤VIN≤6.5V, 130 m V/V OUT IN I =5mA OUT ΔV /ΔI Loadregulation 0mA≤I ≤200mA 75 m V/mA OUT OUT OUT Dropoutvoltage(2) V I =200mA 230 400 mV DO (V =V –0.1V) OUT IN OUT(NOM) I Outputcurrentlimit(peroutput) V =0.9· V 240 340 575 mA CL OUT OUT(NOM) I =I =0.1mA 90 160 m A OUT1 OUT2 I Groundpincurrent GND I =I =200mA 250 m A OUT1 OUT2 VTEN=1,–24≤0(cid:176)0C.4tVo,+28.75V(cid:176) C≤VIN<4.5V, 0.3 3.0 m A J I Shutdowncurrent(I ) SHDN GND VTEN=1,–24≤0(cid:176)0C.4tVo,+48.55V(cid:176) C≤VIN≤6.5V, 1.8 m A J f=100Hz 63 dB f=1kHz 63 dB Power-supplyrejectionratio PSRR V =3.8V,V =2.8V, f=10kHz 72 dB IN OUT I =200mA OUT f=100kHz 58 dB f=1MHz 44 dB V Outputnoisevoltage 70· V m V N BW=100Hzto100kHz OUT RMS TSTR Startuptime(3) RCL=1=4Ω1.,0Vm OFUT=2.8V, 160 m s OUT T Shutdowntime(4),(5) RL=∞,COUT=1.0m F, 180 m s SHUT (TPS719xxonly) V =2.8V OUT Enablehigh(enabled) VIN≤5.5V 1.2 6.5 V V EN(HI) (EN1andEN2) 5.5V<V ≤6.5V 1.25 6.5 V IN Enablelow(shutdown) V 0 0.4 V EN(LO) (EN1andEN2) I Enablepincurrent,enabled EN1=EN2=6.5V 0.04 1.0 m A EN (EN1andEN2) Undervoltagelockout V rising 2.38 2.45 2.52 V IN UVLO Hysteresis V falling 150 mV IN Shutdown,temperatureincreasing +160 (cid:176) C T Thermalshutdowntemperature SD Reset,temperaturedecreasing +140 (cid:176) C T Operatingjunctiontemperature –40 +125 (cid:176) C J (1) MinimumV =V +V or2.7V,whicheverisgreater. IN OUT DO (2) V isnotmeasuredfordeviceswithV <2.8VbecauseminimumV =2.7V. DO OUT(NOM) IN (3) TimefromV =1.25VtoV =95%(V ). EN OUT OUT(NOM) (4) TimefromV =0.4VtoV =5%(V ). EN OUT OUT(NOM) (5) SeeShutdownsectionintheApplicationsInformationformoredetails. Copyright©2007–2008,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLink(s):TPS718xxTPS719xx

TPS718xx TPS719xx SBVS088C–FEBRUARY2007–REVISEDMAY2008..................................................................................................................................................... www.ti.com DEVICE INFORMATION TPS719 only 60W Bandgap UVLO Current Limit Thermal Shutdown 2.5mA OUT1 EN1 Enable and Power Control EN2 Logic OUT2 Thermal 2.5mA Shutdown Current IN Limit UVLO Bandgap 60W TPS719 only GND Figure1.FunctionalBlockDiagram 4 SubmitDocumentationFeedback Copyright©2007–2008,TexasInstrumentsIncorporated ProductFolderLink(s):TPS718xxTPS719xx

TPS718xx TPS719xx www.ti.com..................................................................................................................................................... SBVS088C–FEBRUARY2007–REVISEDMAY2008 DRVPACKAGE SON-6 (TOPVIEW) OUT1 1 6 EN1 IN 2 GND 5 GND OUT2 3 4 EN2 YZCPACKAGE 6-BALLWCSP (TOPVIEW) C2 C1 EN1 OUT1 B2 B1 GND IN A2 A1 EN2 OUT2 TPS718xx TPS719xx YZCPACKAGE 6-BALLWCSP (TOPVIEW) A1 A2 EN1 OUT1 B1 B2 GND IN C1 C2 EN2 OUT2 TPS718Axx TPS719Axx PINDESCRIPTIONS TPS718xx TPS718Axx(1) TPS719xx TPS719Axx(1) NAME DRV YZC YZC DESCRIPTION OutputofRegulator1.Asmallceramiccapacitor(typically≥1m F)is OUT1 1 C1 A2 neededfromthispintogroundtoassurestability. IN 2 B1 B2 Inputsupplytobothregulators. OutputofRegulator2.Asmallceramiccapacitor(typically≥1m F)is OUT2 3 A1 C2 neededfromthispintogroundtoassurestability. EnablepinforRegulator2.DrivingtheEnablepin(EN2)highturnson EN2 4 A2 C1 Regulator2.DrivingthispinlowputsRegulator2intoshutdownmode, reducingoperatingcurrent. GND 5 B2 B1 Ground.DRVthermalpadshouldalsobeconnectedtoground. EnablepinforRegulator1.DrivingtheEnablepin(EN1)highturnson EN1 6 C2 A1 Regulator1.DrivingthispinlowputsRegulator1intoshutdownmode, reducingoperatingcurrent. (1) AoptiondenotesdeviceswithrotatedPin1orientationonWaferChipscalepackages. Copyright©2007–2008,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLink(s):TPS718xxTPS719xx

TPS718xx TPS719xx SBVS088C–FEBRUARY2007–REVISEDMAY2008..................................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS Overoperatingtemperaturerange(T =–40(cid:176) Cto+125(cid:176) C),V =V +0.5Vor2.7V,whicheverisgreater; J IN OUT(TYP) I =0.5mA,V =V =V ,C =1.0m F,unlessotherwisenoted.TypicalvaluesareatT =+25(cid:176) C. OUT EN1 EN2 IN OUT J LINEREGULATION LINEREGULATION 4 0 3 IOUT= 5mA TJ= +85°C IOUT= 200mA 2 TJ= +125°C -1 TJ= +25°C TJ=-40°C V) 1 V) -2 m T = +25°C m (T 0 J (T U U DVO -1 DVO -3 T = +85°C -2 J TJ=-40°C -4 -3 T = +125°C J -4 -5 2.5 3.5 4.5 5.5 6.5 2.5 3.5 4.5 5.5 6.5 V (V) V (V) IN IN Figure2. Figure3. LOADREGULATIONUNDERLIGHTLOADS LOADREGULATION 4 5 T = +85°C T = +25°C J 0 2 J -5 0 -10 (mV) -2 T =-40°C (mV) -15 T J T OU -4 OU -20 V V D -6 D -25 TJ= +125°C -30 TJ= +85°C -8 TJ= +125°C -35 TTJ== +-4205°°CC J -10 -40 0 1 2 3 4 5 0 50 100 150 200 IOUT(mA) IOUT(mA) Figure4. Figure5. OUTPUTVOLTAGEvs DROPOUTVOLTAGEvs TEMPERATURE OUTPUTCURRENT 2.805 350 IOUT= 5mA TJ= +125°C 2.800 300 T = +85°C 2.795 J 250 2.790 IOUT= 0.1mA V(V)OUT 22..778850 IOUT= 200mA V(mV)DO 210500 T = +25°C 2.775 J 100 2.770 T =-40°C J 50 2.765 2.760 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 0 50 100 150 200 T (°C) I (mA) J OUT Figure6. Figure7. 6 SubmitDocumentationFeedback Copyright©2007–2008,TexasInstrumentsIncorporated ProductFolderLink(s):TPS718xxTPS719xx

TPS718xx TPS719xx www.ti.com..................................................................................................................................................... SBVS088C–FEBRUARY2007–REVISEDMAY2008 TYPICAL CHARACTERISTICS (continued) Overoperatingtemperaturerange(T =–40(cid:176) Cto+125(cid:176) C),V =V +0.5Vor2.7V,whicheverisgreater; J IN OUT(TYP) I =0.5mA,V =V =V ,C =1.0m F,unlessotherwisenoted.TypicalvaluesareatT =+25(cid:176) C. OUT EN1 EN2 IN OUT J GROUNDPINCURRENTvs GROUNDPINCURRENTvs OUTPUTCURRENT INPUTVOLTAGE 200 60 T = +125°C J I = 1mA T = +25°C OUT J 50 160 T = +85°C J 40 (A)m 120 TJ=-40°C (A)m 30 D D N N IG 80 IG 20 40 10 0 0 0 50 100 150 200 2.5 3.5 4.5 5.5 6.5 I (mA) V (V) OUT IN Figure8. Figure9. GROUNDPINCURRENTvs SHUTDOWNCURRENTvs TEMPERATURE(BOTHLDOsENABLED) INPUTVOLTAGE 140 5.0 I = 0mA OUT 4.5 120 4.0 T = +125°C A) J 100 m 3.5 nt ( (A)m 80 Curre 32..05 TJ=-40°C IGND 60 own 2.0 TJ= +85°C d 40 ut 1.5 h S 1.0 T = +25°C 20 J 0.5 0 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 2.5 3.5 4.5 5.5 6.5 T (°C) V (V) J IN Figure10. Figure11. CURRENTLIMITvs POWER-SUPPLYRIPPLEREJECTIONvs INPUTVOLTAGE FREQUENCY(V –V =0.5V) IN OUT 450 90 100mA 425 80 5mA 70 400 Limit (mA) 337550 R (dB) 6500 200mA nt SR 40 Curre 325 TJ= +125°C P 30 300 TJ= +85°C 20 T = +25°C 275 J 10 T =-40°C J 250 0 2.5 3.5 4.5 5.5 6.5 10 100 1k 10k 100k 1M 10M V (V) Frequency (Hz) IN Figure12. Figure13. Copyright©2007–2008,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLink(s):TPS718xxTPS719xx

TPS718xx TPS719xx SBVS088C–FEBRUARY2007–REVISEDMAY2008..................................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS (continued) Overoperatingtemperaturerange(T =–40(cid:176) Cto+125(cid:176) C),V =V +0.5Vor2.7V,whicheverisgreater; J IN OUT(TYP) I =0.5mA,V =V =V ,C =1.0m F,unlessotherwisenoted.TypicalvaluesareatT =+25(cid:176) C. OUT EN1 EN2 IN OUT J POWER-SUPPLYRIPPLEREJECTIONvs POWER-SUPPLYRIPPLEREJECTIONvs FREQUENCY(V –V =1V) INPUTVOLTAGE IN OUT 90 80 100mA 80 70 1kHz 70 5mA 10kHz 60 60 B) B) 50 100kHz R (d 50 R(d 40 R 40 R 1MHz S S P P 30 30 20 20 200mA V = 2.80V 10 10 OUT I = 5mA OUT 0 0 10 100 1k 10k 100k 1M 10M 3.0 3.2 3.4 3.6 3.8 4.0 Frequency (Hz) V (V) IN Figure14. Figure15. POWER-SUPPLYRIPPLEREJECTIONvs OUTPUTSPECTRALNOISEDENSITYvs INPUTVOLTAGE FREQUENCY 80 10 10kHz )Hz VOUT= 2.80V 70 1kHz ÖV m 60 y ( nsit 1 B) 50 100kHz De PSRR(d 4300 1MHz al Noise ctr 0.1 e 20 p S 10 VOUT= 2.80V put IOUT= 200mA Out 0 0.01 3.0 3.2 3.4 3.6 3.8 4.0 100 1k 10k 100k V (V) Frequency (Hz) IN Figure16. Figure17. LINETRANSIENTRESPONSE LOADTRANSIENTRESPONSE 6.5V dVIN = 1V/ms IOUTmin= 3mA dIOUT = 200mA/ms dt dt 250mA/div I OUT1 1V/div 3.3V V IN 10mV/div V OUT1 10mV/div VOUT1 10mV/div VOUT2 10mV/div VOUT2 10ms/div 20ms/div Figure18. Figure19. 8 SubmitDocumentationFeedback Copyright©2007–2008,TexasInstrumentsIncorporated ProductFolderLink(s):TPS718xxTPS719xx

TPS718xx TPS719xx www.ti.com..................................................................................................................................................... SBVS088C–FEBRUARY2007–REVISEDMAY2008 TYPICAL CHARACTERISTICS (continued) Overoperatingtemperaturerange(T =–40(cid:176) Cto+125(cid:176) C),V =V +0.5Vor2.7V,whicheverisgreater; J IN OUT(TYP) I =0.5mA,V =V =V ,C =1.0m F,unlessotherwisenoted.TypicalvaluesareatT =+25(cid:176) C. OUT EN1 EN2 IN OUT J TPS719ENABLERESPONSE POWER-UP/POWER-DOWN V I = 200mA IN OUT 6.5V 0V 4V/div EN1, EN2 1V/div V OUT 1V/div VOUT1 1V/div VOUT2 40ms/div 400ms/div Figure20. Figure21. Copyright©2007–2008,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLink(s):TPS718xxTPS719xx

TPS718xx TPS719xx SBVS088C–FEBRUARY2007–REVISEDMAY2008..................................................................................................................................................... www.ti.com APPLICATION INFORMATION The TPS718xx/TPS719xx belong to a family of new Board Layout Recommendations to Improve generation LDO regulators that use innovative PSRR and Noise Performance circuitry to achieve ultra-wide bandwidth and high loop gain, resulting in extremely high PSRR (up to To improve ac performance such as PSRR, output 1MHz) at very low headroom (V – V ). These noise,andtransient response, it is recommended that IN OUT features, combined with low noise, two independent the board be designed with separate ground planes enables, low ground pin current and ultra-small for V and V , with each ground plane connected IN OUT packaging, make this part ideal for portable only at the GND pin of the device. In addition, the applications. This family of regulators offer ground connection for the output capacitor should sub-bandgap output voltages, current limit and connect directly to the GND pin of the device. High thermal protection, and is fully specified from –40(cid:176) C ESRcapacitorsmaydegradePSRR. to+125(cid:176) C. Internal Current Limit Figure22showsthebasiccircuitconnections. The TPS718xx/TPS719xx internal current limits help 2.7V-6.5V 0.9V-3.6V protect the regulator during fault conditions. During VIN IN OUT1 VOUT current limit, the output sources a fixed amount of 1mF TPS718xx 1mF current that is largely independent of output voltage. TPS719xx For reliable operation, the device should not be On EN1 operated in a current limit state for extended periods Off 0.9V-3.6V oftime. OUT2 VOUT 1mF The PMOS pass element in the TPS718xx/TPS719xx On EN2 has a built-in body diode that conducts current when Off GND the voltage at OUT exceeds the voltage at IN. This current is not limited, so if extended reverse voltage operation is anticipated, external limiting to 5% of ratedoutputcurrentmaybeappropriate. Figure22.TypicalApplicationCircuit Shutdown Input and Output Capacitor Requirements The enable pin (EN) is active high and is compatible with standard and low voltage, TTL-CMOS levels. Although an input capacitor is not required for When shutdown capability is not required, EN can be stability, it is good analog design practice to connect a 0.1m F to 1.0m F low equivalent series resistance connected to IN. The TPS719 with internal active output pulldown circuitry discharges the output with a (ESR) capacitor across the input supply near the timeconstant(t)of: regulator. This capacitor counteracts reactive input sources and improves transient response, noise 60 ´ R rejection, and ripple rejection. A higher-value t = 3 L ´C 60 + R OUT capacitor may be necessary if large, fast rise-time L load transients are anticipated or if the device is located close to the power source. If source with: impedance is not sufficiently low, a 0.1m F input R =outputloadresistance L capacitormaybenecessarytoensurestability. C =outputcapacitance OUT The TPS718xx/TPS719xx are designed to be stable with standard ceramic capacitors of values 1.0m F or Dropout Voltage larger at the output. X5R- and X7R-type capacitors The TPS718xx/TPS719xx use a PMOS pass arebestbecausetheyhaveminimal variation in value transistor to achieve low dropout. When (V – V ) and ESR over temperature. Maximum ESR should be IN OUT is less than the dropout voltage (V ), the PMOS <1.0Ω. DO pass device is in its linear region of operation and the input-to-output resistance is the R of the PMOS DS(ON) pass element. V approximately scales with output DO current because the PMOS device behaves like a resistorindropout. 10 SubmitDocumentationFeedback Copyright©2007–2008,TexasInstrumentsIncorporated ProductFolderLink(s):TPS718xxTPS719xx

TPS718xx TPS719xx www.ti.com..................................................................................................................................................... SBVS088C–FEBRUARY2007–REVISEDMAY2008 As with any linear regulator, PSRR and transient Any tendency to activate the thermal protection circuit response are degraded as (V – V ) approaches indicates excessive power dissipation or an IN OUT dropout. This effect is shown in Figure 13 and inadequate heatsink. For reliable operation, junction Figure14intheTypicalCharacteristicssection. temperature should be limited to +125(cid:176) C maximum. Toestimatethemargin of safety in a complete design Transient Response (including heatsink), increase the ambient temperature until the thermal protection is triggered; As with any regulator, increasing the size of the use worst-case loads and signal conditions. For good output capacitor will reduce over/undershoot reliability, thermal protection should trigger at least magnitude but increase duration of the transient +35(cid:176) C above the maximum expected ambient response. condition of your particular application. This configuration produces a worst-case junction Undervoltage Lock-Out (UVLO) temperature of +125(cid:176) C at the highest expected The TPS718xx/TPS719xx utilize an undervoltage ambienttemperatureandworst-caseload. lock-out circuit to keep the output shut off until The internal protection circuitry of the internal circuitry is operating properly. The UVLO TPS718xx/TPS719xx has been designed to protect circuit has a de-glitch feature so that it typically against overload conditions. It was not intended to ignores undershoot transients on the input if they are replace proper heatsinking. Continuously running the less than 50m s duration. On the TPS719xx, the active TPS718xx/TPS719xx into thermal shutdown pulldown discharges VOUT when the device is in degradesdevicereliability. UVLOoffcondition. However, the input voltage needs tobegreaterthan0.8Vforactivepulldowntowork. PowerDissipation Minimum Load The ability to remove heat from the die is different for each package type, presenting different The TPS718xx/TPS719xx are stable with no output considerations in the printed circuit board (PCB) load. Traditional PMOS LDO regulators suffer from layout. The PCB area around the device that is free lower loop gain at very light output loads. The of other components moves the heat from the device TPS718xx/TPS719xx employ an innovative, to the ambient air. Performance data for JEDEC low- low-current mode circuit under very light or no-load and high-K boards are given in the Dissipation conditions, resulting in improved output voltage Ratings table. Using heavier copper increases the regulationperformancedowntozerooutputcurrent. effectiveness in removing heat from the device. The addition of plated through-holes to heat-dissipating THERMAL INFORMATION layersalsoimprovestheheatsinkeffectiveness. Power dissipation depends on input voltage and load ThermalProtection conditions. Power dissipation (P ) is equal to the D Thermal protection disables the output when the product of the output current times the voltage drop junction temperature rises to approximately +160(cid:176) C, across the output pass element (V to V ), as IN OUT allowing the device to cool. When the junction showninEquation1: temperature cools to approximately +140(cid:176) C the PD= (VIN-VOUT) x IOUT (1) outputcircuitryisagainenabled.Dependingonpower dissipation, thermal resistance, and ambient PackageMounting temperature, the thermal protection circuit may cycle on and off. This cycling limits the dissipation of the Solder pad footprint recommendations for the regulator, protecting it from damage due to TPS718xx/TPS719xxx are available from the Texas overheating. Instrumentswebsiteatwww.ti.com. Copyright©2007–2008,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLink(s):TPS718xxTPS719xx

TPS718xx TPS719xx SBVS088C–FEBRUARY2007–REVISEDMAY2008..................................................................................................................................................... www.ti.com 1,690 1,590 1,088 0,988 Figure23.YZCWaferChip-ScalePackageDimensions(inmm) 12 SubmitDocumentationFeedback Copyright©2007–2008,TexasInstrumentsIncorporated ProductFolderLink(s):TPS718xxTPS719xx

PACKAGE OPTION ADDENDUM www.ti.com 4-Jul-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) Ball material (3) (4/5) (6) TPS71812-33DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 BVC & no Sb/Br) TPS71812-33DRVT ACTIVE WSON DRV 6 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 BVC & no Sb/Br) TPS71818-33DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 OEI & no Sb/Br) TPS71818-33DRVT ACTIVE WSON DRV 6 250 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 OEI & no Sb/Br) TPS71825-12DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 BVO & no Sb/Br) TPS71825-12DRVT ACTIVE WSON DRV 6 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 BVO & no Sb/Br) TPS71828-30DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 BVX & no Sb/Br) TPS71828-30DRVT ACTIVE WSON DRV 6 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 BVX & no Sb/Br) TPS71913-28DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 BWP & no Sb/Br) TPS71913-28DRVT ACTIVE WSON DRV 6 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 BWP & no Sb/Br) TPS71918-12DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 BWW & no Sb/Br) TPS71918-12DRVT ACTIVE WSON DRV 6 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 BWW & no Sb/Br) TPS71918-28DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 ODQ & no Sb/Br) TPS71918-28DRVT ACTIVE WSON DRV 6 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 ODQ & no Sb/Br) TPS71921-22DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 OBW & no Sb/Br) TPS71921-22DRVT ACTIVE WSON DRV 6 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 OBW & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 4-Jul-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) Ball material (3) (4/5) (6) TPS71928-28DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 CAK & no Sb/Br) TPS71928-28DRVT ACTIVE WSON DRV 6 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 CAK & no Sb/Br) TPS71928-28DRVTG4 ACTIVE WSON DRV 6 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 CAK & no Sb/Br) TPS719285-285DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 OAU & no Sb/Br) TPS71933-28DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 CAH & no Sb/Br) TPS71933-28DRVT ACTIVE WSON DRV 6 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 CAH & no Sb/Br) TPS71933-28DRVTG4 ACTIVE WSON DRV 6 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 CAH & no Sb/Br) TPS71933-33DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 BWL & no Sb/Br) TPS71933-33DRVT ACTIVE WSON DRV 6 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 BWL & no Sb/Br) TPS71936-315DRVR ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 CVZ & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 4-Jul-2020 (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 2-Dec-2018 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS71812-33DRVR WSON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS71812-33DRVT WSON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS71818-33DRVR WSON DRV 6 3000 178.0 8.4 2.25 2.25 1.0 4.0 8.0 Q2 TPS71818-33DRVT WSON DRV 6 250 178.0 8.4 2.25 2.25 1.0 4.0 8.0 Q2 TPS71825-12DRVR WSON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS71825-12DRVT WSON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS71828-30DRVR WSON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS71828-30DRVT WSON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS71913-28DRVR WSON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS71913-28DRVT WSON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS71918-12DRVR WSON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS71918-12DRVT WSON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS71918-28DRVR WSON DRV 6 3000 178.0 8.4 2.25 2.25 1.0 4.0 8.0 Q2 TPS71918-28DRVT WSON DRV 6 250 178.0 8.4 2.25 2.25 1.0 4.0 8.0 Q2 TPS71921-22DRVR WSON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS71921-22DRVT WSON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS71928-28DRVR WSON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS71928-28DRVT WSON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 2-Dec-2018 Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS719285-285DRVR WSON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS71933-28DRVR WSON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS71933-28DRVT WSON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS71933-33DRVR WSON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS71933-33DRVT WSON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS71936-315DRVR WSON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS71812-33DRVR WSON DRV 6 3000 203.0 203.0 35.0 TPS71812-33DRVT WSON DRV 6 250 203.0 203.0 35.0 TPS71818-33DRVR WSON DRV 6 3000 205.0 200.0 33.0 TPS71818-33DRVT WSON DRV 6 250 205.0 200.0 33.0 TPS71825-12DRVR WSON DRV 6 3000 203.0 203.0 35.0 TPS71825-12DRVT WSON DRV 6 250 203.0 203.0 35.0 TPS71828-30DRVR WSON DRV 6 3000 203.0 203.0 35.0 TPS71828-30DRVT WSON DRV 6 250 203.0 203.0 35.0 TPS71913-28DRVR WSON DRV 6 3000 203.0 203.0 35.0 TPS71913-28DRVT WSON DRV 6 250 203.0 203.0 35.0 TPS71918-12DRVR WSON DRV 6 3000 203.0 203.0 35.0 PackMaterials-Page2

PACKAGE MATERIALS INFORMATION www.ti.com 2-Dec-2018 Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS71918-12DRVT WSON DRV 6 250 203.0 203.0 35.0 TPS71918-28DRVR WSON DRV 6 3000 205.0 200.0 33.0 TPS71918-28DRVT WSON DRV 6 250 205.0 200.0 33.0 TPS71921-22DRVR WSON DRV 6 3000 203.0 203.0 35.0 TPS71921-22DRVT WSON DRV 6 250 203.0 203.0 35.0 TPS71928-28DRVR WSON DRV 6 3000 203.0 203.0 35.0 TPS71928-28DRVT WSON DRV 6 250 203.0 203.0 35.0 TPS719285-285DRVR WSON DRV 6 3000 203.0 203.0 35.0 TPS71933-28DRVR WSON DRV 6 3000 203.0 203.0 35.0 TPS71933-28DRVT WSON DRV 6 250 203.0 203.0 35.0 TPS71933-33DRVR WSON DRV 6 3000 203.0 203.0 35.0 TPS71933-33DRVT WSON DRV 6 250 203.0 203.0 35.0 TPS71936-315DRVR WSON DRV 6 3000 203.0 203.0 35.0 PackMaterials-Page3

GENERIC PACKAGE VIEW DRV 6 WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4206925/F

PACKAGE OUTLINE DRV0006A WSON - 0.8 mm max height SCALE 5.500 PLASTIC SMALL OUTLINE - NO LEAD B 2.1 A 1.9 PIN 1 INDEX AREA 2.1 1.9 0.8 C 0.7 SEATING PLANE 0.08 C (0.2) TYP 1 0.1 0.05 EXPOSED 0.00 THERMAL PAD 3 4 2X 7 1.3 1.6 0.1 6 1 4X 0.65 0.35 6X PIN 1 ID 0.3 0.25 6X (OPTIONAL) 0.2 0.1 C A B 0.05 C 4222173/B 04/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. www.ti.com

EXAMPLE BOARD LAYOUT DRV0006A WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD 6X (0.45) (1) 1 7 6X (0.3) 6 SYMM (1.6) (1.1) 4X (0.65) 4 3 (R0.05) TYP SYMM ( 0.2) VIA (1.95) TYP LAND PATTERN EXAMPLE SCALE:25X 0.07 MAX 0.07 MIN ALL AROUND ALL AROUND SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK (PREFERRED) DEFINED SOLDER MASK DETAILS 4222173/B 04/2018 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If some or all are implemented, recommended via locations are shown. www.ti.com

EXAMPLE STENCIL DESIGN DRV0006A WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD SYMM 6X (0.45) METAL 1 7 6X (0.3) 6 (0.45) SYMM 4X (0.65) (0.7) 4 3 (R0.05) TYP (1) (1.95) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD #7 88% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:30X 4222173/B 04/2018 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

PACKAGE OUTLINE DRV0006D WSON - 0.8 mm max height SCALE 5.500 PLASTIC SMALL OUTLINE - NO LEAD B 2.1 A 1.9 PIN 1 INDEX AREA 2.1 1.9 0.8 C 0.7 SEATING PLANE 0.08 C (0.2) TYP 1 0.1 0.05 EXPOSED 0.00 THERMAL PAD 3 4 2X 7 1.3 1.6 0.1 6 1 4X 0.65 0.35 6X PIN 1 ID 0.3 0.25 6X (OPTIONAL) 0.2 0.1 C A B 0.05 C 4225563/A 12/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. www.ti.com

EXAMPLE BOARD LAYOUT DRV0006D WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD 6X (0.45) (1) 1 7 6X (0.3) 6 SYMM (1.6) (1.1) 4X (0.65) 4 3 (R0.05) TYP SYMM ( 0.2) VIA (1.95) TYP LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:25X 0.07 MAX 0.07 MIN ALL AROUND ALL AROUND EXPOSED EXPOSED METAL METAL SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK (PREFERRED) DEFINED SOLDER MASK DETAILS 4225563/A 12/2019 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If some or all are implemented, recommended via locations are shown. www.ti.com

EXAMPLE STENCIL DESIGN DRV0006D WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD SYMM 6X (0.45) METAL 1 7 6X (0.3) 6 (0.45) SYMM 4X (0.65) (0.7) 4 3 (R0.05) TYP (1) (1.95) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD #7 88% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:30X 4225563/A 12/2019 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

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