TPS71202, TPS71219 TPS71229, TPS71247 (cid:5)(cid:8)(cid:13)(cid:14)(cid:7)(cid:11) (cid:6)(cid:10)(cid:16)(cid:9) TPS71256, TPS71257 (cid:2)(cid:4) (cid:12)(cid:12) (cid:15) (cid:4) (cid:12)(cid:12)(cid:3) www.ti.com SBVS049D–MAY2004–REVISEDAUGUST2010 Dual 250 mA Output, UltraLow Noise, High PSRR, Low-Dropout Linear Regulator CheckforSamples:TPS71202,TPS71219,TPS71229,TPS71247,TPS71256,TPS71257 FEATURES DESCRIPTION 1 • Dual250mAHigh-PerformanceRFLDOs The TPS712xx family of low-dropout (LDO) voltage • AvailableinFixedandAdjustable regulators is tailored to noise-sensitive and RF VoltageOptions(1.2Vto5.5V) applications. These products feature dual 250 mA LDOs with ultralow noise, high power-supply rejection • HighPSRR:65dBat10kHz ratio (PSRR), and fast transient and start-up • UltraLowNoise:32mVrms response. Each regulator output is stable with • FastStart-UpTime:60ms low-cost 2.2 mF ceramic output capacitors and features very low dropout voltages (125 mV typical at • Stablewith2.2mFCeramicCapacitor 250 mA). Each regulator achieves fast start-up times • ExcellentLoad/LineTransientResponse (approximately 60 ms with a 0.001 mF bypass • VeryLowDropoutVoltage:125mVat250mA capacitor) while consuming very low quiescent current (300 mA typical with both outputs enabled). • IndependentEnablePins When the device is placed in standby mode, the • ThermalShutdownandIndependentCurrent supply current is reduced to less than 0.3 mA typical. Limit Each regulator exhibits approximately 32 mVrms of • AvailableinThermally-EnhancedSON output voltage noise with V = 2.8 V and a 0.01 mF OUT Package:3mmx3mmx1mm noise reduction (NR) capacitor. Applications with analog components that are noise-sensitive, such as APPLICATIONS portable RF electronics, will benefit from high PSRR, low noise, and fast line and load transient features. • CellularandCordlessPhones The TPS712 family is offered in a thin 3mm x 3mm • WirelessPDA/HandheldProducts SON package and is fully specified from -40°C to • PCMCIA/WirelessLANApplications +125°C(T ). J • DigitalCamera/Camcorder/InternetAudio • DSP/FPGA/ASIC/ControllersandProcessors PSRR(RIPPLEREJECTION)vsFREQUENCY 80 70 I =250mA OUT DRC PACKAGE 60 3mm x 3mm SON (TOP VIEW) B) 50 d IN 1 10 EN1 R( 40 NC 2 9 FB1/NC SR IOUT=1mA P 30 OUT1 3 8 EN2 OUT2 4 7 FB2/NC 20 V =2.8V GND 5 6 NR 10 COOUUTT=2.2m F C =0.01m F NR 0 10 100 1k 10k 100k 1M 10M Frequency(Hz) 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2004–2010,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

TPS71202, TPS71219 TPS71229, TPS71247 TPS71256, TPS71257 SBVS049D–MAY2004–REVISEDAUGUST2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage. ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemore susceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications. ORDERINGINFORMATION(1) VOLTAGE(V) PACKAGE- SPECIFIED LEAD TEMPERATURE PACKAGE ORDERING TRANSPORT PRODUCT V V (DESIGNATOR) RANGE(T ) MARKING NUMBER MEDIA,QUANTITY OUT1 OUT2 J TPS71202DRCT TapeandReel,250 TPS71202 Adjustable Adjustable SON-10(DRC) -40°Cto+125°C ARQ TPS71202DRCR TapeandReel,3000 TPS71219DRCT TapeandReel,250 TPS71219 1.8V Adjustable SON-10(DRC) -40°Cto+125°C ARW TPS71219DRCR TapeandReel,3000 TPS71229DRCT TapeandReel,250 TPS71229 2.8V Adjustable SON-10(DRC) -40°Cto+125°C ARU TPS71229DRCR TapeandReel,3000 TPS71247DRCT TapeandReel,250 TPS71247 1.8V 2.85V SON-10(DRC) -40°Cto+125°C ARS TPS71247DRCR TapeandReel,3000 TPS71256DRCT TapeandReel,250 TPS71256 2.8V 2.8V SON-10(DRC) -40°Cto+125°C ARV TPS71256DRCR TapeandReel,3000 TPS71257DRCT TapeandReel,250 TPS71257 2.85V 2.85V SON-10(DRC) -40°Cto+125°C ART TPS71257DRCR TapeandReel,3000 (1) Forthemostcurrentpackageandorderinginformation,seethePackageOrderingAddendumlocatedattheendofthisdatasheet. ABSOLUTE MAXIMUM RATINGS overoperatingjunctiontemperaturerangeunlessotherwisenoted(1) TPS712xx UNIT V range -0.3to6.0 V IN V ,V range -0.3toV +0.3 V EN1 EN2 IN V range -0.3to6.0 V OUT Peakoutputcurrent Internallylimited Outputshort-circuitduration Indefinite Continuoustotalpowerdissipation SeeDissipationRatingsTable Junctiontemperaturerange,T -40to+150 °C J Storagetemperaturerange -65to+150 °C ESDrating,HBM 2 kV ESDrating,CDM 500 V (1) Stressesbeyondthoselistedunderabsolutemaximumratingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedundertheElectricalCharacteristics isnotimplied.Exposuretoabsolutemaximumratedconditionsforextendedperiodsmayaffectdevicereliability. THERMAL INFORMATION TPS712xx THERMALMETRIC(1)(2) UNITS DRC(10PINS) q Junction-to-ambientthermalresistance 49.6 JA q Junction-to-case(top)thermalresistance 70.0 JCtop q Junction-to-boardthermalresistance 17.8 JB °C/W y Junction-to-topcharacterizationparameter 0.6 JT y Junction-to-boardcharacterizationparameter 15.2 JB q Junction-to-case(bottom)thermalresistance 5.2 JCbot (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953. (2) ForthermalestimatesofthisdevicebasedonPCBcopperarea,seetheTIPCBThermalCalculator. 2 SubmitDocumentationFeedback Copyright©2004–2010,TexasInstrumentsIncorporated ProductFolderLink(s):TPS71202TPS71219 TPS71229 TPS71247TPS71256 TPS71257

TPS71202, TPS71219 TPS71229, TPS71247 TPS71256, TPS71257 www.ti.com SBVS049D–MAY2004–REVISEDAUGUST2010 ELECTRICAL CHARACTERISTICS Overoperatingtemperaturerange(T =-40°Cto+125°C),V =highestV +1.0Vor2.7V(whicheverisgreater), J IN OUT(nom) I =1mA,V =1.2V,C =10mF,C =0.01mF,andadjustableLDOsaretestedatV =3.0V,unlessotherwise OUT EN1,2 OUT NR OUT noted.TypicalvaluesareatT =+25°C. J PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V Inputvoltagerange(1) 2.7 5.5 V IN V Internalreference(adjustableLDOs) 1.200 1.225 1.250 V FB Outputvoltagerange V 5.5-V V (adjustableLDOs) FB DO V Nominal T =+25°C,I =0mA -1.5 +1.5 OUT J OUT Accuracy(1) OverV , V +1.0V≤V ≤5.5V, % IN OUT IN -3 ±1 +3 I ,andT 0mA≤I ≤250mA OUT OUT ΔV %/ΔV Lineregulation(1) V +1.0V≤V ≤5.5V 0.05 %/V OUT IN OUT IN ΔV %/ΔI OUT OU Loadregulation 0mA≤I ≤250mA 0.8 %/mA OUT T Dropoutvoltage(2) 2.8V, V 2.85V I =I =250mA 125 230 mV DO (V =V -0.1V) OUT1 OUT2 IN OUT(nom) Adjustable I Outputcurrentlimit V =0.9×V 400 600 800 mA CL OUT OUT(nom) OneLDO I =1mA(enabledchannel) 190 250 enabled OUT I Groundpincurrent mA GND BothLDOs I =I =1mAto250mA 300 600 enabled OUT1 OUT2 I Shutdowncurrent(3) V ≤0.4V,0V≤V ≤5.5V 0.3 2.0 mA SHDN EN IN I FBpincurrent(adjustableLDOs) 0.1 1 mA FB Outputnoisevoltage, NoCNR,IOUT=250mA 80.0×VOUT V mVrms n BW=10Hz-100kHz C =0.01mF,I =250mA 11.8×V NR OUT OUT Power-supplyrejectionratio f=100Hz,IOUT=250mA 65 PSRR dB (ripplerejection) f=10kHz,I =250mA 65 OUT t Startuptime V =2.85V,R =30Ω,C =0.001mF 60 ms STR OUT L NR V Enablethresholdhigh(EN1,EN2) 1.2 V V IH IN V Enablethresholdlow(EN1,EN2) 0 0.4 V IL I Enablepincurrent(EN1,EN2) V =V =5.5V -1 1 mA EN IN EN Shutdown Tempincreasing +160 T Thermalshutdowntemperature °C SD Reset Tempdecreasing +140 Undervoltagelockoutthreshold V rising 2.25 2.65 V IN UVLO Undervoltagelockouthysteresis V falling 100 mV IN (1) MinimumV =V +V or2.7V,whicheverisgreater. IN OUT DO (2) V isnotmeasuredfor1.8VregulatorssinceminimumV =2.7V. DO IN (3) Fortheadjustableversion,thisappliesonlyafterV isapplied;thenV transitionsfromhightolow. IN EN Copyright©2004–2010,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLink(s):TPS71202TPS71219 TPS71229 TPS71247TPS71256 TPS71257

TPS71202, TPS71219 TPS71229, TPS71247 TPS71256, TPS71257 SBVS049D–MAY2004–REVISEDAUGUST2010 www.ti.com FUNCTIONALBLOCKDIAGRAM— FUNCTIONALBLOCKDIAGRAM— FIXEDVERSION ADJUSTABLEVERSION IN OUT1 IN OUT1 Current 30m A Current Limit Limit 90 kW EN1 EN1 FB1 Thermal Thermal Shutdown Shutdown OUT2 OUT2 Current 30m A Current UVLO Limit UVLO Limit 90 kW FB2 EN2 EN2 250kW 250kW VREF NR VREF NR 1.225V 5pF TPS712xx 1.225V 5pF TPS712xx Quickstart Fixed/Fixed Quickstart Adj/Adj Table1. TERMINALFUNCTIONS TERMINAL DESCRIPTION NAME DRC IN 1 Unregulatedinputsupply.Asmall0.1mFcapacitorshouldbeconnectedfromINtoGND. GND 5,Pad Ground Outputoftheregulator.Asmall2.2mFceramiccapacitorisrequiredfromthispintogroundtoassure OUT1 3 stability. OUT2 4 SameasOUT1butforLDO2. Drivingtheenablepin(EN)highturnsonLDO1.DrivingthispinlowputsLDO1intoshutdownmode, EN1 10 reducingoperatingcurrent.TheenablepinshouldbeconnectedtoINifnotused. EN2 8 SameasEN1butcontrolsLDO2. FB1/NC 9 FeedbackforCH1adjustableversion;noconnectionfornon-adjustableCH1. FB2/NC 7 FeedbackforCH2adjustableversion;noconnectionfornon-adjustableCH2. NR 6 Noisereductionpin;connectanexternalbypasscapacitortoreduceLDOoutputnoise. NC 2 Noconnection. 4 SubmitDocumentationFeedback Copyright©2004–2010,TexasInstrumentsIncorporated ProductFolderLink(s):TPS71202TPS71219 TPS71229 TPS71247TPS71256 TPS71257

TPS71202, TPS71219 TPS71229, TPS71247 TPS71256, TPS71257 www.ti.com SBVS049D–MAY2004–REVISEDAUGUST2010 TYPICAL CHARACTERISTICS ForallvoltageversionsatT =25°C,V =V +1V,I =1mA,V =1.2V,C =2.2mF,andC =0.01mF, J IN OUT(nom) OUT EN OUT NR unlessotherwisenoted. OUTPUTVOLTAGEvsINPUTVOLTAGE OUTPUTVOLTAGEvsOUTPUTCURRENT 1.0 1.0 0.8 0.8 0.6 0.6 0.4 0.4 +25(cid:1)C +25(cid:1)C %) 0.2 %) 0.2 V(OUT- 0.02 V(OUT - 0.02 - 40(cid:1)C +125(cid:1)C - 0.4 - 0.4 - 0.6 - 0.6 - 0.8 - 40(cid:1)C - 0.8 +125(cid:1)C - 1.0 - 1.0 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0 50 100 150 200 250 V (V) I (mA) IN OUT Figure1. Figure2. DROPOUTVOLTAGEvsINPUTVOLTAGE OUTPUTVOLTAGEvsTEMPERATURE (ADJUSTABLEVERSION) 1.0 200 180 0.5 160 IOUT=10mA mV) 140 TJ=+125(cid:1)C ( %) 0 age 120 T =+25(cid:1)C (UT IOUT=125mA Volt 100 J VO- 0.5 ut 80 o p o 60 - 1.0 IOUT=250mA Dr 40 TJ=- 40(cid:1)C 20 - 1.5 0 - 40 - 25 - 10 5 20 35 50 65 80 95 110 125 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 JunctionTemperature((cid:1)C) VIN(V) Figure3. Figure4. TPS71256 TPS71256 DROPOUTVOLTAGEvsOUTPUTCURRENT DROPOUTVOLTAGEvsJUNCTIONTEMPERATURE 200 250 T =+125(cid:1)C J 200 V) 150 V) m m ( ( ge ge 150 Volta 100 Volta IOUT=250mA ut ut 100 opo TJ=+25(cid:1)C TJ=- 40(cid:1)C opo Dr 50 Dr 50 0 0 0 50 100 150 200 250 - 40 - 25 - 10 5 20 35 50 65 80 95 110 125 I (mA) Junction Temperature (°C) OUT Figure5. Figure6. Copyright©2004–2010,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLink(s):TPS71202TPS71219 TPS71229 TPS71247TPS71256 TPS71257

TPS71202, TPS71219 TPS71229, TPS71247 TPS71256, TPS71257 SBVS049D–MAY2004–REVISEDAUGUST2010 www.ti.com TYPICAL CHARACTERISTICS (continued) ForallvoltageversionsatT =25°C,V =V +1V,I =1mA,V =1.2V,C =2.2mF,andC =0.01mF, J IN OUT(nom) OUT EN OUT NR unlessotherwisenoted. GROUNDPINCURRENTvsINPUTVOLTAGE GROUNDPINCURRENTvsI OUT 400 400 375 375 350 350 +125(cid:1)C 325 325 A) A) +125(cid:1)C m( 300 m( 300 D D N N IG 275 IG 275 250 +25(cid:1)C - 40(cid:1)C 250 - 40(cid:1)C +25(cid:1)C 225 225 200 200 2.7 3.2 3.7 4.2 4.7 5.2 5.7 0 50 100 150 200 250 V (V) I (mA) IN OUT Figure7. Figure8. GROUNDPINCURRENTvsJUNCTIONTEMPERATURE GROUNDPINCURRENTvsJUNCTIONTEMPERATURE (DISABLED) 400 500 VEN1=VEN2=1.2V 450 VEN1=VEN2=0.4V 375 VIN =3.8V 400 VIN =3.8V 350 350 A) 325 A) 300 n m( 300 ( 250 D D N N IG 275 IG 200 150 250 100 225 50 200 0 - 40 - 25 - 10 5 20 35 50 65 80 95 110 125 - 40 - 25 - 10 5 20 35 50 65 80 95 110 125 JunctionTemperature((cid:1)C) JunctionTemperature((cid:1)C) Figure9. Figure10. TPS71256 CURRENTLIMITvsJUNCTIONTEMPERATURE LINETRANSIENTRESPONSE 800 VIN=3.8V COUT1=COUT2=10m F 750 3.8V V 700 IN A) 3.2V m 650 ( mit Li 600 urrent 550 10mV/div IOUT=250mA VOUT1 C 500 I =1mA 10mV/div OUT VOUT2 450 400 - 40 - 25 - 10 5 20 35 50 65 80 95 110 125 100m s/div JunctionTemperature((cid:1)C) Figure11. Figure12. 6 SubmitDocumentationFeedback Copyright©2004–2010,TexasInstrumentsIncorporated ProductFolderLink(s):TPS71202TPS71219 TPS71229 TPS71247TPS71256 TPS71257

TPS71202, TPS71219 TPS71229, TPS71247 TPS71256, TPS71257 www.ti.com SBVS049D–MAY2004–REVISEDAUGUST2010 TYPICAL CHARACTERISTICS (continued) ForallvoltageversionsatT =25°C,V =V +1V,I =1mA,V =1.2V,C =2.2mF,andC =0.01mF, J IN OUT(nom) OUT EN OUT NR unlessotherwisenoted. TPS71256 LOADTRANSIENTRESPONSE TPS71256 ANDV CROSSTALK CHANNEL-TO-CHANNELISOLATIONvsFREQUENCY OUT2 60 C =10m F OUT2 2mV/div V OUT2 50 C =10m F dB) 100mV/div OUT1 VOUT1 on( 40 ati sol 30 I el 250mA n an 20 h C 200mA/div 10mA IOUT1 10 CI OUT1==0CmOAUTt2o=51000mmFASinusoidalLoad OUT1 I =25mA OUT2 0 20m s/div 0.1 1 10 100 1k Frequency(Hz) Figure13. Figure14. TPS71256 TURN-ON/OFFRESPONSE TPS71229 ANDV CROSSTALK POWER-UP/POWER-DOWN OUT2 CNR=0.01m F IOUT1=IOUT2=250mA IOUT1=IOUT2=250mA C =C =10m F OUT1 OUT2 20mV/div V OUT2 V IN CNR=0.001m F V/div VOUT1 1 V OUT2 V OUT1 1V/div V EN1 50m s/div 50ms/div Figure15. Figure16. NOISESPECTRALDENSITY TOTALNOISEvsC C =2.2mF NR OUT 250 350 COUT=2.2m F VOUT=2.8V CNR=0.1m F mse(Vrms) 210500 ICOUOTUT==25100mmIFOAUT=250mCAIOOUUTT==20.2mmAF √Density(nV/Hz) 322050000 IOUT=250mA IOUT=VO1UmT=A2.8V TotalNoi 10500 CIOOUUTT==010mmAF ectralNoise 115000 Sp 50 0 0 1 10 100 1k 10k 100k 100 1k 10k 100k C (pF) Frequency(Hz) NR Figure17. Figure18. Copyright©2004–2010,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLink(s):TPS71202TPS71219 TPS71229 TPS71247TPS71256 TPS71257

TPS71202, TPS71219 TPS71229, TPS71247 TPS71256, TPS71257 SBVS049D–MAY2004–REVISEDAUGUST2010 www.ti.com TYPICAL CHARACTERISTICS (continued) ForallvoltageversionsatT =25°C,V =V +1V,I =1mA,V =1.2V,C =2.2mF,andC =0.01mF, J IN OUT(nom) OUT EN OUT NR unlessotherwisenoted. NOISESPECTRALDENSITY C =10mF NOISESPECTRALDENSITYvsC OUT NR 350 2.0 CNR=0.1m F COUT=10m F Hz) 300 VOUT=2.8V Hz)1.75 IOUT=250mA √V/ √V/ 1.5 VOUT=2.8V n 250 NoiseDensity( 210500 IOUT=250mA IOUT=10mA mNoiseDensity(10.1.27.505 0.047m0F.01m F 0.001m F Spectral 10500 Spectral00.2.55 0.1m F 0 0 100 1k 10k 100k 100 1k 10k 100k Frequency(Hz) Frequency(Hz) Figure19. Figure20. PSRR(RIPPLEREJECTION)vsFREQUENCY PSRR(RIPPLEREJECTION)vsFREQUENCY 80 80 I =1mA OUT 70 70 I =250mA OUT 60 60 B) 50 B) 50 d d R( 40 R( 40 R I =1mA R S OUT S P 30 P 30 I =250mA OUT 20 20 V =2.8V V =2.8V OUT OUT 10 CCOUT==02.0.21mm FF 10 CCOUT==01.001mmFF NR NR 0 0 10 100 1k 10k 100k 1M 10M 10 100 1k 10k 100k 1M 10M Frequency(Hz) Frequency(Hz) Figure21. Figure22. PSRR(RIPPLEREJECTION)vsV -V IN OUT 80 70 f=1kHz 60 dB) 50 f=10kHz R( 40 R S P 30 f=100kHz 20 VOUT=2.8V I =250mA OUT 10 COUT=10m F C =0.01m F NR 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 V - V (V) IN OUT Figure23. 8 SubmitDocumentationFeedback Copyright©2004–2010,TexasInstrumentsIncorporated ProductFolderLink(s):TPS71202TPS71219 TPS71229 TPS71247TPS71256 TPS71257

TPS71202, TPS71219 TPS71229, TPS71247 TPS71256, TPS71257 www.ti.com SBVS049D–MAY2004–REVISEDAUGUST2010 APPLICATION INFORMATION 1.8 V or less is chosen, the minimum recommended The TPS712xx family of dual low-dropout (LDO) output capacitor is 4.7 mF. Any ceramic capacitor that regulators has been optimized for use in meets the minimum output capacitor requirements is noise-sensitive battery-operated equipment. The suitable. Capacitors with higher ESR may be used, device features extremely low dropout, high PSRR, providedtheESRislessthan1Ω. ultralow output noise, and low quiescent current (190 mA typical per channel). When both outputs are OUTPUT NOISE disabled, the supply currents are reduced to less than 2 mA. A typical application circuit is shown in The internal voltage reference is a key source of Figure24. noise in an LDO regulator. The TPS712xx has an NR pin that is connected to the voltage reference through TPS712xx a 250 kΩ internal resistor. The 250 kΩ internal VIN IN OUT1 VOUT1 resistor, in conjunction with an external ceramic 2.2m F bypass capacitor connected to the NR pin, creates a low-pass filter to reduce the voltage reference noise and, therefore, the noise at the regulator output. To 0.1m F EN1 OUT2 VOUT2 achieve a fast startup, the 250 kΩ internal resistor is EN2 NR 2.2m F shortedfor400msafterthedeviceisenabled. GND 0.01m F Because the primary noise source is the internal voltage reference, the output noise will be greater for higher output voltage versions. For the case where no noise reduction capacitor is used, the typical noise Figure24. TypicalApplicationCircuit (mVrms) over 10 Hz to 100 kHz is 80 times the output (fixed-voltageversions) voltage. If a 0.01 mF capacitor is used from the NR pin to ground, the noise (mVrms) drops to 11.8 times INPUT AND OUTPUT CAPACITOR the output voltage. For example, the TPS71256 REQUIREMENTS exhibits only 33 mVrms of output voltage noise using a 0.01 mF ceramic bypass capacitor and a 2.2 mF A 0.1 mF or larger ceramic input bypass capacitor, ceramicoutputcapacitor. connected between IN and GND and located close to the TPS712xx, is required for stability. It improves STARTUP CHARACTERISITCS transient response, noise rejection, and ripple rejection. A higher-value input capacitor may be To minimize startup overshoot, the TPS712xx will necessary if large, fast-rise-time load transients are initially target an output voltage that is approximately anticipated and the device is located several inches 80% of the final value. To avoid a delayed startup fromthepowersource. time, noise reduction capacitors of 0.01 mF or less are recommended. Larger noise reduction capacitors The TPS712xx requires an output capacitor will cause the output to hold at 80% until the voltage connected between the outputs and GND to stabilize on the noise reduction capacitor exceeds 80% of the the internal control loops. The minimum bandgap voltage. The typical startup time with a recommended output capacitor is 2.2 mF. If an output 0.001 mF noise reduction capacitor is 60 ms. Once voltage of one of the output voltages is present, the startup time of the other output will not be affected by the noise reductioncapacitor. Copyright©2004–2010,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLink(s):TPS71202TPS71219 TPS71229 TPS71247TPS71256 TPS71257

TPS71202, TPS71219 TPS71229, TPS71247 TPS71256, TPS71257 SBVS049D–MAY2004–REVISEDAUGUST2010 www.ti.com PROGRAMMING THE TPS71202 (3(cid:1)105)(cid:1)(R1(cid:2)R2) C1(cid:3) (pF) ADJUSTABLE LDO REGULATOR (R1(cid:1)R2) (3) The output voltage of the TPS71202 dual adjustable blank regulator is programmed using an external resistor divider, as shown in Figure 25. The output voltage is The suggested value of this capacitor for several calculatedusingEquation1: resistor ratios is shown in Figure 25. If this capacitor (cid:4) (cid:5) is not used (such as in a unity-gain configuration) or if V (cid:3)V (cid:1) 1(cid:2)R1 an output voltage ≤ 1.8 V is chosen, then the OUT REF R2 (1) minimum recommended output capacitor is 4.7 mF where V = 1.225 V (the internal reference insteadof2.2mF. REF voltage). DROPOUT VOLTAGE Resistors R2 and R4 should be chosen for approximately a 40 mA divider current. Lower value The TPS712xx uses a PMOS pass transistor to resistors can be used for improved noise achieve extremely low dropout. When (VIN - VOUT) is performance, but will consume more power. Higher less than the dropout voltage (VDO), the PMOS pass values should be avoided because leakage current at device is in its linear region of operation and the FB increases the output voltage error. The input-to-output resistance is the RDS, ON of the PMOS recommended design procedure is to choose R2 = pass element. Dropout voltages at lower currents can 30.1 kΩ to set the divider current at 40 mA, and then be approximated by calculating the effective RDS, ON calculateR1usingEquation2: ofthepasselementandmultiplyingthatresistanceby (cid:4) (cid:5) the load current. R of the pass element can be V DS, ON R1(cid:3) OUT(cid:2)1 (cid:1)R2 obtained by dividing the dropout voltage by the rated V output current. For the TPS71256, the R of the REF (2) DS, ON pass element is 84 mΩ. The dropout voltage of the To improve the stability and noise performance of the TPS712xx will be less for higher output voltage adjustable version, a small compensation capacitor versions. This is because the PMOS pass element canbeplacedbetweenOUTandFB. will have lower on-resistance due to increased gate drive. For voltages ≤ 1.8 V, the value of this capacitor should be 100 pF. For voltages > 1.8 V, the approximate value of this capacitor can be calculated asEquation3: TPS71202 VIN IN OUT1 VOUT1 Output Voltage Programming Guide R1 C1 2.2m F VOUT R1/R3 R2/R4 C1/C2 FB1 EN1 R2 1.225 V Short Open Open 0.1m F EN2 1.5 V 7.15 kW 30.1 kW 100 pF OUT2 VOUT2 2.5 V 31.6 kW 30.1 kW 22 pF R3 C2 2.2m F 3.0 V 43.2 kW 30.1 kW 15 pF NR GND FB2 3.3 V 49.9 kW 30.1 kW 15 pF 0.01m F R4 4.75 V 86.6 kW 30.1 kW 15 pF Figure25. TPS71202AdjustableLDORegulatorProgramming 10 SubmitDocumentationFeedback Copyright©2004–2010,TexasInstrumentsIncorporated ProductFolderLink(s):TPS71202TPS71219 TPS71229 TPS71247TPS71256 TPS71257

TPS71202, TPS71219 TPS71229, TPS71247 TPS71256, TPS71257 www.ti.com SBVS049D–MAY2004–REVISEDAUGUST2010 TRANSIENT RESPONSE enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal As with any regulator, increasing the size of the protection circuit may cycle on and off. This limits the output capacitor will reduce over/undershoot dissipation of the regulator, protecting it from damage magnitude but increase duration of the transient duetooverheating. response. In the adjustable version, the addition of a capacitor, C , from the output to the feedback pin Any tendency to activate the thermal protection circuit FB will also improve stability and transient response. The indicates excessive power dissipation or an transient response of the TPS712xx is enhanced with inadequate heatsink. For reliable operation, junction an active pull-down that engages when the output is temperature should be limited to +125°C maximum. over-voltaged. The active pull-down decreases the Toestimatethemarginofsafetyinacompletedesign output recovery time when the load is removed. (including heatsink), increase the ambient Figure13intheTypicalCharacteristicssectionshows temperature until the thermal protection is triggered; theoutputtransientresponse. use worst-case loads and signal conditions. For good reliability, thermal protection should trigger at least SHUTDOWN +35°C above the maximum expected ambient condition of your application. This produces a Both enable pins are active high and are compatible worst-case junction temperature of +125°C at the with standard TTL-CMOS levels. The device is only highest expected ambient temperature and completely disabled when both EN1 and EN2 are worst-caseload. logic low. In this state, the LDO is completely off and the ground pin current drops to approximately 100 The internal protection circuitry of the TPS712xx was nA. With one output disabled, the ground pin current designed to protect against overload conditions. It is slightly greater than half the nominal value. When was not intended to replace proper heatsinking. shutdown capability is not required, the enable pins Continuously running the TPS712xx into thermal shouldbeconnectedtotheinputsupply. shutdownwilldegradedevicereliability. INTERNAL CURRENT LIMIT POWER DISSIPATION The TPS712xx internal current limit helps protect the The ability to remove heat from the die is different for regulator during fault conditions. During current limit, each package type, presenting different the output will source a fixed amount of current that is considerations in the PCB layout. The PCB area largelyindependentoftheoutputvoltage. around the device that is free of other components moves the heat from the device to the ambient air. The TPS712xx PMOS-pass transistors have a built-in Performance data for a JEDEC high-K board is back diode that conducts reverse current when the shown in the Dissipation Ratings table. Using heavier input voltage drops below the output voltage (that is, copper will increase the effectiveness in removing during power-down). Current is conducted from the heat from the device. The addition of plated output to the input and is not internally limited. If through-holes to heat-dissipating layers will also extended reverse voltage operation is anticipated, improvetheheat-sinkeffectiveness. externallimitingmaybeappropriate. Power dissipation depends on input voltage and load THERMAL PROTECTION conditions. Power dissipation (P ) is equal to the D product of the output current times the voltage drop Thermal protection disables both outputs when the acrosstheoutputpasselement(V toV ): IN OUT junction temperature of either channel rises to P (cid:3)(V (cid:2)V )(cid:1)I approximately +160°C, allowing the device to cool. D IN OUT OUT (4) When the junction temperature cools to Power dissipation can be minimized by using the approximately +140°C, the output circuitry is again lowest possible input voltage necessary to assure the requiredoutputvoltage. Copyright©2004–2010,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLink(s):TPS71202TPS71219 TPS71229 TPS71247TPS71256 TPS71257

TPS71202, TPS71219 TPS71229, TPS71247 TPS71256, TPS71257 SBVS049D–MAY2004–REVISEDAUGUST2010 www.ti.com REVISION HISTORY NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionC(July,2005)toRevisionD Page • ReplacedtheDissipationRatingstablewiththeThermalInformationtable ........................................................................ 3 12 SubmitDocumentationFeedback Copyright©2004–2010,TexasInstrumentsIncorporated ProductFolderLink(s):TPS71202TPS71219 TPS71229 TPS71247TPS71256 TPS71257

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS71202DRCR ACTIVE VSON DRC 10 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ARQ & no Sb/Br) TPS71202DRCRG4 ACTIVE VSON DRC 10 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ARQ & no Sb/Br) TPS71202DRCT ACTIVE VSON DRC 10 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ARQ & no Sb/Br) TPS71202DRCTG4 ACTIVE VSON DRC 10 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ARQ & no Sb/Br) TPS71219DRCR ACTIVE VSON DRC 10 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ARW & no Sb/Br) TPS71219DRCRG4 ACTIVE VSON DRC 10 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ARW & no Sb/Br) TPS71219DRCT ACTIVE VSON DRC 10 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ARW & no Sb/Br) TPS71229DRCR ACTIVE VSON DRC 10 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ARU & no Sb/Br) TPS71229DRCT ACTIVE VSON DRC 10 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ARU & no Sb/Br) TPS71229DRCTG4 ACTIVE VSON DRC 10 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ARU & no Sb/Br) TPS71247DRCR ACTIVE VSON DRC 10 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ARS & no Sb/Br) TPS71247DRCT ACTIVE VSON DRC 10 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ARS & no Sb/Br) TPS71256DRCT ACTIVE VSON DRC 10 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ARV & no Sb/Br) TPS71256DRCTG4 ACTIVE VSON DRC 10 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ARV & no Sb/Br) TPS71257DRCR ACTIVE VSON DRC 10 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ART & no Sb/Br) TPS71257DRCT ACTIVE VSON DRC 10 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ART & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2015 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS71202DRCR VSON DRC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS71202DRCT VSON DRC 10 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS71219DRCR VSON DRC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS71219DRCT VSON DRC 10 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS71229DRCR VSON DRC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS71229DRCT VSON DRC 10 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS71247DRCR VSON DRC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS71247DRCT VSON DRC 10 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS71256DRCT VSON DRC 10 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS71257DRCR VSON DRC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS71257DRCT VSON DRC 10 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2015 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS71202DRCR VSON DRC 10 3000 367.0 367.0 35.0 TPS71202DRCT VSON DRC 10 250 210.0 185.0 35.0 TPS71219DRCR VSON DRC 10 3000 367.0 367.0 35.0 TPS71219DRCT VSON DRC 10 250 210.0 185.0 35.0 TPS71229DRCR VSON DRC 10 3000 367.0 367.0 35.0 TPS71229DRCT VSON DRC 10 250 210.0 185.0 35.0 TPS71247DRCR VSON DRC 10 3000 367.0 367.0 35.0 TPS71247DRCT VSON DRC 10 250 210.0 185.0 35.0 TPS71256DRCT VSON DRC 10 250 210.0 185.0 35.0 TPS71257DRCR VSON DRC 10 3000 367.0 367.0 35.0 TPS71257DRCT VSON DRC 10 250 210.0 185.0 35.0 PackMaterials-Page2

GENERIC PACKAGE VIEW DRC 10 VSON - 1 mm max height PLASTIC SMALL OUTLINE - NO LEAD Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4204102-3/M

PACKAGE OUTLINE DRC0010K VSON - 1 mm max height SCALE 4.000 PLASTIC SMALL OUTLINE - NO LEAD 3.1 B A 2.9 PIN 1 INDEX AREA 3.1 2.9 0.1 MIN (0.05) SECTSSCEACLTEIO 3N0 . 0A0-A0ION A-A TYPICAL C 1 MAX SEATING PLANE 0.08 C 0.05 0.00 (0.2) TYP EXPOSED 1.65 0.1 THERMAL PAD 5 6 A A 2X 2 2.4 0.1 10 1 8X 0.5 0.3 10X 0.2 (OPTPIIONN 1A ILD) 10X 00..53 0.1 C A B 0.05 C 4222059/B 02/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. www.ti.com

EXAMPLE BOARD LAYOUT DRC0010K VSON - 1 mm max height PLASTIC SMALL OUTLINE - NO LEAD (1.65) 10X (0.6) SYMM 1 10 10X (0.25) (2.4) 8X (0.5) (0.95) (R0.05) TYP 5 6 (0.575) ( 0.2) VIA TYP (2.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:20X 0.07 MAX 0.07 MIN ALL AROUND ALL AROUND EXPOSED METAL EXPOSED METAL SOLDER MASK METAL EDGE METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4222059/B 02/2018 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). www.ti.com

EXAMPLE STENCIL DESIGN DRC0010K VSON - 1 mm max height PLASTIC SMALL OUTLINE - NO LEAD 10X (0.6) SYMM METAL TYP 10X (0.25) 1 10 (0.635) 8X (0.5) (1.07) 5 6 (R0.05) TYP (1.5) (2.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 81% PRINTED SOLDER COVERAGE BY AREA SCALE:25X 4222059/B 02/2018 NOTES: (continued) 5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

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