(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 (cid:3)(cid:11)(cid:1)(cid:6)(cid:10) (cid:3)(cid:1)(cid:12)(cid:2)(cid:13)(cid:14)(cid:11)(cid:15)(cid:16) (cid:17)(cid:11)(cid:16)(cid:1)(cid:18)(cid:11)(cid:19)(cid:19)(cid:12)(cid:18) (cid:1) FEATURES Low Power DSP Supply (cid:1) (cid:1) Digital Cameras Step-Down Controller for Applications With (cid:1) up to 95% Efficiency Hard Disk Drives (cid:1) 1.8-V to 6.5-V Operating Input Voltage Range (cid:1) Portable Audio Players (cid:1) Adjustable Output Voltage Range From 1.2 V DESCRIPTION to V I (cid:1) High Efficiency Over a Wide Load Current The TPS6420x are nonsynchronous step-down Range controllers that are ideally suited for systems powered (cid:1) 100% Maximum Duty Cycle for Lowest from a 5-V or 3.3-V bus or for applications powered from Dropout a 1-cell Li-Ion battery or from a 2- to 4-cell NiCd, NiMH, or (cid:1) alkaline battery. These step-down controllers drive an Internal Softstart external P-channel MOSFET allowing design flexibility. To (cid:1) 20-µA Quiescent Current (Typical) achieve highest efficiency over a wide load current range, (cid:1) Overcurrent Protected this controller uses a minimum on time, minimum off time (cid:1) control scheme and consumes only 20-µA quiescent Available in a SOT23 Package current. The minimum on time of typically 600 ns (TPS64203) allows the use of small inductors and APPLICATIONS capacitors. When disabled, the current consumption is (cid:1) reduced to less than 1 µA. The TPS6420x is available in USB Powered Peripherals the 6-pin SOT23 (DBV) package and operates over a free (cid:1) Organizers, PDAs, and Handheld PCs air temperature range of −40°C to 85°C. TYPICAL APPLICATION CIRCUIT TPS64200 EFFICIENCY vs 5 V LOAD CURRENT Rs = 33 mΩ 100 10 µF 90 TPS64200 1 EN SW 6 Si5447DC 80 2 GND VIN 5 10 µH VI = 4.2 V 70 3 FB ISENSE 4 3.3 V / 2 A ZHCS2000 R6210 kΩ cy − % 5600 47 µF en R3620 kΩ P6ToPsAC4a7pM Effici 40 30 20 TA = 25°C, 10 VO = 3.3 V 0 0.0001 0.001 0.01 0.1 1 10 IO − Load Current − A Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet. (cid:2)(cid:18)(cid:11)(cid:14)(cid:20)(cid:17)(cid:1)(cid:21)(cid:11)(cid:16) (cid:14)(cid:22)(cid:1)(cid:22) (cid:23)(cid:24)(cid:25)(cid:26)(cid:27)(cid:28)(cid:29)(cid:30)(cid:23)(cid:26)(cid:24) (cid:23)(cid:31) !"(cid:27)(cid:27)#(cid:24)(cid:30) (cid:29)(cid:31) (cid:26)(cid:25) $"%&(cid:23)!(cid:29)(cid:30)(cid:23)(cid:26)(cid:24) ’(cid:29)(cid:30)#( (cid:2)(cid:27)(cid:26)’"!(cid:30)(cid:31) Copyright  2003, Texas Instruments Incorporated !(cid:26)(cid:24)(cid:25)(cid:26)(cid:27)(cid:28) (cid:30)(cid:26) (cid:31)$#!(cid:23)(cid:25)(cid:23)!(cid:29)(cid:30)(cid:23)(cid:26)(cid:24)(cid:31) $#(cid:27) (cid:30))# (cid:30)#(cid:27)(cid:28)(cid:31) (cid:26)(cid:25) (cid:1)#*(cid:29)(cid:31) (cid:21)(cid:24)(cid:31)(cid:30)(cid:27)"(cid:28)#(cid:24)(cid:30)(cid:31) (cid:31)(cid:30)(cid:29)(cid:24)’(cid:29)(cid:27)’ +(cid:29)(cid:27)(cid:27)(cid:29)(cid:24)(cid:30),( (cid:2)(cid:27)(cid:26)’"!(cid:30)(cid:23)(cid:26)(cid:24) $(cid:27)(cid:26)!#(cid:31)(cid:31)(cid:23)(cid:24)- ’(cid:26)#(cid:31) (cid:24)(cid:26)(cid:30) (cid:24)#!#(cid:31)(cid:31)(cid:29)(cid:27)(cid:23)&, (cid:23)(cid:24)!&"’# (cid:30)#(cid:31)(cid:30)(cid:23)(cid:24)- (cid:26)(cid:25) (cid:29)&& $(cid:29)(cid:27)(cid:29)(cid:28)#(cid:30)#(cid:27)(cid:31)(

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION PLASTIC SOT23-6(1) (2) OUTPUT VOLTAGE MINIMUM ON-TIME MINIMUM OFF-TIME MARKING (DBV) Adjustable TPS64200DBVR ON time = 1.6 µs OFF time = 600 ns PJAI 1.2 V to VI Adjustable TPS64201DBVR Variable minimum on time OFF time = 600 ns PJBI 1.2 V to VI Adjustable TPS64202DBVR Variable minimum on time OFF time = 300 ns PJCI 1.2 V to VI Adjustable TPS64203DBVR ON time = 600 ns OFF time = 600 ns PJDI 1.2 V to VI (1)The R suffix indicates shipment in tape and reel with 3000 units per reel. (2)The T suffix indicates a mini reel with 250 units per reel. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted(1) Supply voltage, VIN −0.3 V to 7 V Voltage at EN, SW, ISENSE −0.3 V to VIN Voltage at FB −0.3 V to 3.3 V Maximum junction temperature, TJ 150°C Operating free−air temperature, TA −40°C to 85°C Storage temperature, Tsgt −65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 300°C (1)Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. PACKAGE DISSIPATION RATINGS TA ≤25(cid:1)C DERATING FACTOR TA = 70(cid:1)C TA = 85(cid:1)C PACKAGE POWER RATING ABOVE TA = 25°C POWER RATING POWER RATING SOT23−6 400 mW 4 mW/°C 220 mW 180 mW NOTE: The thermal resistance junction to ambient of the 6−pin SOT23 package is 250°C/W. RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNIT Supply voltage at VIN 1.8 6.5 V Operating junction temperature −40 125 °C 2

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 ELECTRICAL CHARACTERISTICS VIN = 3.8 V, VO = 3.3 V, EN = VIN, TA = −40°C to 85°C (unless otherwise noted) SUPPLY CURRENT PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VI Input voltage range 1.8 6.5 V I(Q) Operating quiescent current IO = 0 mA 20 35 µA I(SD) Shutdown current EN = VI 0.1 1 µA OUTPUT/CURRENT LIMIT VO Adjustable output voltage range VFB VI V VFB Feedback voltage 1.213 V Feedback leakage current 0.01 0.2 µA Feedback voltage tolerance −2 +2 % V(ISENSE) Reference voltage for current limit 90 105 120 mV ISENSE leakage current 0.01 0.2 µA Line regulation Measured with circuit according to Figure 1 0.6 %/V Measured with circuit according to Figure 1 Load regulation 0.6 %/A VI = 3.8 V Measured with circuit according to Figure 1 94% VI = 3.8 V, VO = 3.3 V, IO = 1000 mA ηη EEffffiicciieennccyy Measured with circuit according to Figure 1 80% VI = 3.8 V, VO = 1.2 V, IO = 800 mA IO = 0 mA, Time from active EN to VO, Start-up time 0.25 ms CO = 47 µF GATE DRIVER (SW-PIN) VI ≥ 2.5 V 4 rrDDSS((OONN)) PP--cchhaannnneell MMOOSSFFEETT oonn--rreessiissttaannccee ΩΩ VI = 1.8 V 6 VI ≥ 2.5 V 4 rrDDSS((OONN)) NN--cchhaannnneell MMOOSSFFEETT oonn--rreessiissttaannccee ΩΩ VI = 1.8 V 6 IO Maximum gate drive output current, SW 150 mA ENABLE VIH EN high level input voltage Device is off 1.3 V VIL EN low level input voltage Device is operating 0.3 V EN trip point hysteresis 115 mV Ilkg EN input leakage current EN = GND or VIN 0.01 0.2 µA V(UVLO) Undervoltage lockout threshold 1.7 V ON TIME and OFF TIME TPS64200, TPS64201, TPS64202 1.36 1.6 1.84 ttoonn MMiinniimmuumm oonn ttiimmee µss TPS64203 only 0.56 0.65 0.74 Reduced on time 1 TPS64201,TPS64202 0.80 µs Reduced on time 2 TPS64201,TPS64202 0.40 µs Reduced on time 3 TPS64201,TPS64202 0.20 µs TPS64200,TPS64201, TPS64203 0.44 0.55 0.66 ttooffff MMiinniimmuumm ooffff ttiimmee µss TPS64202 only 0.24 0.3 0.36 3

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 PIN ASSIGNMENTS DBV PACKAGE (TOP VIEW) EN 1 6 SW GND 2 5 VIN FB 3 4 ISENSE Terminal Functions TERMINAL II//OO DDEESSCCRRIIPPTTIIOONN NAME NO. Enable. A logic low enables the converter, logic high forces the device into shutdown mode reducing the supply current EN 1 I to less than 1 µA. FB 3 I Feedback pin. Connect an external voltage divider to this pin to set the output voltage. GND 2 I Ground SW 6 O This pin connects to the gate of an external P-channel MOSFET. ISENSE 4 I Current sense input. Connect the current sense resistor between VIN and ISENSE. (optional) VIN 5 I Supply voltage input FUNCTIONAL BLOCK DIAGRAM VIN EN Logic Minimum ton Timer M (0.2 µs, 0.4 µs, 105 mV Overcurrent 0.8 µs, 1.6 µs) UX ISense Comparator + _ Softstart Minimum toff R Driver SW Timer Q (0.6 µs, 0.3 µs,) S FB Regulation + Comparator _ ton Regulation ton Vref Timer Regulator (3 µs, 15 µs, 16 µs) GND 4

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 TYPICAL CHARACTERISTICS All graphs were generated using the circuit as shown unless otherwise noted. For output voltages other than 3.3 V, the output voltage divider was changed accordingly. Graphs for the TPS64203 were taken using the application circuit shown in Figure 25. VI R(ISENSE) = 33 mΩ CI 10 µF TPS6420x X7R 1 EN SW 6 Si5447DC 2 5 GND VIN CDRH103R−100 3 4 FB ISENSE VO 10 µH R1 Co MBRM120LT3 620 kΩ Cff 47 µF PosCap 4.7 pF 6TPA47M R2 360 kΩ Figure 1. Basic Application Circuit For a 2-A Step-Down Converter TABLE OF GRAPHS FIGURE η Efficiency vs Load current 2 − 5 Output voltage vs Output current 6 − 9 Switching frequency vs Output current 10 − 13 Operating quiescent current vs Input voltage 14 Output voltage ripple 15 Line transient response Using circuit according to Figure 1 16 Load transient response Using circuit according to Figure 1 17 Start-up timing Using circuit according to Figure 1 18 5

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 TPS64200 TPS64201 EFFICIENCY EFFICIENCY vs vs LOAD CURRENT LOAD CURRENT 100 100 VI = 3.6 V VI = 3.6 V 90 90 80 VI = 4.2 V 80 VI = 4.2 V 70 VI = 6 V VI = 5 V 70 VI = 5 V % % Efficiency − 456000 Efficiency − 456000 VI = 6 V 30 30 20 20 10 TA = 25°C, 10 TVAO == 235.3°C V, VO = 3.3 V 0 0 0.0001 0.001 0.01 0.1 1 10 0.0001 0.001 0.01 0.1 1 10 IO − Load Current − A IO − Load Current − A Figure 2 Figure 3 TPS64202 TPS64203 EFFICIENCY EFFICIENCY vs vs LOAD CURRENT LOAD CURRENT 100 100 VI = 3.6 V TA = 25°C, VI = 1.8 V VI = 2.5 V 90 90 VO = 1.2 V 80 VI = 4.2 V 80 VI = 5 V 70 70 % % − 60 VI = 6 V − 60 VI = 3.6 V y y enc 50 enc 50 VI = 6 V VI = 5 V ci ci Effi 40 Effi 40 30 30 20 20 TA = 25°C, 10 VO = 3.3 V 10 0 0 0.0001 0.001 0.01 0.1 1 10 0.0001 0.001 0.01 0.1 1 10 IO − Load Current − A IO − Load Current − A Figure 4 Figure 5 6

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 TPS64200 TPS64201 OUTPUT VOLTAGE OUTPUT VOLTAGE vs vs OUTPUT CURRENT OUTPUT CURRENT 3.40 3.40 TA = 25°C, TA = 25°C, 3.38 3.38 VO = 3.3 V VO = 3.3 V − V 33..3346 VI = 6 V VI = 5 V VI = 4.2 V − V 33..3346 VI = 6 V VI = 5 VVI = 4.2 V e e g g a a olt 3.32 olt 3.32 V V utput 3.30 VI = 3.6 V utput 3.30 VI = 3.6 V O 3.28 O 3.28 − − O O V 3.26 V 3.26 3.24 3.24 3.22 3.22 3.20 3.20 0.0001 0.001 0.01 0.1 1 10 0.0001 0.001 0.01 0.1 1 10 IO − Output Current − A IO − Output Current − A Figure 6 Figure 7 TPS64202 TPS64203 OUTPUT VOLTAGE OUTPUT VOLTAGE vs vs OUTPUT CURRENT OUTPUT CURRENT 3.40 3.38 TVAO == 235.3°C V, VI = 6 V VI = 5 V 1.29 TVAO == 215.2°C V, 3.36 1.27 V V − 3.34 − age age 1.25 VI = 3.6 V VI = 5 V olt 3.32 olt VI = 6 V V V put 3.30 VI = 3.6 V put 1.23 ut ut − O 3.28 VI = 4.2 V − O 1.21 O O V 3.26 V 1.19 VI = 1.8 V VI = 2.5 V 3.24 1.17 3.22 3.20 1.15 0.0001 0.001 0.01 0.1 1 10 0.0001 0.001 0.01 0.1 1 10 IO − Output Current − A IO − Output Current − A Figure 8 Figure 9 7

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 TPS64200 TPS64201 SWITCHING FREQUENCY SWITCHING FREQUENCY vs vs OUTPUT CURRENT OUTPUT CURRENT 400 500 VI = 5 V VO = 3.3 V VO = 3.3 V 450 350 400 300 VI = 5 V 350 z z H H − k 250 VO = 1.2 V − k 300 y y c c en 200 en 250 VO = 1.2 V u u q q Fre 150 Fre 200 − − f f 150 100 100 50 50 0 0 0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10 IO − Output Current − A IO − Output Current − A Figure 10 Figure 11 TPS64202 TPS64203 SWITCHING FREQUENCY SWITCHING FREQUENCY vs vs OUTPUT CURRENT OUTPUT CURRENT 600 900 550 VI = 3.8 V VI = 4.2 V VI = 5 V 800 500 700 450 − kHz 345000 − kHz 600 VCOff == 136.35 Vp,F ncy 300 ncy 500 Freque 250 Freque 400 VO = 1.2 V − 200 − 300 f f 150 200 VI = 3.8 V, 100 Cff = 165 pF 100 50 VO = 3.3 V 0 0 0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10 IO − Output Current − A IO − Output Current − A Figure 12 Figure 13 8

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 TPS642000 OPERATING QUIESCENT CURRENT vs TPS64200 INPUT VOLTAGE OUTPUT VOLTAGE RIPPLE 40 VI = 3.8 V, IO = 1000 mA A 35 VO = 1.2 V, µ RL = 1.2 Ω, rent − 30 TA = −40°C TA = 25°C TA = 85°C Div TA = 25°C VO ur V/ C 25 m nt 0 e 2 c es 20 ui Q I(coil) g 15 n ati per 10 Div − O mA/ Q 5 0 I 0 2 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 VI − Input Voltage − V 2 (cid:1)s/Div Figure 14 Figure 15 TPS64200 TPS64203 LINE TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE VI = 3.8 V to 5 V, VO = 1.2 V, RL = 1.2 Ω, IO 1 V/Div TA = 25°C VI 1 A/Div VI = 5 V, VO = 3.3 V, IL = 200 mA to 1800 mA, VO TA = 25°C v V/Di v VO m Di 20 mV/ 0 5 50 (cid:1)s/Div 40 (cid:1)s/Div Figure 16 Figure 17 9

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 TPS64200 STARTUP TIMING EN VO II I(Inductor) VI = 3.8 V, VO = 3.3 V, RL = 1.66 Ω, TA = 25°C 100 (cid:1)s/Div Figure 18 DETAILED DESCRIPTION Operation The TPS6420x is a nonsynchronous step-down controller which is operating with a minimum on-time/minimum off-time control. An external PMOS is turned on until the output voltage reaches its nominal value or the current limit is exceeded. If the current limit is exceeded, the PMOS is switched off and stays off for the minimum off-time. After that the PMOS is switched on again. When the nominal output voltage is reached, the PMOS is switched off and stays off until the output voltage dropped below its nominal value. Operating Modes When delivering low or medium output current, the TPS6420x operate in discontinuous mode. With every switching cycle, the current in the inductor starts at zero, rises to a maximum value and ramps down to zero again. As soon as the current in the inductor drops to zero, ringing occurs at the resonant frequency of the inductor and stray capacitance, due to residual energy in the inductor when the diode turns off. Ringing in discontinuous mode is normal and does not have any influence on efficiency. The ringing does not contain much energy and can easily be damped by an RC snubber. See the application section for further details. With high output current, the TPS6420x operate in continuous current mode. In this mode, the inductor current does not drop to zero within one switching cycle. The output voltage in continuous mode is directly dependant on the duty cycle of the switch. Variable Minimum On-Time (TPS64201 to TPS64202 Only) The minimum on-time of the device is 1.6 µs. At light loads, this would cause a low switching frequency in the audible range because the energy transferred to the output during the on-time would cause a higher rise in the output voltage than needed and therefore lead to a long off−time until the output voltage dropped again. To avoid a switching frequency in the audible range the TPS64201 and TPS64202 can internally reduce the minimum on time in three steps from 1.6 µs to 800 ns, 400 ns and 200 ns. The on-time is reduced by one step if the switching frequency dropped to a lower value than 50 kHz. This keeps the frequency above the audio frequency over a wide load range and also keeps the output voltage ripple low. 10

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 Soft Start The TPS6420x has an internal soft start circuit that limits the inrush current during start up. This prevents possible voltage drops of the input voltage in case a battery or a high impedance power source is connected to the input of the TPS6420x. During soft start the current limit is increased from 25% of its maximum to the maximum within about 250 µs. 100% Duty Cycle Low Dropout Operation The TPS6420x offers the lowest possible input to output voltage difference while still maintaining regulation with the use of the 100% duty cycle mode. In this mode the P-channel switch is constantly turned on. This is particularly useful in battery powered applications to achieve longest operation time by taking full advantage of the whole battery voltage range. Enable A voltage higher than the EN trip point of 1.3 V up to the input voltage forces the TPS64200 into shutdown. In shutdown, the power switch, drivers, voltage reference, oscillator, and all other functions are turned off. The supply current is reduced to less than 1 µA in shutdown. Pulling enable low starts up the TPS64200 with the softstart as described under the chapter softstart. Undervoltage Lockout The undervoltage lockout circuit prevents the device from misoperation at low input voltages. Basically, it prevents the converter from turning on the external PMOS under undefined conditions. Current Limit The ISENSE input is used to set the current limit for the external PMOS. The sense resistor must be connected between V and source of the external PMOS. The ISENSE pin is connected to the source of the external I PMOS. The maximum current is calculated by: V I (cid:1) (ISENSE) (1) (curlim) R S For low cost solutions the rDS(on) of the external PMOS can also be used to set the current limit. In this case the ISENSE pin is connected to the drain of the PMOS. The current in the PMOS is automatically sampled by the TPS6420x some 10 ns after the PMOS is turned on. The ISENSE pin should always be connected to either the source of the PMOS or the drain if an additional sense resistor is used. Otherwise there is no working overcurrent protection and no soft start in the system. The maximum drain current if the rDS(on) is used as a sense resistor is calculated by: V (ISENSE) I (cid:1) (2) (curlim) r DS(on) Short-Circuit Protection With a controller only limited short circuit protection is possible because the temperature of the external components is not supervised. In an overload condition, the current in the external diode may exceed the maximum rating. To protect the diode against overcurrent, the off-time of the TPS6420x is increased when the voltage at the feedback pin is lower than its nominal value. The off-time when the output is shorted (feedback voltage is zero) is about 4 µs. This allows the current in the external diode to drop until the PMOS is turned on again and the overcurrent protection switches off the PMOS again. The off-time is directly proportional to the voltage at feedback. 11

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 THEORY OF OPERATION The basic application circuit for the TPS64200 is shown in Figure 1. External component selection is driven by the load requirement. It begins with the selection of the current sense resistor R followed by the output (ISENSE) diode, the inductor L, and the output and input capacitors. The inductor is chosen based on the desired amount of ripple current and switching frequency. The output capacitor is chosen large enough to meet the required output ripple and transient requirements. The ESR of the output capacitor is needed for stability of the converter. Therefore, an output capacitor with a certain amount of ESR is needed for the standard application circuit. See the application information for more details. The input capacitor must be capable of handling the required RMS input current. Setting the Inductor Current Limit The ISENSE pin is connected to an internal current comparator with a threshold of 120 mV/R . The current (ISENSE) comparator sets the peak inductor current. As the current limit is intended to protect the external PMOS the limit must not be reached in normal operation. Set the current limit to about 1.3 times the maximum output current or higher if desired. This takes into account a certain amount of inductor current ripple. The current limit may also influence the start-up time when the current limit is exceeded during start up. V min I — maximum output current in continuous conduction mode (ISENSE) O R (cid:2) V , min = 90 mV (ISENSE) 1.3(cid:3)I (ISENSE) (3) O The current sense resistor’s power rating should be: (cid:5) (cid:6)2 V max (ISENSE) P (cid:4) V(ISENSE), max = 120 mV (4) (ISENSE) R (ISENSE) Setting the Output Voltage The output voltage of the TPS64200 to TPS64202 can be set using an external resistor divider. The sum of R1 and R2 should not exceed 1 MΩ to keep the influence of leakage current into the feedback pin low. (cid:5) (cid:6) V V (cid:1)V (cid:3)R1(cid:7)R2 R1(cid:1)R2(cid:3) O (cid:8)R2 with V = 1.2 V (5) O FB R2 V FB FB In some applications, depending on the layout, the capacitance may be too high from FB to GND. In this case, the internal comparator may not switch fast enough to operate with the minimum on-time or the minimum off-time given in this data sheet. For such applications a feedforward capacitor (Cff) in the range of 4.7 pF to 47 pF (typical) is added in parallel with R1 to speed up the comparator. Choose a capacitor value that is high enough that the device turns on the PMOS for its minimum on-time with no load at the output. Selecting the Input Capacitor The input capacitor is used to reduce peak currents drawn from the power source and reduces noise and voltage ripple on the input of the converter, caused by its switching action. Use low ESR tantalum capacitors or preferably X5R or X7R ceramic capacitors with a voltage rating higher than the maximum supply voltage in the application. In continuous conduction mode, the input capacitor must handle an rms-current which is given by: (cid:10) V I (cid:9)I O (6) Cin(rms) O V , min I Select the input capacitor according to the calculated rms-input current requirements and according to the maximum voltage ripple. Use a minimum value of 10 µF: (cid:5) (cid:6)2 (cid:5) (cid:6)2 12 L(cid:3) (cid:1)IL 12 L(cid:3) 0.3(cid:3)IO with: V(ripple) − voltage ripple at CI CI, min(cid:1)V (cid:3)V (cid:9) V (cid:3)V ∆IL − inductor current ripple (7) (ripple) I (ripple) I 12

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 For a first approximation use: L = 10 µH V = 150 mV (verify in the application) (ripple) Selecting the Inductor Value The main parameters when choosing the inductor are current rating and inductance. The inductance mainly determines the inductor current ripple. The TPS6420x operates with a wide range of inductor values. Values between 4.7 µH and 47 µH work in most applications. Select an inductor with a current rating exceeding the limit set by R(ISENSE) or rDS(on). The first step in inductor design is to determine the operating mode of the TPS64200. The device can either work with minimum-on-time or minimum-off-time, depending on input voltage and output voltage. The device works with minimum-on-time if: (cid:5) (cid:6) t ,min(cid:3) V (cid:7)V (cid:7)R (cid:3)I off O SCHOTTKY RL O V (cid:8)V (cid:8)I (cid:3)r (cid:8)R xI (cid:4) (8) I O O DS(on) RL O t ,min on with R − inductor resistance RL with L(cid:1)V(cid:3)(cid:1)t (cid:1)I For minimum-on-time: (cid:5) (cid:6) V –V –I (cid:3)r –R (cid:3)I (cid:3)t ,min L(cid:1) I O O DS(on) RL O on with: ∆I ≤ 0.3 × IO (9) (cid:1)I For minimum-off-time: (cid:5) (cid:6) V (cid:7)V (cid:7)R (cid:3)I (cid:3)t ,min O SCHOTTKY RL O off L(cid:1) (10) (cid:1)I Table 1. List of Inductors Tested With the TPS6420x MANUFACTURER TYPE INDUCTANCE DC RESISTANCE SATURATION CURRENT TDK SLF7032T−100M1R4 10 µH ±20% 53 mΩ ±20% 1.4 A TDK SLF6025−150MR88 15 µH ±20% 85 mΩ ±20% 0.88 A Sumida CDRH6D28−5R0 5 µH 23 mΩ 2.4 A Sumida CDRH103R−100 10 µH 45 mΩ 2.4 A Sumida CDRH4D28−100 10 µH 95 mΩ 1.0 A Sumida CDRH5D18−6R2 6.2 µH 71 mΩ 1.4 A Coilcraft DO3316P−472 4.7 µH 18 mΩ 5.4 A Coilcraft DT3316P−153 15 µH 60 mΩ 1.8 A Coilcraft DT3316P−223 22 µH 84 mΩ 1.5 A Wurth 744 052 006 6.2 µH 80 mΩ 1.45 A Wurth 74451115 15 µH 90 mΩ 0.8 A 13

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 Selecting the External PMOS An external PMOS must be used for a step-down converter with the TPS64200. The selection criteria for the PMOS are threshold voltage, r , gate charge and current and voltage rating. Since the TPS64200 can DS(on) operate down to 1.8 V, the external PMOS must have a V (th) much lower than that if it is operated with such GS a low voltage. As the gate of the PMOS finds the full supply voltage applied to the TPS64200, the PMOS must be able to handle that voltage at the gate. The drain to source breakdown voltage rating should be at least a few volts higher than the supply voltage in the application. The rms-current in the PMOS assuming low inductor current ripple and continuous conduction mode, is: (cid:10) V I (cid:9)I (cid:10)D(cid:1)I O (11) PMOS(rms) O O V I The power dissipated in the PMOS is comprised of conduction losses and switching losses. The conduction losses are a function of the rms−current in the PMOS and the r at a given temperature. They are calculated DS(on) using: (cid:5) (cid:6) (cid:5) (cid:6)2 (cid:11) (cid:12) (cid:5) (cid:6)2 (cid:10) (cid:10) P (cid:1) I D (cid:3)r (cid:3) 1(cid:7)TC(cid:3) T –25°C (cid:9) I D (cid:3)r (cond) O DS(on) J O DS(on) (12) with TC = 0.005/°C Table 2. PMOS Transistors Used in the Application Section TYPE MANUFACTURER rDS(on) VDS ID PACKAGE Si5447DC Vishay Siliconix 0.11 Ω at VGS = −2.5 V −20 V −3.5 A at 25°C 1206 Si5475DC Vishay Siliconix 0.041 Ω at VGS = −2.5 V −12 V −6.6 A at 25°C 1206 Si2301ADS Vishay Siliconix 0.19 Ω at VGS = −2.5 V −20 V −1.4 A at 25°C SOT23 Si2323DS Vishay Siliconix 0.41 Ω at VGS = −2.5 V −20 V −4.1 A at 25°C SOT23 FDG326P Fairchild 0.17 Ω at VGS = −2.5 V −20 V −1.5 A SC70 Selecting the Output Diode The output diode conducts in the off phase of the PMOS and carries the full output current. The high switching frequency demands a high-speed rectifier. Schottky diodes are recommended for best performance. Make sure that the peak current rating of the diode exceeds the peak current limit set by the sense resistor R or (ISENSE) r . Select a Schottky diode with a low reverse leakage current to avoid an increased supply current. The DS(on) average current in the diode in continuous conduction mode, assuming low inductor current ripple, is: (cid:5) (cid:6) V I (cid:9)I (1–D)(cid:1)I 1– O (diode)(Avg) O O V (13) I Table 3. Tested Diodes TYPE MANUFACTURER VR IF PACKAGE MBRM120LT3 On Semiconductor 20 V 1 A DO216AA MBR0530T1 On Semiconductor 30 V 0.5 A SOD123 ZHCS2000TA Zetex 40 V 2 A SOT23−6 B320 Diodes Inc. 20 V 3 A SMA 14

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 Selecting the Output Capacitor The value of the output capacitor depends on the output voltage ripple requirements as well as the maximum voltage deviation during a load transient. The TPS6420x require a certain ESR value for proper operation. Low ESR tantalum capacitors or PosCap work best in the application. A ceramic capacitor with up 1 µF may be used in parallel for filtering short spikes. The output voltage ripple is a function of both the output capacitance and the ESR value of the capacitor. For a switching frequency which is used with the TPS6420x, the voltage ripple is typically between 90% and 95% due to the ESR value. (cid:11) (cid:12) (cid:5) (cid:6) (cid:1)Vpp(cid:1)(cid:1)I(cid:3) ESR(cid:7) 8(cid:3)C1 (cid:3)ƒ (cid:9)1.1(cid:1)I(cid:3)ESR (14) O (cid:1)V ESR, max(cid:9) pp (15) 1.1(cid:3)(cid:1)I The output capacitance typically increases with load transient requirements. For a load step from zero output current to its maximum, the following equation can be used to calculate the output capacitance: L(cid:3)(cid:1)I 2 CO(cid:1)(V (cid:8)V )Ox(cid:1)V (16) I O Table 4. Capacitors Used in the Application TYPE MANUFACTURER CAPACITANCE ESR VOLTAGE RATING 6TPB47M (PosCap) Sanyo 47 µF 0.1 Ω 6.3 V T491D476M010AS Kemet 47 µF 0.8 Ω 10 V B45197A Epcos 47 µF 0.175 Ω 16 V B45294−R1107−M40 Epcos 100 µF 0.045 Ω 6.3 V 594D476X0016C2 Vishay 47 µF 0.11 Ω 16 V Output Voltage Ripple Output voltage ripple causes the output voltage to be higher or lower than set by the resistor divider at the feedback pin. If the application runs with minimum on-time, the ripple (half of the peak-to-peak value) adds to the output voltage. In an application which runs with minimum off-time, the output voltage is lower by the amount of ripple (half of the peak-to-peak value) at the output. Snubber Design For low output current, the TPS6420x work in discontinuous current mode. When the current in the inductor drops to zero, the inductor and parasitic capacitance form a resonant circuit, which causes oscillations when both, diode and PMOS do not conduct at the end of each switching cycle. The oscillation can easily be damped by a RC-snubber. The first step in the snubber design is to measure the oscillation frequency of the sine wave. Then, a capacitor has to be connected in parallel to the Schottky diode which causes the frequency to drop to half of its original value. The resistor is selected for optimum transient response (aperiodic). R(cid:1)2(cid:2)fL f − measured resonant frequency (17) L − inductance used Selecting the Right Device for the Application The TPS6420x step-down controllers either operate with a fixed on-time or a fixed off-time control. It mainly depends on the input voltage to output voltage ratio if the switching frequency is determined by the minimum-on-time or the minimum-off-time. To select the right device for an application see the table below: PROPOSED DEVICE FOR PROPOSED DEVICE FOR SWITCHING FREQUENCY INPUT TO OUTPUT VOLTAGE RATIO HIGH SWITCHING LOW SWITCHING DETERMINED BY FREQUENCY FREQUENCY VI >> VO (e.g. VI = 5 V VO = 1.5 V) Minimum on−time TPS64203 TPS64200, TPS64201 VI ≈ VO (e.g. VI = 3.8 V VO = 3.3 V) Minimum off−time TPS64202 TPS64200, TPS64201 15

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 APPLICATION INFORMATION Li-lon 3.3 V to 4.2 V R(ISENSE) = 33 mΩ CIN 10 µF TPS64202 1 EN SW 6 Si5475DC 2 5 GND VIN CDRH6D28-5R0 3 4 FB ISENSE 3.3 V / 2 A 5 µH R1 Co MBRM120LT3 620 kΩ Cff 47 (cid:1)F PosCap 4.7 pF 6TPA47M R2 360 kΩ Figure 19. Application For a Li-Ion to 3.3-V / 2-A Conversion The TPS64202 was used for this application because for a low input to output voltage difference, the switching frequency is determined by the minimum off-time. The TPS64202 with its minimum off-time of 300 ns provides a higher switching frequency compared to the other members of the TPS6420x family. Li-lon 3.3 V to 4.2 V CIN 10 µF TPS64202 1 6 EN SW Si5475DC 2 5 GND VIN 3 4 FB ISENSE CDRH6D28-5R0 3.3 V / 2 A 5 µH R1 620 kΩ MBRM120LT3 R3 Cff 150 Ω 4.7 pF Co 47 (cid:1)F PosCap C3 R2 6TPA47M 470 pF 360 kΩ Figure 20. Application For a Li-Ion to 3.3-V / 2-A Conversion Using r Sense and RC Snubber DS(on) Network For the Schottky Diode 16

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 DESIGN EXAMPLE FOR AN APPLICATION USING A LI-ION CELL (3.3 V TO 4.2 V) TO GENERATE 3.3 V/500 mA 1. Calculate the sense resistor for the current limit: V min R (cid:2) (ISENSE) (cid:1) 90mV (cid:1)138m(cid:3) (18) (ISENSE) 1.3(cid:3)I 1.3(cid:3)0.5A O Choose the next lower standard value : R = 120 mΩ. Verify the inductor current ripple after the inductor (ISENSE) has been determined in step 5. If the rDS(on) of the PMOS is used to sense the inductor current, a PMOS with less than 138 mΩ must be used for the application. 2. Calculate the resistors for the output voltage divider using VO = 3.3 V and VFB = 1.21 V (cid:5) (cid:6) V R1(cid:1)R2(cid:3) O –R2(cid:1)1.72(cid:3)R2 (19) V FB Choose R2 = 360 kΩ, and then get R1 = 619 kΩ. Select the next standard value: R1 = 620 kΩ 3. Select the external PMOS For a Li-Ion to 3.3-V conversion, the minimum input voltage is 3.3 V. Therefore, the converter runs in 100% mode (duty cycle=1) and the maximum PMOS current is equal to the output current. I (cid:1)I (cid:1)0.5A (20) (PMOS) O The Si2301ADS is selected for this application because it meets the requirements when an external sense resistor is used. Otherwise a PMOS with less rDS(on) must be selected. Verify the maximum power dissipation of the PMOS using: (cid:5) (cid:6)2 P (cid:1) I (cid:3)r (cid:1)(0.5A)2(cid:3)0.19(cid:3)(cid:1)48mW (21) (cond) O DS(on) 4. Select the external diode For the Schottky diode, the worst case current is at high input voltage (4.2 V for a Li-Ion cell). (cid:5) (cid:6) V (cid:5) (cid:6) I (cid:9)I 1– O (cid:1)I 1–3.3V (cid:1)0.11A (22) (diode)(Avg) O V O 4.2V I The MBR0530T1 is selected because it meets the voltage and current requirements. The forward voltage is about 0.3 V. Do not use a Schottky diode which is much larger than required as it also typically has more leakage current and capacitance which reduces efficiency. 5. Calculate the inductor value. If the output voltage is close to the input voltage, the switching frequency is determined by the minimum off-time. Therefore, the TPS64202 is used for the maximum switching frequency possible. Allow an inductor ripple current of 0.3 × I for the application. For the inductor, a series resistance of 100 mΩ is assumed. O For minimum-off-time, the inductor value is: (cid:5) (cid:6) (23) V (cid:7)V (cid:7)R (cid:3)I (cid:3)t ,min O (SCHOTTKY) RL O off (3.3V(cid:7)0.3V(cid:7)0.05V)(cid:3)0.3(cid:4)s L(cid:1) (cid:1) (cid:1)7.3(cid:4)H (cid:1)I 0.3(cid:3)0.5A For a low inductor current ripple, select the next available larger inductor with L = 10 µH. This provides an inductor ripple current of 110 mA (peak-to-peak). 17

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 (cid:5) (cid:6) V (cid:7)V (cid:7)R (cid:3)I (cid:3)t , min O (SCHOTTKY) RL O off (cid:1)I(cid:1) (cid:1)110mA (24) L The current rating for the inductor must be: I, inductor (cid:13)I (cid:7)(cid:1)I(cid:1)555mA (25) O 2 6. Select the input and output capacitor The output capacitor is selected for an output voltage ripple of less than 20 mVpp. With (cid:1)V ESR, max(cid:9) pp (cid:1) 0.02V (cid:1)165m(cid:3) (26) 1.1(cid:3)(cid:1)I 1.1(cid:3)0.11A A 47-µF PosCap with an ESR of 100 mΩ was selected to meet the ripple requirements. The input capacitor was selected to its minimum value of 10 µF. 1 Li-lon Cell R(ISENSE) = 120 mΩ 10 µF TPS64202 1 EN SW 6 Si2301DS 2 5 GND VIN CDRH4D18-100 3 ISENSE 4 FB 3.3 V / 0.5 A 10 µH R1 MBR0530T1 620 kΩ 47 µF PosCap 6TPA47M R2 360 kΩ Figure 21. Application Circuit 18

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 5 V R(ISENSE) = 33 mΩ 10 µF TPS64200 1 EN SW 6 Si5447DC 2 5 GND VIN CDRH103R-100 3 4 FB ISENSE 3.3 V / 2 A 10 µH R1 ZHCS200 620 kΩ 47 (cid:1)F PosCap 6TPA47M R2 360 kΩ Figure 22. Application For a 5-V to 3.3-V / 2-A Conversion Inverter Using TPS64200 VI 2.7 V to 4.2 V R(ISENSE) = 33 mΩ 10 µF TPS64200 1 EN SW 6 Si2301DS 2 5 GND VIN MBR0530T1 3 4 FB ISENSE −5 V / 0.1 A SW R2 R1 24 kΩ VI 100 kΩ _ CDRH4D28-100 47 µF 10 µH X7R + OPA363 Figure 23. Application For an Inverter Using TPS64200 19

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 The TPS6420x can be used for an inverter. Only one additional operational amplifier is required for this application. When the PMOS is switched on, the current in the inductor ramps up to its maximum, set by Rs. Then the PMOS is switched off, the energy stored in the inductor is transferred to the output. The output voltage and the maximum output current can be calculated using: V V VO(cid:1)RR12(cid:3)VFB IO max(cid:9)0.8(cid:3)–VI (cid:3)2R(ISENSE) (27) O (ISENSE) OLED Power Supply The TPS6420x can be combined with a TPS61045 boost converter for a OLED power supply. 4.7 µH 7 V / 50 mA 4.7 µF 1 µF 1 L SW 8 56 kΩ 22 pF X7R 2 3 VIN DO 5 4 CTRL FB 6 7 GND PGND 12 kΩ TPS61045 VI 1.8 V to 5.5 V R(ISENSE) = 150 mΩ 10 µF TPS64200 1 EN SW 6 Si2301DS 2 5 GND VIN MBR0530T1 3 4 FB ISENSE −7 V / 50 mA SW R2 R1 130 kΩ VI 750 kΩ _ CDRH4D28-100 47 µF 10 µH X7R + OPA363 Figure 24. Application For a OLED Power Supply 20

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 5 V 10 µF X5R TPS64203 1 EN SW 6 Si2323DS 2 5 GND VIN Wurth 744052006 3 4 FB ISENSE 1.2 V / 1.2 A 6.2 µH MBRM120LT3 100 µF/6.3 V B45294-R1107-M40 Figure 25. Application For a 5-V to 1.2-V / 1.2-A Conversion 5 V R(ISENSE) = 20 mΩ CIN 22 µF TPS64202 1 6 EN SW Si5475DC 2 5 GND VIN 3 4 FB ISENSE DO3316P−472 3.3 V / 3 A 4.7 µH R1 B320 620 kΩ Cff 4.7 pF Co 100 (cid:1)F PosCap 6TPC100M R2 360 kΩ Figure 26. Application For a 5-V to 3.3-V / 3-A Conversion 21

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:9) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:6)(cid:8) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:10) www.ti.com SLVS485 − AUGUST 2003 Ceramic Output Capacitor 5 V R(ISENSE) = 33 mΩ CI 10 µF TPS64203 1 EN SW 6 R(GATE) Si5475DC 2 GND VIN 5 10 Ω 3 FB ISENSE 4 CDRH6D28-100 3.3 V / 2 A 10 µH R1a 680 kΩ MBRM120LT3 R1b Cff 2.2 MΩ 82 pF Co 22 µF X5R 6.3 V R2 300 kΩ Figure 27. Application Using a Ceramic Output Capacitor The control scheme of the TPS6420x usually requires an output capacitor with some tens of milliohms of ESR for stability, which is usually the case for tantalum capacitors. This application circuit above also works with ceramic capacitors. Resistor R1b is used to add an additional control signal to the feedback loop, which is coupled into the FB pin. The circuit works best with R1b = 2 …4 x R1a. If the resistance of R1b is too low compared to R1a, the more load regulation the output voltage shows, but stability is best. The advantage of this circuit is a very low output voltage ripple and small size. The gate resistor shown can be used in every application. It minimizes switching noise of the converter and, therefore, increases stability and provides lower output voltage ripple. However, it decreases efficiency slightly because the rise and fall time, and the associated losses are larger. R1(cid:1) 1 R1b(cid:1) 1 1 (cid:7) 1 1 – 1 (28) R1a R1b R1 R1a Use the following equation to calculate R1a if R1b = 4R1a R1a(cid:1)5 R1 4 (29) 22

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS64200DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 PJAI & no Sb/Br) TPS64200DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 PJAI & no Sb/Br) TPS64200DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 PJAI & no Sb/Br) TPS64201DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 PJBI & no Sb/Br) TPS64201DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 PJBI & no Sb/Br) TPS64201DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 PJBI & no Sb/Br) TPS64202DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 PJCI & no Sb/Br) TPS64202DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 PJCI & no Sb/Br) TPS64203DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 PJDI & no Sb/Br) TPS64203DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 PJDI & no Sb/Br) TPS64203DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 PJDI & no Sb/Br) TPS64203DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 PJDI & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2017 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS64200DBVR SOT-23 DBV 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS64200DBVT SOT-23 DBV 6 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS64201DBVR SOT-23 DBV 6 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS64201DBVR SOT-23 DBV 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS64201DBVT SOT-23 DBV 6 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS64201DBVT SOT-23 DBV 6 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS64202DBVR SOT-23 DBV 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS64202DBVT SOT-23 DBV 6 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS64203DBVR SOT-23 DBV 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS64203DBVT SOT-23 DBV 6 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2017 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS64200DBVR SOT-23 DBV 6 3000 180.0 180.0 18.0 TPS64200DBVT SOT-23 DBV 6 250 180.0 180.0 18.0 TPS64201DBVR SOT-23 DBV 6 3000 203.0 203.0 35.0 TPS64201DBVR SOT-23 DBV 6 3000 180.0 180.0 18.0 TPS64201DBVT SOT-23 DBV 6 250 180.0 180.0 18.0 TPS64201DBVT SOT-23 DBV 6 250 203.0 203.0 35.0 TPS64202DBVR SOT-23 DBV 6 3000 180.0 180.0 18.0 TPS64202DBVT SOT-23 DBV 6 250 180.0 180.0 18.0 TPS64203DBVR SOT-23 DBV 6 3000 180.0 180.0 18.0 TPS64203DBVT SOT-23 DBV 6 250 180.0 180.0 18.0 PackMaterials-Page2

PACKAGE OUTLINE DBV0006A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 B A 1.45 MAX PIN 1 INDEX AREA 1 6 2X 0.95 3.05 2.75 1.9 5 2 4 3 0.50 6X 0.25 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214840/B 03/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.15 per side. 4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation. 5. Refernce JEDEC MO-178. www.ti.com

EXAMPLE BOARD LAYOUT DBV0006A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 6X (1.1) 1 6X (0.6) 6 SYMM 2 5 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214840/B 03/2018 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBV0006A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 6X (1.1) 1 6X (0.6) 6 SYMM 2 5 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214840/B 03/2018 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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