TPS54625 www.ti.com SLVSC33 –AUGUST2013 4.5V to 18V Input, 6.5-A Synchronous Step-Down Converter CheckforSamples:TPS54625 FEATURES DESCRIPTION 1 • D-CAP2™ModeEnablesFastTransient The TPS54625 is an adaptive on-time D-CAP2™ 23 mode synchronous buck converter. The TPS54625 Response enables system designers to complete the suite of • LowOutputRippleandAllowsCeramicOutput various end equipment’s power bus regulators with a Capacitor cost effective, low component count, low standby • WideV InputVoltageRange:4.5Vto18V currentsolution. IN • OutputVoltageRange:0.76Vto5.5V The main control loop for the TPS54625 uses the D- • HighlyEfficientIntegratedFET’sOptimizedfor CAP2™ mode control which provides a very fast LowerDutyCycleApplications –36mΩ (High transient response with no external compensation components. The TPS54625 also has a proprietary Side)and28mΩ (LowSide) circuit that enables the device to adopt to both low • HighEfficiency,lessthan10 μAatshutdown equivalent series resistance (ESR) output capacitors, • HighInitialBandgapReferenceAccuracy such as POSCAP or SP-CAP, and ultra-low ESR • AdjustableSoftStart ceramic capacitors. The device operates from 4.5-V to 18-V VIN input. The output voltage can be • Pre-BiasedSoftStart programmed between 0.76 V and 5.5 V. The device • 650-kHzSwitchingFrequency(fSW) also features an adjustable soft start time and a • CycleByCycleOverCurrentLimit power good function. The TPS54625 is available in the 14-pin HTSSOP package, and designed to • PowerGoodOutput operatefrom –40°Cto85°C. APPLICATIONS Io = 0A–6.5A • WideRangeofApplicationsforLowVoltage S/R = 0.35A/μs System – DigitalTVPowerSupply Vo (50 mV/div) – HighDefinition Blu-rayDisc™Players – NetworkingHomeTerminal – DigitalSetTopBox(STB) Io (2A/div) U1 TPS54625 Time (100μs/div) L004_SLVSC33 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsof TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. D-CAP2,PowerPADaretrademarksofTexasInstruments. 2 Blu-rayDiscisatrademarkofBlu-rayDiscAssociation. 3 PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2013,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

TPS54625 SLVSC33 –AUGUST2013 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage. ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemore susceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications. ORDERINGINFORMATION(1) T PACKAGE(2) (3) ORDERABLEPARTNUMBER PIN TRANSPORT A MEDIA,QUANTITY PowerPAD™ TPS54625PWP Tube –45°Cto85°C 14 (HTSSOP)–PWP TPS54625PWPR TapeandReel (1) Forthemostcurrentpackageandorderinginformation,seethePackageOptionAddendumattheendofthisdocument,orseetheTI websiteatwww.ti.com. (2) Packagedrawings,thermaldata,andsymbolizationareavailableatwww.ti.com/packaging. (3) AllpackageoptionshaveCuNIPDAUlead/ballfinish. ABSOLUTE MAXIMUM RATINGS overoperatingfree-airtemperaturerange(unlessotherwisenoted) (1) VALUE UNIT VIN1,VIN2EN –0.3to20 V VBST –0.3to26 V VBST(10nstransient) –0.3to28 V V Inputvoltagerange VBST(vsSW1,SW2) –0.3to6.5 V I VFB,VO,SS,PG –0.3to6.5 V SW1,SW2 –2to20 V SW1,SW2(10nstransient) –3to22 V VREG5 –0.3to6.5 V V Outputvoltagerange O PGND1,PGND2 –0.3to0.3 V V VoltagefromGNDtoPOWERPAD –0.2to0.2 V diff Electrostatic HumanBodyModel(HBM) 2 kV ESDrating discharge ChargedDeviceModel(CDM) 500 V T Operatingjunctiontemperature –40to150 °C J T Storagetemperature –55to150 °C stg (1) Stressesbeyondthoselistedunderabsolutemaximumratingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderrecommendedoperating conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. THERMAL INFORMATION TPS54625 THERMALMETRIC(1) UNITS PWP(14PINS) θ Junction-to-ambientthermalresistance 40.5 JA θ Junction-to-case(top)thermalresistance 28.7 JCtop θ Junction-to-boardthermalresistance 24.2 JB °C/W ψ Junction-to-topcharacterizationparameter 0.8 JT ψ Junction-to-boardcharacterizationparameter 23.9 JB θ Junction-to-case(bottom)thermalresistance 2.4 JCbot (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953. 2 SubmitDocumentationFeedback Copyright©2013,TexasInstrumentsIncorporated ProductFolderLinks:TPS54625

TPS54625 www.ti.com SLVSC33 –AUGUST2013 RECOMMENDED OPERATING CONDITIONS overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V Supplyinputvoltagerange 4.5 18 V IN VBST –0.1 24 VBST(10nstransient) –0.1 27 VBST(vsSW) –0.1 6.0 SS,PG –0.1 5.7 V Inputvoltagerange EN –0.1 18 V I VO,VFB –0.1 5.5 SW1,SW2 –1.8 18 SW1,SW2(10nstransient) –3 21 PGND1,PGND2 –0.1 0.1 V Outputvoltagerange VREG5 –0.1 5.7 V O I OutputCurrentrange I 0 5 mA O VREG5 R PowerGoodResistor 25 150 kΩ EN T Operatingfree-airtemperature –40 85 °C A T Operatingjunctiontemperature –40 150 °C J ELECTRICAL CHARACTERISTICS overoperatingfree-airtemperaturerange,V =12V(unlessotherwisenoted) IN PARAMETER TESTCONDITIONS MIN TYP MAX UNIT SUPPLYCURRENT V current,T =25°C,EN=5V, I Operating-non-switchingsupplycurrent IN A 950 1400 μA VIN V =0.8V VFB I Shutdownsupplycurrent V current,T =25°C,EN=0V 3.6 10 μA VINSDN IN A LOGICTHRESHOLD V ENhigh-levelinputvoltage EN 1.6 V ENH V ENlow-levelinputvoltage EN 0.6 V ENL R ENpinresistancetoGND V =12V 200 400 800 kΩ EN EN VFBVOLTAGEANDDISCHARGERESISTANCE T =25°C,V =1.05V,continuousmode 757 765 773 A O T =0℃to85℃,V =1.05V,continuous V VFBthresholdvoltage mAode (1) O 753 777 mV VFBTH T =–40°Cto85°C,V =1.05V,continuous mAode(1) O 751 779 I VFBinputcurrent VFB=0.8V,T =25°C 0 ±0.15 μA VFB A R V dischargeresistance V =0V,V =0.5V,T =25°C 100 150 Ω Dischg O EN O A VREG5OUTPUT T =25°C,6.0V<V <18V, V VREG5outputvoltage A IN 5.2 5.5 5.7 V VREG5 0<I <5mA VREG5 I Outputcurrent V =6V,V =4V,T =25°C 20 mA VREG5 IN VREG5 A MOSFET R Highsideswitchresistance T =25°C,V -V =5.5V 36 mΩ dsonh A BST SW1,2 R Lowsideswitchresistance T =25°C 28 mΩ dsonl A (1) Notproductiontested. Copyright©2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:TPS54625

TPS54625 SLVSC33 –AUGUST2013 www.ti.com ELECTRICAL CHARACTERISTICS (continued) overoperatingfree-airtemperaturerange,V =12V(unlessotherwisenoted) IN PARAMETER TESTCONDITIONS MIN TYP MAX UNIT CURRENTLIMIT I Currentlimit L =1.5μH(2) 7.2 8.2 9.5 A ocl OUT THERMALSHUTDOWN Shutdowntemperature (2) 165 T Thermalshutdownthreshold °C SDN Hysteresis (2) 35 ON-TIMETIMERCONTROL T Ontime V =12V,V =1.05V 150 ns ON IN O T Minimumofftime T =25°C,V =0.7V 260 310 ns OFF(MIN) A VFB SOFTSTART I SSchargecurrent V =1V 4.2 6.0 7.8 μA SSC SS I SSdischargecurrent V =0.5V 1.5 3.3 mA SSD SS POWERGOOD V rising(good) 85% 90% 95% VFB V PGthreshold THPG V falling(fault) 85% VFB I PGsinkcurrent V =0.5V 2.5 5 mA PG PG OUTPUTUNDERVOLTAGEANDOVERVOLTAGEPROTECTION V OutputOVPtripthreshold OVPdetect 120% 125% 130% OVP T OutputOVPpropdelay 10 μs OVPDEL UVPdetect 60% 65% 70% V OutputUVPtripthreshold UVP Hysteresis 10% T OutputUVPdelay 0.25 ms UVPDEL T OutputUVPenabledelay Relativetosoft-starttime X1.7 UVPEN UVLO WakeupVREG5voltage 3.45 3.75 4.05 V UVLOthreshold V UVLO HysteresisVREG5voltage 0.13 0.32 0.48 (2) Notproductiontested. 4 SubmitDocumentationFeedback Copyright©2013,TexasInstrumentsIncorporated ProductFolderLinks:TPS54625

TPS54625 www.ti.com SLVSC33 –AUGUST2013 DEVICE INFORMATION PWPPACKAGE (TOPVIEW) VO 1 VIN2 14 2 VFB VIN1 13 3VREG5 POWER PAD VBST12 TPS54625 4 SS SW2 11 PWP HTSSOP14 5 GND SW1 10 6 PG PGND29 7 EN PGND18 PINFUNCTIONS PIN DESCRIPTION NAME NUMBER VO 1 Connecttooutputofconverter.Thispinisusedforoutputdischargefunction. VFB 2 Converterfeedbackinput.Connectwithfeedbackresistordivider. 5.5Vpowersupplyoutput.Anexternalcapacitor(typical1uF)shouldbeconnectedtoGND.VREG5isnot VREG5 3 activewhenENislow. SS 4 Softstartcontrol.AnexternalcapacitorshouldbeconnectedtoGND. GND 5 Signalgroundpin. PG 6 Opendrainpowergoodoutput EN 7 Enablecontrolinput.ENisactivehighandmustbepulleduptoenablethedevice. PGND1, Groundreturnsforlow-sideMOSFET.Alsoserveasinputsofcurrentcomparators.ConnectPGNDand 8,9 PGND2 GNDstronglytogetherneartheIC. Switchnodeconnectionbetweenhigh-sideNFETandlow-sideNFET.Alsoserveasinputstocurrent SW1,SW2 10,11 comparator. Supplyinputforhigh-sideNFETgatedriver(boostterminal).Connectcapacitorfromthispintorespective VBST 12 SW1,SW2terminals.AninternalPNdiodeisconnectedbetweenVREG5andVBSTpin. PowerInputandconnectedtohighsideNFETdrain.SupplyInputfor5Vinternallinearregulatorforthe VIN1,VIN2 13,14 controlcircuitry Thermalpadofthepackage.Mustbesolderedtoachieveappropriatedissipation.Shouldbeconnectedto PowerPAD™ Backside PGND Copyright©2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:TPS54625

TPS54625 SLVSC33 –AUGUST2013 www.ti.com FUNCTIONALBLOCKDIAGRAM(HTSSOP) -35% UV VIN2 VIN 14 OV 13VIN1 1 VO +25% VREG5 VBST 12 Controllogic Ref SS 1shot SW2 VO 2 11 VFB XCON SW1 10 SGND VREG5 VREG5 Ceramic 3 Capacitor 1uF SS 4 9 PGND2 PGND1 Softstart 8 PGND SS SW OCP PGND 5 GND SGND Ref VIN 6 PG -10% UV VREG5 OV Protection UVLO UVLO Logic EN EN 7 TSD Logic REF Ref 6 SubmitDocumentationFeedback Copyright©2013,TexasInstrumentsIncorporated ProductFolderLinks:TPS54625

TPS54625 www.ti.com SLVSC33 –AUGUST2013 OVERVIEW The TPS54625 is a 6.5A synchronous step-down (buck) converter with two integrated N-channel MOSFETs with Auto-Skip mode to improve light load efficiency. It operates using D-CAP2™ mode control. The fast transient response of D-CAP2™ control reduces the output capacitance required to meet a specific level of performance. Proprietary internal circuitry allows the use of low ESR output capacitors including ceramic and special polymer types. DETAILED DESCRIPTION PWMOperation The main control loop of the TPS54625 is an adaptive on-time pulse width modulation (PWM) controller that supports a proprietary D-CAP2™ mode control. D-CAP2™ mode control combines constant on-time control with an internal compensation circuit for pseudo-fixed frequency and low external component count configuration with bothlowESRandceramicoutputcapacitors.Itisstableevenwithvirtuallynorippleattheoutput. At the beginning of each cycle, the high-side MOSFET is turned on. This MOSFET is turned off after internal one shot timer expires. This one shot is set by the converter input voltage, VIN, and the output voltage, VO, to maintain a pseudo-fixed frequency over the input voltage range, hence it is called adaptive on-time control. The one-shot timer is reset and the high-side MOSFET is turned on again when the feedback voltage falls below the reference voltage. An internal ramp is added to reference voltage to simulate output ripple, eliminating the need forESRinducedoutputripplefromD-CAP2™modecontrol. PWMFrequencyandAdaptiveOn-TimeControl TPS54625 uses an adaptive on-time control scheme and does not have a dedicated on board oscillator. The TPS54625 runs with a pseudo-constant frequency of 650 kHz by using the input voltage and output voltage to set the on-time one-shot timer. The on-time is inversely proportional to the input voltage and proportional to the output voltage. The actual frequency may vary from 650kHz depending on the off time, which is ended when the feedbackportionoftheoutputvoltagefallstotheV thresholdvoltage. FB SoftStartandPre-BiasedSoftStart The soft start function is adjustable. When the EN pin becomes high, 6-μA current begins charging the capacitor which is connected from the SS pin to GND. Smooth control of the output voltage is maintained during start up. The equation for the slow start time is shown in Equation 1. VFB voltage is 0.765 V and SS pin source current is 6μA. C (nF)xV ´1.1 C (nF)x0.765´1.1 SS REF SS t (ms)= = SS I (mA) 6 SS (1) TPS54625 contains a unique circuit to prevent current from being pulled from the output during startup if the output is pre-biased. When the soft-start commands a voltage higher than the pre-bias level (internal soft-start becomes greater than feedback voltage V ), the controller slowly activates synchronous rectification by starting FB the first low side FET gate driver pulses with a narrow on-time. It then increments that on-time on a cycle-by- cycle basis until it coincides with the time dictated by (1-D), where D is the duty cycle of the converter. This scheme prevents the initial sinking of the pre-bias output, and ensure that the out voltage (VO) starts and ramps up smoothly into regulation and the control loop is given time to transition from pre-biased start-up to normal modeoperation. PowerGood TPS54625 has power-good open drain output. The power-good function is activated after soft start has finished. The power good function becomes active after 1.7 times soft-start time. When the output voltage becomes within –10% of the target value, internal comparators detect power good state and the power good signal becomes high. Rpg resistor value, which is connected between PG and VREG5, is required from 25 kΩ to 150 kΩ. If the feedbackvoltagegoesunder15%ofthetargetvalue,thepowergoodsignalbecomeslow. Copyright©2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:TPS54625

TPS54625 SLVSC33 –AUGUST2013 www.ti.com OutputDischargeControl TPS54625 discharges the output when EN is low, or the controller is turned off by the protection functions (UVP, UVLO and thermal shutdown). The device discharges the output using an internal 100-Ω MOSFET which is connected to VO and GND. The internal low-side MOSFET is not turned on for the output discharge operation to avoidthepossibilityofcausingnegativevoltageattheoutput. CurrentProtection The output over-current protection(OCP) is implemented using a cycle-by-cycle valley detect control circuit. The switch current is monitored by measuring the low-side FET switch voltage between the SW and GND. This voltage is proportional to the switch current. To improve accuracy, the voltage sensing is temperature compensated. During the on time of the high-side FET switch, the switch current increases at a linear rate determined by Vin, Vout, the on-time and the output inductor value. During the on time of the low-side FET switch, this current decreases linearly. The average value of the switch current is the load current Iout. The TPS54625 constantly monitorsthelow-sideFETswitchvoltage,whichisproportionaltotheswitchcurrent,duringthelow-sideon-time. If the measured voltage is above the voltage proportional to the current limit, an internal counter is incremented per each SW cycle and the converter maintains the low-side switch on until the measured voltage is below the voltage corresponding to the current limit at which time the switching cycle is terminated and a new switching cycle begins. In subsequent switching cycles, the on-time is set to a fixed value and the current is monitored in thesamemanner. There are some important considerations for this type of over-current protection. The load current one half of the peak-to-peak inductor current is higher than the over-current threshold. Also, when the current is being limited, the output voltage tends to fall as the demanded load current may be higher than the current available from the converter.Thismaycausetheoutputvoltagetofall. Over/UnderVoltageProtection TPS54625 detects over and under voltage conditions by monitoring the feedback voltage (VFB). This function is enabledafterapproximately1.7xtimesthesoftstarttime. When the feedback voltage becomes higher than 125% of the target voltage, the OVP comparator output goes highandthecircuitlatchesandboththehigh-sideMOSFETdriverandthelow-sideMOSFETdriverturnoff. When the feedback voltage becomes lower than 65% of the target voltage, the UVP comparator output goes high and an internal UVP delay counter begins. After 250us, the device latches off both internal top and bottom MOSFET. UVLOProtection Under voltage lock out protection (UVLO) monitors the voltage of V . When the VREG5 voltage is lower REG5.pin thanUVLOthresholdvoltage,TheTPS54625isshutoff.Thisprotectionisnon-latching. ThermalShutdown Thermal protection is self-activating. If the junction temperature exceeds the threshold value (typically 165°C), theTPS54625isshutoff.Thisisnon-latchprotection. 8 SubmitDocumentationFeedback Copyright©2013,TexasInstrumentsIncorporated ProductFolderLinks:TPS54625

TPS54625 www.ti.com SLVSC33 –AUGUST2013 TYPICAL CHARACTERISTICS V =12V,T =25°C(unlessotherwisenoted) IN A V CURRENT V SHUTDOWNCURRENT IN IN vs vs JUNCTIONTEMPERATURE JUNCTIONTEMPERATURE 14 1200 EN = 0V 12 1000 10 A) 800 A)(µ (cid:29)ent ( urrent 8 urr 600 C C n ply dow 6 Sup 400 Shut 4 200 2 VIN =12V EN = 5 V VIN = 12 V 0 0 ±50 0 50 100 150 ±50 0 50 100 150 Junction Temperature (ƒC) JunctionTemperature(°C) C009 C008 Figure1. Figure2. ENCURRENT 1.05-VOUTPUTVOLTAGE vs vs ENVOLTAGE OUTPUTCURRENT 50 1.07 Vin = 12 V Vo = 1.05 V 45 40 1.06 35 (cid:29)A) V) Current ( 2350 Voltage ( 1.05 N Input 20 Output E 15 1.04 10 Vin = 5 V 5 Vin = 12 V Vin = 18 V 0 1.03 0 5 10 15 20 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 EN Input Voltage (V) Output Current (A) C010 C006 Figure3. Figure4. Copyright©2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:TPS54625

TPS54625 SLVSC33 –AUGUST2013 www.ti.com TYPICAL CHARACTERISTICS (continued) V =12V,T =25°C(unlessotherwisenoted) IN A 1.05-VOUTPUTVOLTAGE vs INPUTVOLTAGE 1.05-V,0-mAto6.5-ALOADTRANSIENTRESPONSE 1.07 Io = 0A–6.5A S/R = 0.35A/μs Vo (50 mV/div) 1.06 V) e ( g a olt1.05 Io (2A/div) V ut p ut O 1.04 Io = 0 A Io = 1 A 1.03 0 5 10 15 20 Time (100μs/div) L004_SLVSC33 Input Voltage (V) C007 Figure5. Figure6. START-UPWAVEFORM EFFICIENCYvsOUTPUTCURRENT(12V) 100 EN (10 V/div) Vi = 12 V 90 VREG (5 V/div) 80 %) y ( nc 70 e ci Vo (0.5 V/div) Effi 60 50 Io = 0A Vo = 1.8 V Css = 8200 pF Vo = 3.3 V Vo = 5 V 40 Time (1 ms/div) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 L003_SLVSC33 Output Current (A) C003 Figure7. Figure8. 10 SubmitDocumentationFeedback Copyright©2013,TexasInstrumentsIncorporated ProductFolderLinks:TPS54625

TPS54625 www.ti.com SLVSC33 –AUGUST2013 TYPICAL CHARACTERISTICS (continued) V =12V,T =25°C(unlessotherwisenoted) IN A SWITCHINGFREQUENCY SWITCHINGFREQUENCY vs vs INPUTVOLTAGE(I =1A) OUTPUTCURRENT O 900 900 850 850 800 800 z) 750 z) 750 H H k k cy (700 cy ( 700 n n e e u u eq650 eq 650 Fr Fr g g n600 n 600 hi hi Switc550 VVoo == 11..025 V V Switc 550 Vo = 1.5 V 500 500 Vo = 1.8 V Vo=1.05V Vo = 2.5 V 450 450 Vo=1.8V Vo = 3.3 V Vo = 5 V Vo=3.3V 400 400 0 5 10 15 20 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 Input Voltage (V) Output Current (A) C004 C005 Figure9. Figure10. OUTPUTCURRENT vs VFBVOLTAGEvsJUNCTIONTEMPERATURE AMBIENTTEMPERATURE 0.780 7 Vin = 12 V Io = 1 A 6 0.775 5 0.770 oltage (V) 0.765 Current (A) 4 VFB V Output 3 0.760 2 Vo = 1.05 V Vo = 1.8 V 0.755 1 Vo = 2.5 V Vo = 3.3 V VFB Vo = 5 V 0.750 0 ±50 0 50 100 150 0 20 40 60 80 100 Junction Temperature (ƒC) Ambient Temperature (ƒC) C011 C012 Figure11. Figure12. Copyright©2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:TPS54625

TPS54625 SLVSC33 –AUGUST2013 www.ti.com TYPICAL CHARACTERISTICS (continued) V =12V,T =25°C(unlessotherwisenoted) IN A VOLTAGERIPPLEATINPUT(I =6.5A) VOLTAGERIPPLEATOUTPUT(I =6.5A) O O Vo = 1.05 V Vo = 1.05 V Io = 6.5A Io = 6.5A Vi (50 mV/div) Vo (10 mV/div) SW (5 V/div) SW (5 V/div) Time (1 ms/div) Time (100μs/div) L001_SLVSC33 L002_SLVSC33 Figure13. Figure14. 12 SubmitDocumentationFeedback Copyright©2013,TexasInstrumentsIncorporated ProductFolderLinks:TPS54625

TPS54625 www.ti.com SLVSC33 –AUGUST2013 DESIGN GUIDE StepByStepDesignProcedure Tobeginthedesignprocess,youmustknowafewapplicationparameters: • Inputvoltagerange • Outputvoltage • Outputcurrent • Outputvoltageripple • Inputvoltageripple U1 TPS54625PWP 1.05V, 6.5A Figure15. Schematic OutputVoltageResistorsSelection The output voltage is set with a resistor divider from the output node to the VFB pin. It is recommended to use 1%toleranceorbetterdividerresistors.StartbyusingEquation2 tocalculateV . OUT To improve efficiency at very light loads consider using larger value resistors, too high of resistance will be more susceptibletonoiseandvoltageerrorsfromtheVFBinputcurrentwillbemorenoticeable. ( R1) VOUT=0.765 • 1 + −R2 (2) OutputFilterSelection TheoutputfilterusedwiththeTPS54625isanLCcircuit.ThisLCfilterhasdoublepoleat: 1 F = P 2p L ´C OUT OUT (3) At low frequencies, the overall loop gain is set by the output set-point resistor divider network and the internal gain of the TPS54625. The low frequency phase is 180 degrees. At the output filter pole frequency, the gain rolls off at a –40 dB per decade rate and the phase drops rapidly. D-CAP2™ introduces a high frequency zero that reduces the gain roll off to –20 dB per decade and increases the phase to 90 degrees one decade above the zero frequency. The inductor and capacitor selected for the output filter must be selected so that the double pole of Equation 3 is located below the high frequency zero but close enough that the phase boost provided be the high frequency zero provides adequate phase margin for a stable circuit. To meet this requirement use the valuesrecommendedinTable1 Copyright©2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:TPS54625

TPS54625 SLVSC33 –AUGUST2013 www.ti.com Table1.RecommendedComponentValues OutputVoltage(V) R1(kΩ) R2(kΩ) C4(pF) L1(µH) C8+C9(µF) 1 6.81 22.1 5-220 1.0-1.5-4.7 22-68 1.05 8.25 22.1 5-220 1.0-1.5-4.7 22-68 1.2 12.7 22.1 5-100 1.0-1.5-4.7 22-68 1.5 21.5 22.1 5-68 1.0-1.5-4.7 22-68 1.8 30.1 22.1 5-22 1.2-1.5–4.7 22-68 2.5 49.9 22.1 5-22 1.5-2.2–4.7 22-68 3.3 73.2 22.1 5-22 1.8-2.2–4.7 22-68 5 124 22.1 5-22 2.5-3.3–4.7 22-68 For higher output voltages at or above 1.8 V, additional phase boost can be achieved by adding a feed forward capacitor(C4)inparallelwithR1. Since the DC gain is dependent on the output voltage, the required inductor value will increase as the output voltage increases. For higher output voltages at or above 1.8 V, additional phase boost can be achieved by addingafeedforwardcapacitor(C4)inparallelwithR1 The inductor peak-to-peak ripple current, peak current and RMS current are calculated using Equation 4, Equation 5 and Equation 6. The inductor saturation current rating must be greater than the calculated peak current and the RMS or heating current rating must be greater than the calculated RMS current. Use 650 kHz for f . SW Use 650 kHz for f and also use 1.5µH for Lo. Make sure the chosen inductor is rated for the peak current of SW Equation5andtheRMScurrentofEquation6. V V - V Ilp - p = ¾OUT · ¾IN (max) OUT V L · f IN (max) O SW (4) Ilp - p I = I +  lpeak O 2 (5) − √ 1 I = I 2+ −Ilp - p2 Lo(RMS) O 12 (6) For this design example, the calculated peak current is 7.01 A and the calculated RMS current is 6.51 A. The inductor used is a TDK SPM6530-1R5M100 with a peak current rating of 11.5 A and an RMS current rating of 11 A. The capacitor value and ESR determines the amount of output voltage ripple. The TPS54625 is intended for use with ceramic or other low ESR capacitors. Recommended values range from 22µF to 68µF. Use Equation 7 to determinetherequiredRMScurrentratingfortheoutputcapacitor. V • (V - V ) I =−−OUT IN OUT CO(RMS) √12 •V •L •f IN O SW (7) For this design two TDK C3216X5R0J226M 22µF output capacitors are used. The typical ESR is 2 mΩ each. ThecalculatedRMScurrentis0.286Aandeachoutputcapacitorisratedfor4A. InputCapacitorSelection The TPS54625 requires an input decoupling capacitor and a bulk capacitor is needed depending on the application. A ceramic capacitor over 10 μF is recommended for the decoupling capacitor. An additional 0.1 µF capacitor from pin 14 to ground is recommended to improve the EMI performance. The capacitor voltage rating needstobegreaterthanthemaximuminputvoltage. BootstrapCapacitorSelection A 0.1 µF ceramic capacitor must be connected between the VBST to SW pin for proper operation. It is recommendedtouseaceramiccapacitor. 14 SubmitDocumentationFeedback Copyright©2013,TexasInstrumentsIncorporated ProductFolderLinks:TPS54625

TPS54625 www.ti.com SLVSC33 –AUGUST2013 VREG5CapacitorSelection A 1.0 µF ceramic capacitor must be connected between the VREG5 to GND pin for proper operation. It is recommendedtouseaceramiccapacitor. THERMAL INFORMATION This PowerPad™ package incorporates an exposed thermal pad that is designed to be directly to an external heatsink. The thermal pad must be soldered directly to the printed board (PCB). After soldering, the PCB can be used as a heatsink. In addition, through the use of thermal vias, the thermal pad can be attached directly to the appropriate copper plane shown in the electrical schematic for the device, or alternatively, can be attached to a special heatsink structure designed into the PCB. This design optimizes the heat transfer from the integrated circuit(IC). For additional information on the PowerPAD™ package and how to use the advantage of its heat dissipating abilities, refer to Technical Brief, PowerPAD™ Thermally Enhanced Package, Texas Instruments Literature No. SLMA002 andApplicationBrief,PowerPAD™MadeEasy,TexasInstrumentsLiteratureNo.SLMA004. Theexposedthermalpaddimensionsforthispackageareshowninthefollowingillustration. 14 8 Thermal Pad 2.46 ° 1 7 2.31 Figure16. ThermalPadDimensions Copyright©2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:TPS54625

TPS54625 SLVSC33 –AUGUST2013 www.ti.com LAYOUT CONSIDERATIONS 1. A top side area should be filled with ground as much as possible due to relatively higher current output device. 2. The ground area under the device thermal pad should be large as possible and directly connect to the thermalpad.Also2nd,3rdand4thPCBlayershouldbeconnectedtogrounddirectlyfromthethermalpad. 3. Keeptheinputswitchingcurrentloopassmallaspossible. 4. Keep the SW node as physically small and short as possible to minimize parasitic capacitance and inductance and to minimize radiated emissions. Kelvin connections should be brought from the output to the feedbackpinofthedevice. 5. Keepanalogandnon-switchingcomponentsawayfromswitchingcomponents. 6. Makeasinglepointconnectionfromthesignalgroundtopowerground. 7. Donotallowswitchingcurrenttoflowunderthedevice. 8. KeepthepatternlinesforVINandPGNDbroad. 9. ExposedpadofdevicemustbeconnectedtoPGNDwithsolder. 10. VREG5capacitorshouldbeplacednearthedevice,andconnectedPGND. 11. OutputcapacitorshouldbeconnectedtoabroadpatternofthePGND. 12. Voltagefeedbackloopshouldbeasshortaspossible,andpreferablywithgroundshield. 13. LowerresistorofthevoltagedividerwhichisconnectedtotheVFBpinshouldbetiedtoSGND. 14. ProvidingsufficientviaispreferableforVIN,SWandPGNDconnection. 15. PCBpatternforVIN,SW,andPGNDshouldbeasbroadaspossible. 16. VINCapacitorshouldbeplacedasnearaspossibletothedevice. VIN Additional Thermal VIN Vias VCIUNR ORVEENRT INPUT STABILITY BYPASS CAPACITOR CAPACITOR FEEDBACK VOUT EXPOSED VIN2 RESISTORS POWERPAD AREA VFB VIN1 BOOST VREG5 VBST CAPACITOR VOUT BIAS SS SW1 CAP GND SW2 OUTPUT INDUCTOR OUTPUT PG PGND1 SLOW FILTER START CAPACITOR CAP EN PGND2 Connection to POWER GROUND on internal or ANALOG Additional bottom layer GROUND Thermal TRACE Vias To Enable Control POWER GROUND VIAto Ground Plane Etch on Bottom Layer or Under Component Figure17. PCBLayout 16 SubmitDocumentationFeedback Copyright©2013,TexasInstrumentsIncorporated ProductFolderLinks:TPS54625

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS54625PWP ACTIVE HTSSOP PWP 14 90 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 PS54625 & no Sb/Br) TPS54625PWPR ACTIVE HTSSOP PWP 14 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 PS54625 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 12-Feb-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS54625PWPR HTSSOP PWP 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 12-Feb-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS54625PWPR HTSSOP PWP 14 2000 350.0 350.0 43.0 PackMaterials-Page2

None

None

None

IMPORTANTNOTICEANDDISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2020, Texas Instruments Incorporated