Product Sample & Technical Tools & Support & Folder Buy Documents Software Community TPS54428 SLVSB42D–NOVEMBER2011–REVISEDJANUARY2016 TPS54428 4.5-V to 18-V Input, 4-A Synchronous Step-Down Converter With Eco-Mode™ 1 Features The TPS54428 enables system designers to complete the suite of various end-equipment power • D-CAP2™ModeEnablesFastTransient 1 bus regulators with a cost effective, low component Response count,lowstandbycurrentsolution. • LowOutputRippleandAllowsCeramicOutput The main control loop for the TPS54428 uses the D- Capacitor CAP2™ mode control that provides a fast transient • WideVIN InputVoltageRange:4.5Vto18V response with no external compensation • OutputVoltageRange:0.76Vto7.0V components. • HighlyEfficientIntegratedFETsOptimized The adaptive on-time control supports seamless forLowerDutyCycleApplications transition between PWM mode at higher load –70mΩ(HighSide)and53mΩ (LowSide) conditionsandEco-mode™operationatlightloads. • HighEfficiency,LessThan10μAatShutdown Eco-mode™ allows the TPS54428 to maintain high • HighInitialBandgapReferenceAccuracy efficiencyduringlighterloadconditions. • AdjustableSoftStart The TPS54428 also has a proprietary circuit that • Pre-BiasedSoftStart enables the device to adopt to both low equivalent series resistance (ESR) output capacitors, such as • 650-kHzSwitchingFrequency(f ) SW POSCAP or SP-CAP, and ultra-low ESR ceramic • CycleByCycleOverCurrentLimit capacitors. The device operates from 4.5-V to 18-V • Auto-SkipEco-mode™forHighEfficiencyatLight VINinput. Load The output voltage can be programmed between 0.76Vand7.0V. 2 Applications Thedevicealsofeaturesanadjustablesoftstarttime. • WideRangeofApplicationsforLowVoltage System The TPS54428 is available in 8-pin DDA package and 10-pin DRC packages, and is designed to – DigitalTVPowerSupply operateovertheambienttemperaturerangeof –40°C – HighDefinitionBlu-rayDisc™Players to85°C. – NetworkingHomeTerminal DeviceInformation(1) – DigitalSetTopBox(STB) PARTNUMBER PACKAGE BODYSIZE(NOM) 3 Description SOPowerPAD(8) 4.90mm×3.90mm TPS54428 The TPS54428 is an adaptive on-time D-CAP2™ VSON(10) 3.00mm×3.00mm modesynchronousbuckconverter. (1) For all available packages, see the orderable addendum at theendofthedatasheet. SimplifiedSchematic 1.05-VLoadTransientResponse . TPS54428DDA Vout(50mV/div) Iout(2A/div) 100us/div 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

TPS54428 SLVSB42D–NOVEMBER2011–REVISEDJANUARY2016 www.ti.com Table of Contents 1 Features.................................................................. 1 7.4 DeviceFunctionalModes..........................................9 2 Applications........................................................... 1 8 ApplicationandImplementation........................ 11 3 Description............................................................. 1 8.1 ApplicationInformation............................................11 4 RevisionHistory..................................................... 2 8.2 TypicalApplication .................................................11 5 PinConfigurationandFunctions......................... 3 9 PowerSupplyRecommendations...................... 15 6 Specifications......................................................... 4 10 Layout................................................................... 15 6.1 AbsoluteMaximumRatings......................................4 10.1 LayoutGuidelines.................................................15 6.2 ESDRatings ............................................................4 10.2 LayoutExamples...................................................16 6.3 RecommendedOperatingConditions.......................4 10.3 ThermalConsiderations........................................17 6.4 ThermalInformation..................................................5 11 DeviceandDocumentationSupport................. 18 6.5 ElectricalCharacteristics...........................................5 11.1 DocumentationSupport........................................18 6.6 TypicalCharacteristics..............................................6 11.2 CommunityResources..........................................18 7 DetailedDescription.............................................. 8 11.3 Trademarks...........................................................18 7.1 Overview...................................................................8 11.4 ElectrostaticDischargeCaution............................18 7.2 FunctionalBlockDiagram.........................................8 11.5 Glossary................................................................18 7.3 FeatureDescription...................................................8 12 Mechanical,Packaging,andOrderable Information........................................................... 18 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionC(October2015)toRevisionD Page • UpdatedFigure20................................................................................................................................................................ 16 ChangesfromRevisionB(March2013)toRevisionC Page • AddedPinConfigurationandFunctionssection,ESDRatingstable,FeatureDescriptionsection,DeviceFunctional Modes,ApplicationandImplementationsection,PowerSupplyRecommendationssection,Layoutsection,Device andDocumentationSupportsection,andMechanical,Packaging,andOrderableInformationsection .............................. 1 ChangesfromRevisionA(January2012)toRevisionB Page • ChangedtheDescriptiontexttoincludetheDRCpackage................................................................................................... 1 • AddedFigure21................................................................................................................................................................... 16 ChangesfromOriginal(November2011)toRevisionA Page • DeletedT =–20ºCto85ºCfromELECCHARAtable,CURRENTLIMITsection,TestConditionsstatement.................... 5 A 2 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS54428

TPS54428 www.ti.com SLVSB42D–NOVEMBER2011–REVISEDJANUARY2016 5 Pin Configuration and Functions DDAPackagewithThermalPad DRCPackagewithThermalPad 8-PinSOPowerPAD 10-PinVSON TopView TopView 1 EN VIN 8 EN 1 10 VIN VFB 2 Exposed 9 VIN 2 VFB VBST 7 Thermal VREG5 3 Die PAD 8 VBST on TPS54428 Underside SS 4 PGND 7 SW 3 VREG5 SW 6 GND 5 6 SW PowerPAD 4 SS GND 5 PinFunctions PIN DESCRIPTION NAME DDA DRC EN 1 1 Enableinputcontrol.Activehigh. VFB 2 2 Converterfeedbackinput.Connecttooutputvoltagewithfeedbackresistordivider. VREG5 3 3 5.5Vpowersupplyoutput.Acapacitor(typical1µF)shouldbeconnectedtoGND. VREG5isnotactivewhenENislow. SS 4 4 Soft-startcontrol.AnexternalcapacitorshouldbeconnectedtoGND. GND 5 Groundpin.Powergroundreturnforswitchingcircuit.ConnectsensitiveSSand VFBreturnstoGNDatasinglepoint. GND 5 Groundpin.ConnectsensitiveSSandVFBreturnstoGNDatasinglepoint. SW 6 6,7 Switchnodeconnectionbetweenhigh-sideNFETandlow-sideNFET. VBST 7 8 Supplyinputforthehigh-sideFETgatedrivecircuit.Connect0.1µFcapacitor betweenVBSTandSWpins.AninternaldiodeisconnectedbetweenVREG5and VBST. VIN 8 9,10 Inputvoltagesupplypin. ExposedThermal Backside Thermalpadofthepackage.Mustbesolderedtoachieveappropriatedissipation. Pad MustbeconnectedtoGND. ExposedThermal Backside Thermalpadofthepackage.PGNDpowergroundreturnofinternallow-sideFET. Pad Mustbesolderedtoachieveappropriatedissiapation. Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:TPS54428

TPS54428 SLVSB42D–NOVEMBER2011–REVISEDJANUARY2016 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT VIN,EN –0.3 20 V VBST –0.3 26 V VBST(10nstransient) –0.3 28 V Inputvoltage VBST(vsSW) –0.3 6.5 V VFB,SS –0.3 6.5 V SW –2 20 V SW(10nstransient) –3 22 V VREG5 –0.3 6.5 V Outputvoltage GND –0.3 0.3 V VoltagefromGNDtothermalpad,V –0.2 0.2 V diff Operatingjunctiontemperature,T –40 150 °C J Storagetemperature,T –55 150 °C stg (1) Stressesbeyondthoselistedunderabsolutemaximumratingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderrecommendedoperating conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. 6.2 ESD Ratings VALUE UNIT Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±2000 V V(ESD) Electrostaticdischarge Charged-devicemodel(CDM),perJEDECspecificationJESD22- C101(2) ±500 V (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V Supplyinputvoltagerange 4.5 18 V IN VBST –0.1 24 V VBST(10nstransient) -0.1 27 V VBST(vsSW) –0.1 5.7 V SS –0.1 5.7 V V Inputvoltagerange EN –0.1 18 V I VFB –0.1 5.5 V SW –1.8 18 V SW(10nstransient) –3 21 V GND –0.1 0.1 V V Outputvoltagerange VREG5 –0.1 5.7 V O I OutputCurrentrange I 0 10 mA O VREG5 T Operatingfree-airtemperature –40 85 °C A T Operatingjunctiontemperature –40 150 °C J 4 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS54428

TPS54428 www.ti.com SLVSB42D–NOVEMBER2011–REVISEDJANUARY2016 6.4 Thermal Information TPS54428 THERMALMETRIC(1) DDA(SO DRC(VSON) UNIT POWERPAD) 8PINS 10PINS R Junction-to-ambientthermalresistance 42.1 43.2 °C/W θJA R Junction-to-case(top)thermalresistance 50.9 53.8 °C/W θJCtop R Junction-to-boardthermalresistance 31.8 18.2 °C/W θJB ψ Junction-to-topcharacterizationparameter 5 0.6 °C/W JT ψ Junction-to-boardcharacterizationparameter 13.5 18.3 °C/W JB R Junction-to-case(bottom)thermalresistance 7.1 4.7 °C/W θJCbot (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report,SPRA953. 6.5 Electrical Characteristics overoperatingfree-airtemperaturerange,V =12V(unlessotherwisenoted) IN PARAMETER TESTCONDITIONS MIN TYP MAX UNIT SUPPLYCURRENT V current,T =25°C,EN=5V, I Operating-non-switchingsupplycurrent IN A 950 1400 μA VIN V =0.8V FB I Shutdownsupplycurrent V current,T =25°C,EN=0V 3.0 10 μA VINSDN IN A LOGICTHRESHOLD V ENhigh-levelinputvoltage EN 1.6 V ENH V ENlow-levelinputvoltage EN 0.6 V ENL R ENpinresistancetoGND V =12V 225 450 900 kΩ EN EN V VOLTAGEANDDISCHARGERESISTANCE FB T =25°C,V =1.05V,I =10mA, A O O 771 Eco-mode™operation T =25°C,V =1.05V,continuousmode VFBTH VFBthresholdvoltage opAeration O 757 765 773 mV T =–40°Cto85°C,V =1.05V,continuous mAodeoperation(1) O 751 765 779 I V inputcurrent V =0.8V,T =25°C 0 ±0.1 μA VFB FB FB A V OUTPUT REG5 T =25°C,6.0V<V <18V, V V outputvoltage A IN 5.2 5.5 5.7 V VREG5 REG5 0<I <5mA VREG5 V Lineregulation 6V<V <18V,I =5mA 25 mV LN5 IN VREG5 V Loadregulation 0mA<I <5mA 100 mV LD5 VREG5 I Outputcurrent V =6V,V =4.0V,T =25°C 60 mA VREG5 IN REG5 A MOSFET R Highsideswitchresistance,DDA 25°C,V -SW=5.5V 70 mΩ DS(on)h BST R Highsideswitchresistance,DRC 25°C,V -SW=5.5V 74 mΩ DS(on)h BST R Lowsideswitchresistance 25°C 53 mΩ DS(on)l CURRENTLIMIT I Currentlimit Lout=1.5µH (1) 4.6 5.3 6.8 A ocl (1) Notproductiontested. Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:TPS54428

TPS54428 SLVSB42D–NOVEMBER2011–REVISEDJANUARY2016 www.ti.com Electrical Characteristics (continued) overoperatingfree-airtemperaturerange,V =12V(unlessotherwisenoted) IN PARAMETER TESTCONDITIONS MIN TYP MAX UNIT THERMALSHUTDOWN Shutdowntemperature(1) 170 T Thermalshutdownthreshold °C SDN Hysteresis(1) 35 ON-TIMETIMERCONTROL t Ontime V =12V,V =1.05V 150 ns ON IN O t Minimumofftime T =25°C,V =0.7V 260 310 ns OFF(MIN) A FB SOFTSTART I SSchargecurrent V =0V 4.2 6.0 7.8 μA SSC SS I SSdischargecurrent V =1V 0.1 0.2 mA SSD SS UVLO WakeupV voltage 3.45 3.75 4.05 REG5 UVLO UVLOthreshold V HysteresisV voltage 0.19 0.32 0.45 REG5 6.6 Typical Characteristics VIN=12V,TA=25°C(unlessotherwisenoted) 1200 20 1000 A m 15 nt -Am 800 urrent - I- Supply CurreCC 460000 csdn - Shutdown C 150 c v 200 I 0 0 -50 0 50 100 150 -50 0 50 100 150 TJ- Junction Temperature - °C TJJunction Temperature - °C Figure1.VINCurrentvsJunctionTemperature Figure2.VINShutdownCurrentvsJunctionTemperature 50 1.1 VI= 18 V 45 40 1.075 35 V EN Input Current -Am12235500 - Output Voltage - O 1.05 VI= 5 V VIV= I1=8 1V2 V V 1.025 10 5 0 1 0 5 10 15 20 0 1 2 3 4 EN Input Voltage - V IO- Output Current -A Figure3.ENCurrentvsENVoltage Figure4.1.05-VOutputVoltagevsOutputCurrent 6 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS54428

TPS54428 www.ti.com SLVSB42D–NOVEMBER2011–REVISEDJANUARY2016 Typical Characteristics (continued) VIN=12V,TA=25°C(unlessotherwisenoted) 1.08 100 90 1.07 V Output Voltage - 1.06 IO= 10 mA Efficiency - % 7800 VO= 1.8 V VO= 2.5 V VO= 3.3 V - 60 VO1.05 IO= 1A 50 1.04 40 0 5 10 15 20 0 1 2 3 4 5 VI- Input Voltage - V IO- Output Current -A Figure5.1.05-VOutputVoltagevsVINVoltage Figure6.EfficiencyvsOutputCurrent 100 900 90 850 VO= 3.3 V 80 VO= 2.5 V kHz 800 VO= 5 V VO= 3.3 V VO= 2.5 V VO= 1.8 V 70 y - 750 c Efficiency - % 34560000 VO= 1.8 V Switching Frequen 566750500000 VO= 1.5 V VO= 1.2 VVO= 1.05 V - w 20 fs500 10 450 0 400 0.001 0.01 0.1 0 5 10 15 20 IO- Output Current -A VI- Input Voltage - V Figure7.LightLoadEfficiencyvsOutputCurrent Figure8.SwitchingFrequencyvsInputVoltage 800 0.78 700 0.775 cy - kHz 600 VO= 1.05 V VO= 1.8 V VO= 3.3 V 0.77 g Frequen 450000 oltage - V 0.765 n V chi 300 b - wit Vf 0.76 S f - sw200 0.755 100 0 0.75 0 1 2 3 4 -50 0 50 100 150 IO- Output Current -A TJ- Junction Temperature - °C Figure9.SwitchingFrequencyvsOutputCurrent Figure10.VFBVoltagevsJunctionTemperature Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:TPS54428

TPS54428 SLVSB42D–NOVEMBER2011–REVISEDJANUARY2016 www.ti.com 7 Detailed Description 7.1 Overview The TPS54428 is a 4-A synchronous step-down (buck) converter with two integrated N-channel MOSFETs. It operates using D-CAP2™ mode control. The fast transient response of D-CAP2™ control reduces the output capacitance required to meet a specific level of performance. Proprietary internal circuitry allows the use of low ESRoutputcapacitorsincludingceramicandspecialpolymertypes. 7.2 Functional Block Diagram VIN EN EN 1 VIN Logic 8 VREG5 VBST 7 Control Logic Ref SS 1 shot SW VO 2 6 VFB XCON VREG5 VREG5 Ceramic 3 Capacitor SGND SS 5 4 SW GND Softstart ZC PGND SS PGND SW SGND PGND VIN VREG5 UVLO Protection TSD Logic UVLO REF Ref 7.3 Feature Description 7.3.1 PWMOperation The main control loop of the TPS54428 is an adaptive on-time pulse width modulation (PWM) controller that supports a proprietary D-CAP2™ mode control. D-CAP2™ mode control combines constant on-time control with an internal compensation circuit for pseudo-fixed frequency and low external component count configuration with bothlowESRandceramicoutputcapacitors.Itisstableevenwithvirtuallynorippleattheoutput. At the beginning of each cycle, the high-side MOSFET is turned on. This MOSFET is turned off after internal one shot timer expires. This one shot is set by the converter input voltage, VIN, and the output voltage, VO, to maintain a pseudo-fixed frequency over the input voltage range, hence it is called adaptive on-time control. The one-shot timer is reset and the high-side MOSFET is turned on again when the feedback voltage falls below the reference voltage. An internal ramp is added to reference voltage to simulate output ripple, eliminating the need forESRinducedoutputripplefromD-CAP2™modecontrol. 8 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS54428

TPS54428 www.ti.com SLVSB42D–NOVEMBER2011–REVISEDJANUARY2016 Feature Description (continued) 7.3.2 PWMFrequencyandAdaptiveOn-TimeControl TPS54428 uses an adaptive on-time control scheme and does not have a dedicated on board oscillator. The TPS54428 runs with a pseudo-constant frequency of 650 kHz by using the input voltage and output voltage to set the on-time one-shot timer. The on-time is inversely proportional to the input voltage and proportional to the outputvoltage,therefore,whenthedutyratioisVOUT/VIN,thefrequencyisconstant. 7.3.3 Auto-SkipEco-Mode™Control The TPS54428 is designed with Auto-Skip Eco-mode™ to increase light load efficiency. As the output current decreases from heavy load condition, the inductor current is also reduced and eventually comes to point that its rippled valley touches zero level, which is the boundary between continuous conduction and discontinuous conduction modes. The rectifying MOSFET is turned off when its zero inductor current is detected. As the load current further decreases the converter run into discontinuous conduction mode. The on-time is kept almost the same as is was in the continuous conduction mode so that it takes longer time to discharge the output capacitor with smaller load current to the level of the reference voltage. The transition point to the light load operation I currentcanbecalculatedinEquation1. OUT(LL) 1 (V - V ) ´ V I = ´ IN OUT OUT OUT(LL) 2 ´ L ´ f V SW IN (1) 7.4 Device Functional Modes 7.4.1 SoftStartandPre-BiasedSoftStart The soft start function is adjustable. When the EN pin becomes high, 6-µA current begins charging the capacitor which is connected from the SS pin to GND. Smooth control of the output voltage is maintained during start up. The equation for the slow start time is shown in Equation 2. VFB voltage is 0.765 V and SS pin source current is 6-uA. C6(nF) ´ Vref ´ 1.1 C6(nF) ´ 0.765 ´ 1.1 Tss(ms)= = Iss(mA) 6 (2) The TPS54428 contains a unique circuit to prevent current from being pulled from the output during startup if the output is pre-biased. When the soft-start commands a voltage higher than the pre-bias level (internal soft start becomes greater than feedback voltage V ), the controller slowly activates synchronous rectification by starting FB the first low side FET gate driver pulses with a narrow on-time. It then increments that on-time on a cycle-by- cycle basis until it coincides with the time dictated by (1-D), where D is the duty cycle of the converter. This scheme prevents the initial sinking of the pre-bias output, and ensure that the out voltage (VO) starts and ramps up smoothly into regulation and the control loop is given time to transition from pre-biased start-up to normal modeoperation. 7.4.2 CurrentProtection The output over-current protection (OCP) is implemented using a cycle-by-cycle valley detect control circuit. The switch current is monitored by measuring the low-side FET switch voltage between the SW pin and GND. This voltage is proportional to the switch current. To improve accuracy, the voltage sensing is temperature compensated. During the on time of the high-side FET switch, the switch current increases at a linear rate determined by Vin, Vout, the on-time and the output inductor value. During the on time of the low-side FET switch, this current decreases linearly. The average value of the switch current is the load current Iout. The TPS54428 constantly monitorsthelow-sideFETswitchvoltage,whichisproportionaltotheswitchcurrent,duringthelow-sideon-time. If the measured voltage is above the voltage proportional to the current limit, an internal counter is incremented per each SW cycle and the converter maintains the low-side switch on until the measured voltage is below the voltage corresponding to the current limit at which time the switching cycle is terminated and a new switching cycle begins. In subsequent switching cycles, the on-time is set to a fixed value and the current is monitored in the same manner. If the over current condition exists for 7 consecutive switching cycles, the internal OCL threshold is set to a lower level, reducing the available output current. When a switching cycle occurs where the switch current is not above the lower OCL threshold, the counter is reset and the OCL limit is returned to the highervalue. Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:TPS54428

TPS54428 SLVSB42D–NOVEMBER2011–REVISEDJANUARY2016 www.ti.com Device Functional Modes (continued) There are some important considerations for this type of over-current protection. The load current one half of the peak-to-peak inductor current is higher than the over-current threshold also when the current is being limited, the output voltage tends to fall as the demanded load current may be higher than the current available from the converter. This may cause the output voltage to fall. When the over current condition is removed, the output voltagereturnstotheregulatedvalue.Thisprotectionisnon-latching. 7.4.3 UVLOProtection Undervoltage lock out protection (UVLO) monitors the voltage of the VREG5 pin. When the VREG5 voltage is lowerthanUVLOthresholdvoltage,theTPS54428isshutoff.Thisprotectionisnon-latching. 7.4.4 ThermalShutdown TPS54428 monitors the temperature of itself. If the temperature exceeds the threshold value (typically 170°C), thedeviceisshutoff.Thisisnon-latchprotection. 10 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS54428

TPS54428 www.ti.com SLVSB42D–NOVEMBER2011–REVISEDJANUARY2016 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 8.1 Application Information TheTPS54428isdesignedtoprovideupto4-Aoutputcurrentfromaninputvoltagesourceof4.5Vto17V.The outputvoltagerangeisfrom0.76Vto6V. 8.2 Typical Application 4.5 to 18 V Δ 1 TPS54428DDA 1.05 V 4A 8200 pF Figure11. SchematicDiagramforThisDesignExample 8.2.1 DesignRequirements Tobeginthedesignprocess,youmustknowafewapplicationparameters: • Inputvoltagerange • Outputvoltage • Outputcurrent • Outputvoltageripple • Inputvoltageripple Table1.PerformanceSpecificationsSummary SPECIFICATIONS TESTCONDITIONS MIN TYP MAX UNIT Inputvoltagerange(V ) 4.5 12 18 V IN Outputvoltage(V ) 1.05 V OUT Operatingfrequency V =12V,I =2A 650 kHz IN OUT Outputcurrentrange 0 4 A Lineregulation I =2.5A ±0.33% O Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:TPS54428

TPS54428 SLVSB42D–NOVEMBER2011–REVISEDJANUARY2016 www.ti.com Typical Application (continued) Table1.PerformanceSpecificationsSummary(continued) SPECIFICATIONS TESTCONDITIONS MIN TYP MAX UNIT +0.9/– Loadregulation V =12V IN 0.1% Overcurrentlimit V =12V,L=1.5µH 4.6 5.3 6.8 A IN Outputripplevoltage V =12V,I =4A 15 mV IN OUT PP Maximumefficiency V =5V,I =0.7A 88% IN OUT 8.2.2 DetailedDesignProcedure 8.2.2.1 OutputVoltageResistorsSelection The output voltage is set with a resistor divider from the output node to the VFB pin. It is recommended to use 1%toleranceorbetterdividerresistors.StartbyusingEquation3 tocalculateV . OUT To improve efficiency at very light loads consider using larger value resistors, too high of resistance will be more susceptibletonoiseandvoltageerrorsfromtheVFBinputcurrentwillbemorenoticeable. æ R1ö V = 0.765 ´ 1+ OUT ç ÷ è R2ø (3) 8.2.2.2 OutputFilterSelection TheoutputfilterusedwiththeTPS54428isanLCcircuit.ThisLCfilterhasdoublepoleat: 1 F = P 2p L ´ C OUT OUT (4) At low frequencies, the overall loop gain is set by the output set-point resistor divider network and the internal gain of the TPS54428. The low frequency phase is 180 degrees. At the output filter pole frequency, the gain rolls off at a –40 dB per decade rate and the phase drops rapidly. D-CAP2™ introduces a high frequency zero that reduces the gain roll off to –20 dB per decade and increases the phase to 90 degrees one decade above the zero frequency. The inductor and capacitor selected for the output filter must be selected so that the double pole of Equation 4 is located below the high frequency zero but close enough that the phase boost provided be the high frequency zero provides adequate phase margin for a stable circuit. To meet this requirement use the valuesrecommendedinTable2. Table2.RecommendedComponentValues OutputVoltage(V) R1(kΩ) R2(kΩ) C4(pF)(1) L1(µH) C8+C9(µF) 1 6.81 22.1 1.5 22-68 1.05 8.25 22.1 1.5 22-68 1.2 12.7 22.1 1.5 22-68 1.5 21.5 22.1 1.5 22-68 1.8 30.1 22.1 5-22 2.2 22-68 2.5 49.9 22.1 5-22 2.2 22-68 3.3 73.2 22.1 5-22 2.2 22-68 5 124 22.1 5-22 3.3 22-68 6.5 165 22.1 5-22 3.3 22-68 (1) Optional For higher output voltages at or above 1.8 V, additional phase boost can be achieved by adding a feed forward capacitor(C4)inparallelwithR1 The inductor peak-to-peak ripple current, peak current and RMS current are calculated using Equation 5, Equation 6 and Equation 7. The inductor saturation current rating must be greater than the calculated peak current and the RMS or heating current rating must be greater than the calculated RMS current. Use 650 kHz for f . SW 12 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS54428

TPS54428 www.ti.com SLVSB42D–NOVEMBER2011–REVISEDJANUARY2016 Use 650 kHz for f . Make sure the chosen inductor is rated for the peak current of Equation 6 and the RMS SW currentofEquation7. Il = VOUT ´ VIN(MAX) - VOUT P-P V L ´ f IN(MAX) O SW (5) Il Il =I + P-P PEAK O 2 (6) 1 I = I 2 + Il 2 LO(RMS) O 12 P-P (7) For this design example, the calculated peak current is 4.51 A and the calculated RMS current is 4.01 A. The inductor used is a TDK SPM6530-1R5M100 with a peak current rating of 11.5 A and an RMS current rating of 11 A. The capacitor value and ESR determines the amount of output voltage ripple. The TPS54428 is intended for use with ceramic or other low ESR capacitors. Recommended values range from 22µF to 68µF. Use Equation 8 to determinetherequiredRMScurrentratingfortheoutputcapacitor. V ´ (V - V ) I = Ox IN OUT CO(RMS) 12 ´ V ´ L ´ f IN O SW (8) For this design two TDK C3216X5R0J226M 22µF output capacitors are used. The typical ESR is 2 mΩ each. ThecalculatedRMScurrentis0.286Aandeachoutputcapacitorisratedfor4A. 8.2.2.3 InputCapacitorSelection The TPS54428 requires an input decoupling capacitor and a bulk capacitor is needed depending on the application. A ceramic capacitor over 10µF is recommended for the decoupling capacitor. An additional 0.1 µF capacitor from pin 8 to ground is optional to provide additional frequency filtering. The capacitor voltage rating needstobegreaterthanthemaximuminputvoltage. 8.2.2.4 BootstrapCapacitorSelection A 0.1-µF ceramic capacitor must be connected between the VBST to SW pin for proper operation. It is recommendedtouseaceramiccapacitor. 8.2.2.5 VREG5CapacitorSelection A 1-µF ceramic capacitor must be connected between the VREG5 to GND pin for proper operation. It is recommendedtouseaceramiccapacitor Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:TPS54428

TPS54428 SLVSB42D–NOVEMBER2011–REVISEDJANUARY2016 www.ti.com 8.2.3 ApplicationCurves EN (10 V/div) Vout (50 mV/div) VREG5 (5 V/div) Iout (2A/div) Vout (0.5 V/div) 100ms/div 1 ms/div Figure12.1.05-VLoadTransientResponse Figure13.StartUpWaveform VO= 1.05 V Vo (10 mV/div) Vo = 1.5 V VIN (50 mV/div) SW (5 V/div) SW (5 V/div) 500 ns/div Figure14.VoltageRipplevsRippleatOutput(IO=4A) Figure15.VoltageRipplevsRippleatInput(IO=4A) 100 100 90 90 80 80 70 70 %) 60 %) 60 Efficiency ( 4500 Efficiency ( 4500 30 30 20 20 10 VIN = 12 V 10 VIN = 12 V VIN = 5.0 V VIN = 5.0 V 0 0 0 500 1000 1500 2000 2500 3000 3500 4000 1 10 100 1000 Output Current (mA) Output Current (mA) G000 G000 Figure16.Efficiency Figure17.Light-LoadEfficiency 14 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS54428

TPS54428 www.ti.com SLVSB42D–NOVEMBER2011–REVISEDJANUARY2016 1 0.5 0.8 0.4 0.6 0.3 UTP (%) 00..24 UTP (%) 00..12 O O Output Voltage, −−00..420 Output Voltage, −−00..210 −0.6 −0.3 IOUT = 0 A IOUT = 1 A −0.8 VIN = 12 V −0.4 IOUT = 2 A VIN = 5.0 V IOUT = 4 A −1 −0.5 0 500 1000 1500 2000 2500 3000 3500 4000 4.5 6 7.5 9 10.5 12 13.5 15 16.5 18 Output Current (mA) Input Voltage (V) G000 G000 Figure18.LoadRegulation,V =5VandV =12V Figure19.LineRegulation IN IN 9 Power Supply Recommendations TheTPS54428isdesignedtooperatefrominputsupplyvoltageintherangeof4.5Vto18V. Buck converters require the input voltage to be higher than the output voltage for proper operation. The maximum recommended operating duty cycle is 65%. Using that criteria, the minimum recommended input voltageisV /0.65. O 10 Layout 10.1 Layout Guidelines 1. Keeptheinputswitchingcurrentloopassmallaspossible. 2. Keep the SW node as physically small and short as possible to minimize parasitic capacitance and inductance and to minimize radiated emissions. Kelvin connections should be brought from the output to the feedbackpinofthedevice. 3. Keepanalogandnon-switchingcomponentsawayfromswitchingcomponents. 4. Makeasinglepointconnectionfromthesignalgroundtopowerground. 5. Donotallowswitchingcurrenttoflowunderthedevice. 6. KeepthepatternlinesforVINandPGNDbroad. 7. ExposedpadofdevicemustbeconnectedtoPGNDwithsolder. 8. VREG5capacitorshouldbeplacednearthedevice,andconnectedPGND. 9. OutputcapacitorshouldbeconnectedtoabroadpatternofthePGND. 10. Voltagefeedbackloopshouldbeasshortaspossible,andpreferablywithgroundshield. 11. LowerresistorofthevoltagedividerwhichisconnectedtotheVFBpinshouldbetiedtoSGND. 12. ProvidingsufficientviasforVIN,SWandPGNDconnection. 13. PCBpatternforVIN,SW,andPGNDshouldbeasbroadaspossible. 14. VINCapacitorshouldbeplacedasnearaspossibletothedevice. 15. The TPS54428 can supply relatively large current up to 4A. So heat dissipation may be a concern. The top- sideareaadjacenttotheTPS54428shouldbefilledwithgroundasmuchaspossibletodissipateheat. 16. The bottom-side area directly below the IC should a dedicated ground area. It should be directly connected to the thermal pad using vias as shown. The ground area should be as large as practical. Additional internal layerscanbededicatedasgroundplanesandconnectedtoviasaswell. Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:TPS54428

TPS54428 SLVSB42D–NOVEMBER2011–REVISEDJANUARY2016 www.ti.com 10.2 Layout Examples Additional Thermal VIN INPUT Vias BYPASS TO ENABLE CAPACITOR CONTROL VIN INPUT BYPASS CAPACITOR VIN FEEDBACK RESISTORS EN VIN BOOST CAPACITOR VFB VBST VOUT VREG5 SW OUTPUT BIAS SS EXPOSED PGND INDUCTOR Connection to CAP POWERPAD POWER GROUND AREA OUTPUT on internal or bottom layer SOFT FILTER START CAPACITOR Additional CAP Thermal Vias POWER GROUND ANALOG GROUND TRACE Figure20. TPS54428LayoutfortheDDAPackage VIN VIN INPUT BYPASS CAPACITOR VIN HIGH FREQUENCY FEEDBACK BYPASS RESISTORS TO ENABLE CAPACITOR CONTROL EN VIN VFB VIN BOOST VREG5 VBST CAPACITOR BIAS VOUT CAP SS SW SLOW START GND SW OUTPUT CAP INDUCTOR EXPOSED OUTPUT THERMALPAD FILTER ANALOG AREA CAPACITOR Connection to GROUND POWER GROUND TRACE on internal or POWER GROUND bottom layer VIAto Ground Plane Figure21. PCBLayoutfortheDRCPackage 16 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS54428

TPS54428 www.ti.com SLVSB42D–NOVEMBER2011–REVISEDJANUARY2016 10.3 Thermal Considerations This 8-pin DDA package incorporates an exposed thermal pad that is designed to be directly to an external heatsink. The thermal pad must be soldered directly to the printed board (PCB). After soldering, the PCB can be used as a heatsink. In addition, through the use of thermal vias, the thermal pad can be attached directly to the appropriate copper plane shown in the electrical schematic for the device, or alternatively, can be attached to a special heartsink structure designed into the PCB. This design optimizes the heat transfer from the integrated circuit(IC). For additional information on the exposed thermal pad and how to use the advantage of its heat dissipating abilities, refer to Technical Brief, PowerPAD™ Thermally Enhanced Package, SLMA002 and Application Brief, PowerPAD™MadeEasy,SLMA004. TheexposedthermalpaddimensionsfortheDDApackageareshowninFigure22. 8 5 Exposed Thermal Pad 2,40 1,65 1 4 3,10 2,65 Figure22. ThermalPadDimensions Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:TPS54428

TPS54428 SLVSB42D–NOVEMBER2011–REVISEDJANUARY2016 www.ti.com 11 Device and Documentation Support 11.1 Documentation Support TechnicalBrief,PowerPAD™ThermallyEnhancedPackage,SLMA002 ApplicationBrief,PowerPAD™MadeEasy,SLMA004. 11.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 11.3 Trademarks D-CAP2,E2EaretrademarksofTexasInstruments. Blu-rayDiscisatrademarkofBlu-rayDiscAssociation. Allothertrademarksarethepropertyoftheirrespectiveowners. 11.4 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 11.5 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 18 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS54428

PACKAGE OPTION ADDENDUM www.ti.com 1-Mar-2017 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS54428DDA ACTIVE SO PowerPAD DDA 8 75 Green (RoHS CU NIPDAU | CU SN Level-2-260C-1 YEAR -40 to 85 54428 & no Sb/Br) TPS54428DDAR ACTIVE SO PowerPAD DDA 8 2500 Green (RoHS CU NIPDAU | CU SN Level-2-260C-1 YEAR -40 to 85 54428 & no Sb/Br) TPS54428DRCR ACTIVE VSON DRC 10 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 54428 & no Sb/Br) TPS54428DRCT ACTIVE VSON DRC 10 250 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 54428 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 1-Mar-2017 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 13-Dec-2018 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS54428DDAR SO DDA 8 2500 330.0 12.8 6.4 5.2 2.1 8.0 12.0 Q1 Power PAD TPS54428DRCR VSON DRC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS54428DRCT VSON DRC 10 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 13-Dec-2018 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS54428DDAR SOPowerPAD DDA 8 2500 366.0 364.0 50.0 TPS54428DRCR VSON DRC 10 3000 367.0 367.0 35.0 TPS54428DRCT VSON DRC 10 250 210.0 185.0 35.0 PackMaterials-Page2

GENERIC PACKAGE VIEW DDA 8 PowerPAD TM SOIC - 1.7 mm max height PLASTIC SMALL OUTLINE Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4202561/G

None

None

None

GENERIC PACKAGE VIEW DRC 10 VSON - 1 mm max height PLASTIC SMALL OUTLINE - NO LEAD Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4204102-3/M

PACKAGE OUTLINE DRC0010J VSON - 1 mm max height SCALE 4.000 PLASTIC SMALL OUTLINE - NO LEAD 3.1 B A 2.9 PIN 1 INDEX AREA 3.1 2.9 1.0 C 0.8 SEATING PLANE 0.05 0.00 0.08 C 1.65 0.1 2X (0.5) (0.2) TYP EXPOSED 4X (0.25) THERMAL PAD 5 6 2X 11 SYMM 2 2.4 0.1 10 1 8X 0.5 0.30 10X 0.18 PIN 1 ID SYMM 0.1 C A B (OPTIONAL) 0.5 0.05 C 10X 0.3 4218878/B 07/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance. www.ti.com

EXAMPLE BOARD LAYOUT DRC0010J VSON - 1 mm max height PLASTIC SMALL OUTLINE - NO LEAD (1.65) (0.5) 10X (0.6) 1 10 10X (0.24) 11 SYMM (2.4) (3.4) (0.95) 8X (0.5) 6 5 (R0.05) TYP ( 0.2) VIA TYP (0.25) (0.575) SYMM (2.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:20X 0.07 MIN 0.07 MAX EXPOSED METAL ALL AROUND ALL AROUND EXPOSED METAL SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4218878/B 07/2018 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. www.ti.com

EXAMPLE STENCIL DESIGN DRC0010J VSON - 1 mm max height PLASTIC SMALL OUTLINE - NO LEAD 2X (1.5) (0.5) SYMM EXPOSED METAL 11 TYP 10X (0.6) 1 10 (1.53) 10X (0.24) 2X (1.06) SYMM (0.63) 8X (0.5) 6 5 (R0.05) TYP 4X (0.34) 4X (0.25) (2.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 11: 80% PRINTED SOLDER COVERAGE BY AREA SCALE:25X 4218878/B 07/2018 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

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