Product Order Technical Tools & Support & Folder Now Documents Software Community TPS54332 SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 TPS54332 3.5-A, 28-V, 1-MHz, step-down dc-dc converter with Eco-Mode™ 1 Features 3 Description • 3.5-Vto28-Vinputvoltagerange The TPS54332 is a 28-V, 3.5-A non-synchronous 1 buck converter that integrates a low-R high-side • Adjustableoutputvoltagedownto0.8V DS(on) MOSFET. To increase efficiency at light loads, a • Integrated80-mΩhigh-sideMOSFETsupportsup pulse-skipping Eco-Mode feature is automatically to3.5-Acontinuousoutputcurrent activated. Furthermore, the 1-μA shutdown supply • Highefficiencyatlightloadswithapulse-skipping current allows the device to be used in battery- powered applications. Current mode control with Eco-Mode™ internal slope compensation simplifies the external • Fixed1-MHzswitchingfrequency compensation calculations and reduces component • Typical1-μAshutdownquiescentcurrent count while allowing the use of ceramic output • Adjustableslow-startlimitsinrushcurrents capacitors. A resistor divider programs the hysteresis of the input undervoltage lockout. An overvoltage • ProgrammableUVLOthreshold transient protection circuit limits voltage overshoots • Overvoltagetransientprotection during start-up and transient conditions. A cycle-by- • Cycle-by-Cyclecurrentlimit,frequencyfoldback cycle current limit scheme, frequency foldback and andthermalshutdownprotection thermal shutdown protect the device and the load in the event of an overload condition. The TPS54332 is • Availableinthermallyenhanced8-PinSOIC availableinan8-pinSOICPowerPAD™package. PowerPAD™package • Supportedby WEBENCH™tool DeviceInformation(1) (http://www.ti.com/lsds/ti/analog/webench/overvie PARTNUMBER PACKAGE BODYSIZE(NOM) w.page) TPS54332 SOPowerPAD(8) 4.90mm×3.90mm 2 Applications (1) For all available packages, see the orderable addendum at theendofthedatasheet. • Consumerapplicationssuchasset-topboxes, CPEequipment,LCDdisplays,peripherals,and batterychargers • Industrialandcaraudiopowersupplies • 5-V,12-Vand24-Vdistributedpowersystems SimplifiedSchematic Efficiency 100 Ren1 VO= 2.5 V EN VIN VIN 95 Ren2 TPS54332 CI 90 VI= 5 V VI= 12 V BOOT CBOOT LO ncy - % 8805 PH VOUT cie CSSOMP D1 CO RO1 Effi 7750 VI= 15 V CSS C1 65 C2 R VSENSE 60 3 0 0.5 1 1.5 2 2.5 3 3.5 GND R O2 IO- Output Current -A 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

TPS54332 SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 www.ti.com Table of Contents 1 Features.................................................................. 1 7.3 FeatureDescription.................................................10 2 Applications........................................................... 1 7.4 DeviceFunctionalModes........................................13 3 Description............................................................. 1 8 ApplicationandImplementation........................ 14 4 RevisionHistory..................................................... 2 8.1 ApplicationInformation............................................14 8.2 TypicalApplication..................................................14 5 PinConfigurationandFunctions......................... 3 9 PowerSupplyRecommendations...................... 24 6 Specifications......................................................... 4 10 Layout................................................................... 24 6.1 AbsoluteMaximumRatings......................................4 6.2 HandlingRatings.......................................................4 10.1 LayoutGuidelines.................................................24 6.3 RecommendedOperatingConditions.......................4 10.2 LayoutExample....................................................25 6.4 ThermalInformation..................................................5 10.3 EstimatedCircuitArea..........................................25 6.5 ElectricalCharacteristics...........................................6 10.4 ElectromagneticInterference(EMI) Considerations.........................................................25 6.6 SwitchingCharacteristics..........................................6 11 DeviceandDocumentationSupport................. 26 6.7 TypicalCharacteristics:CharacterizationCurves.....7 11.1 DeviceSupport......................................................26 6.8 TypicalCharacteristics:SupplementalApplication Curves........................................................................ 8 11.2 Trademarks...........................................................26 7 DetailedDescription.............................................. 9 11.3 ElectrostaticDischargeCaution............................26 7.1 Overview...................................................................9 11.4 Glossary................................................................26 7.2 FunctionalBlockDiagram.......................................10 12 Mechanical,Packaging,andOrderable Information........................................................... 26 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionB(Feburary2013)toRevisionC Page • AddedPinConfigurationandFunctionssection,HandlingRatingtable,FeatureDescriptionsection,Device FunctionalModes,ApplicationandImplementationsection,PowerSupplyRecommendationssection,Layout section,DeviceandDocumentationSupportsection,andMechanical,Packaging,andOrderableInformation section ................................................................................................................................................................................... 1 ChangesfromRevisionA(January2013)toRevisionB Page • DeletedSwift™fromthedatasheettitle................................................................................................................................ 1 • DeletedfeatureItem:ForSWIFT™Documentation,SeetheTIWebsiteatwww.ti.com/swift.............................................. 1 2 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54332

TPS54332 www.ti.com SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 ChangesfromOriginal(March2007)toRevisionA Page • ChangedtheABSOLUTEMAXIMUMRATINGStable,InputVoltage-ENpinmaxvalueFrom:5Vto6V.......................... 4 5 Pin Configuration and Functions DDAPACKAGE (TOPVIEW) BOOT 1 8 PH VIN 2 PowerPAD 7 GND (Pin9) EN 3 6 COMP SS 4 5 VSENSE PinFunctions PIN I/O DESCRIPTION NAME NO. BOOT 1 O A0.1-μFbootstrapcapacitorisrequiredbetweenBOOTandPH.Ifthevoltageonthiscapacitorfallsbelowthe minimumrequirement,thehigh-sideMOSFETisforcedtoswitchoffuntilthecapacitorisrefreshed. VIN 2 I Inputsupplyvoltage,3.5Vto28V. EN 3 I Enablepin.Pullbelow1.25Vtodisable.Floattoenable.Programmingtheinputundervoltagelockoutwithtwo resistorsisrecommended. SS 4 I Slow-startpin.Anexternalcapacitorconnectedtothispinsetstheoutputrisetime. VSENS 5 I Invertingnodeofthegmerroramplifier. E COMP 6 O Erroramplifieroutput,andinputtothePWMcomparator.Connectfrequencycompensationcomponentstothis pin. GND 7 - Ground. PH 8 O Thesourceoftheinternalhigh-sidepowerMOSFET. PowerP 9 - GNDpinmustbeconnectedtotheexposedpadforproperoperation. AD Copyright©2009–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:TPS54332

TPS54332 SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted) (1) MIN MAX UNIT InputVoltage VIN –0.3 30 V EN –0.3 6 BOOT 38 VSENSE –0.3 3 COMP –0.3 3 SS –0.3 3 OutputVoltage BOOT-PH 8 V PH –0.6 30 PH(10nstransientfromgroundtonegativepeak) –5 SourceCurrent EN 100 μA BOOT 100 mA VSENSE 10 μA PH 9.25 A SinkCurrent VIN 9.25 A COMP 100 μA SS 200 OperatingJunction –40 150 °C Temperature (1) StressesbeyondthoselistedunderAbsoluteMaxmiumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. 6.2 Handling Ratings MIN MAX UNIT T StorageTemperature –65 150 °C stg ElectrostaticDischarge Humanbodymodel(HBM),perANSI/ESDA/JEDECJS- 2 kV 001,allpins(1) V (ESD) Chargeddevicemodel(CDM),perJEDECspecification 500 V JESD22-C101,allpins(2) (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT OperatingInputVoltageon(VINpin) 3.5 28 V Operatingjunctiontemperature,T –40 150 °C J 4 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54332

TPS54332 www.ti.com SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 6.4 Thermal Information TPS54332 THERMALMETRIC(1) HSOP UNIT 8PINS R Junction-to-ambientthermalresistance 48.7 θJA R Junction-to-case(top)thermalresistance 52.4 θJC(top) R Junction-to-boardthermalresistance 25.3 θJB °C/W ψ Junction-to-topcharacterizationparameter 8.4 JT ψ Junction-to-boardcharacterizationparameter 25.2 JB R Junction-to-case(bottom)thermalresistance 2.3 θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953. Copyright©2009–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:TPS54332

TPS54332 SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 www.ti.com 6.5 Electrical Characteristics T =–40°Cto150°C,VIN=3.5Vto28V(unlessotherwisenoted) J DESCRIPTION TESTCONDITIONS MIN TYP MAX UNIT SUPPLYVOLTAGE(VINPIN) Internalundervoltagelockoutthreshold RisingandFalling 3.5 V Shutdownsupplycurrent EN=0V,VIN=12V,–40°Cto85°C 1 4 μA Operating–nonswitchingsupplycurrent VSENSE=0.85V 82 120 μA ENABLEANDUVLO(ENPIN) Enablethreshold RisingandFalling 1.25 1.35 V Inputcurrent Enablethreshold–50mV -1 μA Inputcurrent Enablethreshold+50mV -4 μA VOLTAGEREFERENCE Voltagereference 0.772 0.8 0.828 V HIGH-SIDEMOSFET BOOT-PH=3V,VIN=3.5V 115 200 Onresistance mΩ BOOT-PH=6V,VIN=12V 80 150 ERRORAMPLIFIER Erroramplifiertransconductance(gm) –2μA<I <2μA,V(COMP)=1V 92 μmhos COMP ErroramplifierDCgain(1) VSENSE=0.8V 800 V/V Erroramplifierunitygainbandwidth(1) 5pFcapacitancefromCOMPtoGNDpins 2.7 MHz Erroramplifiersource/sinkcurrent V =1.0V,100-mVoverdrive ±7 μA (COMP) SwitchcurrenttoCOMPtransconductance VIN=12V 12 A/V PULSE-SKIPPINGECO-MODE Pulse-skippingEco-Modeswitchcurrentthreshold 160 mA CURRENTLIMIT Currentlimitthreshold VIN=12V 4.2 6.5 A THERMALSHUTDOWN ThermalShutdown 165 °C SLOW-START(SSPIN) Chargecurrent V =0.4V 2 μA (SS) SStoVSENSEmatching V =0.4V 10 mV (SS) (1) Specifiedbydesign 6.6 Switching Characteristics PARAMETERS TESTCONDITIONS MIN TYP MAX UNIT TPS54332SwitchingFrequency VIN=12V,25°C 800 1000 1200 kHz Minimumcontrollableontime VIN=12V,25°C 110 135 ns Maximumcontrollabledutyratio(1) BOOT-PH=6V 90% 93% (1) Specifiedbydesign 6 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54332

TPS54332 www.ti.com SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 6.7 Typical Characteristics: Characterization Curves 120 8 VIN = 12 V EN = 0 V 110 TJ= 150°C W A 6 m m e - 100 nt - stanc Curre TJ= -40°C n - On Resi 8900 Shutdown 4 Rdso Isd - 2 TJ= 25°C 70 60 0 -50 -25 0 25 50 75 100 125 150 3 8 13 18 23 28 TJ- Junction Temperature - °C VI- Input Voltage - V Figure1.OnResistancevsJunctionTemperature Figure2.ShutdownQuiescentCurrentvsInputVoltage 1020 0.824 VIN = 12 V VIN = 12 V 0.818 w - Oscillator Frequency - kHz11009019000 Vref - Voltage Reference - V 0000....778808901.84628 s f 0.782 980 0.776 -50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150 TJ- Junction Temperature - °C TJ- Junction Temperature - °C Figure3.SwitchingFrequencyvsJunctionTemperature Figure4.VoltageReferencevsJunctionTemperature 140 14 VIN = 12 V s %13.5 me - n130 VIN = 12 V atio - 13 On Ti uty R12.5 Controllable 120 ontrollable D111.25 m 110 C 11 u m m u ni m10.5 Mi ni min - 100 n - Mi 10 Ton Dmi 9.5 90 9 -50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150 TJ- Junction Temperature - °C TJ- Junction Temperature - °C Figure5.MinimumControllableonTimevsJunction Figure6.MinimumControllableDutyRatiovsJunction Temperature Temperature Copyright©2009–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:TPS54332

TPS54332 SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 www.ti.com Typical Characteristics: Characterization Curves (continued) 2.1 7 VIN = 12 V TJ= 25°C 6.5 TJ= 150°C A 2.05 A 6 Current -m hreshold -5.5 TJ= -40°C - SS Charge SS1.925 Current Limit T4.554 I 3.5 1.9 3 -50 -25 0 25 50 75 100 125 150 3 8 13 18 23 28 TJ- Junction Temperature - °C VI- Input Voltage - V Figure7.SSChargeCurrentvsJunctionTemperature Figure8.CurrentLimitThresholdvsInputVoltage 6.8 Typical Characteristics: Supplemental Application Curves 3.75 30 3.25 25 V V e - 2.75 e - 20 g g olta IO= 3.5A olta IO= 3.5A ut V 2.25 ut V 15 p p ut ut O O - 1.75 - 10 O O V V 1.25 5 0.75 0 3 8 13 18 23 28 3 8 13 18 23 28 VI- Input Voltage - V VI- Input Voltage - V Figure9.TypicalMinimumOutputVoltagevsInputVoltage Figure10.TypicalMaximumOutputVoltagevsInput Voltage 8 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54332

TPS54332 www.ti.com SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 7 Detailed Description 7.1 Overview The TPS54332 is a 28-V, 3.5-A, step-down (buck) converter with an integrated high-side, N-channel MOSFET. To improve performance during line and load transients, the device implements a constant-frequency, current mode control, which reduces output capacitance and simplifies external frequency compensation design. The TPS54332hasapre-setswitchingfrequencyof1MHz. The TPS54332 needs a minimum input voltage of 3.5 V to operate normally. The EN pin has an internal pullup current source that can be used to adjust the input voltage undervoltage lockout (UVLO) with two external resistors. In addition, the pullup current provides a default condition when the EN pin is floating for the device to operate. The operating current is 82 μA typically when not switching and under no load. When the device is disabled,thesupplycurrentis1 μAtypically. The integrated 80-mΩ high-side MOSFET allows for high-efficiency power supply designs with continuous output currentsupto3.5A. The TPS54332 reduces the external component count by integrating the boot recharge diode. The bias voltage for the integrated high-side MOSFET is supplied by an external capacitor on the BOOT to PH pin. The boot capacitor voltage is monitored by an UVLO circuit and will turn the high-side MOSFET off when the voltage falls below a preset threshold of 2.1 V typically. The output voltage can be stepped down to as low as the reference voltage. By adding an external capacitor, the slow-start time of the TPS54332 can be adjustable which enables flexible outputfilterselection. To improve the efficiency at light load conditions, the TPS54332 enters a special pulse-skipping Eco-Mode when thepeakinductorcurrentdropsbelow160mAtypically. The frequency foldback reduces the switching frequency during start-up and over current conditions to help controltheinductorcurrent.Thethermalshutdowngivestheadditionalprotectionunderfaultconditions. Copyright©2009–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:TPS54332

TPS54332 SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 www.ti.com 7.2 Functional Block Diagram EN VIN 165C Thermal Shutdown 1mA 3mA Shutdown Shutdown Logic 1.25 V Enable Enable Threshold Comparator Boot Charge ™ ECO-MODE Boot Minimum Clamp UVLO BOOT 2.1V Error 12A/V VSENSE Amplifier PWM PWM Current Comparator Latch Sense 2mA gm = 92mA/V Gate R Q 80 mW DC gain = 800 V/V Drive BW = 2.7 MHz Logic S SS Voltage Reference S Slope 2 kW 0.8 V Shutdown Compensation Discharge PH Logic VSENSE Frequency Oscillator Shift COMP GND Maximum Clamp 7.3 Feature Description 7.3.1 FixedFrequencyPWMControl The TPS54332 uses a fixed-frequency, peak-current mode control. The internal switching frequency of the TPS54332isfixedat1MHz. 7.3.2 VoltageReference(V ) ref The voltage reference system produces a ±2% initial accuracy voltage reference (±3.5% over temperature) by scalingtheoutputofatemperaturestableband-gapcircuit.Thetypicalvoltagereferenceisdesignedat0.8V. 7.3.3 BootstrapVoltage(BOOT) TheTPS54332hasanintegratedbootregulatorandrequiresa0.1-μFceramiccapacitorbetweentheBOOTand PH pin to provide the gate drive voltage for the high-side MOSFET. A ceramic capacitor with an X7R or X5R grade dielectric is recommended because of the stable characteristics over temperature and voltage. To improve dropout, the TPS54332 is designed to operate at 100% duty cycle as long as the BOOT to PH pin voltage is greaterthan2.1Vtypically. 7.3.4 EnableandAdjustableInputUndervoltageLockout(VINUVLO) The EN pin has an internal pullup current source that provides the default condition of the TPS54332 operating whentheENpinfloats. 10 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54332

TPS54332 www.ti.com SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 Feature Description (continued) The TPS54332 is disabled when the VIN pin voltage falls below internal VIN UVLO threshold. TI recommends using an external VIN UVLO to add Hysteresis unless VIN is greater than (V + 2 V). To adjust the VIN UVLO OUT with Hysteresis, use the external circuitry connected to the EN pin as shown in Figure 11. Once the EN pin voltage exceeds 1.25 V, an additional 3 μA of hysteresis is added. Use Equation 1 and Equation 2 to calculate the resistor values needed for the desired VIN UVLO threshold voltages. The V is the input start threshold START voltage, the V is the input stop threshold voltage and the V is the enable threshold voltage of 1.25 V. The STOP EN V shouldalwaysbegreaterthan3.5V. STOP TPS54332 VIN Ren1 1mA 3mA + EN Ren2 1.25 V - Figure11. AdjustableInputUndervoltageLockout V -V Ren1= START STOP 3mA (1) V Ren2= EN V -V START EN+1mA Ren1 (2) 7.3.5 ProgrammableSlow-StartUsingSSPin TI highly recommends programing the slow-start time externally because no slow-start time is implemented internally. The TPS54332 effectively uses the lower voltage of the internal voltage reference or the SS pin voltage as the power supply’s reference voltage fed into the error amplifier and will regulate the output accordingly. A capacitor (C ) on the SS pin-to-ground implements a slow-start time. The TPS54332 has an SS internal pullup current source of 2 μA that charges the external slow-start capacitor. The equation for the slow- starttime(10%to90%)isshowninEquation3.TheV is0.8VandtheI currentis2 μA. ref SS C (nF) ´ V (V) T (ms)= SS ref SS I (mA) SS (3) The slow-start time should be set between 1 ms to 10 ms to ensure good start-up behavior. The slow-start capacitorshouldbenomorethan27nF. If during normal operation, the input voltage drops below the VIN UVLO threshold, or the EN pin is pulled below 1.25V,orathermalshutdowneventoccurs,theTPS54332stopsswitching. 7.3.6 ErrorAmplifier The TPS54332 has a transconductance amplifier for the error amplifier. The error amplifier compares the VSENSE voltage to the internal effective voltage reference presented at the input of the error amplifier. The transconductance of the error amplifier is 92 μA/V during normal operation. Frequency compensation componentsareconnectedbetweentheCOMPpinandground. 7.3.7 SlopeCompensation In order to prevent the sub-harmonic oscillations when operating the device at duty cycles greater than 50%, the TPS54332addsabuilt-inslopecompensationwhichisacompensatingramptotheswitchcurrentsignal. Copyright©2009–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:TPS54332

TPS54332 SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 www.ti.com Feature Description (continued) 7.3.8 CurrentModeCompensationDesign To simplify design efforts using the TPS54332, the typical designs for common applications are listed in Table 1. For designs using ceramic output capacitors, proper derating of ceramic output capacitance is recommended when doing the stability analysis. This is because the actual ceramic capacitance drops considerably from the nominal value when the applied voltage increases. Advanced users may refer to the Detailed Design Procedure in the Application and Implementation section for the detailed guidelines, or use the WEBENCH tool (http://www.ti.com/lsds/ti/analog/webench/overview.page). Table1.TypicalDesigns(ReferringtoSimplifiedSchematiconPage1) VIN V F L C R R C C R OUT sw o o O1 O2 2 1 3 (V) (V) (kHz) (μH) (kΩ) (kΩ) (pF) (pF) (kΩ) 12 5 1000 3.3 Ceramic22-μF 10 1.91 18 470 24.9 12 3.3 1000 2.7 Ceramic22-μFx2 10 3.24 18 1800 39.2 12 5 1000 3.3 Aluminum330-μF/160-mohm 10 1.91 22 47 10 12 3.3 1000 2.7 Aluminum330-μF/160-mohm 10 3.24 39 100 29.4 7.3.9 OvercurrentProtectionandFrequencyShift The TPS54332 implements current mode control that uses the COMP pin voltage to turn off the high-side MOSFET on a cycle-by-cycle basis. Every cycle, the switch current and the COMP pin voltage are compared; when the peak inductor current intersects the COMP pin voltage, the high-side switch is turned off. During overcurrentconditionsthatpulltheoutputvoltagelow,theerroramplifierrespondsbydrivingtheCOMPpinhigh, causing the switch current to increase. The COMP pin has a maximum clamp internally, which limit the output current. The TPS54332 provides robust protection during short circuits. There is potential for overcurrent runaway in the output inductor during a short circuit at the output. The TPS54332 solves this issue by increasing the off-time during short circuit conditions by lowering the switching frequency. The switching frequency is divided by 8, 4, 2, and 1 as the voltage ramps from 0 V to 0.8 V on VSENSE pin. The relationship between the switching frequency andtheVSENSEpinvoltageisshowninTable2. Table2.SwitchingFrequencyConditions SWITCHINGFREQUENCY VSENSEPINVOLTAGE 1MHz VSENSE≥0.6V 1MHz/2 0.6V>VSENSE≥0.4V 1MHz/4 0.4V>VSENSE≥0.2V 1MHz/8 0.2V>VSENSE 7.3.10 OvervoltageTransientProtection The TPS54332 incorporates an overvoltage transient protection (OVTP) circuit to minimize output voltage overshoot when recovering from output fault conditions or strong unload transients. The OVTP circuit includes an overvoltage comparator to compare the VSENSE pin voltage and internal thresholds. When the VSENSE pin voltage goes above 109% × V , the high-side MOSFET will be forced off. When the VSENSE pin voltage falls ref below107%× V ,thehigh-sideMOSFETwillbeenabledagain. ref 7.3.11 ThermalShutdown The device implements an internal thermal shutdown to protect itself if the junction temperature exceeds 165°C. The thermal shutdown forces the device to stop switching when the junction temperature exceeds the thermal tripthreshold.Oncethedietemperaturedecreasesbelow165°C,thedevicereinitiatesthepower-upsequence. 12 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54332

TPS54332 www.ti.com SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 7.4 Device Functional Modes 7.4.1 OperationWithVIN < 3.5V The device is recommended to operate with input voltages above 3.5 V. The typical VIN UVLO threshold is not specified and the device may operate at input voltages down to the UVLO voltage. At input voltages below the actual UVLO voltage, the device will not switch. If EN is externally pulled up or left floating, when VIN passes the UVLO threshold the device will become active. Switching will commenced when the soft-start sequence is initiated. 7.4.2 OperationWithENControl The enable threshold voltage is 1.25 V typical. With EN held below that voltage the device is disabled and switchingisinhibitedevenifVINisaboveitsUVLOthreshold.TheICquiescentcurrentisreducedinthisstate.If the EN voltage is increased above the threshold while VIN is above its UVLO threshold, the device becomes active.Switchingisenabled,andtheslow-startsequenceisinitiated. 7.4.3 Eco-Mode The device is designed to operate in pulse-skipping Eco-Mode at light-load currents to boost light-load efficiency. When the peak inductor current is lower than pulse skip threshold, the COMP pin voltage falls to 0.5 V (typical) and the device enters Eco-Mode . When the device is in Eco-Mode, the COMP pin voltage is clamped at 0.5 V internally which prevents the high-side integrated MOSFET from switching. The peak inductor current must rise above 160 mA for the COMP pin voltage to rise above 0.5 V and exit Eco-Mode. Because the integrated current comparator catches the peak inductor current only, the average load current entering Eco-Mode varies with the applicationsandexternaloutputfilters. Copyright©2009–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:TPS54332

TPS54332 SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 8.1 Application Information The TPS54332 is typically used as step down converters, which convert a voltage from 3.5 V - 28 V to a lower voltage.WEBENCHsoftwareisavailabletoaidinthedesignandanalysisofcircuits. TPS54231 TPS54232 TPS54233 TPS54331 TPS54332 I (Max) 2A 2A 2A 3A 3.5A O InputVoltageRange 3.5V-28V 3.5V-28V 3.5V-28V 3.5V-28V 3.5V-28V SwitchingFreq.(Typ) 570kHz 1000kHz 285kHz 570kHz 1000kHz SwitchCurrentLimit(Min) 2.3A 2.3A 2.3A 3.5A 4.2A Pin/Package 8/SOIC 8/SOIC 8/SOIC 8/SOIC 8/SOPowerPAD™ 8.2 Typical Application Figure12. TypicalApplicationSchematic 8.2.1 DesignRequirements Forthisdesignexample,usethefollowingastheinputparameters: DESIGNPARAMETER EXAMPLEVALUE Inputvoltagerange 5Vto15V Outputvoltage 2.5V Inputripplevoltage 200mV Outputripplevoltage 20mV Outputcurrentrating 3.5A OperatingFrequency 1MHz 14 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54332

TPS54332 www.ti.com SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 8.2.2 DetailedDesignProcedure The following design procedure can be used to select component values for the TPS54332. Alternately, the WEBENCH Tool may be used to generate a complete design. The WEBENCH Tool uses an iterative design procedure and accesses a comprehensive database of components when generating a design. This section presentsasimplifieddiscussionofthedesignprocess. 8.2.2.1 SwitchingFrequency TheswitchingfrequencyfortheTPS54332isfixedat1MHz. 8.2.2.2 OutputVoltageSetPoint The output voltage of the TPS54332 is externally adjustable using a resistor divider network. In the application circuit of Figure 12, this divider network is comprised of R5 and R6. The relationship of the output voltage to the resistordividerisgivenbyEquation4andEquation5. R5 ´ V R6= REF V -V OUT REF (4) éR5 ù V =V ´ +1 OUT REF êëR6 úû (5) Choose R5 to be approximately 10 kΩ. Slightly increasing or decreasing R5 can result in closer output voltage matching when using standard value resistors. In this design, R4 = 10.2 kΩ and R = 4.75 kΩ, resulting in a 2.5-V outputvoltage. 8.2.2.3 InputCapacitors The TPS54332 requires an input decoupling capacitor and depending on the application, a bulk-input capacitor. The typical recommended value for the decoupling capacitor is 10 μF. A high-quality ceramic type X5R or X7R is recommended. The voltage rating should be greater than the maximum input voltage. A smaller value may be used as long as all other requirements are met; however 10 μF has been shown to work well in a wide variety of circuits. Additionally, some bulk capacitance may be needed, especially if the TPS54332 circuit is not located within about 2 inches from the input voltage source. The value for this capacitor is not critical but should be rated to handle the maximum input voltage including ripple voltage, and should filter the output so that input ripple voltage is acceptable. For this design, a single 10-μF capacitor is used for the input decoupling capacitor. It is X5R dielectric rated for 25 V. The equivalent series resistance (ESR) is approximately 3 mΩ, and the current ratingis3A. ThisinputripplevoltagecanbeapproximatedbyEquation6. I ´ 0.25 OUT(MAX) ( ) DV = + I ´ ESR IN OUT(MAX) MAX C ´ f BULK SW (6) Where I is the maximum load current, f is the switching frequency (derated by a factor of 0.8), C is OUT(MAX) SW BULK thebulkcapacitorvalueandESR isthemaximumseriesresistanceofthebulkcapacitor. MAX The maximum RMS imput ripple current also needs to be checked. For worst case conditions, this can be approximatedbyEquation7. (7) In this case, the input ripple voltage would be 98 mV and the RMS ripple current would be 1.75 A. It is also importanttonotethattheactualinputvoltageripplewillbegreatlyaffectedbyparasiticassociatedwiththelayout andtheoutputimpedanceofthevoltagesource.TheactualinputvoltagerippleforthiscircuitisshowninDesign Parameters and is larger than the calculated value. This measured value is still below the specified input limit of 200 mV. The maximum voltage across the input capacitors would be VIN max plus ΔVIN/2. The chosen bypass capacitor is rated for 25 V and the ripple current capacity is greater than 3 A, providing ample margin. It is importantthatthemaximumratingsforvoltageandcurrentarenotexceededunderanycircumstance. Copyright©2009–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:TPS54332

TPS54332 SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 www.ti.com 8.2.2.4 OutputFilterComponents Two components need to be selected for the output filter, the output inductor L1 and the output capacitance. SincetheTPS54332isanexternallycompensateddevice,awiderangeoffiltercomponenttypesandvaluescan besupported. 8.2.2.5 InductorSelection Tocalculatetheminimumvalueoftheoutputinductor,useEquation8. ( ) V ´ V -V OUT(MAX) IN(MAX) OUT L = MIN V ´ K ´I ´F ´0.8 IN(MAX) IND OUT SW (8) K is a coefficient that represents the amount of inductor ripple current relative to the maximum output current. IND In general, this value is at the discretion of the designer; however, the following guidelines may be used. For designs using low-ESR output capacitors such as ceramics, a value as high as K = 0.4 may be used. When IND usinghigherESRoutputcapacitors,K =0.2yieldsbetterresults. IND For this design example, use K = 0.3 and the minimum inductor value is calculated to be 2.48 μH. For this IND design,al2.5-μHinductorischosen. For the output filter inductor, it is important that the RMS current and saturation current ratings not be exceeded. Thepeak-to-peakinductorcurrentiscalculatedusingEquation9. ( ) VOUT × VIN(MAX) - VOUT I = LPP V ×L ´ ƒ ´ 0.8 IN(MAX) OUT SW (9) TheRMSinductorcurrentcanbefoundfromEquation10. I = I2 + 1 ´ æç VOUT ´ (VIN(MAX) - VOUT) ö÷2 L(RMS) OUT(MAX) 12 çV ´ L ´ F ´ 0.8÷ è IN(MAX) OUT SW ø (10) AndthepeakinductorcurrentcanbedeterminedwithEquation11. ( ) V ´ V - V OUT IN(MAX) OUT I =I + L(PK) OUT(MAX) 1.6 ´ V ´ L ´ F IN(MAX) OUT SW (11) (12) For this design, the RMS inductor current is 3.51 A and the peak inductor current is 4.15 A. The chosen inductor is a Coilcraft MSS1038-252NX_ 2.5-μH. It has a saturation current rating of 7.62 A and an RMS current rating of 6.55 A, meeting these requirements. Smaller or larger inductor values can be used depending on the amount of ripple current the designer wishes to allow so long as the other design requirements are met. Larger value inductors will have lower AC current and result in lower output voltage ripple, while smaller inductor values will increase ac current and output voltage ripple. In general, inductor values for use with the TPS54332 are in the rangeof1μHto47 μH. 8.2.2.6 CapacitorSelection The important design factors for the output capacitor are DC voltage rating, ripple current rating, and equivalent series resistance (ESR). The DC voltage and ripple current ratings cannot be exceeded. The ESR is important because along with the inductor current it determines the amount of output ripple voltage. The actual value of the output capacitor is not critical, but some practical limits do exist. Consider the relationship between the desired closed-loop crossover frequency of the design and LC corner frequency of the output filter. In general, it is desirable to keep the closed-loop crossover frequency at less than 1/5 of the switching frequency. With high- switching frequencies such as the 1 MHz frequency of this design, internal circuit limitations of the TPS54332 limit the practical maximum crossover frequency to about 75 kHz. In general, the closed-loop crossover frequency should be higher than the corner frequency determined by the load impedance and the output capacitor.Thislimitstheminimumcapacitorvaluefortheoutputfilterto: 16 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54332

TPS54332 www.ti.com SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 C =1/(2´p´R ´F ) O_min O CO_max (13) Where R is the output load impedance (V /I ) and f is the desired crossover frequency. For a desired O O O CO maximum crossover of 75 kHz the minimum value for the output capacitor is around 3.2 μF. This may not satisfy the output ripple voltage requirement. The output ripple voltage consists of two components; the voltage change due to the charge and discharge of the output filter capacitance and the voltage change due to the ripple current timestheESRoftheoutputfiltercapacitor.Theoutputripplevoltagecanbeestimatedby: é (D - 0.5) ù V = I + R ê ú OPP LPP ë4´ F ´C ESRû SW O (14) WhereC isthetotaleffectiveoutputcapacitance. O The maximum ESR of the output capacitor can be determined from the amount of allowable output ripple as specified in the initial design parameters. The contribution to the output ripple voltage due to ESR is the inductor ripple current times the ESR of the output filter, so the maximum specified ESR as listed in the capacitor data sheetisgivenbyEquation15. V (D -0.5) ESR = OPPMAX - max I 4 ´ F ´ C LPP SW O (15) Where V is the desired maximum peak-to-peak output ripple. The maximum RMS ripple current in the OPPMAX outputcapacitorisgivenbyEquation16. I = 1 × æç VOUT × (VIN(MAX) - VOUT) ö÷ COUT(RMS) 12 çV ×L ×F ×N ÷ è IN(MAX) OUT SW C ø (16) The minimum switching frequency should be used in the above equations (derated by a factor of 0.8). For this design example, two 47-μF ceramic output capacitors are chosen for C2 and C3. These are rated at 10V with a maximum ESR of 3 mΩ and a ripple current rating in excess of 3 A. The calculated total RMS ripple current is 300 mA (150 mA each) and the total ESR required is 20 mΩ or less. These output capacitors exceed the requirements by a wide margin and will result in a reliable, high-performance design. it is important to note that the actual capacitance in circuit may be less than the catalog value when the output is operating at the desired outputof2.5V.10-Vratedcapacitorsareusedtominimizethethisreductionincapacitanceduetodcvoltageon theoutput.Theselectedoutputcapacitormustberatedforavoltagegreaterthanthedesiredoutputvoltageplus ½ the ripple voltage. Any derating amount must also be included. Other capacitor types work well with the TPS54332,dependingontheneedsoftheapplication. 8.2.2.7 CompensationComponents The external compensation used with the TPS54332 allows for a wide range of output filter configurations. A large range of capacitor values and types of dielectric are supported. The design example uses ceramic X5R dielectricoutputcapacitors,butothertypesaresupported. A Type II compensation scheme is recommended for the TPS54332. The compensation components are chosen to set the desired closed-loop crossover frequency and phase margin for output filter components. The type II compensation has the following characteristics; a DC gain component, a low-frequency pole, and a mid- frequencyzeroorpolepair. TheDCgainisdeterminedbyEquation17. V ´ V ggm REF G = DC V O (17) Where: V =800 ggm V =0.8V REF Thelow-frequencypoleisdeterminedbyEquation18. Copyright©2009–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:TPS54332

TPS54332 SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 www.ti.com F =1/(2 ´ p ´ R ´C ) PO OO Z (18) R =8.696MΩ. OA Themid-frequencyzeroisdeterminedbyEquation19. FZ1 =1/(2 ´ p ´ RZ ´CZ) (19) And,themid-frequencypoleisgivenbyEquation20. FP1 =1/(2 ´ p ´ RZ ´CP) (20) The first step is to choose the closed-loop crossover frequency. The closed-loop crossover frequency should be less than 1/8 of the minimum operating frequency, but for the TPS54332 it is recommended that the maximum closed-loop crossover frequency be not greater than 75 kHz. Next, the required gain and phase boost of the crossover network needs to be calculated. By definition, the gain of the compensation network must be the inverse of the gain of the modulator and output filter. For this design example, where the ESR zero is much higher than the closed-loop crossover frequency, the gain of the modulator and output filter can be approximated byEquation21. Gain= -20log(2 ´ p ´ R ´F ´C ) SENSE CO O (21) Where: R =1 Ω/12 SENSE F =Closed-loopcrossoverfrequency CO C =Outputcapacitance O ThephaselossisgivenbyEquation22. PL=a tan(2 ´ p ´ F ´R ´ C ) -a tan(2 ´ p ´ F ´R ´ C )-10dB CO ESR O CO O O (22) Where: R =Equivalentseriesresistanceoftheoutputcapacitor ESR R =V /I O O O The measured overall loop response for the circuit is given in Figure 20. Note that the actual closed-loop crossover frequency is higher than intended at about 25 kHz. This is primarily due to variation in the actual values of the output filter components and tolerance variation of the internal feed-forward gain circuitry. Overall the design has greater than 60 degrees of phase margin and will be completely stable over all combinations of lineandloadvariability. Now that the phase loss is known the required amount of phase boost to meet the phase margin requirement canbedetermined.TherequiredphaseboostisgivenbyEquation23. PB= (PM - 90deg) -PL (23) WherePM=thedesiredphasemargin. A zero / pole pair of the compensation network will be placed symmetrically around the intended closed-loop frequency to provide maximum phase boost at the crossover point. The amount of separation can be determined byEquation24andtheresultantzeroandpolefrequenciesaregivenbyEquation25 andEquation26. æPB ö k = tanç +45deg÷ è 2 ø (24) F F = CO Z1 k (25) F = F ´k P1 CO (26) 18 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54332

TPS54332 www.ti.com SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 Thelow-frequencypoleissetsothatthegainatthecrossoverfrequencyisequaltotheinverseofthegainofthe modulator and output filter. Due to the relationships established by the pole and zero relationships, the value of R canbederiveddirectlybyEquation27. Z 2×p ×F ×V ×C ×R R = CO O O OA Z GM ×V ×V ICOMP ggm REF (27) Where: V =Outputvoltage O C =Outputcapacitance O F =Desiredcrossoverfrequency CO R =8.696MΩ OA GM =12A/V COMP V =800 ggm V =0.8V REF WithR known,C andC canbecalculatedusingEquation28andEquation29. Z Z P 1 C = Z 2´p´F ´R Z1 z (28) 1 C = P 2´p ´F ´R P1 z (29) For this design, the two 47-μF output capacitors are used. For ceramic capacitors, the actual output capacitance is less than the rated value when the capacitors have a DC bias voltage applied. This is the case in a dc/dc converter.Theactualoutputcapacitancemaybeaslowas54μF.ThecombinedESRisapproximately.001 Ω. UsingEquation21andEquation22,theoutputstagegainandphaselossareequivalentas: Gain=–6.94dB and PL-–93.94degrees For70degreesofphasemargin,Equation23requires63.64degreesofphaseboost. Equation24,Equation25,andEquation26areusedtofindthezeroandpolefrequenciesof: F =11.57kHz Z1 And F =216kHz P1 R ,C ,andC arecalculatedusingEquation27,Equation28,andEquation29. Z Z P 2 ´ p ´ 50000 ´ 2.5 ´ 82 ´ 10-6 ´ 8.696 ´ 106 Rz= =72.92kW 12 ´ 800 ´ 0.8 (30) 1 Cz = =183pF 2 ´ p ´ 11570 ´ 75000 (31) 1 Cp = =9.8pF 2 ´ p ´ 216000 ´ 75000 (32) UsingstandardvaluesforR3,C6,andC7intheapplicationschematicofFigure12. R3=75kΩ C6=180pF C7=10pF Copyright©2009–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:TPS54332

TPS54332 SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 www.ti.com 8.2.2.8 BootstrapCapacitor Every TPS54332 design requires a bootstrap capacitor, C4. The bootstrap capacitor must be 0.1 μF. The bootstrap capacitor is located between the PH pins and BOOT pin. The bootstrap capacitor should be a high- quality,ceramictypewithX7RorX5Rgradedielectricfortemperaturestability. 8.2.2.9 CatchDiode The TPS54332 is designed to operate using an external catch diode between PH and GND. The selected diode must meet the absolute maximum ratings for the application: Reverse voltage must be higher than the maximum voltage at the PH pin, which is Vin(max) + 0.5 V. Peak current must be greater than IOUTMAX plus on half the peak-to-peakinductorcurrent.Forward-voltagedropshouldbesmallforhigherefficiencies.Itisimportanttonote that the catch diode conduction time is typically longer than the high-side FET on time, so attention paid to diode parameters can make a marked improvement in overall efficiency. Additionally, check that the device chosen is capable of dissipating the power losses. For this design, a Diodes, Inc. B340A is chosen, with a reverse voltage of40V,forwardcurrentof3A,andaforwardvoltagedropof0.5V. 8.2.2.10 OutputVoltageLimitations Due to the internal design of the TPS54332, there are both upper and lower output voltage limits for any given input voltage. The upper limit of the output voltage set point is constrained by the maximum duty cycle of 91% andisgivenbyEquation33. V = 0.91 x ((V – I x R ) + V ) – (I x R ) – V O(max) IN(min) O(max) DS(on)max D O(max) L D (33) Where: V =Minimuminputvoltage IN(min) I =Maximumloadcurrent O(max) V =Catchdiodeforwardvoltage D R =Outputinductorseriesresistance L Theequationassumesmaximumonresistancefortheinternalhigh-sideFET. The lower limit is constrained by the minimum controllable on time which may be as high as 130 ns. The approximateminimumoutputvoltageforagiveninputvoltageandminimumloadcurrentisgivenbyEquation32. V = 0.118 x ((V - I x R + V ) - I x R ) - V O(min) IN(max) Omin DS(on)max) D O(min) L D (34) Where: V =Maximuminputvoltage IN(max) I =Minimumloadcurrent O(min) V =Catchdiodeforwardvoltage D R =Outputinductorseriesresistance L This equation assumes nominal on-resistance for the high-side FET and accounts for worst case variation of operating frequency set point. Any design operating near the operational limits of the device should be carefully checkedtoassureproperfunctionality. 8.2.2.11 PowerDissipationEstimate The following formulas show how to estimate the device power dissipation under continuous conduction mode operations. They should not be used if the device is working in the discontinuous conduction mode (DCM) or pulse-skippingEco-Mode. Thedevicepowerdissipationincludes: 1. Conductionloss:Pcon=Iout2xR xV /VIN DS(on) OUT 2. Switchingloss:Psw=0.55x10-9xVIN2xI xFsw OUT 3. Gatechargeloss:Pgc=22.8x10-9xFsw 4. Quiescentcurrentloss:Pq=0.082x10-3xVIN Where: • I istheoutputcurrent(A). OUT 20 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54332

TPS54332 www.ti.com SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 • R istheon-resistanceofthehigh-sideMOSFET(Ω). DS(on) • V istheoutputvoltage(V). OUT • VINistheinputvoltage(V). • Fswistheswitchingfrequency(Hz). • Ptot=Pcon+Psw+Pgc+Pq • ForgivenT ,T =T +RthxPtot. A J A • ForgivenT =150°C,T =T –RthxPtot. JMAX AMAX JMAX Where: • Ptotisthetotaldevicepowerdissipation(W). • T istheambienttemperature(°C). A • T isthejunctiontemperature(°C). J • Rthisthethermalresistanceofthepackage(°C/W). • T ismaximumjunctiontemperature(°C). JMAX • T ismaximumambienttemperature(°C). AMAX Copyright©2009–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:TPS54332

TPS54332 SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 www.ti.com 8.2.3 ApplicationCurves 100 100 VO= 2.5 V VO= 2.5 V 95 95 VI= 5 V VI= 5 V 90 90 85 % 85 VI= 12 V % 80 VI= 15 V VI= 12 V Efficiency - 8705 VI= 15 V Efficiency - 7705 65 70 60 65 55 60 50 0 0.5 1 1.5 2 2.5 3 3.5 0 0.025 0.05 0.075 0.1 0.125 0.15 0.175 0.2 0.225 0.25 IO- Output Current -A IO- Output Current -A Figure13.TPS54332Efficiency Figure14.TPS54332Low-CurrentEfficiency 1 0.025 0.9 0.02 0.8 % 0.015 on - 0.7 VI= 15 V % 0.01 ulati0.6 on - 0.005 age Reg00..45 VI= 12 V Regulati 0 IO= 1A put Volt00..23 VI= 5 V Output -0-.00.0051 ut O0.1 -0.015 0 -0.02 -0.1 -0.025 0 0.5 1 1.5 2 2.5 3 3.5 5 6 7 8 9 10 11 12 13 14 15 IO- Output Current -A VI- Input Voltage - V Figure15.TPS54332LoadRegulation Figure16.TPS54332LineRegulation 60 180 50 150 V OUT 40 Gain 120 30 90 10mV/div Phase 20 60 IOUT .75 to 2.5AStep Gain - dB -11000 -03300 hase - deg P -20 -60 -30 -90 -40 -120 -50 -150 -60 -180 t - Time - 500ms/div 10 100 1k 10k 100k 1M f - Frequency - Hz Figure17.TPS54332TransientResponse Figure18.TPS54332LoopResponse 22 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54332

TPS54332 www.ti.com SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 VIN 100 mV/div V 20 mV/div OUT PH 5 V/div PH 5 V/div t - Time - 1ms/div t - Time - 1ms/div Figure19.TPS54332OutputRipple Figure20.TPS54332InputRipple VOUT 1 V/div VOUT 20 mV/div PH 5 V/div VIN 5 V/div t - Time - 2 ms/div t - Time - 2 ms/div Figure21.TPS54332Start-Up Figure22.TPS54332OutputRippleduringEco-Mode Operation Copyright©2009–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:TPS54332

TPS54332 SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 www.ti.com 9 Power Supply Recommendations The devices are designed to operate from an input voltage supply range between 3.5 V and 28 V. This input supply should be well regulated. If the input supply is located more than a few inches from the converter additional bulk capacitance may be required in addition to the ceramic bypass capacitors. An electrolytic capacitorwithavalueof100μFisatypicalchoice. 10 Layout 10.1 Layout Guidelines TheVINpinshouldbebypassedtogroundwithalow-ESR,ceramicbypasscapacitor.Takecaretominimizethe loopareaformedbythebypasscapacitorconnections,theVINpin,andtheanodeofthecatchdiode.Thetypical recommended bypass capacitance is 10-μF ceramic with a X5R or X7R dielectric and the optimum placement is closest to the VIN pins and the source of the anode of the catch diode. See Figure 23 for a PCB layout example. TheGNDDpinshouldbetiedtothePCBgroundplaneatthepinoftheIC.Thesourceofthelow-sideMOSFET should be connected directly to the top-side PCB ground area used to tie together the ground sides of the input and output capacitors, as well as the anode of the catch diode. The PH pin should be routed to the cathode of the catch diode and to the output inductor. Since the PH connection is the switching node, the catch diode and output inductor should be located very close to the PH pins, and the area of the PCB conductor minimized to prevent excessive capacitive coupling. For operation at full rated load, the top-side ground area must provide adequate heat dissipating area. The TPS54332 uses a fused lead frame so that the GND pin acts as a conductive path for heat dissipation from the die. Many applications have larger areas of internal or back side ground plane available, and the top-side ground area can be connected to these areas using multiple vias under oradjacenttothedevicetohelpdissipateheat.Theadditionalexternalcomponentscanbeplacedapproximately as shown. It may be possible to obtain acceptable performance with alternate layout schemes, however this layouthasbeenshowntoproducegoodresultsandisintendedasaguideline. 24 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54332

TPS54332 www.ti.com SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 10.2 Layout Example OUTPUT Vout FILTER TOPSIDE CAPACITOR FeedbackTrace GROUND AREA Route BOOTCAPACITOR OUTPUT trace on other layer to provide CATCH INDUCTOR Wide path for top side ground DIODE PH INPUT BYPASS CAPACITOR BOOT BOOT PH CAPACITOR Vin VIN GND EN COMP UVLO RESISTOR SS VSENSE DIVIDER COMPENSATION RESISTOR SLOW START NETWORK DIVIDER CAPACITOR Exposed PowerPAD area Thermal VIA Signal VIA Figure23. TPS54332BoardLayout 10.3 Estimated Circuit Area TheestimatedprintedcircuitboardareaforthecomponentsusedinthedesignofFigure12 is0.58in2.Thisarea doesnotincludetestpointsorconnectors. 10.4 Electromagnetic Interference (EMI) Considerations As EMI becomes a rising concern in more and more applications, the internal design of the TPS54332 takes measures to reduce the EMI. The high-side MOSFET gate-drive is designed to reduce the PH pin voltage ringing. The internal IC rails are isolated to decrease the noise sensitivity. A package bond wire scheme is used tolowertheparasiticseffects. To achieve the best EMI performance, external component selection and board layout are equally important. FollowtheDetailedDesignProceduretopreventpotentialEMIissues. Copyright©2009–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLinks:TPS54332

TPS54332 SLVS875C–JANUARY2009–REVISEDNOVEMBER2014 www.ti.com 11 Device and Documentation Support 11.1 Device Support 11.1.1 DevelopmentSupport FortheWEBENCHTool,gotohttp://www.ti.com/lsds/ti/analog/webench/overview.page. 11.2 Trademarks Eco-Mode,PowerPAD,WEBENCHaretrademarksofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 11.3 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 11.4 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 26 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54332

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS54332DDA ACTIVE SO PowerPAD DDA 8 75 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 150 54332 & no Sb/Br) TPS54332DDAR ACTIVE SO PowerPAD DDA 8 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 150 54332 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2017 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS54332DDAR SO DDA 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Power PAD PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2017 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS54332DDAR SOPowerPAD DDA 8 2500 367.0 367.0 35.0 PackMaterials-Page2

GENERIC PACKAGE VIEW DDA 8 PowerPAD TM SOIC - 1.7 mm max height PLASTIC SMALL OUTLINE Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4202561/G

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