Product Sample & Technical Tools & Support & Folder Buy Documents Software Community TPS54325 SLVS932F–MAY2009–REVISEDNOVEMBER2014 TPS54325 4.5-V to 18-V, 3-A Output Synchronous Step Down Switcher with Integrated FET 1 Features 3 Description • D-CAP2™ModeEnablesFastTransient The TPS54325 device is an adaptive on-time D- 1 CAP2™ mode synchronous buck converter. The Response TPS54325 device enables system designers to • LowOutputRippleandAllowsCeramicOutput complete the suite of various end equipment’s power Capacitor bus regulators with a cost effective, low component • WideV InputVoltageRange:4.5Vto18V count,lowstandbycurrentsolution. CC • WideVIN InputVoltageRange:2.0Vto18V The main control loop for the TPS54325 uses the D- • OutputVoltageRange:0.76Vto5.5V CAP2™ mode control which provides a very fast transient response with no external components. The • HighlyEfficientIntegratedFET’sOptimizedfor TPS54325 also has a proprietary circuit that enables LowerDutyCycleApplications –120mΩ (High the device to adapt to both low equivalent series Side)and70mΩ (LowSide) resistance (ESR) output capacitors, such as • HighEfficiency,lessthan10μAatshutdown POSCAP or SP-CAP, and ultra-low ESR ceramic • HighInitialBandgapReferenceAccuracy capacitors. The device operates from 4.5-V to 18-V VCC input , and from 2.0-V to 18-V VIN input power • AdjustableSoftStart supply voltage. The output voltage can be • Pre-BiasedSoftStart programmed between 0.76 V and 5.5 V. The device • 700-kHzSwitchingFrequency(f ) also features an adjustable slow start time and a SW power good function. The TPS54325 is available in • CycleByCycleOverCurrentLimit the 14 pin HTSSOP package, and designed to • PowerGoodOutput operatefrom –40°Cto85°C. 2 Applications DeviceInformation(1) • WideRangeofApplicationsforLowVoltage PARTNUMBER PACKAGE BODYSIZE(NOM) System TPS54325 HTSSOP(14) 5.00mm×4.40mm – DigitalTVPowerSupply (1) For all available packages, see the orderable addendum at – HighDefinitionBlu-rayDisc™Players theendofthedatasheet. – NetworkingHomeTerminal – DigitalSetTopBox(STB) 4 Simplified Schematic TPS54325 LoadTransientResponse V (50 mV / div) OUT I (2 A / div) OUT 100µs / div 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

TPS54325 SLVS932F–MAY2009–REVISEDNOVEMBER2014 www.ti.com Table of Contents 1 Features.................................................................. 1 8.4 DeviceFunctionalModes........................................10 2 Applications........................................................... 1 9 ApplicationandImplementation........................ 11 3 Description............................................................. 1 9.1 ApplicationInformation............................................11 4 SimplifiedSchematic............................................. 1 9.2 TypicalApplication .................................................11 5 RevisionHistory..................................................... 2 10 PowerSupplyRecommendations..................... 15 6 PinConfigurationandFunctions......................... 3 11 Layout................................................................... 16 11.1 LayoutGuidelines.................................................16 7 Specifications......................................................... 4 11.2 LayoutExample....................................................16 7.1 AbsoluteMaximumRatings......................................4 11.3 ThermalConsiderations........................................17 7.2 HandlingRatings.......................................................4 12 DeviceandDocumentationSupport................. 18 7.3 ThermalInformation..................................................4 7.4 RecommendedOperatingConditions.......................5 12.1 DeviceSupport......................................................18 7.5 ElectricalCharacteristics...........................................5 12.2 DocumentationSupport........................................18 7.6 TypicalCharacteristics..............................................7 12.3 Trademarks...........................................................18 12.4 ElectrostaticDischargeCaution............................18 8 DetailedDescription.............................................. 8 12.5 Glossary................................................................18 8.1 Overview...................................................................8 13 Mechanical,Packaging,andOrderable 8.2 FunctionalBlockDiagram.........................................8 Information........................................................... 18 8.3 FeatureDescription...................................................9 5 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionE(January2014)toRevisionF Page • Added,updated,orrenamedthefollowingsections:DeviceInformationTable,ApplicationandImplementation; PowerSupplyRecommendations;Layout;DeviceandDocumentationSupport;Mechanical,Packaging,and OrderingInformation .............................................................................................................................................................. 1 ChangesfromRevisionD(January2012)toRevisionE Page • ChangedtextintheBootstrapCapacitorSelectionfrom"betweentheVREG5toGNDpinforproperoperation"to "betweentheVBSTtoSWpinforproperoperation............................................................................................................. 13 ChangesfromRevisionC(July2011)toRevisionD Page • Removed(SWIFT™)fromthedatasheettitle....................................................................................................................... 1 • AddedconditionstoTypicalCharacteristics........................................................................................................................... 7 ChangesfromRevisionB(March2011)toRevisionC Page • ChangedENhigh-levelinputvoltagefromminof2.0Vtominof1.6V................................................................................ 5 • ChangedENlow-levelinputvoltagefrommaxof0.48Vtomaxof0.4V............................................................................. 5 ChangesfromOriginal(May2009)toRevisionA Page • ChangedT ,forthecurrentlimit,I ,From:25°Cto–40°CTo:85°Cand3.5AwasaddedattheMINvalue.................... 6 A ocl 2 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54325

TPS54325 www.ti.com SLVS932F–MAY2009–REVISEDNOVEMBER2014 6 Pin Configuration and Functions 14-Pin PWPPACKAGE TopView VO 1 14 VCC VFB 2 13 VIN VREG5 3 POWERPAD 12 VBST TPS54325 SS 4 PWP 11 SW2 HTSSOP14 GND 5 10 SW1 PG 6 9 PGND2 EN 7 8 PGND1 PinFunctions PIN I/O DESCRIPTION NAME NO. VO 1 I Connecttooutputofconverter.ThisterminalisusedforOn-TimeAdjustment. VFB 2 I Converterfeedbackinput.Connectwithfeedbackresistordivider. VREG5 3 O 5.5Vpowersupplyoutput.Acapacitor(typical1μF)shouldbeconnectedtoGND. SS 4 I Soft-startcontrol.AexternalcapacitorshouldbeconnectedtoGND. GND 5 –– Signalgroundpin PG 6 O Opendrainpowergoodoutput EN 7 I Enablecontrolinput PGND1, Groundreturnsforlow-sideMOSFET.Alsoserveasinputsofcurrentcomparators.ConnectPGNDand 8,9 –– PGND2 GNDstronglytogetherneartheIC. Switchnodeconnectionbetweenhigh-sideNFETandlow-sideNFET.Alsoserveasinputstocurrent SW1,SW2 10,11 O comparators. Supplyinputforhigh-sideNFETgatedriver(boostterminal).Connectcapacitorfromthispinto VBST 12 O respectiveSW1,SW2terminals.AninternalPNdiodeisconnectedbetweenVREG5toVBSTpin. VIN 13 I PowerinputandconnectedtohighsideNFETdrain VCC 14 I Supplyinputfor5Vinternallinearregulatorforthecontrolcircuitry Thermalpadofthepackage.Mustbesolderedtoachieveappropriatedissipation.Shouldbeconnected PowerPAD™ –– –– toPGND. Copyright©2009–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:TPS54325

TPS54325 SLVS932F–MAY2009–REVISEDNOVEMBER2014 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT V ,V ,EN –0.3 20 V IN CC V –0.3 26 V BST V (vsSW1,SW2) –0.3 6.5 V BST V Inputvoltagerange I V ,V ,SS,PG –0.3 6.5 V FB O SW1,SW2 –2 20 V SW1,SW2(10nstransient) –3 20 V V –0.3 6.5 V REG5 V Outputvoltagerange O P ,P –0.3 0.3 V GND1 GND2 V VoltagefromGNDtoPOWERPAD –0.2 0.2 V diff T Operatingjunctiontemperature –40 150 °C J (1) Stressesbeyondthoselistedunderabsolutemaximumratingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderrecommendedoperating conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. 7.2 Handling Ratings MIN MAX UNIT T Storagetemperaturerange –55 150 °C stg Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001,all 2000 pins(1) V Electrostaticdischarge V (ESD) Chargeddevicemodel(CDM),perJEDECspecificationJESD22- 500 C101,allpins(2) (1) JEDECdocumentJEP155statesthat2000-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat500-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 7.3 Thermal Information PWP THERMALMETRIC(1) UNIT 12PINS R Junction-to-ambientthermalresistance 55.6 θJA R Junction-to-case(top)thermalresistance 51.3 θJC(top) R Junction-to-boardthermalresistance 26.4 θJB °C/W ψ Junction-to-topcharacterizationparameter 1.8 JT ψ Junction-to-boardcharacterizationparameter 20.6 JB R Junction-to-case(bottom)thermalresistance 4.3 θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953. 4 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54325

TPS54325 www.ti.com SLVS932F–MAY2009–REVISEDNOVEMBER2014 7.4 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V Supplyinputvoltagerange 4.5 18 V CC V Powerinputvoltagerange 2 18 V IN V –0.1 24 BST V (vsSW1,SW2) –0.1 6 BST SS,PG –0.1 6 EN –0.1 18 V Inputvoltagerange V I V ,V –0.1 5.5 O FB SW1,SW2 –1.8 18 SW1,SW2(10nstransient) –3 18 P ,P –0.1 0.1 GND1 GND2 V Outputvoltagerange V –0.1 6 V O REG5 I Outputcurrentrange I 0 10 mA O VREG5 T Operatingfree-airtemperature –40 85 °C A T Operatingjunctiontemperature –40 125 °C J 7.5 Electrical Characteristics overoperatingfree-airtemperaturerange,V ,V =12V(unlessotherwisenoted) CC IN PARAMETER TESTCONDITIONS MIN TYP MAX UNIT SUPPLYCURRENT Operating-non-switchingsupply V current,T =25°C,EN=5V, I CC A 850 1300 μA VCC current V =0.8V FB I Shutdownsupplycurrent V current,T =25°C,EN=0V 10 μA VCCSDN CC A LOGICTHRESHOLD V ENhigh-levelinputvoltage EN 1.6 V ENH V ENlow-levelinputvoltage EN 0.4 V ENL V VOLTAGEANDDISCHARGERESISTANCE FB T =25°C,V =1.05V 757 765 773 A O V V thresholdvoltage T =0°Cto85°C,V =1.05V(1) 753 777 mV FBTH FB A O T =-40°Cto85°C,V =1.05V(1) 751 779 A O I V inputcurrent V =0.8V,T =25°C 0 ±0.1 μA VFB FB FB A R V dischargeresistance EN=0V,V =0.5V,T =25°C 50 100 Ω Dischg O O A V OUTPUT REG5 T =25°C,6.0V<V <18V, V V outputvoltage A CC 5.3 5.5 5.7 V VREG5 REG5 0<I <5mA VREG5 V Lineregulation 6.0V<V <18V,I =5mA 20 mV LN5 CC VREG5 V Loadregulation 0mA<I <5mA 100 mV LD5 VREG5 I Outputcurrent V =6V,V =4.0V,T =25°C 70 mA VREG5 CC REG5 A MOSFET R Highsideswitchresistance 25°C,V -SW1,SW2=5.5V 120 mΩ dsonh BST R Lowsideswitchresistance 25°C 70 mΩ dsonl (1) Notproductiontested. Copyright©2009–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:TPS54325

TPS54325 SLVS932F–MAY2009–REVISEDNOVEMBER2014 www.ti.com Electrical Characteristics (continued) overoperatingfree-airtemperaturerange,V ,V =12V(unlessotherwisenoted) CC IN PARAMETER TESTCONDITIONS MIN TYP MAX UNIT CURRENTLIMIT I Currentlimit T =–40°Cto85°C (1) 3.5 4.1 5.5 A ocl A THERMALSHUTDOWN Shutdowntemperature (1) 150 T Thermalshutdownthreshold °C SDN Hysteresis (1) 25 ON-TIMETIMERCONTROL t Ontime V =12V,V =1.05V 145 ns ON IN O t Minimumofftime T =25°C,V =0.7V 260 ns OFF(MIN) A FB SOFTSTART I SSchargecurrent V =0V 1.4 2.0 2.6 μA SSC SS I SSdischargecurrent V =0.5V 0.1 0.2 mA SSD SS POWERGOOD V rising(good) 85% 90% 95% FB V PGthreshold THPG V falling(fault) 85% FB I PGsinkcurrent PG=0.5V 2.5 5 mA PG OUTPUTUNDERVOLTAGEANDOVERVOLTAGEPROTECTION V OutputOVPtripthreshold OVPdetect 115% 120% 125% OVP T OutputOVPpropdelay 5 μs OVPDEL UVPdetect 65% 70% 75% V OutputUVPtripthreshold UVP Hysteresis 10% T OutputUVPdelay 0.25 ms UVPDEL T OutputUVPenabledelay Relativetosoft-starttime x1.7 UVPEN UVLO WakeupV voltage 3.45 3.70 3.95 REG5 V UVLOthreshold V UVLO HysteresisV voltage 0.15 0.25 0.35 REG5 6 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54325

TPS54325 www.ti.com SLVS932F–MAY2009–REVISEDNOVEMBER2014 7.6 Typical Characteristics VIN=12V,T =25°C(unlessotherwisenoted) A 1200 8 1000 A ply Current -Aµ 680000 down Current -µ 46 I- SupVCC 240000 I- ShutVCCSDN 2 0 0 -50 0 50 100 150 -50 0 50 100 150 TJ- JunctionTemperature - °C TJ- JunctionTemperature - °C Figure1.VCCTemperaturevsJunctionTemperature Figure2.VCCShutdownCurrentvsJunctionTemperature 900 z H k 800 y - c uen VO= 1.8V q e Fr 700 g n hi c wit V = 2.5V S O - 600 fSW 500 0.0 0.5 1.0 1.5 2.0 2.5 3.0 I - Output Current - A O Figure3.SwitchingFrequencyvsOutputCurrent Copyright©2009–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:TPS54325

TPS54325 SLVS932F–MAY2009–REVISEDNOVEMBER2014 www.ti.com 8 Detailed Description 8.1 Overview The TPS54325 is a 3-A synchronous step-down (buck) converter with two integrated N-channel MOSFETs. It operates using D-CAP2™ mode control. The fast transient response of D-CAP2™ control reduces the output capacitance required to meet a specific level of performance. Proprietary internal circuitry allows the use of low ESRoutputcapacitorsincludingceramicandspecialpolymertypes. 8.2 Functional Block Diagram -30% UV 14VCC VIN VIN OV 13 1 VO +20% VREG5 VBST 12 Control logic Ref SS 1shot SW VO 2 11 VFB XCON 10 SGND VREG5 VREG5 Ceramic 3 Capacitor 1uF SS 4 9 8 PGND Softstart PGND SS SW OCP PGND 5 GND SGND Ref VCC 6 PG -10% UV VREG5 OV Protection UVLO UVLO Logic EN EN 7 TSD Logic REF Ref 8 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54325

TPS54325 www.ti.com SLVS932F–MAY2009–REVISEDNOVEMBER2014 8.3 Feature Description 8.3.1 SoftStartandPre-BiasedSoftStart The TPS54325 has an adjustable soft start . When the EN pin becomes high, 2.0-μA current begins charging the capacitor which is connected from the SS pin to GND. Smooth control of the output voltage is maintained during start up. The equation for the slow start time is shown in Equation 1. VFB voltage is 0.765 V and SS pin source currentis2 μA. C6(nF)•Vref C6(nF)•0.765 Tss(ms) = − = − Iss(µA) 2 (1) TheTPS54325containsauniquecircuittopreventcurrentfrombeingpulledfromtheoutputduringstartupinthe condition the output is pre-biased. When the soft-start commands a voltage higher than the pre-bias level (internal soft start becomes greater than feedback voltage (V ), the controller slowly activates synchronous FB rectification by starting the first low side FET gate driver pulses with a narrow on-time. It then increments that on- time on a cycle-by-cycle basis until it coincides with the time dictated by (1-D), where D is the duty cycle of the converter. This scheme prevents the initial sinking of the pre-bias output, and ensure that the out voltage (VO) startsandrampsupsmoothlyintoregulationandthecontrolloopisgiventimetotransitionfrompre-biasedstart- uptonormalmodeoperation. 8.3.2 PowerGood The TPS54325 has power-good output. The power-good function is activated after soft start has finished. If the output voltage becomes within -10% of the target value, internal comparators detect power good state and the power good signal becomes high. R resister value ,which is connected between PG and VREG5, is required PG from 20 kΩ to 150 kΩ. If the feedback voltage goes under 15% of the target value, the power good signal becomeslowafter10 μsinternaldelay. 8.3.3 OutputDischargeControl The TPS54325 discharges the output when EN is low, or the controller is turned off by the protection functions (OVP, UVP, UVLO and thermal shutdown). The device discharges outputs using an internal 50-Ω MOSFET which is connected to VO and PGND. The internal low-side MOSFET is not turned on during the output dischargeoperationtoavoidthepossibilityofcausingnegativevoltageattheoutput. 8.3.4 CurrentProtection The output over-current protection (OCP) is implemented using a cycle-by-cycle valley detect control circuit. The switch current is monitored by measuring the low-side FET switch voltage between the SW pin and GND. This voltage is proportional to the switch current. To improve accuracy, the voltage sensing is temperature compensated. During the on time of the high-side FET switch, the switch current increases at a linear rate determined by V , IN V , the on-time and the output inductor value. During the on time of the low-side FET switch, this current OUT decreases linearly. The average value of the switch current is the load current Iout. If the measured voltage is above the voltage proportional to the current limit, Then , the device constantly monitors the low-side FET switch voltage,whichisproportionaltotheswitchcurrent,duringthelow-sideon-time. The converter maintains the low-side switch on until the measured voltage is below the voltage corresponding to the current limit at which time the switching cycle is terminated and a new switching cycle begins. In subsequent switchingcycles,theon-timeissettoafixedvalueandthecurrentismonitoredinthesamemanner. There are some important considerations for this type of over-current protection. The load current one half of the peak-to-peak inductor current higher than the over-current threshold. Also when the current is being limited, the output voltage tends to fall as the demanded load current may be higher than the current available from the converter. This may cause the output under-voltage protection circuit to be activated. When the over current conditionisremoved,theoutputvoltagewillreturntotheregulatedvalue.Thisprotectionisnon-latching. Copyright©2009–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:TPS54325

TPS54325 SLVS932F–MAY2009–REVISEDNOVEMBER2014 www.ti.com Feature Description (continued) 8.3.5 OvervoltageandUndervoltageProtection The TPS54325 monitors a resistor divided feedback voltage to detect over and under voltage. When the feedback voltage becomes higher than 120% of the target voltage, the OVP comparator output goes high and thecircuitlatchesthehigh-sideMOSFETdriverturnsoffandthelow-sideMOSFETturnson. When the feedback voltage becomes lower than 70% of the target voltage, the UVP comparator output goes high and an internal UVP delay counter begins. After 250 μs, the device latches off both internal top and bottom MOSFET.Thisfunctionisenabledapproximately1.7xsoft-starttime. 8.3.6 UVLOProtection The TPS54325 has under voltage lock out protection (UVLO) that monitors the voltage of V pin. When the REG5 V voltageislowerthanUVLOthresholdvoltage,theTPS54325isshutoff.Thisisnon-latchprotection. REG5 8.3.7 ThermalShutdown The TPS54325 monitors the temperature of itself. If the temperature exceeds the threshold value (typically 150°C),thedeviceisshutoff.Thisisnon-latchprotection. 8.4 Device Functional Modes 8.4.1 PWMOperation The main control loop of the TPS54325 is an adaptive on-time pulse width modulation (PWM) controller that supports a proprietary D-CAP2™ mode control. D-CAP2™ mode control combines constant on-time control with an internal compensation circuit for pseudo-fixed frequency and low external component count configuration with bothlowESRandceramicoutputcapacitors.Itisstableevenwithvirtuallynorippleattheoutput. At the beginning of each cycle, the high-side MOSFET is turned on. This MOSFET is turned off after internal one shot timer expires. This one shot timer is set by the converter input voltage ,VIN, and the output voltage ,VO, to maintain a pseudo-fixed frequency over the input voltage range, hence it is called adaptive on-time control. The one-shot timer is reset and the high-side MOSFET is turned on again when the feedback voltage falls below the reference voltage. An internal ramp is added to the reference voltage to simulate output ripple, eliminating the needforESRinducedoutputripplefromD-CAP2™modecontrol. 8.4.2 PWMFrequencyandAdaptiveOn-TimeControl TPS54325 uses an adaptive on-time control scheme and does not have a dedicated on board oscillator. The TPS54325 runs with a pseudo-constant frequency of 700 kHz by using the input voltage and output voltage to set the on-time one-shot timer. The on-time is inversely proportional to the input voltage and proportional to the outputvoltage,therefore,whenthedutyratioisVOUT/VIN,thefrequencyisconstant. 8.4.3 OperationwithVIN <4.5V Thedeviceisrecommendedtooperatewithinputvoltagesabove4.5V.ThetypicalVINUVLOthresholdis3.7V and the device can operate at input voltages down to the UVLO voltage. At input voltages below the actual UVLO voltage, the device does not switch. If the EN pin is externally pulled up or left floating, the device becomesactivewhentheVINpinpassestheUVLOthreshold.Switchingbeginswhentheslow-startsequenceis initiated. 8.4.4 OperationWithENControl The enable threshold voltage is 1.6 V (typical). With the EN pin is held below that voltage, the device is disabled and switching is inhibited even if the VIN pin is above the UVLO threshold. The IC quiescent current is reduced in this state. If the EN voltage increases above the threshold while the VIN pin is above the UVLO threshold, the devicebecomesactive.Switchingisthenenabledandtheslow-startsequenceisinitiated. 10 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54325

TPS54325 www.ti.com SLVS932F–MAY2009–REVISEDNOVEMBER2014 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information The TPS54325 device is typically used as a step-down converter, which converts a voltage in the range of 4.5 V to18Vtoalowervoltage.WEBENCHsoftwareisavailabletoaidinthedesignandanalysisofcircuits. 9.2 Typical Application Figure4. SchematicDiagramforDesignExample 9.2.1 DesignRequirements Tobeginthedesignprocess,knowtheapplicationparameterslistedinTable1: Table1.ApplicationParameters PARAMETER CONDITIONS MIN TYP MAX UNIT Inputvoltage 5 17 V Outputvoltage 1.05 V Operatingfrequency V =12V,I =1A 700 kHz I o Outputcurrent 0 3 A Outputripplevoltage V =12V,I =3A 9 mVpp I out Efficiency V =12V,V =3.3V,I =1.2A 91% I out out Copyright©2009–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:TPS54325

TPS54325 SLVS932F–MAY2009–REVISEDNOVEMBER2014 www.ti.com 9.2.2 DetailedDesignProcedure 9.2.2.1 OutputVoltageResistorsSelection The output voltage is set with a resistor divider from the output node to the VFB pin. It is recommended to use 1%toleranceorbetterdividerresistors.StartbyusingEquation2 andEquation3tocalculateV . OUT To improve efficiency at very light loads consider using larger value resistors, too high of resistance will be more susceptibletonoiseandvoltageerrorsfromtheVFBinputcurrentwillbemorenoticeable. Foroutputvoltagefrom0.76Vto2.5V: ( R1) VOUT=0.765 • 1 + −R2 (2) Foroutputvoltageover2.5V: VOUT=(0.763 + 0.0017 •VOUT)•(1 + −RR21) where • V =TargetV voltage (3) OUT_SET OUT 9.2.2.2 OutputFilterSelection TheoutputfilterusedwiththeTPS54325isanLCcircuit.ThisLCfilterhasdoublepoleat: 1 F = P 2p L ´C OUT OUT (4) At low frequencies, the overall loop gain is set by the output set-point resistor divider network and the internal gain of the TPS54325. The low frequency phase is 180 degrees. At the output filter pole frequency, the gain rolls off at a -40 dB per decade rate and the phase drops rapidly. D-CAP2 introduces a high frequency zero that reduces the gain roll off to -20 dB per decade and increases the phase to 90 degrees one decade above the zero frequency. The inductor and capacitor selected for the output filter must be selected so that the double pole of Equation 4 is located below the high frequency zero but close enough that the phase boost provided be the high frequency zero provides adequate phase margin for a stable circuit. To meet this requirement use the valuesrecommendedinTable2. Table2.RecommendedComponentValues OUTPUTVOLTAGE(V) R1(kΩ) R2(kΩ) C4(pF)(1) L1(µH) C8+C9(µF) 1 6.81 22.1 1.5 22-68 1.05 8.25 22.1 1.5 22-68 1.2 12.7 22.1 1.5 22-68 1.8 30.1 22.1 10-22 2.2 22-68 2.5 49.9 22.1 10-22 2.2 22-68 3.3 73.2 22.1 10-22 2.2 22-68 5 121 22.1 10-22 3.3 22-68 (1) Optional For higher output voltages at or above 1.8 V, additional phase boost can be achieved by adding a feed forward capacitor(C4)inparallelwithR1. The inductor peak-to-peak ripple current, peak current and RMS current are calculated using Equation 5, Equation 6 and Equation 7. The inductor saturation current rating must be greater than the calculated peak currentandtheRMSorheatingcurrentratingmustbegreaterthanthecalculatedRMScurrent. 12 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54325

TPS54325 www.ti.com SLVS932F–MAY2009–REVISEDNOVEMBER2014 Use 700 kHz for f . Make sure the chosen inductor is rated for the peak current of Equation 6 and the RMS SW currentofEquation7. V V - V Ilp - p = OUT • IN (max) OUT V L •f IN (max) O SW (5) Ilp - p I = I +  lpeak O 2 (6) − √ 1 I = I 2+ −Ilp - p2 Lo(RMS) O 12 (7) For this design example, the calculated peak current is 3.47 A and the calculated RMS current is 3.01 A. The inductor used is a TDK SPM6530-1R5M100 with a peak current rating of 11.5 A and an RMS current rating of 11 A. The capacitor value and ESR determines the amount of output voltage ripple. The TPS54325 is intended for use with ceramic or other low ESR capacitors. Recommended values range from 22 µF to 68 µF. Use Equation 8 to determinetherequiredRMScurrentratingfortheoutputcapacitor. V • (V - V ) I =−−OUT IN OUT CO(RMS) √12 •V •L •f IN O SW (8) For this design two TDK C3216X5R0J226M 22-µF output capacitors are used. The typical ESR is 2 mΩ each. ThecalculatedRMScurrentis0.271Aandeachoutputcapacitorisratedfor4A. 9.2.2.3 InputCapacitorSelection The TPS54325 requires an input decoupling capacitor, and a bulk capacitor is needed depending on the application. A ceramic capacitor over 10-mF is recommended for the decoupling capacitor. An additional 0.1-µF capacitor from pin 14 to ground is recommended to improve the stability of the over-current limit function. The capacitorvoltageratingneedstobegreaterthanthemaximuminputvoltage. 9.2.2.4 BootstrapCapacitorSelection A 0.1-μF ceramic capacitor must be connected between the VBST to SW pin for proper operation. Using a ceramiccapacitorisrecommended. Copyright©2009–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:TPS54325

TPS54325 SLVS932F–MAY2009–REVISEDNOVEMBER2014 www.ti.com 9.2.3 ApplicationCurves 100 1.100 VO= 3.3 V Efficiency - % 67890000 VO= 1.8 V VO= 2.5 V - Output Voltage - V 11..005705 VIN= 18 V VIN= 5 V VIN= 12 V VOUT 1.025 50 1.000 40 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 IOUT- Output Current -A IOU T- Output Current -A Figure5.EfficiencyvsOutputCurrent Figure6.LoadRegulation, V =3.3V,2.5V,and1.8V 1.05-VOutputVoltagevsOutputCurrent O 1.100 900 1.075 Hz 800 V- Output Voltage - VOUT 11..002550 IO= 3A IO= 0A IO= 1.5A f- Switching Frequency - kSW 760000 VO= 1.8 V VO= 3.3 V 1.0000 5 10 15 20 5000 5 10 15 20 VIN(V) VIN- Input Voltage - V Figure7.LineRegulation, Figure8.SwitchingFrequencyvsInputVoltage 1.05-VOutputVoltagevsInputVoltage VO(50 mV/div) VO(10 mV/div) SW(5 V/div) IO(2A/div) 100µs/div 400 ns/div Figure9.LoadTransientResponse Figure10.OutputVoltageRipple 14 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54325

TPS54325 www.ti.com SLVS932F–MAY2009–REVISEDNOVEMBER2014 VIN(50 mV/div) EN(10 V/div) VO(0.5 V/div) SW(5 V/div) PG(5 V/div) 400 µs/div 400 ns/div Figure11.InputVoltageRipple Figure12.StartUp 10 Power Supply Recommendations The device is designed to operate from an input-voltage supply range between 4.5 V and 18 V. This input supply should be well regulated. If the input supply is located more than a few inches from the converter, additional bulk capacitance may be required in addition to the ceramic bypass capacitors. An electrolytic capacitor with a value of100μFisatypicalchoice. Copyright©2009–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:TPS54325

TPS54325 SLVS932F–MAY2009–REVISEDNOVEMBER2014 www.ti.com 11 Layout 11.1 Layout Guidelines 1. Keeptheinputswitchingcurrentloopassmallaspossible. 2. Keep the SW node as physically small and short as possible to minimize parasitic capacitance and inductance and to minimize radiated emissions. Kelvin connections should be brought from the output to the feedbackpinofthedevice. 3. Keepanalogandnon-switchingcomponentsawayfromswitchingcomponents. 4. Makeasinglepointconnectionfromthesignalgroundtopowerground. 5. Donotallowswitchingcurrenttoflowunderthedevice. 6. KeepthepatternlinesforVINandPGNDbroad. 7. ExposedpadofdevicemustbeconnectedtoPGNDwithsolder. 8. VREG5capacitorshouldbeplacednearthedevice,andconnectedPGND. 9. OutputcapacitorshouldbeconnectedtoabroadpatternofthePGND. 10. Voltagefeedbackloopshouldbeasshortaspossible,andpreferablywithgroundshield. 11. LowerresistorofthevoltagedividerwhichisconnectedtotheVFBpinshouldbetiedtoSGND. 12. ProvidingsufficientviaispreferableforVIN,SWandPGNDconnection. 13. PCBpatternforVIN,SW,andPGNDshouldbeasbroadaspossible. 14. IfVINandVCCisshorted,VINandVCCpatternsneedtobeconnectedwithbroadpatternlines. 15. VINCapacitorshouldbeplacedasnearaspossibletothedevice. 11.2 Layout Example VCC INPUT BYPASS CAPACITOR Additional VCC Thermal VIN Vias VIN INPUT FREEESDISBTAOCRKS VO EPXOPWOESREPDAD VCC BCYAPPAASCSITOR AREA VFB VIN BOOST VREG5 VBST CAPACITOR VO BIAS SS SW1 CAP GND SW2 OUTPUT INDUCTOR OUTPUT PG PGND1 SLOW FILTER START CAPACITOR CAP EN PGND2 Connection to POWER GROUND on internal or ANALOG Additional bottom layer GROUND Thermal TRACE Vias To Enable Control POWER GROUND VIAto Ground Plane Etch on Bottom Layer or Under Component Figure13. PCBLayout 16 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54325

TPS54325 www.ti.com SLVS932F–MAY2009–REVISEDNOVEMBER2014 11.3 Thermal Considerations ThisPowerPAD™packageincorporatesanexposedthermalpadthatisdesignedtobeconnectedtoanexternal heatsink. The thermal pad must be soldered directly to the printed board (PCB). After soldering, the PCB can be used as a heatsink. In addition, through the use of thermal vias, the thermal pad can be attached directly to the appropriate copper plane shown in the electrical schematic for the device, or alternatively, can be attached to a special heatsink structure designed into the PCB. This design optimizes the heat transfer from the integrated circuit(IC). For additional information on the PowerPAD™ package and how to use the advantage of its heat dissipating abilities,referto: • PowerPAD™MadeEasy(SLMA004). • PowerPAD™ThermallyEnhancedPackage,(SLMA002). TheexposedthermalpaddimensionsforthispackageareshowninFigure14 14 8 Thermal Pad 2.46 ° 1 7 2.31 Figure14. ThermalPadDimensions Copyright©2009–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:TPS54325

TPS54325 SLVS932F–MAY2009–REVISEDNOVEMBER2014 www.ti.com 12 Device and Documentation Support 12.1 Device Support 12.1.1 Third-PartyProductsDisclaimer CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONEORINCOMBINATIONWITHANYTIPRODUCTORSERVICE. 12.1.2 DevelopmentSupport • WEBENCH • ForSWIFT™PowerProductsDocumentation,seehttp://www.ti.com/swift 12.2 Documentation Support 12.2.1 RelatedDocumentation • AbsoluteMaximumRatingsforSoldering(SNOA549). • PowerPAD™MadeEasy(SLMA004). • PowerPAD™ThermallyEnhancedPackage(SLMA002). • SemiconductorandICPackageThermalMetrics(SPRA953). 12.3 Trademarks D-CAP2,PowerPADaretrademarksofTexasInstruments. Blu-rayDiscisatrademarkofBlu-rayDisc. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.4 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 12.5 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 18 SubmitDocumentationFeedback Copyright©2009–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54325

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS54325PWP ACTIVE HTSSOP PWP 14 90 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 PS54325 & no Sb/Br) TPS54325PWPR ACTIVE HTSSOP PWP 14 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 PS54325 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 OTHER QUALIFIED VERSIONS OF TPS54325 : •Automotive: TPS54325-Q1 NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 30-Oct-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS54325PWPR HTSSOP PWP 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 30-Oct-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS54325PWPR HTSSOP PWP 14 2000 350.0 350.0 43.0 PackMaterials-Page2

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