Product Sample & Technical Tools & Support & Folder Buy Documents Software Community TPS3813J25,TPS3813L30,TPS3813K33,TPS3813I50 SLVS331H–DECEMBER2000–REVISEDJULY2016 TPS3813xxx Family Processor Supervisory Circuits With Window-Watchdog 1 Features 3 Description • Window-WatchdogWithProgrammableDelayand The TPS3813xxx family of supervisory circuits 1 provide circuit initialization and timing supervision, WindowRatio primarilyforDSPsandprocessor-basedsystems. • 6-PinSOT-23Package During power on, RESET is asserted when supply • SupplyCurrentof9 µA(Typical) voltage (V ) becomes higher than 1.1 V. Thereafter, DD • Power-OnResetGeneratorWithaFixedDelay the supervisory circuit monitors V and keeps DD Timeof25ms RESET active as long as V remains below the DD • PrecisionSupplyVoltageMonitor:2.5V,3V,3.3 threshold voltage (V ). An internal timer delays the IT V,and5V return of the output to the inactive state (high) to ensure proper system reset. The delay time, t = 25 • Open-DrainResetOutput d ms typical, starts after V has risen above the DD • TemperatureRange: –40°Cto85°C threshold voltage (V ). When the supply voltage IT drops below the threshold voltage (V ), the output IT 2 Applications becomes active (low) again. No external components are required. All the devices of this family have a • ApplicationsUsingDSPs,Microcontrollers,or fixed-sense threshold voltage (V ) set by an internal Microprocessors IT voltagedivider. • SafetyCriticalSystems For safety critical applications the TPS3813xxx family • AutomotiveSystems incorporates a so-called window-watchdog with • HeatingSystems programmable delay and window ratio. The upper limit of the watchdog time-out can be set by either TypicalOperatingCircuit connecting WDT to GND, V , or using an external DD capacitor. The lower limit and thus the window ratio is V DD set by connecting WDR to GND or V . The DD supervised processor now needs to trigger the TPS3813xxx within this window not to assert a RESET. 0.1 µF 0.1 µF R The product spectrum is designed for supply voltages V V of 2.5 V, 3 V, 3.3 V, and 5 V. The circuits are DD DD WDR RESET RESET availableina6-pinSOT-23package. TPS3813 µC The TPS3813xxx devices are characterized for WDT WDI I/O operationoveratemperaturerangeof –40°Cto85°C. GND GND C WP DeviceInformation(1) PARTNUMBER PACKAGE BODYSIZE(NOM) Copyright © 2016, Texas Instruments Incorporated TPS3813xxx SOT-23(6) 2.90mm×1.60mm (1) For all available packages, see the orderable addendum at theendofthedatasheet. 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

TPS3813J25,TPS3813L30,TPS3813K33,TPS3813I50 SLVS331H–DECEMBER2000–REVISEDJULY2016 www.ti.com Table of Contents 1 Features.................................................................. 1 8.3 FeatureDescription...................................................9 2 Applications........................................................... 1 8.4 DeviceFunctionalModes........................................10 3 Description............................................................. 1 8.5 Programming...........................................................11 4 RevisionHistory..................................................... 2 9 ApplicationandImplementation........................ 13 9.1 ApplicationInformation............................................13 5 DeviceComparisonTable..................................... 4 9.2 TypicalApplication..................................................13 6 PinConfigurationandFunctions......................... 4 10 PowerSupplyRecommendations..................... 15 7 Specifications......................................................... 5 11 Layout................................................................... 15 7.1 AbsoluteMaximumRatings......................................5 11.1 LayoutGuidelines.................................................15 7.2 ESDRatings..............................................................5 11.2 LayoutExample....................................................15 7.3 RecommendedOperatingConditions......................5 12 DeviceandDocumentationSupport................. 16 7.4 ThermalInformation..................................................5 7.5 ElectricalCharacteristics...........................................6 12.1 RelatedLinks........................................................16 7.6 TimingRequirements................................................6 12.2 ReceivingNotificationofDocumentationUpdates16 7.7 SwitchingCharacteristics..........................................6 12.3 CommunityResource............................................16 7.8 DissipationRatings...................................................7 12.4 Trademarks...........................................................16 7.9 TypicalCharacteristics..............................................8 12.5 ElectrostaticDischargeCaution............................16 12.6 Glossary................................................................16 8 DetailedDescription.............................................. 9 13 Mechanical,Packaging,andOrderable 8.1 Overview...................................................................9 Information........................................................... 16 8.2 FunctionalBlockDiagram.........................................9 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionG(October2013)toRevisionH Page • AddedESDRatingstable,ThermalInformationtable,FeatureDescriptionsection,DeviceFunctionalModes, ApplicationandImplementationsection,PowerSupplyRecommendationssection,Layoutsection,Deviceand DocumentationSupportsection,andMechanical,Packaging,andOrderableInformationsection ..................................... 1 • Changed"Powerupresetvoltage"to"Power-onrestvoltage"inElectricalCharacteristics ................................................ 6 • ChangedthefunctiontableinDeviceFunctionalModes .................................................................................................... 10 • UpdatedtextinImplementingWindow-WatchdogSettingssection..................................................................................... 11 ChangesfromRevisionF(August2012)toRevisionG Page • Changedvoltagefrom0.6Vto1.1Vforbottomfigure.......................................................................................................... 7 ChangesfromRevisionE(October2010)toRevisionF Page • ChangedfromRevEtoRevF,August2012......................................................................................................................... 1 • DeletedthePull-upresistorvaluerowintheROCtable........................................................................................................ 5 ChangesfromRevisionD(October2010)toRevisionE Page • AddedPull-upresistorvaluetoROCtableforRESET ......................................................................................................... 5 ChangesfromRevisionC(April,2008)toRevisionD Page • Updatedtablepindescriptions............................................................................................................................................... 4 • Changedexternalcapacitorvaluerecommendationsinparagraph2ofProgrammableWindow-Watchdogsection.........11 • AddedPower-UpConsiderationssection............................................................................................................................. 12 2 SubmitDocumentationFeedback Copyright©2000–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS3813J25 TPS3813L30 TPS3813K33 TPS3813I50

TPS3813J25,TPS3813L30,TPS3813K33,TPS3813I50 www.ti.com SLVS331H–DECEMBER2000–REVISEDJULY2016 • ChangedFigure8................................................................................................................................................................. 13 Copyright©2000–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:TPS3813J25 TPS3813L30 TPS3813K33 TPS3813I50

TPS3813J25,TPS3813L30,TPS3813K33,TPS3813I50 SLVS331H–DECEMBER2000–REVISEDJULY2016 www.ti.com 5 Device Comparison Table T (1) DEVICENAME THRESHOLDVOLTAGE MARKING A TPS3813J25DBV 2.25V PCDI TPS3813L30DBV 2.64V PEZI –40°Cto+85°C TPS3813K33DBV 2.93V PFAI TPS3813I50DBV 4.55V PFBI (1) ForthemostcurrentpackageandorderinginformationseethePackageOptionAddendumattheendofthisdocument,orseethe deviceproductfolderatwww.ti.com. 6 Pin Configuration and Functions DBVPackage 6-PinSOT-23 TopView WDI 1 6 RESET GND 2 5 WDR WDT 3 4 V DD PinFunctions PIN I/O DESCRIPTION NO. NAME 1 WDI I Watchdogtimerinput.Thisinputmustbedrivenatalltimesandnotleftfloating. 2 GND I Ground 3 WDT I Programmablewatchdogdelayinput 4 V I Supplyvoltageandsupervisinginput DD 5 WDR I Selectablewatchdogwindowratioinput.ThisinputmustbetiedtoV orGNDandnotleftfloating. DD 6 RESET O Open-drainresetoutput 4 SubmitDocumentationFeedback Copyright©2000–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS3813J25 TPS3813L30 TPS3813K33 TPS3813I50

TPS3813J25,TPS3813L30,TPS3813K33,TPS3813I50 www.ti.com SLVS331H–DECEMBER2000–REVISEDJULY2016 7 Specifications 7.1 Absolute Maximum Ratings Overoperatingfree-airtemperaturerange(unlessotherwisenoted).(1) MIN MAX UNIT Supplyvoltage(2) 7 V V RESET –0.3 V +0.3 V DD DD Allotherpins (2) –0.3 7 V I Maximumlowoutputcurrent 5 mA OL I Maximumhighoutputcurrent –5 mA OH I Inputclampcurrent(V <0orV >V ) ±20 mA IK I I DD I Outputclampcurrent(V <0orV >V ) ±20 mA OK O O DD Continuoustotalpowerdissipation SeeDissipationRatings Solderingtemperature 260 °C T Operatingfree-airtemperature –40 85 °C A T Storagetemperature –65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) AllvoltagevaluesarewithrespecttoGND.Forreliableoperation,thedevicemustnotbeoperatedat7Vformorethant=1000h continuously. 7.2 ESD Ratings VALUE UNIT Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±4000 V Electrostaticdischarge V (ESD) Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) ±1500 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 7.3 Recommended Operating Conditions Atspecifiedtemperaturerange. MIN MAX UNIT V Supplyvoltage 2 6 V DD V Inputvoltage 0 V +0.3 V I DD V High-levelinputvoltage 0.7×V V IH DD V Low-levelinputvoltage 0.3×V V IL DD Δt/ΔV Inputtransitionriseandfallrate 100 ns/V t PulsewidthofWDItriggerpulse 50 ns w T Operatingfree-airtemperature –40 85 °C A 7.4 Thermal Information TPS3813xxx THERMALMETRIC(1) DBV(SOT-23) UNIT 6PINS RθJA Junction-to-ambientthermalresistance 208.5 °C/W RθJC(top) Junction-to-case(top)thermalresistance 123.3 °C/W RθJB Junction-to-boardthermalresistance 37.2 °C/W ψJT Junction-to-topcharacterizationparameter 14.6 °C/W ψJB Junction-to-boardcharacterizationparameter 36.3 °C/W RθJC(bot) Junction-to-case(bottom)thermalresistance n/a °C/W (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. Copyright©2000–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:TPS3813J25 TPS3813L30 TPS3813K33 TPS3813I50

TPS3813J25,TPS3813L30,TPS3813K33,TPS3813I50 SLVS331H–DECEMBER2000–REVISEDJULY2016 www.ti.com 7.5 Electrical Characteristics Overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted). PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V =2Vto6V,I =500µA 0.2 DD OL V Low-leveloutputvoltage V =3.3VI =2mA 0.4 V OL DD OL V =6V,I =4mA 0.4 DD OL V Powerupresetvoltage (1) V ≥1.1V,I =50µA 0.2 V POR DD OL TPS3813J25 2.2 2.25 2.3 Negative-goinginputthreshold TPS3813L30 2.58 2.64 2.7 VIT voltage (2) TPS3813K33 TA=–40°Cto+85°C 2.87 2.93 3 V TPS3813I50 4.45 4.55 4.65 TPS3813J25 30 TPS3813L30 35 V Hysteresis mV hys TPS3813K33 40 TPS3813I50 60 WDI,WDR WDI=V =6V,WDR=V =6V –25 25 DD DD IIH High-levelinputcurrent WDT WDT=VDD=6V,VDD>VIT,RESET= –100 100 High nA WDI,WDR WDI=0V,WDR=0V,V =6V –25 25 DD I Low-levelinputcurrent IL WDT WDT=0V,V >V ,RESET=High –100 100 DD IT I High-leveloutputcurrent V =V +0.2V,V =V 25 nA OH DD IT OH DD V =2-Voutputunconnected 9 13 DD I Supplycurrent µA DD V =5-Voutputunconnected 20 25 DD C Inputcapacitance V =0VtoV 5 pF i I DD (1) ThelowestsupplyvoltageatwhichRESETbecomesactive.t,V ≥15µs/V. r DD (2) Toensurebeststabilityofthethresholdvoltage,abypasscapacitor(ceramic,0.1µF)mustbeplacedneartothesupplyterminals. 7.6 Timing Requirements AtR =1MΩ,C =50pF,andT =–40°Cto+85°C. L L A MIN TYP MAX UNIT t PulsewidthatV V =V +0.2V,V =V –0.2V 3 µs w DD DD IT– DD IT– 7.7 Switching Characteristics AtR =1MΩ,C =50pF,andT =–40°Cto+85°C. L L A PARAMETER TESTCONDITIONS MIN TYP MAX UNIT t Delaytime V ≥V +0.2V,SeeFigure1 20 25 30 ms d DD IT WDT=0V 0.2 0.25 0.3 s t Watchdogtime-out Upperlimit WDT=V 2 2.5 3 t(out) DD WDT=programmable (1) See (2) ms WDR=0V,WDT=0V 1:31.8 WDR=0V,WDT=V 1:32 DD WDR=0V,WDT=programmable 1:25.8 Watchdogwindowratio WDR=V ,WDT=0V 1:124.9 DD WDR=V ,WDT=V 1:127.7 DD DD WDR=V ,WDT=programmable 1:64.5 DD Propagation(delay)time, t V toRESETdelay V =V –0.2V,V =V +0.2V 30 50 µs PHL high-to-low-leveloutput DD IL IT IH IT (1) 155pF<C <63nF (ext) (2) (C ÷15.55pF+1)×6.25ms (ext) 6 SubmitDocumentationFeedback Copyright©2000–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS3813J25 TPS3813L30 TPS3813K33 TPS3813I50

TPS3813J25,TPS3813L30,TPS3813K33,TPS3813I50 www.ti.com SLVS331H–DECEMBER2000–REVISEDJULY2016 7.8 Dissipation Ratings DERATING T <25°CPOWER T =70°C T =80°C PACKAGE A FACTOR A A RATING POWERRATING POWERRATING ABOVET =25°C A DBV 437mW 3.5mW/°C 280mW 227mW VDD VIT 1.1 V t td td td RESET OutputCondition OutputCondition Undefined Undefined t WDI t 1stWindow WithoutLower 2ndWindow 3rdWindow Boundary WithLower WithLower TriggerPulse 1stWindow Boundary Boundary LowerWindow WithoutLower 2ndWindow 3rdWindow Boundary 1stWindow Boundary WithLower WithLower WithoutLower Boundary Boundary Boundary Figure1. TimingDiagram Copyright©2000–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:TPS3813J25 TPS3813L30 TPS3813K33 TPS3813I50

TPS3813J25,TPS3813L30,TPS3813K33,TPS3813I50 SLVS331H–DECEMBER2000–REVISEDJULY2016 www.ti.com 7.9 Typical Characteristics 20 2 18 WWDDTI = = G GNNDD,, 1.75 VWDDDI == 2G VN,D, WDR = GND V WDT = GND, mA 16 85°C ge− 1.50 WDR = GND IS−upply Current−DD 11142086 25°C 0°C −40°C −Low-Loltaevel Output V 100...2751550 85°C 25°C 0°C 4 OL 2 V 0.25 −40°C 00 1 2 3 4 5 6 00 1 2 3 4 5 6 7 VDD−Supply Voltage−V IOL−Low-Level Output Current−mA Figure2.SupplyCurrentvsSupplyVoltage Figure3.Low-LevelOutputVoltagevsLow-LevelOutput Current 1000 C) 1.001 °5 800 (2 V 600 25°C e− 1.000 g a nA 400 oltV 0.999 I−Input Current−I −−−−2246800000000000 85°C −400°C°C VWWDDDDIR == = 6G GVNN,DD, Normalized Input Threshold 000...999999876 WWWDDDITR = == T GGriNgNgDDe,red, − −1000 VIT0.995 0 1 2 3 4 5 6 −40 −20 0 20 40 60 80 VI−Input Voltage at WDT−V TA−Free-Air TemperatureAt VDD−°C Figure4.InputCurrentvsInputVoltageatWDT Figure5.NormalizedInputThresholdVoltagevsFree-Air TemperatureatVDD 20 ms 18 − DD 16 V at 14 n o ati 12 ur e D 10 s Pul 8 m mu 6 ni Mi 4 − W 2 t 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 VDD−Threshold Overdrive Voltage−V Figure6.MinimumPulseDurationatV vsV ThresholdOverdriveVoltage DD DD 8 SubmitDocumentationFeedback Copyright©2000–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS3813J25 TPS3813L30 TPS3813K33 TPS3813I50

TPS3813J25,TPS3813L30,TPS3813K33,TPS3813I50 www.ti.com SLVS331H–DECEMBER2000–REVISEDJULY2016 8 Detailed Description 8.1 Overview The TPS3813xxx family of supervisory circuits provide circuit initialization and timing supervision signals. During power on, RESET is asserted (low) when the supply voltage (V ) increases above 1.1 V. Thereafter, the DD supervisorycircuitmonitorsV andkeepsRESETlowaslongasV remainsbelowthethresholdvoltage(V ). DD DD IT OnceV increasesaboveV ,aninternaltimerdelaysthedeassertionoftheoutputtoallowforapropersystem DD IT reset before RESET transitions to a high state. The delay time (t ) is 25 ms typical and starts after V rises d DD above the V . When the supply voltage drops below V , the output transitions low again. All the devices of this IT IT familyhaveafixedthresholdvoltagesetbyaninternalvoltagedivider. The TPS3813xxx family incorporates a so-called window-watchdog timer, which has a programmable delay and window ratio. The supervised processor must trigger the WDI pin of the TPS3813xxx within the user- programmable window to keep RESET from asserting. The upper limit of the watchdog time-out can be set by either connecting WDT to GND, V , or using an external capacitor. The lower limit and thus the window ratio is DD setbyconnectingWDRtoGNDorV . DD 8.2 Functional Block Diagram RESET WDT Oscillator Reset Logic and Timer Detection Circuit GND VDD Power to circuitry Watchdog R1 Ratio WDR + Detection _ R2 Bandgap Rising Edge WDI GND Voltage Detection Reference GND GND Copyright © 2016, Texas Instruments Incorporated 8.3 Feature Description The TPS3813xxx family incorporates both a voltage supervisor and a window-watchdog timer into a single device. The device monitors the input voltage and the supervised processor must trigger the WDI pin of the TPS3813xxxwithintheuser-programmablewindowtokeepRESETfromasserting. Copyright©2000–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:TPS3813J25 TPS3813L30 TPS3813K33 TPS3813I50

TPS3813J25,TPS3813L30,TPS3813K33,TPS3813I50 SLVS331H–DECEMBER2000–REVISEDJULY2016 www.ti.com Feature Description (continued) 8.3.1 User-ProgrammableWatchdogTimer(WDI) The TPS3813xxx family of devices have a watchdog timer that must be periodically triggered by either a positive or negative transition at the WDI pin to avoid a reset signal being issued. When the supervising system fails to retrigger the watchdog circuit within the time-out interval, t , RESET becomes asserts for the time period t . t(out) d This event also reinitializes the watchdog timer. After the reset of the supervisor is released, the lower boundary of the first WDI window is disabled. After the first WDI low-to-high transition is detected, the lower boundary functionofthewindowisenabled.AllfurtherWDIpulsesmustfitintotheconfiguredwindowframe. Both the upper and lower boundary of the window can be adjusted by the user. See Programming for more detailsonhowtosettheupperandlowerboundariesofthewindow. 8.3.2 RESETOutput RESET remains high (deasserted) as long as V is above the threshold voltage (V ) and the user-programable DD IT watchdogtimercriteriaaremet.IfV fallsbelowtheV orifWDIisnottriggeredwithintheappropriatewindow, DD IT thenRESETisasserted,drivingthe RESETpintoalowimpedance. When V is once again above V , a delay circuit is enabled that holds RESET low for a specified reset delay DD IT period (t ) which is 25 ms typical. When the reset delay has elapsed, the RESET pin goes to a high-impedance d state and uses a pullup resistor to hold RESET high. Connect the pullup resistor to the proper voltage rail to enable the outputs to be connected to other devices at the correct interface voltage level. RESET can be pulled up to any voltage up to 6 V, independent of the device supply voltage. To ensure proper voltage levels, give some consideration when choosing the pullup resistor value and consider the required low-level output voltage (V ),theoutputcapacitiveloading,andtheoutputleakagecurrent. OL 8.4 Device Functional Modes Table1summarizesthevariousfunctionalmodesofthedevice. Table1.TPS3813xxxFunction/TruthTable V WDI RESET DD V <V — Undefined DD POR V <V <V — L POR DD IT V >V Outsidewindow L DD IT V >V Insidewindow H DD IT 8.4.1 NormalOperation(V >V ) DD IT WhenV isgreaterthanV ,theRESETsignalisdeterminedbythelastWDIpulse. DD IT • WDI pulse inside window: as long as pulses occur within the user-programmable window, the RESET signal remainshigh. • WDI pulse outside window: if a pulse occurs outside the user-programmable window or not at all, the RESET signalgoeslow. 8.4.2 AbovePower-OnResetButLessThanThreshold(V <V <V ) POR DD IT When the voltage on V is less than the V voltage, and greater than the power-on reset voltage (V ), the DD IT POR RESETsignalisassertedregardlessoftheWDIsignal. 8.4.3 BelowPower-OnReset(V <V ) DD POR When the voltage on V is lower than V , the device does not have enough voltage to internally pull the DD POR assertedoutputlow,and RESETisundefinedandmustnotberelieduponforproperdevicefunction. 10 SubmitDocumentationFeedback Copyright©2000–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS3813J25 TPS3813L30 TPS3813K33 TPS3813I50

TPS3813J25,TPS3813L30,TPS3813K33,TPS3813I50 www.ti.com SLVS331H–DECEMBER2000–REVISEDJULY2016 8.5 Programming 8.5.1 ImplementingWindow-WatchdogSettings TherearetwowaystoconfigurethewatchdogtimerwindowthemostflexibleistoconnectacapacitortoWDTto set the upper boundary of the window watchdog while connecting WDR to either V or GND, thus setting the DD lower boundary. The other way to configure the timing is by wiring the WDT and WDR pin to either V or GND. DD By hardwiring the pins to either V or GND there are four different timings available; these settings are listed in DD Table2. Table2.Cap-FreeTimerSettings SELECTEDOPERATIONMODE WINDOWFRAME LOWERWINDOWFRAME Max=0.3s Max=9.46ms WDR=0V Typ=0.25s Typ=7.86ms Min=0.2s Min=6.27ms WDT=0V Max=0.3s Max=2.43ms WDR=V Typ=0.25s Typ=2ms DD Min=0.2s Min=1.58ms Max=3s Max=93.8ms WDR=0V Typ=2.5s Typ=78.2ms Min=2s Min=62.5ms WDT=V DD Max=3s Max=23.5ms WDR=V Typ=2.5s Typ=19.6ms DD Min=2s Min=15.6ms To visualize the values named in the table, a timing diagram was prepared. It is used to describe the upper and lower boundary settings. For an application, the important boundaries are the t and t . Within boundary,max window,min these values, the watchdog timer must be retriggered to avoid a time-out condition or a boundary violation in the event of a trigger pulse in the lower boundary. The values in the table above are typical and worst-case conditions.Theyarevalidoverthewholetemperaturerangeof –40°Cto+85°C. In the shaded area of Figure 7, it cannot be predicted if the device detects a violation or not and release a reset. This is also the case between the boundary tolerance of t and t as well as between t boundary,min boundary,max window,min andt .Itisimportanttosetupthetriggerpulsesaccordinglytoavoidviolationsintheseareas. window,max WDI Detectionof Rising Edge Window Frame to Reset the WDI t tboundary,min tboundary,typ tboundary,max twindow,min twindow,typ twindow,max Figure7. UpperandLowerBoundaryVisualization 8.5.2 ProgrammableWindow-WatchdogbyUsinganExternalCapacitor The upper boundary of the watchdog timer can be set by an external capacitor connected between the WDT pin and GND. Common consumer electronic capacitors can be used to implement this feature. They must have low ESR and low tolerances because the tolerances have to be considered if the calculations are performed. The first formula is used to calculate the upper window frame. After calculating the upper window frame, the lower boundary can be calculated. As in the last example, the most important values are the t and t . boundary,max window,min Thetriggerpulsehastofitintothiswindowframe. Theexternalcapacitormusthaveavaluebetweenaminimumof155pFandamaximumof63nF. Copyright©2000–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:TPS3813J25 TPS3813L30 TPS3813K33 TPS3813I50

TPS3813J25,TPS3813L30,TPS3813K33,TPS3813I50 SLVS331H–DECEMBER2000–REVISEDJULY2016 www.ti.com Table3.SettingUpperWindowUsingExternalCapacitor SELECTEDOPERATIONMODE WINDOWFRAME t =1.25×t window,max window,typ WDT=externalcapacitorC WDR=0VandWDR=V (ext) DD t =0.75×t window,min window,typ (cid:4) C (cid:5) (ext) twindow,typ (cid:3) 15.55pF(cid:2)1 (cid:1)6.25ms (1) 8.5.3 LowerBoundaryCalculation The lower boundary can be calculated based on the values given in Switching Characteristics. Additionally, facts must be considered to verify that the lower boundary is where it is expected. Because the internal oscillator of the window watchdog is running free, any rising edge at the WDI pin is considered at the next internal clock cycle. This happens regardless of the external source. Because the shift between internal and external clock is notknown,itisbesttoconsidertheworst-caseconditionforcalculatingthisvalue. Table4.SettingLowerBoundaryUsingExternalCap SELECTEDOPERATIONMODE LOWERBOUNDARYOFFRAME t =t /23.5 boundary,max window,max WDR=0V t =t /25.8 boundary,typ window,typ t =t /28.7 boundary,min window,min WDT=externalcapacitorC (ext) t =t /51.6 boundary,max window,max WDR=V t =t /64.5 DD boundary,typ window,typ t =t /92.7 boundary,min window,min 8.5.4 WatchdogSoftwareConsiderations To benefit from the window watchdog feature and help the watchdog timer monitor the software execution more closely, TI recommends that the watchdog be set and reset at different points in the program rather than pulsing the watchdog input periodically by using the prescaler of a microcontroller or DSP. Furthermore, the watchdog trigger pulses must be set to different timings inside the window frame to release a defined reset, if the program musthanginanysubroutine.Thisallowsthewindowwatchdogtodetecttime-outsofthetriggerpulse,aswellas pulsesthatdistortthelowerboundary. 8.5.5 Power-UpConsiderations Many microcontrollers use general-purpose input and output (GPIO) pins that can be programmed to be either inputs or outputs. During power-up, these I/O pins are typically configured as inputs. If a GPIO pin is used to drive the WDI input pin of the TPS3813xxx, then a pulldown resistor (shown as R2 in Figure 8) must be added to keeptheWDIpinfromfloatingduringpowerup. 12 SubmitDocumentationFeedback Copyright©2000–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS3813J25 TPS3813L30 TPS3813K33 TPS3813I50

TPS3813J25,TPS3813L30,TPS3813K33,TPS3813I50 www.ti.com SLVS331H–DECEMBER2000–REVISEDJULY2016 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information The TPS3813xxx is a voltage supervisor that incorporates a window-watchdog timer, allowing for comprehensive supervision of microcontrollers and other similar devices. The TPS3813xxx can be operated from a VDD rail of 2 V to 6 V with a user-programmable watchdog time-out from 0.25 s to 2.5 s. The following sections describe how toproperlyusethisdevice,dependingontherequirementsofthefinalapplication. 9.2 Typical Application Atypicalapplicationexample(seeFigure8)isusedtodescribethefunctionofthewatchdoginmoredetail. To configure the window watchdog function, two pins are provided by the TPS3813xxx. These pins set the windowtime-outandratio. The window watchdog ratio is a fixed ratio, which determines the lower boundary of the window frame. It can be configuredintwodifferentframesizes. V DD 0.1(cid:129)F 0.1(cid:129)F V DD R1 Position 1 V V DD DD Position 2 WDR RESET RESET TPS3813 (cid:129)C Position 4 WDT WDI I/O C(ext) Position 5 Position 3 GND R2(1) GND V DD Copyright © 2016, Texas Instruments Incorporated (1) Usethispulldown resistor ifa GPIO pinis usedtodrive theWDI input pinoftheTPS3813xxx tokeeptheWDI pin fromfloatingduringpowerup. Figure8. ApplicationExample 9.2.1 DesignRequirements TheTPS3813xxx RESEToutputcanbeusedtodrivethe RESETpinofamicrocontrollertoinitiatearesetevent. The RESET pin of the TPS3813xxx can be pulled high with a 1-MΩ resistor; the watchdog window timing is controlled by the WDT and WDR pins, and is set depending on the reset requirement times of the microprocessor. 9.2.2 DetailedDesignProcedure If the window watchdog ratio pin (WDR) is set to V , Position 1 in Figure 8, then the lower window frame is a DD value based on a ratio calculation of the overall window time-out size: For the watchdog time-out pin (WDT) connected to GND, it is a ratio of 1:124.9, for WDT connected to V , it is a ratio of 1:127.7, and for an external DD capacitorconnectedtoWDT,itisaratioof1:64.5. Copyright©2000–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:TPS3813J25 TPS3813L30 TPS3813K33 TPS3813I50

TPS3813J25,TPS3813L30,TPS3813K33,TPS3813I50 SLVS331H–DECEMBER2000–REVISEDJULY2016 www.ti.com Typical Application (continued) If the window watchdog ratio pin (WDR) is set to GND, Position 2, the lower window frame is a value based on a ratio calculation of the overall window time-out size: For the watchdog time-out pin (WDT) connected to GND, it is a ratio of 1:31.8, for WDT connected to V it is 1:32, and for an external capacitor connected to WDT it is DD 1:25.8. Thewatchdogtime-outcanbesetintwofixedtimingsof0.25secondsand2.5secondsforthewindoworcanby programmedbyconnectingaexternalcapacitorwithalowleakagecurrentatWDT. Example: If the watchdog time-out pin (WDT) is connected to V , the time-out is 2.5 seconds. If the window DD watchdog ratio pin (WDR) is set in this configuration to a ratio of 1:127.7 by connecting the pin to V , the lower DD boundaryis19.6ms. 9.2.3 ApplicationCurve 20 s m 18 − D 16 D V at 14 n o ati 12 r u e D 10 s Pul 8 m mu 6 ni Mi 4 − W 2 t 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 VDD−Threshold Overdrive Voltage−V Figure9. MinimumPulseDurationatV vsV ThresholdOverdriveVoltage DD DD 14 SubmitDocumentationFeedback Copyright©2000–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS3813J25 TPS3813L30 TPS3813K33 TPS3813I50

TPS3813J25,TPS3813L30,TPS3813K33,TPS3813I50 www.ti.com SLVS331H–DECEMBER2000–REVISEDJULY2016 10 Power Supply Recommendations These devices are designed to operate from an input supply with a voltage range from 2 V to 6 V. An input supply capacitor is not required for this device; however, if the input supply is noisy, then good analog practice is to place a 0.1-µF capacitor between the VDD pin and the GND pin. This device has a 7-V absolute maximum rating on the VDD pin. If the voltage supply providing power to VDD is susceptible to any large voltage transient thatcanexceed7V,additionalprecautionsmustbetaken. In applications where the WDI input may experience a negative voltage while V is ramping from 0 V to 0.8 V, DD the V slew rate in this range must be greater than 10 V/s. A negative voltage on the WDI input along with a DD slewratelessthan10V/scouldresultinagreatlyreducedwatchdogwindowtimeandresetoutputdelaytime. 11 Layout 11.1 Layout Guidelines Make sure that the connection to the VDD pin is low impedance. Good analog design practice is to place a 0.1-µFceramicbypasscapacitorneartheVDDpin. 11.2 Layout Example Pullup Voltage RESET TPS3813 Flag WDI 1 6 Signal 2 4 3 4 CVDD Figure10. TPS3813xxxLayoutExample Copyright©2000–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:TPS3813J25 TPS3813L30 TPS3813K33 TPS3813I50

TPS3813J25,TPS3813L30,TPS3813K33,TPS3813I50 SLVS331H–DECEMBER2000–REVISEDJULY2016 www.ti.com 12 Device and Documentation Support 12.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources,toolsandsoftware,andquickaccesstosampleorbuy. Table5.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER SAMPLE&BUY DOCUMENTS SOFTWARE COMMUNITY TPS3813J25 Clickhere Clickhere Clickhere Clickhere Clickhere TPS3813L30 Clickhere Clickhere Clickhere Clickhere Clickhere TPS3813K33 Clickhere Clickhere Clickhere Clickhere Clickhere TPS3813I50 Clickhere Clickhere Clickhere Clickhere Clickhere 12.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 12.3 Community Resource The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.4 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.5 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 12.6 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 16 SubmitDocumentationFeedback Copyright©2000–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS3813J25 TPS3813L30 TPS3813K33 TPS3813I50

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS3813I50DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 PFBI & no Sb/Br) TPS3813I50DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 PFBI & no Sb/Br) TPS3813J25DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 PCDI & no Sb/Br) TPS3813J25DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 PCDI & no Sb/Br) TPS3813J25DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 PCDI & no Sb/Br) TPS3813K33DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 PFAI & no Sb/Br) TPS3813K33DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 PFAI & no Sb/Br) TPS3813K33DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 PFAI & no Sb/Br) TPS3813K33DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 PFAI & no Sb/Br) TPS3813L30DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 PEZI & no Sb/Br) TPS3813L30DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 PEZI & no Sb/Br) TPS3813L30DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 PEZI & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TPS3813 : •Automotive: TPS3813-Q1 NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2020 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS3813I50DBVR SOT-23 DBV 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3813I50DBVT SOT-23 DBV 6 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3813J25DBVR SOT-23 DBV 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3813J25DBVT SOT-23 DBV 6 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3813K33DBVR SOT-23 DBV 6 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS3813K33DBVR SOT-23 DBV 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3813K33DBVT SOT-23 DBV 6 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS3813K33DBVT SOT-23 DBV 6 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3813L30DBVR SOT-23 DBV 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS3813L30DBVT SOT-23 DBV 6 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2020 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS3813I50DBVR SOT-23 DBV 6 3000 180.0 180.0 18.0 TPS3813I50DBVT SOT-23 DBV 6 250 180.0 180.0 18.0 TPS3813J25DBVR SOT-23 DBV 6 3000 180.0 180.0 18.0 TPS3813J25DBVT SOT-23 DBV 6 250 180.0 180.0 18.0 TPS3813K33DBVR SOT-23 DBV 6 3000 203.0 203.0 35.0 TPS3813K33DBVR SOT-23 DBV 6 3000 180.0 180.0 18.0 TPS3813K33DBVT SOT-23 DBV 6 250 203.0 203.0 35.0 TPS3813K33DBVT SOT-23 DBV 6 250 180.0 180.0 18.0 TPS3813L30DBVR SOT-23 DBV 6 3000 180.0 180.0 18.0 TPS3813L30DBVT SOT-23 DBV 6 250 180.0 180.0 18.0 PackMaterials-Page2

PACKAGE OUTLINE DBV0006A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 B A 1.45 MAX PIN 1 INDEX AREA 1 6 2X 0.95 3.05 2.75 1.9 5 2 4 3 0.50 6X 0.25 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214840/B 03/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.15 per side. 4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation. 5. Refernce JEDEC MO-178. www.ti.com

EXAMPLE BOARD LAYOUT DBV0006A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 6X (1.1) 1 6X (0.6) 6 SYMM 2 5 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214840/B 03/2018 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBV0006A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 6X (1.1) 1 6X (0.6) 6 SYMM 2 5 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214840/B 03/2018 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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