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TPS3808G18QDBVRQ1产品简介:
ICGOO电子元器件商城为您提供TPS3808G18QDBVRQ1由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 TPS3808G18QDBVRQ1价格参考¥5.67-¥5.89。Texas InstrumentsTPS3808G18QDBVRQ1封装/规格:PMIC - 监控器, 开路漏极或开路集电极 监控器 1 通道 SOT-23-6。您可以下载TPS3808G18QDBVRQ1参考资料、Datasheet数据手册功能说明书,资料中有TPS3808G18QDBVRQ1 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | 集成电路 (IC) |
描述 | IC VOLT SUPERVISOR 1.8V SOT23-6 |
产品分类 | |
品牌 | Texas Instruments |
数据手册 | |
产品图片 | |
产品型号 | TPS3808G18QDBVRQ1 |
rohs | 无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | - |
产品培训模块 | http://www.digikey.cn/PTM/IndividualPTM.page?site=cn&lang=zhs&ptm=22866 |
产品目录页面 | |
供应商器件封装 | SOT-23-6 |
其它名称 | 296-24272-1 |
制造商产品页 | http://www.ti.com/general/docs/suppproductinfo.tsp?distId=10&orderablePartNumber=TPS3808G18QDBVRQ1 |
包装 | Digi-Reel® |
受监控电压数 | 1 |
复位 | 低有效 |
复位超时 | 可调节/可选择 |
安装类型 | 表面贴装 |
封装/外壳 | SOT-23-6 |
工作温度 | -40°C ~ 125°C |
标准包装 | 1 |
电压-阈值 | 1.67V |
类型 | 简单复位/加电复位 |
输出 | 开路漏极或开路集电极 |
Product Order Technical Tools & Support & Reference Folder Now Documents Software Community Design TPS3808G01-Q1,TPS3808G12-Q1,TPS3808G125-Q1,TPS3808G15-Q1 TPS3808G18-Q1,TPS3808G30-Q1,TPS3808G33-Q1,TPS3808G50-Q1 SBVS085J–JANUARY2007–REVISEDJUNE2017 TPS3808Gxx-Q1 Low-Quiescent-Current Programmable-Delay Supervisory Circuit 1 Features 3 Description • QualifiedforAutomotiveApplications The TPS3808Gxx-Q1 microprocessor supervisory 1 circuits monitor system voltages from 0.4 V to 5 V, • Power-OnResetGeneratorWithAdjustableDelay asserting an open-drain RESET signal when the Time:1.25msto10s SENSE voltage drops below a preset threshold or • VeryLowQuiescentCurrent:2.4 μATypical when the manual reset (MR) pin drops to a logic low. • HighThresholdAccuracy:0.5%Typical The RESET output remains low for the user- adjustable delay time after the SENSE voltage and • FixedThresholdVoltagesforStandardVoltage MRreturnabovetheirthresholds. RailsFrom1.2Vto5VandAdjustableVoltage Downto0.4VAreAvailable The TPS3808Gxx-Q1 device uses a precision reference to achieve 0.5% threshold accuracy for V • ManualReset(MR)Input IT ≤ 3.3 V. The reset delay time can be set to 20 ms by • Open-DrainRESETOutput disconnecting the C pin, 300 ms by connecting the T • TemperatureRange:–40°Cto+125°C C pin to V using a resistor, or can be user- T DD adjusted from 1.25 ms to 10 s by connecting the C • SmallSOT-23PackageandWSONPackage T pin to an external capacitor. The TPS3808Gxx-Q1 (TPS3808G01QDRVRQ1only) has a very low typical quiescent current of 2.4 μA, so it is well suited for battery-powered applications. The 2 Applications device is available in a small SOT-23 package (one • DSPorMicrocontrollerApplications option available in WSON) and is fully specified over atemperaturerangeof–40°Cto+125°C(T ). • FPGAandASICApplications J • AutomotiveVision For more information about TI's voltage supervisor portfolio, visit the Supervisor and Reset IC Overview • AutomotiveRadar Pagepage. DeviceInformation(1) PARTNUMBER PACKAGE BODYSIZE(NOM) SOT-23(6) 2.90mm×1.60mm TPS3808Gxx-Q1 WSON(6) 2.00mm×2.00mm (1) For all available packages, see the orderable addendum at theendofthedatasheet. TypicalApplicationSchematic 1.2 V 3.3 V SENSE VDD SENSE VDD VI/O VCORE TPS3808G12 TPS3808G33 DSP RESET MR RESET GPIO C C T GND T GND GND 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.
TPS3808G01-Q1,TPS3808G12-Q1,TPS3808G125-Q1,TPS3808G15-Q1 TPS3808G18-Q1,TPS3808G30-Q1,TPS3808G33-Q1,TPS3808G50-Q1 SBVS085J–JANUARY2007–REVISEDJUNE2017 www.ti.com Table of Contents 1 Features.................................................................. 1 8.3 FeatureDescription...................................................9 2 Applications........................................................... 1 8.4 DeviceFunctionalModes........................................11 3 Description............................................................. 1 9 ApplicationsandImplementation...................... 12 4 RevisionHistory..................................................... 2 9.1 ApplicationInformation............................................12 9.2 TypicalApplication..................................................12 5 DeviceComparisonTable..................................... 3 10 PowerSupplyRecommendations..................... 14 6 PinConfigurationandFunctions......................... 3 11 Layout................................................................... 14 7 Specifications......................................................... 4 11.1 LayoutGuidelines.................................................14 7.1 AbsoluteMaximumRatings......................................4 11.2 LayoutExample....................................................14 7.2 ESDRatings..............................................................4 12 DeviceandDocumentationSupport................. 15 7.3 RecommendedOperatingConditions.......................4 7.4 ThermalInformation..................................................5 12.1 RelatedLinks........................................................15 7.5 ElectricalCharacteristics...........................................5 12.2 ReceivingNotificationofDocumentationUpdates15 7.6 TimingRequirements................................................6 12.3 CommunityResources..........................................15 7.7 TypicalCharacteristics..............................................7 12.4 Trademarks...........................................................15 12.5 ElectrostaticDischargeCaution............................15 8 DetailedDescription.............................................. 8 12.6 Glossary................................................................15 8.1 Overview...................................................................8 13 Mechanical,Packaging,andOrderable 8.2 FunctionalBlockDiagrams.......................................8 Information........................................................... 15 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionI(June2015)toRevisionJ Page • AddedcolumnforWSONpins .............................................................................................................................................. 3 • Changedunitforlastrowoft rowinTimingRequirementsfrom"ms"to"s"and"TYP"to"NOM"inmiddleunitcolumn...6 d ChangesfromRevisionH(June2012)toRevisionI Page • AddedESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection ................................................................................................. 1 ChangesfromRevisionG(November,2010)toRevisionH Page • ChangedI fromµAtonA................................................................................................................................................ 5 SENSE 2 SubmitDocumentationFeedback Copyright©2007–2017,TexasInstrumentsIncorporated ProductFolderLinks:TPS3808G01-Q1 TPS3808G12-Q1 TPS3808G125-Q1 TPS3808G15-Q1TPS3808G18-Q1 TPS3808G30-Q1 TPS3808G33-Q1 TPS3808G50-Q1
TPS3808G01-Q1,TPS3808G12-Q1,TPS3808G125-Q1,TPS3808G15-Q1 TPS3808G18-Q1,TPS3808G30-Q1,TPS3808G33-Q1,TPS3808G50-Q1 www.ti.com SBVS085J–JANUARY2007–REVISEDJUNE2017 5 Device Comparison Table ORDERABLEPARTNUMBER NOMINALSUPPLYVOLTAGE THRESHOLDVOLTAGE(V ) IT TPS3808G01QDRVRQ1 Adjustable 0.405V TPS3808G01QDBVRQ1 TPS3808G12QDBVRQ1 1.2V 1.12V TPS3808G125QDBVRQ1 1.25V 1.16V TPS3808G15QDBVRQ1 1.5V 1.4V TPS3808G18QDBVRQ1 1.8V 1.67V TPS3808G30QDBVRQ1 3V 2.79V TPS3808G33QDBVRQ1 3.3V 3.07V TPS3808G50QDBVRQ1 5V 4.65V 6 Pin Configuration and Functions DBVPackage 6-PinSOT-23 DRVPackage TopView 6-PinWSONWithThermalPad TopView RESET 1 6 V VDD 1 6 RESET DD SENSE 2 5 GND GND 2 5 SENSE C 3 4 MR T MR 3 4 C T PinFunctions PIN I/O DESCRIPTION NAME SOT-23 WSON Resetperiodprogrammingpin.ConnectingthispintoVDDthrougha40-kΩ to200-kΩresistororleavingitopenresultsinfixeddelaytimes(seeElectrical C 4 3 I Characteristics).Connectingthispintoagroundreferencedcapacitor≥100 T pFgivesuser-programmabledelaytime.SeetheSelectingtheResetDelay Timeformoreinformation. GND 2 5 — Ground Manualreset.DrivingthispinlowassertsRESET.MRisinternallytiedtoV MR 3 4 I DD bya90-kΩpullupresistor. Reset.Thisisanopen-drainoutputthatisdriventoalowimpedancestate whenRESETisasserted(eithertheSENSEinputislowerthanthethreshold voltage(V )ortheMRpinissettoalogiclow).RESETremainslow RESET 1 6 O IT (asserted)fortheresetperiodafterbothSENSEisaboveV andMRissetto IT alogichigh.Apullupresistorfrom10kΩto1MΩmustbeusedonthispin andallowstheresetpintoattainvoltageshigherthanV . DD Voltagesense.Thispinisconnectedtothevoltagetobemonitored.Ifthe SENSE 5 2 I voltageatthisterminaldropsbelowthethresholdvoltage(V ),RESETis IT asserted. Supplyvoltage.Itisgoodanalogdesignpracticetoplacea0.1-μFceramic V 6 1 I DD capacitorclosetothispin. Thermalpad;connecttogroundplantoenhancethermalperformanceofthe ThermalPad — Pad — package. Copyright©2007–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:TPS3808G01-Q1 TPS3808G12-Q1 TPS3808G125-Q1 TPS3808G15-Q1TPS3808G18-Q1 TPS3808G30-Q1 TPS3808G33-Q1 TPS3808G50-Q1
TPS3808G01-Q1,TPS3808G12-Q1,TPS3808G125-Q1,TPS3808G15-Q1 TPS3808G18-Q1,TPS3808G30-Q1,TPS3808G33-Q1,TPS3808G50-Q1 SBVS085J–JANUARY2007–REVISEDJUNE2017 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings overoperatingjunctiontemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT V Inputvoltage –0.3 7 V DD V C voltage –0.3 (V +0.3) V CT T DD V , MR V , MR,RESET,SENSEvoltage –0.3 7 V RESET V SENSE I RESETpincurrent 5 mA RESET T Operatingjunctiontemperature(2) –40 150 °C J T Storagetemperature –65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedundertheElectricCharacteristicsis notimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Duetothelowdissipatedpowerinthisdevice,itisassumedthatT =T . J A 7.2 ESD Ratings VALUE UNIT TPS3808G125QDBVRQ1INSOT-23PACKAGE Humanbodymodel(HBM),perAECQ100-002(1) ±2000 Electrostatic V Chargeddevicemodel(CDM),perAECQ100-011 ±1000 V (ESD) discharge MachineModel(MM) ±50 TPS3808GXX-Q1INSOT-23PACKAGE Electrostatic Humanbodymodel(HBM),perAECQ100-002(1) ±2000 V V (ESD) discharge Chargeddevicemodel(CDM),perAECQ100-011 ±500 TPS3808G01QDRVRQ1INSONPACKAGE Humanbodymodel(HBM),perAECQ100-002(1) ±2000 Electrostatic V Chargeddevicemodel(CDM),perAECQ100-011 ±500 V (ESD) discharge MachineModel(MM) ±50 (1) AECQ100-002indicatesHBMstressingisdoneinaccordancewiththeANSI/ESDA/JEDECJS-001specification. 7.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN NOM MAX UNIT V inputsupply 1.8 6.5 V DD V SENSEpinvoltage 0 V V SENSE DD MRManualresetpinvoltage 0 V V DD 4 SubmitDocumentationFeedback Copyright©2007–2017,TexasInstrumentsIncorporated ProductFolderLinks:TPS3808G01-Q1 TPS3808G12-Q1 TPS3808G125-Q1 TPS3808G15-Q1TPS3808G18-Q1 TPS3808G30-Q1 TPS3808G33-Q1 TPS3808G50-Q1
TPS3808G01-Q1,TPS3808G12-Q1,TPS3808G125-Q1,TPS3808G15-Q1 TPS3808G18-Q1,TPS3808G30-Q1,TPS3808G33-Q1,TPS3808G50-Q1 www.ti.com SBVS085J–JANUARY2007–REVISEDJUNE2017 7.4 Thermal Information TPS3808Gxx-Q1 THERMALMETRIC(1) DBV(SOT-23) DRV(WSON) UNIT 6PINS 6PINS R Junction-to-ambientthermalresistance 180.9 178.1 °C/W θJA R Junction-to-case(top)thermalresistance 117.8 95.6 °C/W θJC(top) R Junction-to-boardthermalresistance 27.8 135 °C/W θJB ψ Junction-to-topcharacterizationparameter 18.9 6.3 °C/W JT ψ Junction-to-boardcharacterizationparameter 27.3 136.6 °C/W JB R Junction-to-case(bottom)thermalresistance N/A 7.3 °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. 7.5 Electrical Characteristics 1.8V≤V ≤6.5V,R =100kΩ,C =50pF,overoperatingtemperaturerange(T =–40°Cto+125°C)(unless DD LRESET LRESET J otherwisenoted),typicalvaluesatT =25°C J PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V Inputsupplyrange 1.8 6.5 V DD V =3.3V,RESETnotasserted, DD 2.4 5 MR,RESET,C open T I Supplycurrent(intoV pin) μA DD DD V =6.5V,RESETnotasserted, DD 2.7 6 MR,RESET,C open T 1.3V≤V <1.8V,I =0.4mA 0.3 DD OL V Low-leveloutputvoltage V OL 1.8V≤V ≤6.5V,I =1mA 0.4 DD OL Power-upresetvoltage(1) V (max)=0.2V,I =15μA 0.8 V OL RESET TPS3808G01-Q1 –2% ±1% 2% V ≤3.3V –1.5% ±0.5% 1.5% IT Negative-goinginput V 3.3V<V ≤5V –2% ±1% 2% IT thresholdaccuracy IT V ≤3.3V –1.25% ±0.5% 1.25% IT –40°C<T <85°C J 3.3V<V ≤5V –1.5% ±0.5% 1.5% IT TPS3808G01-Q1 1.5 3 V HysteresisonV pin –40°C<T <85°C 1 2 %V HYS IT J IT 1 2.5 R MRinternalpullupresistance V =V 70 90 kΩ MR SENSE IT TPS3808G01-Q1 –25 25 nA I InputcurrentatSENSEpin SENSE V =6.5V 1.7 μA SENSE I RESETleakagecurrent V =6.5V,RESETnotasserted 300 nA OH RESET C pin V =0VtoV 5 T IN DD C Inputcapacitance,anypin pF IN Otherpins V =0Vto6.5V 5 IN V MRlogiclowinput 0 0.3V V IL DD V MRlogichighinput 0.7V V V IH DD DD (1) Power-upresetvoltageisthelowestsupplyvoltage(V )atwhichRESETbecomesactive(t ≥15μs/V). DD rise(VDD) Copyright©2007–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:TPS3808G01-Q1 TPS3808G12-Q1 TPS3808G125-Q1 TPS3808G15-Q1TPS3808G18-Q1 TPS3808G30-Q1 TPS3808G33-Q1 TPS3808G50-Q1
TPS3808G01-Q1,TPS3808G12-Q1,TPS3808G125-Q1,TPS3808G15-Q1 TPS3808G18-Q1,TPS3808G30-Q1,TPS3808G33-Q1,TPS3808G50-Q1 SBVS085J–JANUARY2007–REVISEDJUNE2017 www.ti.com 7.6 Timing Requirements MIN NOM MAX UNIT C =Open 12 20 28 T RESETdelay CT=VDD 180 300 420 ms t SeeFigure1 d time C =100pF 0.75 1.25 1.75 T C =180nF 0.7 1.2 1.7 s T Propagation MRtoRESET V =0.7V ,V =0.3V 150 ns delay IH DD IL DD tpHL High-levelto SENSEto low-level V =1.05V ,V =0.95V 20 μs RESET IH IT IL IT RESETdelay Maximum SENSE V =1.05V ,V =0.95V 20 IH IT IL IT t transient μs w duration MR VIH=0.7VDD,VIL=0.3VDD 0.001 V DD 0.8V 0.0V RESET t =ResetDelay D tD tD tD =UndefinedState SENSE V +V IT HYS V IT MR 0.7V DD 0.3V DD Time Figure1. MRandSENSEResetTimingDiagram 6 SubmitDocumentationFeedback Copyright©2007–2017,TexasInstrumentsIncorporated ProductFolderLinks:TPS3808G01-Q1 TPS3808G12-Q1 TPS3808G125-Q1 TPS3808G15-Q1TPS3808G18-Q1 TPS3808G30-Q1 TPS3808G33-Q1 TPS3808G50-Q1
TPS3808G01-Q1,TPS3808G12-Q1,TPS3808G125-Q1,TPS3808G15-Q1 TPS3808G18-Q1,TPS3808G30-Q1,TPS3808G33-Q1,TPS3808G50-Q1 www.ti.com SBVS085J–JANUARY2007–REVISEDJUNE2017 7.7 Typical Characteristics AtT =25°C,V =3.3V,R =100kΩ,andC =50pF(unlessotherwisenoted) J DD LRESET LRESET 10 1.0 %) 8 0.8 d ( erio 6 0.6 meout P 42 (%)VIT 00..42 Ti 0 ed 0 T z RESE −−42 ormali −−00..24 d N ze −6 −0.6 ali m −8 −0.8 or N −10 −1.0 −50 −30 −10 10 30 50 70 90 110 130 −50 −30 −10 10 30 50 70 90 110 130 Temperature (°C) Temperature (°C) Figure2.NormalizedRESETTime-outPeriodvs Figure3.NormalizedSenseThresholdVoltage(VIT)vs Temperature(C =Open,C =V ,C =Any) Temperature T T DD T 4.5 0.8 V) 4.0 V) 0.7 ( ( Voltage 33..50 Voltage 0.6 LevelRESET 221...505 VDD=1.8V −LevelRESET 000...543 VDD=3.3V − w 0.2 ow 1.0 Lo VLOL 0.5 VOL 0.1 VDD=6.5V 0 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 RESETCurrent(mA) RESETCurrent (mA) Figure5.Low-LevelRESETVoltagevsRESETCurrent Figure4.Low-LevelRESETVoltagevsRESETCurrent Copyright©2007–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:TPS3808G01-Q1 TPS3808G12-Q1 TPS3808G125-Q1 TPS3808G15-Q1TPS3808G18-Q1 TPS3808G30-Q1 TPS3808G33-Q1 TPS3808G50-Q1
TPS3808G01-Q1,TPS3808G12-Q1,TPS3808G125-Q1,TPS3808G15-Q1 TPS3808G18-Q1,TPS3808G30-Q1,TPS3808G33-Q1,TPS3808G50-Q1 SBVS085J–JANUARY2007–REVISEDJUNE2017 www.ti.com 8 Detailed Description 8.1 Overview The TPS3808Gxx-Q1 devices are low-current supervisory circuits used to monitor system voltages ranging from 0.4 V to 5 V. The devices assert an active low, open-drain RESET signal when the SENSE voltage drops below a preset threshold or when the manual reset (MR) pin is asserted to a logic low. The RESET output remains low for the user-adjustable delay time after the SENSE voltage and MR return above their thresholds. The devices are also designed to be immune to short negative transients on the SENSE pin. The reset delay time can be configured by using the C pin. The delay can be configured to 20 ms by leaving the C pin floating, it can be T T configuredto300msbyconnectingtheC pintoV usingaresistor,orcanbeconfiguredfrom1.25msto10s T DD byconnectingtheC pintoanexternalcapacitor. T 8.2 Functional Block Diagrams V DD V DD 90k RESET MR Reset Logic Timer SENSE − C + T 0.4V V REF GND Figure6. Adjustable-VoltageVersion V DD V DD 90k RESET MR SENSE Reset Logic R Timer 1 − C + T R 2 0.4V V REF R +R =4 MW 1 2 GND Figure7. Fixed-VoltageVersion 8 SubmitDocumentationFeedback Copyright©2007–2017,TexasInstrumentsIncorporated ProductFolderLinks:TPS3808G01-Q1 TPS3808G12-Q1 TPS3808G125-Q1 TPS3808G15-Q1TPS3808G18-Q1 TPS3808G30-Q1 TPS3808G33-Q1 TPS3808G50-Q1
TPS3808G01-Q1,TPS3808G12-Q1,TPS3808G125-Q1,TPS3808G15-Q1 TPS3808G18-Q1,TPS3808G30-Q1,TPS3808G33-Q1,TPS3808G50-Q1 www.ti.com SBVS085J–JANUARY2007–REVISEDJUNE2017 8.3 Feature Description 8.3.1 ImmunitytoSENSEPinVoltageTransients The TPS3808Gxx-Q1 is relatively immune to short negative transients on the SENSE pin. Sensitivity to transients is dependent on threshold overdrive, as shown in the Maximum Transient Duration at Sense vs Sense Threshold Overdrive Voltage graph (Figure 9). This graph shows the duration that the transient is below V IT compared to the magnitude of the voltage drop below V , or overdrive voltage. The overdrive voltage is IT expressed as a percentage of the V threshold value. Any combination of transient duration and overdrive IT voltage that lies above the curve results in RESET being asserted low. Any transient that lies below the curve is ignoredbythedevice. V DD V IT Overdrive Voltage Transient Duration Figure8. ThresholdOverdriveVoltage 100 s) m ( T VI ow RESETOCCURS bel ABOVETHE CURVE n o 10 ati ur D nt e si n a Tr 1 0 5 10 15 20 25 30 35 40 45 50 Overdrive(%V ) IT Figure9. MaximumTransientDurationatSensevsSenseThresholdOverdriveVoltage 8.3.2 SENSEInput The SENSE input provides a terminal at which any system voltage can be monitored. If the voltage on this pin drops below V , RESET is asserted low. The comparator has a built-in hysteresis to ensure smooth RESET IT assertions and deassertions. It is good analog design practice to put a 1-nF to 10-nF bypass capacitor on the SENSEinputtoreducesensitivitytotransientsandlayoutparasitics. Copyright©2007–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:TPS3808G01-Q1 TPS3808G12-Q1 TPS3808G125-Q1 TPS3808G15-Q1TPS3808G18-Q1 TPS3808G30-Q1 TPS3808G33-Q1 TPS3808G50-Q1
TPS3808G01-Q1,TPS3808G12-Q1,TPS3808G125-Q1,TPS3808G15-Q1 TPS3808G18-Q1,TPS3808G30-Q1,TPS3808G33-Q1,TPS3808G50-Q1 SBVS085J–JANUARY2007–REVISEDJUNE2017 www.ti.com Feature Description (continued) The TPS3808G01-Q1 can be used to monitor any voltage rail down to 0.405 V using the circuit shown in Figure10. VIN VOUT V R1 DD VIT′=(1+ RR12)0.405 TPS3808G01 SENSE RESET 1nF R2 GND Figure10. UsingtheTPS3808G01-Q1toMonitoraUser-DefinedThresholdVoltage 8.3.3 ManualReset(MR)Input The manual reset (MR) input allows a processor or other logic circuits to initiate a reset. A logic low (0.3 V ) on DD MR causes RESET to assert low. After MR returns to a logic high and SENSE is above its reset threshold, RESET is deasserted high after the user-defined reset delay expires. MR is internally tied to V using a 90-kΩ DD resistor,sothispincanbeleftunconnectedif MRisnotused. See Figure 11 for how MR can be used to monitor multiple system voltages. If the logic signal driving MR does notgofullytoV ,therewillbesomeadditionalcurrentdrawintoV asaresultoftheinternalpullupresistoron DD DD MR.Tominimizecurrentdraw,alogic-levelFETcanbeusedasshowninFigure12. 1.2V 3.3V SENSE VDD SENSE VDD VI/O VCORE TPS3808G12 TPS3808G33 DSP RESET MR RESET GPIO C C T GND T GND GND Figure11. UsingMRtoMonitorMultipleSystemVoltages 3.3V V SENSE DD 90kW C T TPS3808xxx GND Figure12. UsinganExternalMOSFETtoMinimizeI When MRSignalDoesNotGotoV DD DD 10 SubmitDocumentationFeedback Copyright©2007–2017,TexasInstrumentsIncorporated ProductFolderLinks:TPS3808G01-Q1 TPS3808G12-Q1 TPS3808G125-Q1 TPS3808G15-Q1TPS3808G18-Q1 TPS3808G30-Q1 TPS3808G33-Q1 TPS3808G50-Q1
TPS3808G01-Q1,TPS3808G12-Q1,TPS3808G125-Q1,TPS3808G15-Q1 TPS3808G18-Q1,TPS3808G30-Q1,TPS3808G33-Q1,TPS3808G50-Q1 www.ti.com SBVS085J–JANUARY2007–REVISEDJUNE2017 Feature Description (continued) 8.3.4 SelectingtheResetDelayTime The TPS3808Gxx-Q1 device has three options for setting the RESET delay time as shown in Figure 13. Figure 13 (a) shows the configuration for a fixed 300-ms typical delay time by tying C to V ; a resistor from T DD 40 kΩ to 200 kΩ must be used. Supply current is not affected by the choice of resistor. Figure 13 (b) shows a fixed20-msdelaytimebyleavingtheC pinopen.Figure13(c)showsagroundreferencedcapacitorconnected T toC forauser-definedprogramtimefrom1.25msto10s. T 3.3V 3.3V 3.3V SENSE V SENSE V SENSE V DD DD DD 50kW TPS3808G33 TPS3808G33 TPS3808G33 C RESET C RESET C RESET T T T C T Delay(s)=CT(nF) + 0.5 x 10−3(s) 300ms Delay 20ms Delay 175 (a) (b) (c) Figure13. ConfigurationUsedtoSetthe RESETDelayTime The capacitor C should be ≥100 pF nominal value for the TPS3808Gxx-Q1 to recognize the capacitor is T present.UseEquation1tocalculatethecapacitorvalueforagivendelaytime. C (nF)=ét (s)-0.5´10-3(s)ù´175 T ë D û (1) The reset delay time is determined by the time it takes an on-chip precision 220-nA current source to charge the externalcapacitorto1.23V.When RESETassertslow,thecapacitorisdischarged.Whenthe RESETconditions are cleared, the internal current source is enabled and begins to charge the external capacitor. When the voltage on this capacitor reaches 1.23 V, RESET deasserts. A low-leakage type capacitor such as a ceramic should be usedandthatstraycapacitancearoundthispinmaycauseerrorsintheresetdelaytime. 8.4 Device Functional Modes WheneverMRpinissettoalogichighandtheSENSEinputpinishigherthanV ,theopen-drainRESETsignal IT is deasserted high. If MR pin is set to a logic low or the SENSE input pin falls lower than V , then RESET is IT assertedlow.Table1isatruthtablethatdescribestheseoperatingmodes. Table1.TruthTable MR SENSE>V RESET IT L 0 L L 1 L H 0 L H 1 H Copyright©2007–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:TPS3808G01-Q1 TPS3808G12-Q1 TPS3808G125-Q1 TPS3808G15-Q1TPS3808G18-Q1 TPS3808G30-Q1 TPS3808G33-Q1 TPS3808G50-Q1
TPS3808G01-Q1,TPS3808G12-Q1,TPS3808G125-Q1,TPS3808G15-Q1 TPS3808G18-Q1,TPS3808G30-Q1,TPS3808G33-Q1,TPS3808G50-Q1 SBVS085J–JANUARY2007–REVISEDJUNE2017 www.ti.com 9 Applications and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information The TPS3808Gxx-Q1 microprocessor supervisory product family is designed to assert a RESET signal when either the SENSE pin voltage drops below V or the manual reset (MR) is driven low. The RESET output IT remains asserted for a user-adjustable time after both the manual reset (MR) and SENSE voltages return above the respective thresholds. A broad range of voltage threshold and reset delay time adjustments are available, allowing these devices to be used in a variety of applications. Reset threshold voltages can be factory-set from 0.82 V to 3.3 V or from 4.4 V to 5 V, while the TPS3808G01-Q1 can be set to any voltage above 0.405 V using an external resistor divider. Two preset delay times are also user-selectable: connecting the C pin to V results T DD in a 300-ms reset delay, while leaving the C pin open yields a 20-ms reset delay. Additionally, connecting a T capacitorbetweenC andGNDallowsthedesignertoselectanyresetdelayperiodfrom1.25msto10s. T 9.2 Typical Application 3.3V V V DD 50 lQ(cid:3) DD TPS3808G33-Q1 ___ SENSE MR Processor _____ CT RESET RESET C T GND GND Figure14. TPS3808G33-Q1TypicalApplication 3.3V V V DD 50 lQ(cid:3) DD R 1 TPS3808G01-Q1 ___ SENSE MR Processor _____ CT RESET RESET 1 nF R2 CT GND GND Figure15. TPS3808G01-Q1TypicalApplication 12 SubmitDocumentationFeedback Copyright©2007–2017,TexasInstrumentsIncorporated ProductFolderLinks:TPS3808G01-Q1 TPS3808G12-Q1 TPS3808G125-Q1 TPS3808G15-Q1TPS3808G18-Q1 TPS3808G30-Q1 TPS3808G33-Q1 TPS3808G50-Q1
TPS3808G01-Q1,TPS3808G12-Q1,TPS3808G125-Q1,TPS3808G15-Q1 TPS3808G18-Q1,TPS3808G30-Q1,TPS3808G33-Q1,TPS3808G50-Q1 www.ti.com SBVS085J–JANUARY2007–REVISEDJUNE2017 Typical Application (continued) 9.2.1 DesignRequirements The TPS3808Gxx-Q1 device must monitor a 3.3-V input voltage, and drive an active-low reset to the processor whentheinputvoltagedropsbelowtherecommendedoperatingvoltageoftheprocessor. 9.2.2 DetailedDesignProcedure To monitor the 3.3-V input voltage, TPS3808G33-Q1 is used and the 3.3-V supply is connected directly to the SENSE pin. The open-drain RESET output is connected to V through a 50-kΩ resistor. To select the output DD delay on the RESET pin, connect the C pin to V , left floating, or connect through a capacitor to GND. For T DD moredetailsonselectingthisdelay,seeSelectingtheResetDelayTime. When using TPS3808G01-Q1, select R1 and R2 resistor values to select the threshold voltage based on the followingequation:V =(1+R1/R2)×0.405. IT 9.2.3 ApplicationCurves 4.0 100 3.5 125ºC 10 3.0 85ºC sec) −40°C, 25°C, 125°C A) 2.5 out ( 1 (m me DD 2.0 Ti I 25ºC ET 0.1 1.5 S E R 1.0 0.01 −40ºC 0.5 0.001 0 0.0001 0.001 0.01 0.1 1 10 0 1 2 3 4 5 6 7 C (mF) VDD(V) T Figure17. RESETTime-outPeriodvsC Figure16.SupplyCurrentvsSupplyVoltage T Copyright©2007–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:TPS3808G01-Q1 TPS3808G12-Q1 TPS3808G125-Q1 TPS3808G15-Q1TPS3808G18-Q1 TPS3808G30-Q1 TPS3808G33-Q1 TPS3808G50-Q1
TPS3808G01-Q1,TPS3808G12-Q1,TPS3808G125-Q1,TPS3808G15-Q1 TPS3808G18-Q1,TPS3808G30-Q1,TPS3808G33-Q1,TPS3808G50-Q1 SBVS085J–JANUARY2007–REVISEDJUNE2017 www.ti.com 10 Power Supply Recommendations The TPS3808Gxx-Q1 devices are designed to operate from an input supply from 1.8 V to 6.5 V. TI recommends placinga0.1-µFcapacitorneartheV pin. DD 11 Layout 11.1 Layout Guidelines TI recommends placing the 0.1-µF decoupling capacitor close to the V pin. The V trace should be able to DD DD carry6µAwithoutasignificantdropinvoltage. 11.2 Layout Example Input Supply C VDD Reset Output 1 6 2 5 C Manual Reset T Signal 3 4 Figure18. RecommendedLayout 14 SubmitDocumentationFeedback Copyright©2007–2017,TexasInstrumentsIncorporated ProductFolderLinks:TPS3808G01-Q1 TPS3808G12-Q1 TPS3808G125-Q1 TPS3808G15-Q1TPS3808G18-Q1 TPS3808G30-Q1 TPS3808G33-Q1 TPS3808G50-Q1
TPS3808G01-Q1,TPS3808G12-Q1,TPS3808G125-Q1,TPS3808G15-Q1 TPS3808G18-Q1,TPS3808G30-Q1,TPS3808G33-Q1,TPS3808G50-Q1 www.ti.com SBVS085J–JANUARY2007–REVISEDJUNE2017 12 Device and Documentation Support 12.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources,toolsandsoftware,andquickaccesstosampleorbuy. Table2.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER SAMPLE&BUY DOCUMENTS SOFTWARE COMMUNITY TPS3808G01-Q1 Clickhere Clickhere Clickhere Clickhere Clickhere TPS3808G12-Q1 Clickhere Clickhere Clickhere Clickhere Clickhere TPS3808G125-Q1 Clickhere Clickhere Clickhere Clickhere Clickhere TPS3808G15-Q1 Clickhere Clickhere Clickhere Clickhere Clickhere TPS3808G18-Q1 Clickhere Clickhere Clickhere Clickhere Clickhere TPS3808G30-Q1 Clickhere Clickhere Clickhere Clickhere Clickhere TPS3808G33-Q1 Clickhere Clickhere Clickhere Clickhere Clickhere TPS3808G50-Q1 Clickhere Clickhere Clickhere Clickhere Clickhere 12.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 12.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.4 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.5 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 12.6 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©2007–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:TPS3808G01-Q1 TPS3808G12-Q1 TPS3808G125-Q1 TPS3808G15-Q1TPS3808G18-Q1 TPS3808G30-Q1 TPS3808G33-Q1 TPS3808G50-Q1
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS3808G01QDBVRQ1 ACTIVE SOT-23 DBV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 BAZ & no Sb/Br) TPS3808G01QDRVRQ1 ACTIVE WSON DRV 6 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PSJQ & no Sb/Br) TPS3808G125QDBVRQ1 ACTIVE SOT-23 DBV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QWZ & no Sb/Br) TPS3808G12QDBVRQ1 ACTIVE SOT-23 DBV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 CEM & no Sb/Br) TPS3808G15QDBVRQ1 ACTIVE SOT-23 DBV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 OFV & no Sb/Br) TPS3808G18QDBVRQ1 ACTIVE SOT-23 DBV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 OBZ & no Sb/Br) TPS3808G30QDBVRQ1 ACTIVE SOT-23 DBV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 AVP & no Sb/Br) TPS3808G33QDBVRQ1 ACTIVE SOT-23 DBV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 AVQ & no Sb/Br) TPS3808G50QDBVRQ1 ACTIVE SOT-23 DBV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 CEL & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page 1
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TPS3808-Q1 : •Catalog: TPS3808 •Enhanced Product: TPS3808-EP NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product •Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 20-Feb-2020 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS3808G01QDBVRQ1 SOT-23 DBV 6 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS3808G01QDRVRQ1 WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 TPS3808G125QDBVRQ1 SOT-23 DBV 6 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS3808G12QDBVRQ1 SOT-23 DBV 6 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS3808G15QDBVRQ1 SOT-23 DBV 6 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS3808G18QDBVRQ1 SOT-23 DBV 6 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS3808G30QDBVRQ1 SOT-23 DBV 6 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS3808G33QDBVRQ1 SOT-23 DBV 6 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS3808G50QDBVRQ1 SOT-23 DBV 6 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 PackMaterials-Page1
PACKAGE MATERIALS INFORMATION www.ti.com 20-Feb-2020 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS3808G01QDBVRQ1 SOT-23 DBV 6 3000 203.0 203.0 35.0 TPS3808G01QDRVRQ1 WSON DRV 6 3000 210.0 185.0 35.0 TPS3808G125QDBVRQ1 SOT-23 DBV 6 3000 203.0 203.0 35.0 TPS3808G12QDBVRQ1 SOT-23 DBV 6 3000 203.0 203.0 35.0 TPS3808G15QDBVRQ1 SOT-23 DBV 6 3000 203.0 203.0 35.0 TPS3808G18QDBVRQ1 SOT-23 DBV 6 3000 203.0 203.0 35.0 TPS3808G30QDBVRQ1 SOT-23 DBV 6 3000 203.0 203.0 35.0 TPS3808G33QDBVRQ1 SOT-23 DBV 6 3000 203.0 203.0 35.0 TPS3808G50QDBVRQ1 SOT-23 DBV 6 3000 203.0 203.0 35.0 PackMaterials-Page2
GENERIC PACKAGE VIEW DRV 6 WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4206925/F
PACKAGE OUTLINE DRV0006A WSON - 0.8 mm max height SCALE 5.500 PLASTIC SMALL OUTLINE - NO LEAD B 2.1 A 1.9 PIN 1 INDEX AREA 2.1 1.9 0.8 C 0.7 SEATING PLANE 0.08 C (0.2) TYP 1 0.1 0.05 EXPOSED 0.00 THERMAL PAD 3 4 2X 7 1.3 1.6 0.1 6 1 4X 0.65 0.35 6X PIN 1 ID 0.3 0.25 6X (OPTIONAL) 0.2 0.1 C A B 0.05 C 4222173/B 04/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. www.ti.com
EXAMPLE BOARD LAYOUT DRV0006A WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD 6X (0.45) (1) 1 7 6X (0.3) 6 SYMM (1.6) (1.1) 4X (0.65) 4 3 (R0.05) TYP SYMM ( 0.2) VIA (1.95) TYP LAND PATTERN EXAMPLE SCALE:25X 0.07 MAX 0.07 MIN ALL AROUND ALL AROUND SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK (PREFERRED) DEFINED SOLDER MASK DETAILS 4222173/B 04/2018 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If some or all are implemented, recommended via locations are shown. www.ti.com
EXAMPLE STENCIL DESIGN DRV0006A WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD SYMM 6X (0.45) METAL 1 7 6X (0.3) 6 (0.45) SYMM 4X (0.65) (0.7) 4 3 (R0.05) TYP (1) (1.95) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD #7 88% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:30X 4222173/B 04/2018 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com
PACKAGE OUTLINE DBV0006A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 B A 1.45 MAX PIN 1 INDEX AREA 1 6 2X 0.95 3.05 2.75 1.9 5 2 4 3 0.50 6X 0.25 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214840/B 03/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.15 per side. 4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation. 5. Refernce JEDEC MO-178. www.ti.com
EXAMPLE BOARD LAYOUT DBV0006A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 6X (1.1) 1 6X (0.6) 6 SYMM 2 5 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214840/B 03/2018 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com
EXAMPLE STENCIL DESIGN DBV0006A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 6X (1.1) 1 6X (0.6) 6 SYMM 2 5 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214840/B 03/2018 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com
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