TPS2080, TPS2081, TPS2082 DUAL TPS2085, TPS2086, TPS2087 QUAD www.ti.com SLVS202B–SEPTEMBER2000–REVISEDOCTOBER2007 POWER-DISTRIBUTION SWITCHES FEATURES 1 • 80-mΩHigh-SideMOSFETSwitch • 500mAContinuousCurrentperChannel • IndependentThermalandShort-Circuit ProtectionWithOvercurrentLogicOutput • OperatingRange:2.7-Vto5.5-V • CMOS-andTTL-CompatibleEnableInputs • 2.5-msTypicalRiseTime • UndervoltageLockout • 10μAMaximumStandbySupplyCurrent • BidirectionalSwitch • Availablein8-Pinand16-PinSOICPackages • AmbientTemperatureRange,0(cid:176) Cto85(cid:176) C • ESDProtection DESCRIPTION The TPS2080, TPS2081, and TPS2082 dual and the TPS2085, TPS2086 and TPS2087 quad power-distribution switches are intended for applications where heavy capacitive loads and short circuitsarelikelytobeencountered. The TPS208x devices incorporate 80-mΩ N-channel MOSFET high-side power switches for power-distribution systems that require multiple power switches in a single package. Each switch is controlled by an independent logic enable input. Gate drive is provided by an internal charge pump designed to control the power-switch rise times and fall times to minimize current surges during switching. The charge pump requires no external componentsandallowsoperationfromsuppliesaslowas2.7V. When the output load exceeds the current-limit threshold or a short is present, the TPS208x limits the output current to a safe level by switching into a constant-current mode, pulling the overcurrent (OCx) logic output low. When continuous heavy overloads and short circuits increase the power dissipation in the switch causing the junction temperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from a thermal shutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures the switch remainsoffuntilvalidinputvoltageispresent.TheTPS208xdevicesaredesignedtocurrentlimitat1.0-Aload. 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsof TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2000–2007,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

TPS2080, TPS2081, TPS2082 DUAL TPS2085, TPS2086, TPS2087 QUAD www.ti.com SLVS202B–SEPTEMBER2000–REVISEDOCTOBER2007 Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. AVAILABLEOPTIONS(1) DUALPOWERDISTRIBUTIONSWITCHES ENABLE RECOMMENDED TYPICAL PACKAGED MAXIMUM SHORT-CIRCUIT DEVICES TA EN1 EN2 CONTCINUURORUENSTLOAD CURARTEN25T(cid:176) CLIMIT OSUMTALLINLE (A) (A) (D)(2) Activehigh Activehigh TPS2080D 0(cid:176) Cto85(cid:176) C Activehigh Activelow 0.5 1.0 TPS2081D Activelow Activelow TPS2082D QUADPOWERDISTRIBUTIONSWITCHES ENABLE RECOMMENDED TYPICAL PACKAGED MAXIMUM SHORT-CIRCUIT DEVICES TA CONTCINUURORUENSTLOAD CURARTEN25T(cid:176) CLIMIT SMALL EN1 EN2 EN3 DN4 OUTLINE (A) (A) (D)(2) Activehigh Activehigh Activehigh Activehigh TPS2085D 0(cid:176) Cto85(cid:176) C Activehigh Activelow Activehigh Activelow 0.5 1.0 TPS2086D Activelow Activelow Activelow Activelow TPS2087D (1) Forthemostcurrentpackageandorderinginformation,seethePackageOptionAddendumattheendofthisdocument,orseetheTI websiteatwww.ti.com. (2) TheDpackageisavailabletapedandreeled.AddanRsuffixtodevicetype(e.g.,TPS2081DR). 2 SubmitDocumentationFeedback Copyright©2000–2007,TexasInstrumentsIncorporated ProductFolderLink(s):TPS2080,TPS2081,TPS2082DUALTPS2085,TPS2086,TPS2087QUAD

TPS2080, TPS2081, TPS2082 DUAL TPS2085, TPS2086, TPS2087 QUAD www.ti.com SLVS202B–SEPTEMBER2000–REVISEDOCTOBER2007 TPS2082FUNCTIONALBLOCKDIAGRAM Copyright©2000–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLink(s):TPS2080,TPS2081,TPS2082DUALTPS2085,TPS2086,TPS2087QUAD

TPS2080, TPS2081, TPS2082 DUAL TPS2085, TPS2086, TPS2087 QUAD www.ti.com SLVS202B–SEPTEMBER2000–REVISEDOCTOBER2007 TPS2087FUNCTIONALBLOCKDIAGRAM 4 SubmitDocumentationFeedback Copyright©2000–2007,TexasInstrumentsIncorporated ProductFolderLink(s):TPS2080,TPS2081,TPS2082DUALTPS2085,TPS2086,TPS2087QUAD

TPS2080, TPS2081, TPS2082 DUAL TPS2085, TPS2086, TPS2087 QUAD www.ti.com SLVS202B–SEPTEMBER2000–REVISEDOCTOBER2007 TERMINALFUNCTIONS DUALPOWER-DISTRIBUTIONSWITCHES TERMINAL NO. I/O DESCRIPTION NAME TPS2080 TPS2081 TPS2082 EN1 4 I Enableinput.Activelowturnsonpowerswitch. EN2 5 5 I Enableinput.Activelowturnsonpowerswitch. EN1 4 4 I Enableinput.Activehighturnsonpowerswitch. EN2 5 I Enableinput.Activehighturnsonpowerswitch. GND 1 1 1 I Ground IN1 2 2 2 I N-ChannelMOSFETDrain IN2 3 3 3 I N-ChannelMOSFETDrain OC 8 8 8 O Overcurrent.Opendrainoutputactivelow OUT1 7 7 7 O Power-switchoutput OUT2 6 6 6 O Power-switchoutput QUADPOWER-DISTRIBUTIONSWITCHES TERMINAL NO. I/O DESCRIPTION NAME TPS2085 TPS2086 TPS2087 EN1 4 I Enableinput.Activelowturnsonpowerswitch. EN2 13 13 I Enableinput.Activelowturnsonpowerswitch. EN3 8 I Enableinput.Activelowturnsonpowerswitch. EN4 9 9 I Enableinput.Activelowturnsonpowerswitch. EN1 4 4 I Enableinput.Activehighturnsonpowerswitch. EN2 13 I Enableinput.Activehighturnsonpowerswitch. EN3 8 8 I Enableinput.Activehighturnsonpowerswitch. EN4 9 I Enableinput.Activehighturnsonpowerswitch. GNDA 1 1 1 GroundforIN1andIN2switchandcircuitry GNDB 5 5 5 GroundforIN3andIN4switchandcircuitry IN1 2 2 2 I N-channelMOSFETdrain IN2 3 3 3 I N-channelMOSFETdrain IN3 6 6 6 I N-channelMOSFETdrain IN4 7 7 7 I N-channelMOSFETdrain OCA 16 16 16 O Overcurrentindicatorforswitch1andswitch2.Active-lowopendrainoutput. OCB 12 12 12 O Overcurrentindicatorforswitch3andswitch4.Activelowopendrainoutput OUT1 15 15 15 O Power-switchoutput OUT2 14 14 14 O Power-switchoutput OUT3 11 11 11 O Power-switchoutput OUT4 10 10 10 O Power-switchoutput Copyright©2000–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLink(s):TPS2080,TPS2081,TPS2082DUALTPS2085,TPS2086,TPS2087QUAD

TPS2080, TPS2081, TPS2082 DUAL TPS2085, TPS2086, TPS2087 QUAD www.ti.com SLVS202B–SEPTEMBER2000–REVISEDOCTOBER2007 DETAILED DESCRIPTION POWER SWITCH The power switch is an N-channel MOSFET with a maximum on-state resistance of 135 mΩ (V = 5V). I(IN) Configured as a high-side switch, the power switch prevents current flow from OUTx to IN and IN to OUTx when disabled.Thepowerswitchsuppliesaminimumof500mAperswitch. CHARGE PUMP An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7V and requires verylittlesupplycurrent. DRIVER The driver controls the gate voltage of the power switch. To limit large current surges and reduce the associated electromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and fall timesoftheoutputvoltage.Theriseandfalltimesaretypicallyinthe2-msto4-msrange. ENABLE (ENx or ENx) Thelogicenabledisablesthepowerswitchandthebiasforthechargepump,driver,andothercircuitryto reduce the supply current to less than 10 μA when a logic high is present on ENx or a logic low is present on ENx. A logic low input on ENx or logic high on ENx restores bias to the drive and control circuits and turns the power on. TheenableinputiscompatiblewithbothTTLandCMOSlogiclevels. OVERCURRENT (OCx) The OCx open drain output is asserted (active low) when an overcurrent or over temperature condition is encountered.Theoutputwillremainasserteduntiltheovercurrentorovertemperatureconditionisremoved. CURRENT SENSE A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry sends a control signal to the driver. The driver in turn reduces the gate voltage and drives the power FET into its saturation region, which switches the output into a constant current mode and holds the current constant while varyingthevoltageontheload. THERMAL SENSE The TPS208x implements a dual thermal trip to allow fully independent operation of the power distribution switches. In an overcurrent or short-circuit condition the junction temperature rises. When the die temperature rises to approximately 140(cid:176) C, the internal thermal sense circuitry checks to determine which power switch is in an overcurrent condition and turns off that switch, thus isolating the fault without interrupting operation of the adjacent power switch. Hysteresis is built into the thermal sense, and after the device has cooled approximately 20 degrees, the switch turns back on. The switch continues to cycle off and on until the fault is removed. The (OCx)open-drainoutputisasserted(activelow)whenovertemperatureorovercurrentoccurs. UNDERVOLTAGE LOCKOUT A voltage sense circuit monitors the input voltage. When the input voltage is below approximately 2 V, a control signalturnsoffthepowerswitch. 6 SubmitDocumentationFeedback Copyright©2000–2007,TexasInstrumentsIncorporated ProductFolderLink(s):TPS2080,TPS2081,TPS2082DUALTPS2085,TPS2086,TPS2087QUAD

TPS2080, TPS2081, TPS2082 DUAL TPS2085, TPS2086, TPS2087 QUAD www.ti.com SLVS202B–SEPTEMBER2000–REVISEDOCTOBER2007 ABSOLUTE MAXIMUM RATINGS overoperatingfree-airtemperaturerange(unlessotherwisenoted) (1) VALUE UNIT V Inputvoltagerange(2) –0.3to6 V I(IN) V Outputvoltagerange(2) –0.3toV +0.3 V O(OUTx) I(IN) V orV Inputvoltagerange –0.3to6 V I(ENx) I(ENx) I Continuousoutputcurrent InternallyLimited O(OUTx) Continuoustotalpowerdissipation SeeDissipationRatingTable T Operatingvirtualjunctiontemperaturerange 0to125 (cid:176) C J T Storagetemperaturerange –65to150 (cid:176) C stg Leadtemperaturesoldering1,6mm(1/16inch)fromcasefor10seconds 260 (cid:176) C Humanbodymodel 2 kV ESD Electrostaticdischargeprotection Machinemodel 200 V Chargeddevicemodel(CDM) 750 V (1) Stressesbeyondthoselistedunderabsolutemaximumratingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderrecommendedoperating conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) AllvoltagesarewithrespecttoGND. DISSIPATION RATINGS TABLE T ≤25(cid:176) C DERATINGFACTOR T =70(cid:176) C T =85(cid:176) C PACKAGE POWAERRATING ABOVET =25(cid:176) C POWAERRATING POWEARRATING= A D-8 725mW 5.8mW/(cid:176) C 464mW 377mW D-16 1123mW 9mW/(cid:176) C 719mW 584mW RECOMMENDED OPERATING CONDITIONS MIN MAX UNIT V Inputvoltage 2.7 5.5 V I(IN) V orV Inputvoltage 0 5.5 V I(ENx) I(ENx) I Continuousoutputcurrent(perswitch) 0 500 mA O T Operatingvirtualjunctiontemperature 0 125 (cid:176) C J ELECTRICAL CHARACTERISTICS overrecommendedoperatingjunctiontemperaturerange,V =5.5V,I =ratedcurrent,V =0V,V =V (unless I(IN) O I(ENx) I(ENx) I(INx) otherwisenoted) SUPPLYCURRENT PARAMETER TESTCONDITIONS MIN TYP MAX UNIT Supplycurrent,low-level VI(ENx)=VI(IN), TJ=25(cid:176) C 0.025 1 output NoLoadonOUT VI(ENx)=0V –40(cid:176) C≤T ≤125(cid:176) C 10 μA J Supplycurrent,high-level V =0V, T =25(cid:176) C 85 110 I(ENx) J output NoLoadonOUT VI(ENx)=VI(IN) –40(cid:176) C≤T ≤125(cid:176) C 100 μA J Leakagecurrent OUTconnectedtoground VI(ENx)=VI(IN), –40(cid:176) C≤T ≤125(cid:176) C 100 μA V =0V J I(ENx) Reverseleakagecurrent INx=highimpedance VI(ENx)=0V, T =25(cid:176) C 0.3 μA V =V J I(ENx) I(IN) Copyright©2000–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLink(s):TPS2080,TPS2081,TPS2082DUALTPS2085,TPS2086,TPS2087QUAD

TPS2080, TPS2081, TPS2082 DUAL TPS2085, TPS2086, TPS2087 QUAD www.ti.com SLVS202B–SEPTEMBER2000–REVISEDOCTOBER2007 ELECTRICAL CHARACTERISTICS (Continued) overrecommendedoperatingjunctiontemperaturerange,V =5.5V,I =ratedcurrent,V =0V,V =V (unless I(IN) O I(ENx) I(ENx) I(INx) otherwisenoted) POWERSWITCH PARAMETER TESTCONDITIONS(1) MIN TYP MAX UNIT V =5V, T =25(cid:176) C, I =0.5A 80 100 I(IN) J O V =5V, T =85(cid:176) C, I =0.5A 90 120 I(IN) J O Staticdrain-sourceon-state VI(IN)=5V, TJ=125(cid:176) C, IO=0.5A 100 135 r mΩ DS(on) resistance V =3.3V, T =25(cid:176) C, I =0.5A 90 125 I(IN) J O V =3.3V, T =85(cid:176) C, I =0.5A 110 145 I(IN) J O V =3.3V, T =125(cid:176) C, I =0.5A 120 165 I(IN) J O V =5.5V,R =10Ω, T =125(cid:176) C, C =1μF 2.5 I(IN) L J L t Risetime,output ms r V =2.7V,R =10Ω, T =125(cid:176) C, C =1μF 3 I(IN) L J L V =5.5V,R =10Ω, T =125(cid:176) C, C =1μF 4.4 I(IN) L J L t Falltime,output ms f V =2.7V,R =10Ω, T =125(cid:176) C, C =1μF 2.5 I(IN) L J L (1) Pulse-testingtechniquesmaintainjunctiontemperatureclosetoambienttemperature;thermaleffectsmustbetakenintoaccount separately. ENABLEINPUTV orV I(ENx) I(ENx) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V High-levelinputvoltage 2.7V≤V ≤5.5V 2 V IH I(IN) 4.5V≤V ≤5.5V 0.8 I(IN) V Low-levelinputvoltage V IL 2.7V≤V ≤4.5V 0.4 I(IN) I Inputcurrent V =0VandV =V ,orV =V andV =0V –0.5 0.5 μA I I(ENx) I(ENx) I(IN) I(ENx) I(IN) I(ENx) t Turnontime C =100μF, R =10μF 20 ms on L L t Turnontime C =100μF, R =10μF 40 ms off L L CURRENTLIMIT PARAMETER TESTCONDITIONS(1) MIN TYP MAX UNIT V =5V,OUTconnectedtoGND, I Short-circuitoutputcurrent I(IN) 0.7 1 1.3 A OS Deviceenabledintoshortcircuit (1) Pulse-testingtechniquesmaintainjunctiontemperatureclosetoambienttemperature;thermaleffectsmustbetakenintoaccount separately. UNDERVOLTAGELOCKOUT PARAMETER TESTCONDITIONS MIN TYP MAX UNIT Low-levelinputvoltage 2 2.5 V Hysteresis T =25(cid:176) C 100 mV J OVERCURRENTOCx PARAMETER TESTCONDITIONS MIN TYP MAX UNIT Sinkcurrent(1) V =5V 10 mA O Outputlowvoltage I =5mA,V 0.5 V O OL(OCx) Off-statecurrent(1) V =5V,V =3.3V 1 μA O O (1) Specifiedbydesign,notproductiontested. 8 SubmitDocumentationFeedback Copyright©2000–2007,TexasInstrumentsIncorporated ProductFolderLink(s):TPS2080,TPS2081,TPS2082DUALTPS2085,TPS2086,TPS2087QUAD

TPS2080, TPS2081, TPS2082 DUAL TPS2085, TPS2086, TPS2087 QUAD www.ti.com SLVS202B–SEPTEMBER2000–REVISEDOCTOBER2007 PARAMETER MEASUREMENT INFORMATION Figure1.TestCircuitandVoltageWaveforms Figure2.TurnonDelayandRiseTimeWith0.1-μFLoad Figure3.TurnoffDelayandFallTimeWith0.1-μFLoad Copyright©2000–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLink(s):TPS2080,TPS2081,TPS2082DUALTPS2085,TPS2086,TPS2087QUAD

TPS2080, TPS2081, TPS2082 DUAL TPS2085, TPS2086, TPS2087 QUAD www.ti.com SLVS202B–SEPTEMBER2000–REVISEDOCTOBER2007 PARAMETER MEASUREMENT INFORMATION (continued) Figure4.TurnonDelayandRiseTimeWith1-μFLoad Figure5.TurnoffDelayandFallTimeWith1-μFLoad Figure6.TPS2080,Short-CircuitCurrent,Device Figure7.TPS2080,ThresholdTripCurrentWithRamped EnabledIntoShort LoadonEnabledDevice 10 SubmitDocumentationFeedback Copyright©2000–2007,TexasInstrumentsIncorporated ProductFolderLink(s):TPS2080,TPS2081,TPS2082DUALTPS2085,TPS2086,TPS2087QUAD

TPS2080, TPS2081, TPS2082 DUAL TPS2085, TPS2086, TPS2087 QUAD www.ti.com SLVS202B–SEPTEMBER2000–REVISEDOCTOBER2007 PARAMETER MEASUREMENT INFORMATION (continued) Figure8.OCResponseWithRampedLoadonEnabled Figure9.InrushCurrentWith100-μF,220-μFand470-μF Device LoadCapacitance Figure10.4-ΩLoadConnectedtoEnabledDevice Figure11. 1-ΩLoadConnectedtoEnabledDevice Copyright©2000–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLink(s):TPS2080,TPS2081,TPS2082DUALTPS2085,TPS2086,TPS2087QUAD

TPS2080, TPS2081, TPS2082 DUAL TPS2085, TPS2086, TPS2087 QUAD www.ti.com SLVS202B–SEPTEMBER2000–REVISEDOCTOBER2007 TYPICAL CHARACTERISTICS TURNONDELAYTIME TURNOFFDELAYTIME vs vs INPUTVOLTAGE INPUTVOLTAGE Figure12. Figure13. RISETIME FALLTIME vs vs INPUTVOLTAGE INPUTVOLTAGE Figure14. Figure15. 12 SubmitDocumentationFeedback Copyright©2000–2007,TexasInstrumentsIncorporated ProductFolderLink(s):TPS2080,TPS2081,TPS2082DUALTPS2085,TPS2086,TPS2087QUAD

TPS2080, TPS2081, TPS2082 DUAL TPS2085, TPS2086, TPS2087 QUAD www.ti.com SLVS202B–SEPTEMBER2000–REVISEDOCTOBER2007 TYPICAL CHARACTERISTICS (continued) SUPPLYCURRENT,OUTPUTENABLED SUPPLYCURRENT,OUTPUTDISABLED vs vs JUNCTIONTEMPERATURE JUNCTIONTEMPERATURE Figure16. Figure17. STATICDRAIN-SOURCEON-STATERESISTANCE INPUT-TO-OUTPUTVOLTAGE vs vs JUNCTIONTEMPERATURE LOADCURRENT Figure18. Figure19. Copyright©2000–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLink(s):TPS2080,TPS2081,TPS2082DUALTPS2085,TPS2086,TPS2087QUAD

TPS2080, TPS2081, TPS2082 DUAL TPS2085, TPS2086, TPS2087 QUAD www.ti.com SLVS202B–SEPTEMBER2000–REVISEDOCTOBER2007 TYPICAL CHARACTERISTICS (continued) SHORT-CIRCUITOUTPUTCURRENT THRESHOLDTRIPCURRENT vs vs JUNCTIONTEMPERATURE INPUTVOLTAGE Figure20. Figure21. UNDERVOLTAGELOCKOUT CURRENTLIMITRESPONSE vs vs JUNCTIONTEMPERATURE PEAKCURRENT Figure22. Figure23. 14 SubmitDocumentationFeedback Copyright©2000–2007,TexasInstrumentsIncorporated ProductFolderLink(s):TPS2080,TPS2081,TPS2082DUALTPS2085,TPS2086,TPS2087QUAD

TPS2080, TPS2081, TPS2082 DUAL TPS2085, TPS2086, TPS2087 QUAD www.ti.com SLVS202B–SEPTEMBER2000–REVISEDOCTOBER2007 APPLICATION INFORMATION Figure24.TypicalApplication POWER-SUPPLY CONSIDERATIONS A 0.01-μF to 0.1-μF ceramic bypass capacitor between INx and GND, close to the device, is recommended. Placing a high-value electrolytic capacitor on the output pin(s) is recommended when the output load is heavy. This precaution reduces power-supply transients that may cause ringing on the input. Additionally, bypassing the outputwitha0.01-μFto0.1-μFceramiccapacitorimprovestheimmunityofthedevicetoshort-circuittransients. OVERCURRENT A sense FET is employed to check for overcurrent conditions. Unlike current-sense resistors, sense FETs do not increase the series resistance of the current path. When an overcurrent condition is detected, the device maintains a constant output current and reduces the output voltage accordingly. Complete shutdown occurs only ifthefaultispresentlongenoughtoactivatethermallimiting. Three possible overload conditions can occur. In the first condition, the output has been shorted before the device is enabled or before V has been applied (see Figure 6). The TPS208x senses the short and I(IN) immediatelyswitchesintoaconstant-currentoutput. In the second condition, a short or an overload occurs while the device is enabled. At the instant the overload occurs, very high currents may flow for a short time before the current-limit circuit can react (see Figure 10 and Figure 11). After the current-limit circuit has tripped (reached the overcurrent trip threshold) the device switches intoconstant-currentmode. In the third condition, the load has been gradually increased beyond the recommended operating current. The current is permitted to rise until the current-limit threshold is reached or until the thermal limit of the device is exceeded (see Figure 8). The TPS208x is capable of delivering current up to the current-limit threshold without damagingthedevice.Oncethethresholdhasbeenreached,thedeviceswitchesintoitsconstant-currentmode. OC RESPONSES The OC open-drain output is asserted (active low) when an overcurrent or overtemperature condition is encountered. The output will remain asserted until the overcurrent or overtemperature condition is removed. Connecting a heavy capacitive load to an enabled device can cause momentary false overcurrent reporting from the inrush current flowing through the device, charging the downstream capacitor. The TPS208x devices are designed to reduce false overcurrent reporting. An internal overcurrent transient filter eliminates the need to use external components to remove unwanted pulses. Using low-ESR electrolytic capacitors on the output lowers the inrush current flow through the device during hot-plug events by providing a low impedance energy source, therebyreducingerroneousovercurrentreporting. Copyright©2000–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLink(s):TPS2080,TPS2081,TPS2082DUALTPS2085,TPS2086,TPS2087QUAD

TPS2080, TPS2081, TPS2082 DUAL TPS2085, TPS2086, TPS2087 QUAD www.ti.com SLVS202B–SEPTEMBER2000–REVISEDOCTOBER2007 Figure25.TypicalCircuitforOCPin POWER DISSIPATION AND JUNCTION TEMPERATURE The low on-resistance on the n-channel MOSFET allows small surface-mount packages, such as SOIC, to pass large currents. The thermal resistance of these packages is high compared to that of power packages; it is good design practice to check power dissipation and junction temperature. Begin by determining the r of the DS(on) N-channel MOSFET relative to the input voltage and operating temperature. As an initial estimate, use the highest operating ambient temperature of interest and read r from Figure 18. Using this value, the power DS(on) dissipationperswitchcanbecalculatedby: P =r · I2 D DS(on) Multiply this number by the total number of switches being used, to get the total power dissipation coming from theN-channelMOSFETs. Finally,calculatethejunctiontemperature: T =P · R +T J D θJA A Where: T =AmbientTemperature(cid:176) C A R =ThermalresistanceSOIC=172(cid:176) C/W(for8pin),111(cid:176) C/W(for16pin) θJA P =Totalpowerdissipationbasedonnumberofswitchesbeingused. D Compare the calculated junction temperature with the initial estimate. If they do not agree within a few degrees, repeat the calculation, using the calculated value as the new estimate. Two or three iterations are generally sufficienttogetareasonableanswer. THERMAL PROTECTION Thermal protection prevents damage to the IC when heavy-overload or short-circuit faults are present for extended periods of time. The faults force the TPS208x into constant current mode, which causes the voltage across the high-side switch to increase; under short-circuit conditions, the voltage across the switch is equal to the input voltage. The increased dissipation causes the junction temperature to rise to high levels. The protection circuit senses the junction temperature of the switch and shuts it off. Hysteresis is built into the thermal sense circuit,andafterthedevicehascooledapproximately20degrees,theswitchturnsbackon.Theswitchcontinues tocycleinthismanneruntiltheloadfaultorinputpowerisremoved. The TPS208x implements a dual thermal trip to allow fully independent operation of the power distribution switches. In an overcurrent or short-circuit condition the junction temperature will rise. Once the die temperature rises to approximately 140(cid:176) C, the internal thermal sense circuitry checks which power switch is in an overcurrent condition and turns that power switch off, thus isolating the fault without interrupting operation of the adjacent power switch. Should the die temperature exceed the first thermal trip point of 140(cid:176) C and reach 160(cid:176) C, both switches turn off. The OC open-drain output is asserted (active low) when overtemperature or overcurrent occurs. 16 SubmitDocumentationFeedback Copyright©2000–2007,TexasInstrumentsIncorporated ProductFolderLink(s):TPS2080,TPS2081,TPS2082DUALTPS2085,TPS2086,TPS2087QUAD

TPS2080, TPS2081, TPS2082 DUAL TPS2085, TPS2086, TPS2087 QUAD www.ti.com SLVS202B–SEPTEMBER2000–REVISEDOCTOBER2007 UNDERVOLTAGE LOCKOUT (UVLO)l An undervoltage lockout ensures that the power switch is in the off state at power up. Whenever the input voltage falls below approximately 2 V, the power switch will be quickly turned off. This facilitates the design of hot-insertion systems where it is not possible to turn off the power switch before input power is removed. The UVLO will also keep the switch from being turned on until the power supply has reached at least 2 V, even if the switch is enabled. Upon reinsertion, the power switch will be turned on with a controlled rise time to reduce EMI andvoltageovershoots. GENERIC HOT-PLUG APPLICATIONS (see Figure 26) In many applications it may be necessary to remove modules or pc boards while the main unit is still operating. These are considered hot-plug applications. Such implementations require the control of current surges seen by the main power supply and the card being inserted. The most effective way to control these surges is to limit and slowly ramp the current and voltage being applied to the card, similar to the way in which a power supply normally turns on. Due to the controlled rise times and fall times of the TPS208x, these devices can be used to provide a softer start-up to devices being hot-plugged into a powered system. The UVLO feature of the TPS208x also ensures the switch will be off after the card has been removed, and the switch will be off during the next insertion. The UVLO feature insures a soft start with a controlled rise time for every insertion of the card or module. Figure26.TypicalHot-PlugImplementation By placing the TPS208x between the V input and the rest of the circuitry, the input power will reach these CC devices first after insertion. The typical rise time of the switch is approximately 2.5 ms, providing a slow voltage ramp at the output of the device. This implementation controls system surge currents and provides a hot-pluggingmechanismforanydevice. Copyright©2000–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLink(s):TPS2080,TPS2081,TPS2082DUALTPS2085,TPS2086,TPS2087QUAD

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS2080D ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 85 2080 & no Sb/Br) TPS2080DG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 85 2080 & no Sb/Br) TPS2080DR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 85 2080 & no Sb/Br) TPS2081D ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 85 2081 & no Sb/Br) TPS2081DG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 85 2081 & no Sb/Br) TPS2082D ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 85 2082 & no Sb/Br) TPS2082DR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 85 2082 & no Sb/Br) TPS2085D ACTIVE SOIC D 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 85 2085 & no Sb/Br) TPS2085DR ACTIVE SOIC D 16 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 85 2085 & no Sb/Br) TPS2085DRG4 ACTIVE SOIC D 16 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 85 2085 & no Sb/Br) TPS2087D ACTIVE SOIC D 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 85 2087 & no Sb/Br) TPS2087DR ACTIVE SOIC D 16 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 85 2087 & no Sb/Br) TPS2087DRG4 ACTIVE SOIC D 16 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 85 2087 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 20-Nov-2010 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS2080DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS2082DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS2085DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 TPS2087DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 20-Nov-2010 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS2080DR SOIC D 8 2500 340.5 338.1 20.6 TPS2082DR SOIC D 8 2500 340.5 338.1 20.6 TPS2085DR SOIC D 16 2500 333.2 345.9 28.6 TPS2087DR SOIC D 16 2500 333.2 345.9 28.6 PackMaterials-Page2

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PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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