ICGOO在线商城 > 集成电路(IC) > PMIC - 配电开关,负载驱动器 > TPS2069CDGNR
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TPS2069CDGNR产品简介:
ICGOO电子元器件商城为您提供TPS2069CDGNR由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 TPS2069CDGNR价格参考。Texas InstrumentsTPS2069CDGNR封装/规格:PMIC - 配电开关,负载驱动器, 。您可以下载TPS2069CDGNR参考资料、Datasheet数据手册功能说明书,资料中有TPS2069CDGNR 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | 集成电路 (IC)半导体 |
描述 | IC PWR-DIST SW CURR-LMT 8MSOP电源开关 IC - 配电 SGL CH,CURRENT-LTD USB PWR DISTR SWITCH |
产品分类 | PMIC - 电源分配开关集成电路 - IC |
品牌 | Texas Instruments |
产品手册 | http://www.ti.com/lit/gpn/tps2069c |
产品图片 | |
rohs | 符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 开关 IC,电源开关 IC - 配电,Texas Instruments TPS2069CDGNR- |
数据手册 | |
产品型号 | TPS2069CDGNR |
PCN组件/产地 | |
Rds(On) | 69 毫欧 |
产品种类 | 电源开关 IC - 配电 |
供应商器件封装 | 8-MSOP-PowerPad |
其它名称 | 296-29455-1 |
内部开关 | 是 |
包装 | 剪切带 (CT) |
商标 | Texas Instruments |
安装类型 | 表面贴装 |
安装风格 | SMD/SMT |
导通电阻—最大值 | 76 mOhms |
封装 | Reel |
封装/外壳 | 8-TSSOP,8-MSOP(0.118",3.00mm 宽)裸焊盘 |
封装/箱体 | HVSSOP-8 |
工作温度 | -40°C ~ 85°C |
工作电源电压 | 4.5 V to 5.5 V |
工厂包装数量 | 2500 |
开关数量 | 1 Switch |
开关电流—最大值 | 1.5 A |
开关类型 | 通用 |
最大工作温度 | + 85 C |
最大输入电压 | 5.5 V |
最小工作温度 | - 40 C |
最小输入电压 | 4.5 V |
标准包装 | 1 |
比率-输入:输出 | 1:1 |
特性 | 负载释放 |
电压-负载 | 4.5 V ~ 5.5 V |
电压-输入 | 4.5 V ~ 5.5 V |
电流-输出(最大值) | 1.5A |
电流限制 | 2.15A |
电源电流 | 2.15 A |
类型 | USB 开关 |
系列 | TPS2069C |
输入类型 | 非反相 |
输出数 | 1 |
输出电流 | 1.5 A |
输出端数量 | 1 Output |
输出类型 | N 通道 |
Product Sample & Technical Tools & Support & Folder Buy Documents Software Community TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 SLVSAU6H–JUNE2011–REVISEDAPRIL2016 TPS20xxC and TPS20xxC-2 Current Limited, Power-Distribution Switches 1 Features 3 Description • SinglePowerSwitchFamily The TPS20xxC and TPS20xxC-2 power-distribution 1 switch family is intended for applications, such as • Pin-for-PinWithExistingTISwitchPortfolio USB, where heavy capacitive loads and short circuits • RatedCurrentsof0.5A,1A,1.5A,2A are likely to be encountered. This family offers • ±20%Accurate,Fixed,ConstantCurrentLimit multiple devices with fixed current-limit thresholds for applicationsfrom0.5Ato2A. • FastOvercurrentResponse:2 µs • DeglitchedFaultReporting The TPS20xxC and TPS20xxC-2 family limits the output current to a safe level by operating in a • SelectedPartsWith(TPS20xxC)andWithout constant-current mode when the output load exceeds (TPS20xxC-2)OutputDischarge the current limit threshold. This provides a predictable • ReverseCurrentBlocking fault current under all conditions. The fast overload • Built-InSoftStart response time eases the burden on the main 5-V supply to provide regulated power when the output is • AmbientTemperatureRange:–40°Cto85°C shorted. The power-switch rise and fall times are • ULListedandCB-FileNo.E169910 controlled to minimize current surges during turnon andturnoff. 2 Applications DeviceInformation(1) • USBPortsandHubs,Laptops,andDesktops PARTNUMBER PACKAGE BODYSIZE(NOM) • High-DefinitionDigitalTVs SOT-23(5) 2.90mm×1.60mm • Set-TopBoxes TPS20xxC, VSSOP(8) 3.00mm×3.00mm • Short-CircuitProtection TPS20xxC-2 MSOP-PowerPAD(8) 3.00mm×3.00mm (1) For all available packages, see the orderable addendum at theendofthedatasheet. TypicalApplicationDiagram VIN IN OUT VOUT R F FLT m 150mF 10kW 1 0. FaultSignal FLT GND ENor Pad* Control Signal EN *DGNonly Copyright © 2016,Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 SLVSAU6H–JUNE2011–REVISEDAPRIL2016 www.ti.com Table of Contents 1 Features.................................................................. 1 8.2 FunctionalBlockDiagram.......................................14 2 Applications........................................................... 1 8.3 FeatureDescription.................................................14 3 Description............................................................. 1 8.4 DeviceFunctionalModes........................................16 4 RevisionHistory..................................................... 2 9 ApplicationandImplementation........................ 17 9.1 ApplicationInformation............................................17 5 DeviceComparisonTable..................................... 4 9.2 TypicalApplication .................................................17 6 PinConfigurationandFunctions......................... 4 10 PowerSupplyRecommendations..................... 21 7 Specifications......................................................... 5 11 Layout................................................................... 22 7.1 AbsoluteMaximumRatings......................................5 11.1 LayoutGuidelines.................................................22 7.2 ESDRatings..............................................................5 11.2 LayoutExample....................................................22 7.3 RecommendedOperatingConditions.......................6 11.3 PowerDissipationandJunctionTemperature......22 7.4 ThermalInformation:SOT-23...................................6 12 DeviceandDocumentationSupport................. 25 7.5 ThermalInformation:MSOP-PowerPAD..................6 7.6 ElectricalCharacteristics:T =T =25°C.................7 12.1 RelatedLinks........................................................25 J A 7.7 ElectricalCharacteristics:–40°C≤T ≤125°C.........8 12.2 CommunityResources..........................................25 J 7.8 TimingRequirements:T =T =25°C......................9 12.3 Trademarks...........................................................25 J A 7.9 TypicalCharacteristics............................................11 12.4 ElectrostaticDischargeCaution............................25 12.5 Glossary................................................................25 8 DetailedDescription............................................ 14 13 Mechanical,Packaging,andOrderable 8.1 Overview.................................................................14 Information........................................................... 25 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionG(July2013)toRevisionH Page • AddedESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection ................................................................................................. 1 • DeletedDevicestable(previouslyTable1) ........................................................................................................................... 4 ChangesfromRevisionF(August2012)toRevisionG Page • Deleted(SeeTable1)fromFeature:ULListedandCB-FileNo.E169910........................................................................... 1 • ChangedFrom:PXKITo:PYKIintheDEVICEINFORMATIONtableSOT23-5(DBV)column(TPS2069C)...................... 4 • DeletedNote2from:"ULlistedandCBcomplete"............................................................................................................... 4 ChangesfromRevisionE(April2012)toRevisionF Page • AddeddeviceTPS20xxC-2 ................................................................................................................................................... 1 • ChangedFeatureFrom:OuputDischargeWhenTPS20XXCisDisabledTo:Selectedpartswith(TPS20xxC)and without(TPS20xxC-2)OutputDischarge............................................................................................................................... 1 • AddeddevicesTPS2041C,TPS2061C,TPS2065C-2,TPS2068C,andTPS2069C-2totheDeviceInformationtable.......4 • AddedtheTPS2069C-2Device............................................................................................................................................. 4 • AddedPXKIintheDEVICEINFORMATIONtableSOT23-5(DBV)column(TPS2069C).................................................... 4 • AddeddevicesTPS2041C,TPS2061C,TPS2065C-2,TPS2068C,andTPS2069C-2toandremovedProductPreview....4 • AddedNote1totheRECOMMENDEDOPERATINGCONDITIONStable........................................................................... 6 • AddedTPS2041C,TPS2061C,TPS2068C,TPS2065C-2andTPS2069C-2devicestoI intheRECOMMENDED OUT OPERATINGCONDITIONStable.......................................................................................................................................... 6 • AddedtheDBVoptiontoPowerSwitchR 1.5Aratedoutput,25°CmΩ....................................................................... 7 DS(on) • AddedtheDBVoptiontoPowerSwitchR 1.5Aratedoutput ....................................................................................... 7 DS(on) • ChangedI CurrentLimit ..................................................................................................................................................... 7 SO 2 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 www.ti.com SLVSAU6H–JUNE2011–REVISEDAPRIL2016 • AddedLeakageCurrent......................................................................................................................................................... 7 • AddedtheDBVoptiontoPowerSwitchR 1.5Aratedoutput...................................................................................... 8 DS(on) • ChangedI CurrentLimit ..................................................................................................................................................... 8 SO • AddedLeakageCurrent......................................................................................................................................................... 8 • ChangedthesecondparagraphoftheENABLEsection.................................................................................................... 15 • AddedsentencetoendofparagraphintheOUTPUTDISCHARGEsection...................................................................... 16 ChangesfromRevisionD(February2012)toRevisionE Page • ChangedthePOWERDISSIPATIONANDJUNCTIONTEMPERATUREsection.Replacedparagraph"Whileitis recommended..."................................................................................................................................................................... 22 ChangesfromRevisionC(October2011)toRevisionD Page • AddedFeatureULListedandCB-FileNo.E169910(See).................................................................................................. 1 • AddedtableNote2,ULlistedandCBcomplete.................................................................................................................... 4 • AddedV andV informationtotheROCTable................................................................................................................... 6 IH IL ChangesfromRevisionB(September2011)toRevisionC Page • ChangedFrom:PXF1To:PXFIandFrom:PSG1To:PXGIintheDEVICEINFORMATIONtableMOSP-8(DGK) column.................................................................................................................................................................................... 4 • ChangedTPS2000C(MSOP-8)statusFrom:PreviewTo:ActiveinTable1........................................................................ 4 • ChangedtheθJACustom2ARatedDGKvaluefromN/Ato110.3...................................................................................... 7 • AddedFigure45-DGKPackagePCBLayoutExample..................................................................................................... 23 ChangesfromRevisionA(July2011)toRevisionB Page • AddedtheDGKPackageInformationthroughoutthedatasheet.......................................................................................... 4 • ChangedtitleofFigure30From:NEWFIGTo:TPS2065C50ΩShortCircuit.................................................................. 19 ChangesfromOriginal(June2011)toRevisionA Page • ChangedtheTPS2051C,TPS2065C,andTPS2069CDevicesStatusFrom:PreviewTo:Active....................................... 4 • Correctedpinoutnumbersforthe5-PINPACKAGE ............................................................................................................. 5 Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 SLVSAU6H–JUNE2011–REVISEDAPRIL2016 www.ti.com 5 Device Comparison Table MAXIMUM PACKAGEDDEVICEANDMARKING(1) OUTPUT BASEPART OPERATING DISCHARGE ENABLE NUMBER MSOP-8(DGN) SOT23-5 VSSOP-8 CURRENT PowerPAD™ (DBV) (DGK) 0.5 Y Low TPS2041C —(2) PYJI — 0.5 Y High TPS2051C — VBYQ — 1 Y Low TPS2061C PXMI PXLI — 1 Y High TPS2065C VCAQ VCAQ — 1 N High TPS2065C-2 PYRI PYQI — 1.5 Y Low TPS2068C PXNI — — 1.5 Y High TPS2069C VBUQ PYKI — 1.5 N High TPS2069C-2 PYSI — — 2 Y Low TPS2000C BCMS — PXFI 2 Y High TPS2001C VBWQ – PXGI (1) Forthemostcurrentpackagingandorderinginformation,seethePackageOptionAddendumattheendofthisdocument,orseetheTI websiteatwww.ti.com. (2) "–"indicatesthedeviceisnotavailableinthispackage. 6 Pin Configuration and Functions DGNPackage DGKPackage 8-PinMSOP-PowerPAD 8-PinVSSOP TopView TopView GND 1 8 OUT GND 1 8 OUT IN 2 7 OUT IN 2 7 OUT PowerPAD IN 3 6 OUT IN 3 6 OUT EN/EN 4 5 FLT EN/EN 4 5 FLT PinFunctions-8Pins PIN I/O DESCRIPTION NAME NO. EN/EN 4 I Enableinput,logichighturnsonpowerswitch FLT 5 O Active-lowopen-drainoutput,assertedduringovercurrent,orovertemperatureconditions GND 1 — Groundconnection Inputvoltageandpower-switchdrain;connecta0.1-µForgreaterceramiccapacitorfromINto IN 2,3 PWR GNDclosetotheIC OUT 6,7,8 PWR Power-switchoutput,connecttoload InternallyconnectedtoGND.ConnectPADtoGNDplaneasaheatsinkforthebestthermal PowerPAD PowerPAD — performance.PADmaybeleftfloatingifdesired.SeePowerDissipationandJunction (DGNOnly) Temperatureforguidance. 4 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 www.ti.com SLVSAU6H–JUNE2011–REVISEDAPRIL2016 DBVPackage 5-PinSOT-23 TopView OUT 1 5 IN GND 2 FLT 3 4 EN/EN PinFunctions-5Pins PIN I/O DESCRIPTION NAME NO. EN/EN 4 I Enableinput,logichighturnsonpowerswitch FLT 3 O Active-lowopen-drainoutput,assertedduringovercurrent,orovertemperatureconditions GND 2 — Groundconnection Inputvoltageandpower-switchdrain;connecta0.1-µForgreaterceramiccapacitorfromINtoGND IN 5 PWR closetotheIC OUT 1 PWR Power-switchoutput,connecttoload. 7 Specifications 7.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1)(2)(3) MIN MAX UNIT VoltageonIN,OUT,ENorEN,FLT (4) –0.3 6 V VoltagefromINtoOUT –6 6 V Maximumjunctiontemperature,T InternallyLimited J Storagetemperature,T –60 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Absolutemaximumratingsapplyoverrecommendedjunctiontemperaturerange. (3) VoltagesarewithrespecttoGNDunlessotherwisenoted. (4) SeeInputandOutputCapacitance. 7.2 ESD Ratings VALUE UNIT Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±2000 Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) ±500 V Electrostaticdischarge V (ESD) IEC61000-4-2contactdischarge ±8000 IEC61000-4-2air-gapdischarge(3) ±15000 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. (3) V wassurgedonaPCBwithinputandoutputbypassingpertheTypicalApplicationDiagramonthefirstpage(exceptinput OUT capacitorwas22µF)withnodevicefailures. Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 SLVSAU6H–JUNE2011–REVISEDAPRIL2016 www.ti.com 7.3 Recommended Operating Conditions MIN NOM MAX UNIT V Inputvoltage,IN 4.5 5.5 V IN V Inputvoltage,ENorEN 0 5.5 V EN V High-levelinputvoltage,ENorEN 2 V IH V Low-levelinputvoltage,ENorEN 0.7 V IL TPS2041CandTPS2051C 0.5 Continuousoutputcurrent, TPS2061C,TPS2065CandTPS2065C-2 1 IOUT OUT(1) TPS2068C,TPS2069CandTPS2069C-2 1.5 A TPS2000CandTPS2001C 2 T Operatingjunctiontemperature –40 125 °C J I SinkcurrentintoFLT 0 5 mA FLT (1) Somepackageandcurrentratingmayrequestanambienttemperaturederatingof85°C. 7.4 Thermal Information: SOT-23 TPS20xxC,TPS20xxC-2 THERMALMETRIC(1) DBV(SOT-23)(2) DBV(SOT-23)(3) UNIT 5PINS 5PINS R Junction-to-ambientthermalresistance 224.9 220.4 °C/W θJA R Junction-to-case(top)thermalresistance 95.2 89.7 °C/W θJCtop R Junction-to-boardthermalresistance 51.4 46.9 °C/W θJB ψ Junction-to-topcharacterizationparameter 6.6 5.2 °C/W JT ψ Junction-to-boardcharacterizationparameter 50.3 46.2 °C/W JB R Junction-to-case(bottom)thermalresistance — — °C/W θJCbot R Custom SeePowerDIssipationandJunctionTemperature 139.3 134.9 °C/W θJA (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report,SPRA953. (2) Ratedat0.5Aor1A. (3) Ratedat1.5Aor2A. 7.5 Thermal Information: MSOP-PowerPAD TPS20xxC,TPS20xxC-2 DGN DGN THERMALMETRIC(1) Pow(MeSrPOAPD-)(2) Pow(MeSrPOAPD-)(3) (VSDSGOKP)(4) UNIT 8PINS 8PINS 8PINS R Junction-to-ambientthermalresistance 72.1 67.1 205.5 °C/W θJA R Junction-to-case(top)thermalresistance 87.3 80.8 94.3 °C/W θJC(top) R Junction-to-boardthermalresistance 42.2 37.2 126.9 °C/W θJB ψ Junction-to-topcharacterizationparameter 7.3 5.6 24.7 °C/W JT ψ Junction-to-boardcharacterizationparameter 42 36.9 125.2 °C/W JB R Junction-to-case(bottom)thermalresistance 39.2 32.1 — °C/W θJC(bot) R Custom SeePowerDIssipationandJunctionTemperature 66.5 61.3 110.3 °C/W θJA (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report,SPRA953. (2) Ratedat0.5Aor1A. (3) Ratedat1.5Aor2A. (4) Ratedat2A. 6 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 www.ti.com SLVSAU6H–JUNE2011–REVISEDAPRIL2016 7.6 Electrical Characteristics: T = T = 25°C J A Unlessotherwisenoted:V =5V,V =V orV =GND,I =0A.SeeDeviceComparisonTablefortheratedcurrentof IN EN IN EN OUT eachpartnumber.ParametricsoverawideroperationalrangeareshowninElectricalCharacteristics:–40°C≤T ≤125°C(1). J PARAMETER TESTCONDITIONS(1) MIN TYP MAX UNIT POWERSWITCH 0.5-Aratedoutput,25°C DBV 97 110 mΩ 0.5-Aratedoutput, DBV 96 130 mΩ –40°C≤(TJ,TA)≤85°C DBV 96 110 1-Aratedoutput,25°C mΩ DGN 86 100 1-Aratedoutput, DBV 96 130 mΩ –40°C≤(TJ,TA)≤85°C DGN 86 120 RDS(on) Input–outputresistance DBV 76 91 mΩ 1.5-Aratedoutput,25°C DGN 69 84 mΩ 1.5-Aratedoutput, DBV 76 106 mΩ –40°C≤(TJ,TA)≤85°C DGN 69 98 mΩ 2-Aratedoutput,25°C DGN,DGK 72 84 mΩ 2-Aratedoutput,–40°C≤(TJ,TA)≤ DGN,DGK 72 98 mΩ 85°C CURRENTLIMIT 0.5-Aratedoutput TPS20xxC 0.67 0.85 1.01 TPS20xxC 1.3 1.55 1.8 1-Aratedoutput Currentlimit, TPS20xxC-2 1.18 1.53 1.88 IOS(2) SeeFigure6 TPS20xxC 1.7 2.15 2.5 A 1.5-Aratedoutput TPS20xxC-2 1.71 2.23 2.75 2-Aratedoutput TPS20xxC 2.35 2.9 3.4 SUPPLYCURRENT IOUT=0A 0.01 1 ISD Supplycurrent,switchdisabled µA –40°C≤(TJ,TA)≤85°C,VIN=5.5V,IOUT=0A 2 IOUT=0A 60 70 ISE Supplycurrent,switchenabled µA –40°C≤(TJ,TA)≤85°C,VIN=5.5V,IOUT=0A 85 VOUT=0V,VIN=5V,disabled, 0.05 1 measureIVIN Ilkg Leakagecurrent TPS20xxC-2 µA –40°C≤(TJ,TA)≤85°C,VOUT=0V, 2 VIN=5V,disabled,measureIVIN VOUT=5V,VIN=0V,measureIVOUT 0.1 1 IREV Reverseleakagecurrent –40°C≤(TJ,TA)≤85°C,VOUT=5V,VIN=0V,measure 5 µA IVOUT OUTPUTDISCHARGE RPD Outputpulldownresistance(3) VIN=VOUT=5V,disabled TPS20xxC 400 470 600 Ω (1) Pulsedtestingtechniquesmaintainjunctiontemperatureapproximatelyequaltoambienttemperature (2) SeeCurrentLimitsectionforexplanationofthisparameter. (3) Theseparametersareprovidedforreferenceonly,anddonotconstitutepartofTI'spublisheddevicespecificationsforpurposesofTI's productwarranty. Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 SLVSAU6H–JUNE2011–REVISEDAPRIL2016 www.ti.com 7.7 Electrical Characteristics: –40°C ≤ T ≤ 125°C J Unlessotherwisenoted:4.5V≤V ≤5.5V,V =V orV =GND,I =0A,typicalvaluesareat5Vand25°C.See IN EN IN EN OUT DeviceComparisonTablefortheratedcurrentofeachpartnumber. PARAMETER TESTCONDITIONS(1) MIN TYP MAX UNIT POWERSWITCH 0.5-Aratedoutput DBV 97 154 mΩ DBV 96 154 1-Aratedoutput mΩ DGN 86 140 RDS(ON) Input–outputresistance DBV 76 121 mΩ 1.5-Aratedoutput DGN 69 112 mΩ 2-Aratedoutput DGN,DGK 72 112 mΩ ENABLEINPUT(ENorEN) Threshold Inputrising 1 1.45 2 V Hysteresis 0.07 0.13 0.2 V Leakagecurrent (VENorVEN)=0Vor5.5V –1 0 1 µA CURRENTLIMIT 0.5-Aratedoutput TPS20xxC 0.65 0.85 1.05 TPS20xxC 1.2 1.55 1.9 1-Aratedoutput Currentlimit, TPS20xxC-2 1.1 1.53 1.96 IOS(2) SeeFigure23 TPS20xxC 1.6 2.15 2.7 A 1.5-Aratedoutput TPS20xxC-2 1.6 2.23 2.86 2-Aratedoutput TPS20xxC 2.3 2.9 3.6 VIN=5V(seeFigure6), tIOS Short-circuitresponsetime(3) OMneea-shuarlefffurollmloaadpp→licaRtSioHnORtoTw=h5e0nmcΩur,rentfallsbelow120%of 2 µs finalvalue SUPPLYCURRENT ISD Supplycurrent,switchdisabled IOUT=0A 0.01 10 µA ISE Supplycurrent,switchenabled IOUT=0A 65 90 µA Ilkg Leakagecurrent VmOeUaTsu=re0IVVI,NVIN=5V,disabled, TPS20XXC-2 0.05 µA IREV Reverseleakagecurrent VOUT=5.5V,VIN=0V,measureIVOUT 0.2 20 µA UNDERVOLTAGELOCKOUT VUVLO Risingthreshold VIN↑ 3.5 3.75 4 V Hysteresis(3) VIN↓ 0.14 V FLT Outputlowvoltage,FLT IFLT=1mA 0.2 V OFF-stateleakage VFLT=5.5V 1 µA tFLT FLTdeglitch FLTassertionordeassertiondeglitch 6 9 12 ms OUTPUTDISCHARGE VIN=4V,VOUT=5V,disabled TPS20XXC 350 560 1200 RPD Outputpulldownresistance Ω VIN=5V,VOUT=5V,disabled TPS20XXC 300 470 800 THERMALSHUTDOWN Incurrentlimit 135 Risingthreshold(TJ) Notincurrentlimit 155 °C Hysteresis(3) 20 (1) Pulsedtestingtechniquesmaintainjunctiontemperatureapproximatelyequaltoambienttemperature (2) SeeCurrentLimitforexplanationofthisparameter. (3) Theseparametersareprovidedforreferenceonly,anddonotconstitutepartofTI'spublisheddevicespecificationsforpurposesofTI's productwarranty. 8 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 www.ti.com SLVSAU6H–JUNE2011–REVISEDAPRIL2016 7.8 Timing Requirements: T = T = 25°C J A MIN NOM MAX UNIT ENABLEINPUT(ENorEN) V =5V,C =1µF,R =100Ω,EN↑orEN 0.5-Aand1-ARated 1 1.4 1.8 IN L L t Turnontime ↓. ms ON SeeFigure1,Figure3,andFigure4 1.5-Aand2-ARated 1.2 1.7 2.2 V =5V,C =1µF,R =100Ω,EN↓orEN 0.5-Aand1-ARated 1.3 1.65 2 IN L L t Turnofftime ↑. ms OFF SeeFigure1,Figure3,andFigure4 1.5-Aand2-ARated 1.7 2.1 2.5 C =1µF,R =100Ω,V =5V.See 0.5-Aand1-ARated 0.4 0.55 0.7 t Risetime,output L L IN ms R Figure2 1.5-Aand2-ARated 0.5 0.7 1 C =1µF,R =100Ω,V =5V.See 0.5-Aand1-ARated 0.25 0.35 0.45 t Falltime,output L L IN ms F Figure2 1.-5Aand2-ARated 0.3 0.43 0.55 OUT RL CL Figure1. OutputRiseandFallTestLoad 90% t t V R F OUT 10% Figure2. Power-OnandPower-OffTiming VEN 50% 50% t ON t OFF 90% V OUT 10% Figure3. EnableTiming,ActiveHighEnable V /EN 50% 50% t OFF t ON 90% V OUT 10% Figure4. EnableTiming,ActiveLowEnable IOUT 120% x IOS I OS 0A t IOS Figure5. OutputShort-CircuitParameters Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 SLVSAU6H–JUNE2011–REVISEDAPRIL2016 www.ti.com V IN Decreasing Load Slope=-RDS(ON) Resistance T U O V 0V 0A I OUT I OS Figure6. OutputCharacteristicShowingCurrentLimit 10 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 www.ti.com SLVSAU6H–JUNE2011–REVISEDAPRIL2016 7.9 Typical Characteristics 9.3 14 All Versions, 5 V VIN = 5 V 85°C 12 9.2 25°C 10 A) m ms) 9.1 ng ( 8 −40°C t (FLT 9.0 sinkiUT 6 IO 4 125°C 8.9 2 8.8 0 −40 −20 0 20 40 60 80 100 120 140 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Junction Temperature (°C) Output Voltage (V) G019 G020 Figure7.DeglitchPeriod(T vsTemperature Figure8.OutputDischargeCurrentvsOutputVoltage FLT) 3.5 7 2-A Rated VIN = 5 V All Unit Types, 5 V 6 3.0 5 2.5 1.5-A Rated 4 A) µA) (OS 2.0 1-A Rated (EV 3 I R I 2 1.5 0.5-A Rated 1 1.0 0 0.5 −1 −40 −20 0 20 40 60 80 100 120 140 −40 −20 0 20 40 60 80 100 120 140 Junction Temperature (°C) Junction Temperature (°C) G021 G022 Figure9.ShortCircuitCurrent(I )vsTemperature Figure10.ReverseLeakageCurrent(I )vsTemperature OS REV 1.0 1.0 Input Voltage = 5.5 V All Unit Types 0.8 0.8 0.6 0.6 125°C A) A) (µD 0.4 (µD 0.4 S S I I 85°C 0.2 0.2 0.0 0.0 −40°C and 25°C −0.2 −0.2 −40 −20 0 20 40 60 80 100 120 140 4.00 4.25 4.50 4.75 5.00 5.25 5.50 Junction Temperature (°C) Input Voltage (V) G023 G024 Figure11.DisabledSupplyCurrent(I )vsTemperature Figure12.DisabledSupplyCurrent(I )vsInputVoltage SD SD Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 SLVSAU6H–JUNE2011–REVISEDAPRIL2016 www.ti.com Typical Characteristics (continued) 6.0 80 5.5 All unit types, VIN = 0 V All Unit Types, VIN = 5.5 V 5.0 75 4.5 125°C 4.0 70 3.5 I (µA)REV 223...050 I (µA)SE 65 1.5 85°C 25°C −40°C 60 1.0 0.5 55 0.0 −0.5 50 4.00 4.25 4.50 4.75 5.00 5.25 5.50 −40 −20 0 20 40 60 80 100 120 140 Output Voltage (V) Junction Temperature (°C) G025 G026 Figure13.ReverseLeakageCurrent(I )vsOutputVoltage Figure14.EnabledSupplyCurrent(I )vsTemperature REV SE 80 0.475 COUT = 1 µF, RLOAD = 100 W 75 125°C 0.450 85°C 70 0.425 65 I (µA)SE 5650 t (ms)f 00..347050 1.15.-5A-A a nadn d2 -2A-A R Rataetde,d V, VINI N= =5 4V.5 V 50 1.5-A and 2-A Rated, VIN = 5.5 V 25°C 0.350 45 −40°C 0.5-A and 1-A Rated, VIN = 5 V 40 0.325 4.00 4.25 4.50 4.75 5.00 5.25 5.50 −40 −20 0 20 40 60 80 100 120 140 Input Voltage (V) Junction Temperature (°C) G027 G028 Figure15.EnabledSupplyCurrent(I )vsInputVoltage Figure16.OutputFallTime(T )vsTemperature SE F 0.85 140 0.80 COUT = 1 µF, RLOAD = 100 W 1.5 A, 2 A, 5.5 V 130 VIN = 5 V 120 0.5-A, 1-A Rated 0.75 110 ) 100 t (ms)r 00..6750 W (mDSON 8900 R 0.60 0.5 A, 1 A, 5 V 1.5 A, 2 A, 5 V 70 1.5-A, 2-A Rated 1.5 A, 2 A, 4.5 V 60 0.55 50 0.50 40 −40 −20 0 20 40 60 80 100 120 140 −40 −20 0 20 40 60 80 100 120 140 Junction Temperature (°C) Junction Temperature (°C) G029 G030 Figure17.OutputRiseTime(T )vsTemperature Figure18.Input-OutputResistance(R )vsTemperature R DS(ON) 12 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 www.ti.com SLVSAU6H–JUNE2011–REVISEDAPRIL2016 Typical Characteristics (continued) 100 VIN = 5 V, CIN = 730 µF, TPS2065C, IEND = 1.68 A s) µ me ( IOS y Ti 10 er v o c e R 1 0 5 10 15 20 25 IPK (Shorted) (A) G031 Figure19.RecoveryvsCurrentPeak Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 SLVSAU6H–JUNE2011–REVISEDAPRIL2016 www.ti.com 8 Detailed Description 8.1 Overview The TPS20xxC and TPS20xxC-2 are current-limited, power-distribution switches providing a range from 0.5 A and 2 A of continuous load current in 5-V circuits. These parts use N-channel MOSFETs for low resistance, maintaining voltage regulation to the load. They are designed for applications where short circuits or heavy capacitive loads are encountered. Device features include enable, reverse blocking when disabled, output dischargepulldown,overcurrentprotection,overtemperatureprotection,anddeglitchedfaultreporting. 8.2 Functional Block Diagram Current Sense IN CS OUT Charge Current Pump Limit (Disabled+ UVLO) EN or EN Driver FLT UVLO OTSD 9-ms GND Deglitch Thermal Sense Copyright © 2016,Texas Instruments Incorporated Figure20. TPS20xxCBlockDiagram Current Sense IN CS OUT Charge Current Pump Limit EN or EN Driver FLT UVLO OTSD 9-ms GND Deglitch Thermal Sense Copyright © 2016,Texas Instruments Incorporated Figure21. TPS20xxC-2BlockDiagram 8.3 Feature Description 8.3.1 UndervoltageLockout The undervoltage lockout (UVLO) circuit disables the power switch until the input voltage reaches the UVLO turnon threshold. Built-in hysteresis prevents unwanted ON/OFF cycling due to input voltage drop from large currentsurges. FLTishighimpedancewhentheTPS20xxCandTPS20xxC-2areinUVLO. 14 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 www.ti.com SLVSAU6H–JUNE2011–REVISEDAPRIL2016 Feature Description (continued) 8.3.2 Enable The logic enable input (EN, or EN), controls the power switch, bias for the charge pump, driver, and other circuits. The supply current is reduced to less than 1 µA when the TPS20xxC and TPS20xxC-2 are disabled. Disabling the TPS20xxC and TPS20xxC-2 immediately clears an active FLT indication. The enable input is compatiblewithbothTTLandCMOSlogiclevels. The turnon and turnoff times (t , t ) are composed of a delay and a rise or fall time (t , t ). The delay times ON OFF R F are internally controlled. The rise time is controlled by both the TPS20xxC and TPS20xxC-2 and the external loading (especially capacitance). TPS20xxC fall time is controlled by the loading (R and C), and the output discharge (R ). TPS20xxC-2 does not have the output discharge (R ), fall time is controlled by the loading (R PD PD and C). An output load consisting of only a resistor experiences a fall time set by the TPS20xxC and TPS20xxC- 2. An output load with parallel R and C elements experiences a fall time determined by the (R × C) time constant ifitislongerthanthet TPS20xxCandTPS20xxC-2. F Theenablemustnotbeleftopen,andmaybetiedtoVINorGNDdependingonthedevice. 8.3.3 InternalChargePump The device incorporates an internal charge pump and gate drive circuitry necessary to drive the N-channel MOSFET. The charge pump supplies power to the gate driver circuit and provides the necessary voltage to pull thegateoftheMOSFETabovethesource.Thedriverincorporatescircuitrythatcontrolstheriseandfalltimesof the output voltage to limit large current and voltage surges on the input supply, and provides built-in soft-start functionality. The MOSFET power switch blocks current from OUT to IN when turned off by the UVLO or disabled. 8.3.4 CurrentLimit TheTPS20xxCandTPS20xxC-2respondstooverloadsbylimitingoutputcurrenttothestaticI levelsshownin OS Electrical Characteristics: T = T = 25°C. When an overload condition is present, the device maintains a J A constant output current, with the output voltage determined by (I × R ). Two possible overload conditions OS LOAD canoccur.Thefirstoverloadconditionoccurswheneither: 1. inputvoltageisfirstapplied,enableistrue,andashortcircuitispresent(loadwhichdrawsI >I ) OUT OS 2. inputvoltageispresentandtheTPS20xxCandTPS20xxC-2areenabledintoashortcircuit. The output voltage is held near zero potential with respect to ground and the TPS20xxC and TPS20xxC-2 ramps the output current to I . The TPS20xxC and TPS20xxC-2 limits the current to I until the overload condition is OS OS removed or the device begins to thermal cycle. This is demonstrated in Figure 26 where the device was enabled intoashort,andsubsequentlycyclescurrentOFFandONasthethermalprotectionengages. The second condition is when an overload occurs while the device is enabled and fully turned on. The device responds to the overload condition within t (Figure 5 and Figure 6) when the specified overload (see Electrical IOS Characteristics: –40°C ≤ T ≤ 125°C) is applied. The response speed and shape varies with the overload level, J input circuit, and rate of application. The current limit response will vary between simply settling to I , or turnoff OS andcontrolledreturntoI .Similartothepreviouscase,theTPS20xxCandTPS20xxC-2limitsthecurrenttoI OS OS until the overload condition is removed or the device begins to thermal cycle. This is demonstrated by Figure 27, Figure28,andFigure29. The TPS20xxC and TPS20xxC-2 thermal cycles if an overload condition is present long enough to activate thermallimitinginanyoftheabovecases.Thisisduetotherelativelylargepowerdissipation[(V –V )× I ] IN OUT OS driving the junction temperature up. The device turns off when the junction temperature exceeds 135°C (minimum) while in current limit. The device remains off until the junction temperature cools 20°C and then restarts. There are two kinds of current limit profiles typically available in TI switch products that are similar to the TPS20xxC and TPS20xxC-2. Many older designs have an output I vs V characteristic similar to the plot labeled Current Limit with Peaking in Figure 22. This type of limiting can be characterized by two parameters, the current limit corner (I ), and the short circuit current (I ). I is often specified as a maximum value. The TPS20xxC OC OS OC and TPS20xxC-2 family of parts does not present noticeable peaking in the current limit, corresponding to the characteristic labeled Flat Current Limit in Figure 22. This is why the I parameter is not present in Electrical OC Characteristics: –40°C ≤T ≤ 125°C. J Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 SLVSAU6H–JUNE2011–REVISEDAPRIL2016 www.ti.com Feature Description (continued) Current Limit Flat Current with Peaking Limit V V IN Decreasing IN Decreasing Load Load Slope =-R Resistance Slope =-R Resistance DS(ON) DS(ON) T T U U O O V V 0V 0 V 0A I 0A I OUT IOS IOC OUT I OS Figure22. CurrentLimitProfiles 8.3.5 FLT The FLT open-drain output is asserted (active low) during an overload or overtemperature condition. A 9-ms deglitch on both the rising and falling edges avoids false reporting at start-up and during transients. A current limit condition shorter than the deglitch period clears the internal timer upon termination. The deglitch timer does not integrate multiple short overloads and declare a fault. This is also true for exiting from a faulted state. An input voltage with excessive ripple and large output capacitance may interfere with operation of FLT around I OS astherippledrivestheTPS20xxCandTPS20xxC-2inandoutofcurrentlimit. If the TPS20xxC and TPS20xxC-2 are in current limit and the overtemperature circuit goes active, FLT goes true immediately (see Figure 27); however, the exiting this condition is deglitched (see Figure 29). FLT is tripped just asthekneeoftheconstant-currentlimitingisentered.DisablingtheTPS20xxCandTPS20xxC-2clearsanactive FLTassoonastheswitchturnsoff(seeFigure26).FLTishighimpedancewhentheTPS20xxCandTPS20xxC- 2aredisabledorinundervoltagelockout(UVLO). 8.3.6 OutputDischarge A 470-Ω (typical) output discharge dissipates stored charge and leakage current on OUT when the TPS20xxC is in UVLO or disabled. The pulldown circuit loses bias gradually as V decreases, causing a rise in the discharge IN resistance as V falls towards 0 V. The TPS20xxC-2 does not have this function. The output is be controlled by IN anexternalloadingswhenthedeviceisinULVOordisabled. 8.4 Device Functional Modes Therearenootherfunctionalmodes. 16 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 www.ti.com SLVSAU6H–JUNE2011–REVISEDAPRIL2016 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information The TPS20xxC and TPS20xxC-2 current-limited power switch uses N-channel MOSFETs in applications requiring continuous load current. The device enters constant-current mode when the load exceeds the current limitthreshold. 9.2 Typical Application TPS2065CDGN 4.5 V-6.5 V 0.1PF V OUT 1/2IN OUT 6/7/8 R C FAULT OUT Fault Signal 5 FAULT Control 4 EN Signal Power Pad GND 1 Copyright © 2016, Texas Instruments Incorporated Figure23. TypicalApplicationSchematic 9.2.1 DesignRequirements Forthisdesignexample,usethefollowinginputparameters: 1. TheTPS2065CDGNoperatesfroma5-Vto ±0.5-Vinputrail. 2. What is the normal operation current, for example, the maximum allowable current drawn by portable equipment for USB 3.0 port is 900 mA, so the normal operation current is 900 mA, and the minimum current limit of power switch must exceed 900 mA to avoid false trigger during normal operation. For the TPS2065C device,target1-Acontinuousoutputcurrentapplication. 3. What is the maximum allowable current provided by up-stream power, the maximum current limit of power switch that must lower it to ensure power switch can protect the up-stream power when overload is encounteredattheoutputofpowerswitch.FortheTPS2065Cdevice,themaximumI is1.8A. OS 9.2.2 DetailedDesignProcedure Tobeginthedesignprocessafewparametersmustbedecidedupon.Thedesignermustknowthefollowing: 1. Normalinputoperationvoltage 2. Outputcontinuouscurrent 3. Maximumup-streampowersupplyoutputcurrent 9.2.2.1 InputandOutputCapacitance Input and output capacitance improves the performance of the device; the actual capacitance must be optimized for the particular application. For all applications, TI recommends placing a 0.1-µF or greater ceramic bypass capacitorbetweenINandGND,asclosetothedeviceaspossibleforlocalnoisedecoupling. Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 SLVSAU6H–JUNE2011–REVISEDAPRIL2016 www.ti.com Typical Application (continued) All protection circuits such as the TPS20xxC and TPS20xxC-2 has the potential for input voltage overshoots and outputvoltageundershoots. Input voltage overshoots can be caused by either of two effects. The first cause is an abrupt application of input voltage in conjunction with input power bus inductance and input capacitance when the IN terminal is high impedance (before turnon). Theoretically, the peak voltage is 2× the applied. The second cause is due to the abrupt reduction of output short-circuit current when the TPS20xxC and TPS20xxC-2 turns off and energy stored in the input inductance drives the input voltage high. Input voltage droops may also occur with large load steps and as the TPS20xxC and TPS20xxC-2 output is shorted. Applications with large input inductance (for example, connecting the evaluation board to the bench power-supply through long cables) may require large input capacitance reduce the voltage overshoot from exceeding the absolute maximum voltage of the device. The fast current limit speed of the TPS20xxC and TPS20xxC-2 to hard output short circuits isolates the input bus from faults. However, ceramic input capacitance in the range of 1 µF to 22 µF adjacent to the TPS20xxC and TPS20xxC-2 input aids in both speeding the response time and limiting the transient seen on the input power bus.Momentaryinputtransientsto6.5Varepermitted. Output voltage undershoot is caused by the inductance of the output power bus just after a short has occurred and the TPS20xxC and TPS20xxC-2 has abruptly reduced OUT current. Energy stored in the inductance drives the OUT voltage down and potentially negative as it discharges. Applications with large output inductance (such as from a cable) benefit from use of a high-value output capacitor to control the voltage undershoot. When implementing USB standard applications, a 120-µF minimum output capacitance is required. Typically a 150-µF electrolytic capacitor is used, which is sufficient to control voltage undershoots. However, if the application does not require 120 µF of capacitance, and there is potential to drive the output negative, then TI recommends a minimum of 10-µF ceramic capacitance on the output. The voltage undershoot must be controlled to less than 1.5Vfor10µs. 9.2.3 ApplicationCurves 9 2.00 9 2.00 8 VIN = 5 V, COUT = 150 µF, RLOAD = 5 W , TPS2065C 1.75 8 VIN = 5 V, COUT = 150 µF, RLOAD = 100 W , TPS2065C 1.75 Output Current 7 Output Current 1.50 7 1.50 6 FLT 1.25 6 Output Voltage FLT 1.25 mplitude (V) 345 001...570050 Current (A) mplitude (V) 345 EN 001...570050 Current (A) A A 2 EN 0.25 2 0.25 1 0.00 1 0.00 Output Voltage 0 −0.25 0 −0.25 −1 −0.50 −1 −0.50 −2m 0 2m 4m 6m 8m 10m 12m 14m 16m 18m 20m −2m 0 2m 4m 6m 8m 10m 12m 14m 16m 18m 20m Time (s) Time (s) G001 G002 Figure24.TPS2065COutputRise/Fall5Ω Figure25.TPS2065COutputRise/Fall100Ω 18 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 www.ti.com SLVSAU6H–JUNE2011–REVISEDAPRIL2016 Typical Application (continued) 9 2.00 9 2.00 8 VIN = 5 V, COUT = 150 µF, RLOAD = 0 W , TPS2065C 1.75 8 VIN = 5 V, COUT = 150 µF, RLOAD = 50 mW , TPS2065C 1.80 7 1.50 7 Output Current 1.50 EN 6 1.25 6 1.20 mplitude (V) 345 Output Current FLT 001...570050 Current (A) mplitude (V) 345 FLT 001...570050 Current (A) A EN A 2 0.25 2 0.25 Output Voltage 1 0.00 1 0.00 0 −0.25 0 −0.25 Output Voltage −1 −0.50 −1 −0.50 −2m 0 2m 4m 6m 8m 10m 12m 14m 16m 18m −2.5m 2.5m 7.5m 12.5m 17.5m 22.5m25m Time (s) Time (s) G003 G004 Figure26.TPS2065CEnableintoOutputShort Figure27.TPS2065CPulsedShortApplied 10 26 6 30 9 VIN = 5 V, COUT = 0 µF, TPS2065C 24 VIN = 5 V, COUT = 0 µF, RLOAD = 50 mW , TPS2065C 8 22 5 25 Input Voltage 7 20 6 18 V) 4 IOUT 20 A) Voltage (V) 2345 Output Voltage 11110246 Current (A) put Voltage ( 23 VOUT 1105 put Current ( 1 8 Out 1 5 Out 0 6 −1 Output Current 4 0 0 −2 2 −3 0 −1 −5 −1u 0 1u 2u 3u 4u −1u 0 1u 2u 3u 4u Time (s) Time (s) G005 G006 Figure28.TPS2065CShortApplied Figure29.TPS2065CPulsed1.45-ALoad 6 2.5 9 2.00 5 VRILNO =AD 5 = V 5, 0 C mOUW T, = T 0P µSF2,065C 2.0 8 VIN = 5 V, COUT = 150 µF, RLOAD = 7.5W , TPS2065C 1.75 7 1.50 Output Voltage V) 4 1.5 A) 6 1.25 Output Voltage ( 123 IOUT VOUT 001...050 Output Current ( Amplitude (V) 2345 EN, VIN FLT 0001....25705050 Current (A) 1 Output Current 0.00 0 −0.5 0 −0.25 −1 −1.0 −1 −0.50 −100u 0 100u 200u 300u 400u 500u 600u −5m −4m −3m −2m −1m 0 1m 2m 3m 4m 5m Time (s) Time (s) G007 G008 Figure30.TPS2065C50-mΩShortCircuit Figure31.TPS2065CPowerUp–Enabled Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 SLVSAU6H–JUNE2011–REVISEDAPRIL2016 www.ti.com Typical Application (continued) 9 2.00 9 3.2 8 VIN = 5 V, COUT = 150 µF, RLOAD = 7.5W , TPS2065C 1.75 VIN = 5 V, COUT = 150 µF, RLOAD = 2.5 W , TPS2001C 2.8 7 1.50 7 Output Current 2.4 6 1.25 FLT 2.0 mplitude (V) 345 FLT EN, VIN 001...570050 Current (A) mplitude (V) 35 011...826 Current (A) A A 2 Output Current 0.25 EN 0.4 1 0.00 1 0.0 Output Voltage 0 −0.25 −0.4 Output Voltage −1 −0.50 −1 −0.8 −40m −30m −20m −10m 0 10m 20m 30m 40m −2m 0 2m 4m 6m 8m 10m 12m 14m 16m 18m Time (s) Time (s) G009 G010 Figure32.TPS2065CPowerDown–Enabled Figure33.TPS2001CTurnoninto2.5Ω 9 3.6 9 3.6 8 VIN = 5 V, COUT = 150 µF, RLOAD = 50 mW , TPS2001C 3.2 8 VIN = 5 V, COUT = 150 µF, RLOAD = 50mW , TPS2001C 3.2 7 Output Current 2.8 7 Output Current 2.8 6 2.4 6 EN 2.4 mplitude (V) 345 EN FLT 112...260 Current (A) mplitude (V) 345 Output Voltage 112...260 Current (A) A 2 Output Voltage 0.8 A 2 0.8 1 0.4 1 FLT 0.4 0 0.0 0 0.0 −1 −0.4 −1 −0.4 −2m 0 2m 4m 6m 8m 10m 12m 14m 16m 18m −2.5m 0 2.5m 5m 7.5m 10m12.5m15m17.5m20m22.5m Time (s) Time (s) G011 G012 Figure34.TPS2001CEnableintoShort Figure35.TPS2001CPulsedOutputShort 9 1.4 9 1.6 8 VIN = 5 V, COUT = 150 µF, RLOAD = 10 W , TPS2051C 1.2 8 VIN = 5 V, COUT = 150 µF, RLOAD = 50 mW , TPS2051C 1.4 Output Current 7 1.0 7 1.2 Output Voltage Output Current 6 0.8 6 1.0 mplitude (V) 345 FLT 000...246 Current (A) mplitude (V) 345 000...468 Current (A) A A EN 2 0.0 2 0.2 Output Voltage 1 EN −0.2 1 FLT 0.0 0 −0.4 0 −0.2 −1 −0.6 −1 −0.4 −2m 0 2m 4m 6m 8m 10m 12m 14m 16m 18m −2m 0 2m 4m 6m 8m 10m 12m 14m 16m 18m Time (s) Time (s) G013 G014 Figure36.TPS2051CTurnoninto10Ω Figure37.TPS2051CEnableintoShort 20 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 www.ti.com SLVSAU6H–JUNE2011–REVISEDAPRIL2016 Typical Application (continued) 9 1.4 12 2.5 8 VIN = 5 V, COUT = 150 µF, RLOAD = 50mW , TPS2051C 1.2 VIN = 5 V, COUT = 150 µF, RLOAD = 3.3 W , TPS2069C 10 2.0 7 Output Current 1.0 6 0.8 8 1.5 mplitude (V) 345 EN 000...246 Current (A) mplitude (V) 46 EN Output Current 01..50 Current (A) A A 2 FLT 0.0 2 0.0 1 Output Voltage −0.2 FLT Output Voltage 0 −0.5 0 −0.4 −1 −0.6 −2 −1.0 −2.5m 0 2.5m 5m 7.5m 10m12.5m15m17.5m20m22.5m −4m −2m 0 2m 4m 6m 8m 10m 12m 14m 16m Time (s) Time (s) G015 G016 Figure38.TPS2051CPulsedOutputShort Figure39.TPS2069CTurnoninto3.3Ω 10 3.0 10 3.0 VIN = 5 V, COUT = 150 µF, RLOAD = 50 mW , TPS2069C VIN = 5 V, COUT = 150 µF, RLOAD = 50 mW , TPS2069C 8 2.5 8 2.5 EN Output EN Current 6 2.0 6 2.0 mplitude (V) 24 FLT 11..05 Current (A) mplitude (V) 24 Output Current 11..05 Current (A) A A 0 0.5 0 0.5 −2 0.0 −2 0.0 Output Voltage Output Voltage FLT −4 −0.5 −4 −0.5 −2m 0 2m 4m 6m 8m 10m 12m 14m 16m 18m −12.5m −7.5m −2.5m 2.5m 7.5m 12.5m Time (s) Time (s) G017 G018 Figure40.TPS2069CEnableintoShort Figure41.TPS2069CPulsedOutputShort 10 Power Supply Recommendations Design of the devices is for operation from an input voltage supply range of 4.5 V to 5.5 V. The current capability ofthepowersupplyshouldexceedthemaximumcurrentlimitofthepowerswitch. Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 SLVSAU6H–JUNE2011–REVISEDAPRIL2016 www.ti.com 11 Layout 11.1 Layout Guidelines 1. Place the 100-nF bypass capacitor near the IN and GND pins, and make the connections using a low inductancetrace. 2. Place at least 10-µF low ESR ceramic capacitor near the OUT and GND pins, and make the connections usingalowinductancetrace. 3. ThePowerPADmustbedirectlyconnectedtoPCBgroundplaneusingwideandshortcoppertrace. 11.2 Layout Example Via to Bottom Layer Signal Ground Plane Via to Bottom Layer Signal 1 8 2 7 3 6 4 5 Figure42. RecommendedLayout 11.3 Power Dissipation and Junction Temperature It is good design practice to estimate power dissipation and maximum expected junction temperature of the TPS20xxC and TPS20xxC-2. The system designer can control choices of package, proximity to other power dissipating devices, and printed-circuit board (PCB) design based on these calculations. These have a direct influence on maximum junction temperature. Other factors, such as airflow and maximum ambient temperature, areoftendeterminedbysystemconsiderations.Itisimportanttorememberthatthesecalculationsdonotinclude theeffectsofadjacentheatsources,andenhancedorrestrictedairflow. Addition of extra PCB copper area around these devices is recommended to reduce the thermal impedance and maintain the junction temperature as low as practical. The lower junction temperatures achieved by soldering the padimprovetheefficiencyandreliabilityofbothTPS20xxCandTPS20xxC-2partsandthesystem.Thefollowing examples were used to determine the θ Custom thermal impedances noted in Thermal Information: SOT-23 JA and Thermal Information: MSOP-PowerPAD. They were based on use of the JEDEC high-k circuit board construction(2signaland2plane)with4,1-oz.copperweight,layers. WhileTIrecommendsthattheDGNpackagePADbesolderedtocircuitboardcopperfillandviasforlowthermal impedance, there may be cases where this is not desired. For example, use of routing area under the IC. Some devicesareavailableinpackageswithoutthePowerPad(DGK)specificallyforthispurpose.The θ fortheDGN JA package with the pad not soldered and no extra copper, is approximately 141°C/W for 0.5-A and 1-A rated parts, and139°C/Wforthe1.5-Aand2-Aratedparts.The θ fortheDGKmountedperFigure45is110.3°C/W.These JA valuesmaybeusedinEquation1todeterminethemaximumjunctiontemperature. 22 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 www.ti.com SLVSAU6H–JUNE2011–REVISEDAPRIL2016 Power Dissipation and Junction Temperature (continued) GND:0.052in2Total &3 x0.018in vias C OUT 0.050in trace C IN 4 x0.01in vias V :0.00925in2 V : 0.041in2total IN OUT & 3 x0.018in vias Figure43. DBVPackagePCBLayoutExample GND:0.056in2totalarea & 3x 0.018invias C OUT 0.050intrace C IN V : 0.048in2totalarea V : 0.0145in2area OUT IN & 2 x0.018invias 5x 0.01invias Figure44. DGNPackagePCBLayoutExample 0.100x0.175 &5 18mil vias 0.08x0.250 0.185x0.045 0.15x0.15 &3 18mil vias 50mil trace 0.100x0.060 &3 18mil vias to inner plane2 0.07x 0.08 10mil trace 10 mil trace Figure45. DGKPackagePCBLayoutExample As shown in Equation 1, the following procedure requires iteration because power loss is due to the internal MOSFET I2 × R , and R is a function of the junction temperature. As an initial estimate, use the DS(ON) DS(ON) R at 125°C from the Typical Characteristics, and the preferred package thermal resistance for the preferred DS(ON) boardconstructionfromtheThermalInformation:SOT-23table. Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 SLVSAU6H–JUNE2011–REVISEDAPRIL2016 www.ti.com Power Dissipation and Junction Temperature (continued) T =T +((I 2×R )×θ ) J A OUT DS(ON) JA where • I =ratedOUTpincurrent(A) OUT • R =PowerswitchON-resistanceatanassumedT (Ω) DS(ON) J • T =Maximumambienttemperature(°C) A • T =Maximumjunctiontemperature(°C) J • θ =Thermalresistance(°C/W) (1) JA If the calculated T is substantially different from the original assumption, estimate a new value of R using J DS(ON) thetypicalcharacteristicplotandrecalculate. IftheresultingT isnotlessthan125°C,tryaPCBconstructionorapackagewithlower θ . J JA 24 SubmitDocumentationFeedback Copyright©2011–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 www.ti.com SLVSAU6H–JUNE2011–REVISEDAPRIL2016 12 Device and Documentation Support 12.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources,toolsandsoftware,andquickaccesstosampleorbuy. Table1.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER SAMPLE&BUY DOCUMENTS SOFTWARE COMMUNITY TPS2000C Clickhere Clickhere Clickhere Clickhere Clickhere TPS2001C Clickhere Clickhere Clickhere Clickhere Clickhere TPS2041C Clickhere Clickhere Clickhere Clickhere Clickhere TPS2051C Clickhere Clickhere Clickhere Clickhere Clickhere TPS2061C Clickhere Clickhere Clickhere Clickhere Clickhere TPS2065C Clickhere Clickhere Clickhere Clickhere Clickhere TPS2065C-2 Clickhere Clickhere Clickhere Clickhere Clickhere TPS2068C Clickhere Clickhere Clickhere Clickhere Clickhere TPS2069C Clickhere Clickhere Clickhere Clickhere Clickhere TPS2069C-2 Clickhere Clickhere Clickhere Clickhere Clickhere 12.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.3 Trademarks PowerPAD,E2EaretrademarksofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.4 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 12.5 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©2011–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLinks:TPS2000C TPS2001C TPS2041C TPS2051C TPS2061CTPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) 905X0205100 ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 VBYQ & no Sb/Br) TPS2000CDGK ACTIVE VSSOP DGK 8 80 Green (RoHS NIPDAUAG Level-2-260C-1 YEAR -40 to 85 PXFI & no Sb/Br) TPS2000CDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS NIPDAUAG Level-2-260C-1 YEAR -40 to 85 PXFI & no Sb/Br) TPS2000CDGN ACTIVE HVSSOP DGN 8 80 Green (RoHS NIPDAU | NIPDAUAG Level-2-260C-1 YEAR -40 to 85 BCMS & no Sb/Br) TPS2000CDGNR ACTIVE HVSSOP DGN 8 2500 Green (RoHS NIPDAU | NIPDAUAG Level-2-260C-1 YEAR -40 to 85 BCMS & no Sb/Br) TPS2001CDGK ACTIVE VSSOP DGK 8 80 Green (RoHS NIPDAUAG Level-2-260C-1 YEAR -40 to 85 PXGI & no Sb/Br) TPS2001CDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS NIPDAUAG Level-2-260C-1 YEAR -40 to 85 PXGI & no Sb/Br) TPS2001CDGN ACTIVE HVSSOP DGN 8 80 Green (RoHS NIPDAU | NIPDAUAG Level-2-260C-1 YEAR -40 to 85 VBWQ & no Sb/Br) TPS2001CDGNR ACTIVE HVSSOP DGN 8 2500 Green (RoHS NIPDAU | NIPDAUAG Level-2-260C-1 YEAR -40 to 85 VBWQ & no Sb/Br) TPS2041CDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 PYJI & no Sb/Br) TPS2041CDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 PYJI & no Sb/Br) TPS2051CDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 VBYQ & no Sb/Br) TPS2051CDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 VBYQ & no Sb/Br) TPS2061CDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 PXLI & no Sb/Br) TPS2061CDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 PXLI & no Sb/Br) TPS2061CDGN ACTIVE HVSSOP DGN 8 80 Green (RoHS NIPDAUAG Level-2-260C-1 YEAR -40 to 85 PXMI & no Sb/Br) TPS2061CDGNR ACTIVE HVSSOP DGN 8 2500 Green (RoHS NIPDAUAG Level-2-260C-1 YEAR -40 to 85 PXMI & no Sb/Br) Addendum-Page 1
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS2065CDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 VCAQ & no Sb/Br) TPS2065CDBVR-2 ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 PYQI & no Sb/Br) TPS2065CDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 VCAQ & no Sb/Br) TPS2065CDBVT-2 ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 PYQI & no Sb/Br) TPS2065CDGN ACTIVE HVSSOP DGN 8 80 Green (RoHS NIPDAU | NIPDAUAG Level-2-260C-1 YEAR -40 to 85 VCAQ & no Sb/Br) TPS2065CDGN-2 ACTIVE HVSSOP DGN 8 80 Green (RoHS NIPDAUAG Level-2-260C-1 YEAR -40 to 85 PYRI & no Sb/Br) TPS2065CDGNR ACTIVE HVSSOP DGN 8 2500 Green (RoHS NIPDAU | NIPDAUAG Level-2-260C-1 YEAR -40 to 85 VCAQ & no Sb/Br) TPS2065CDGNR-2 ACTIVE HVSSOP DGN 8 2500 Green (RoHS NIPDAUAG Level-2-260C-1 YEAR -40 to 85 PYRI & no Sb/Br) TPS2068CDGN ACTIVE HVSSOP DGN 8 80 Green (RoHS NIPDAUAG Level-2-260C-1 YEAR -40 to 85 PXNI & no Sb/Br) TPS2068CDGNR ACTIVE HVSSOP DGN 8 2500 Green (RoHS NIPDAUAG Level-2-260C-1 YEAR -40 to 85 PXNI & no Sb/Br) TPS2069CDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 PYKI & no Sb/Br) TPS2069CDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 PYKI & no Sb/Br) TPS2069CDGN ACTIVE HVSSOP DGN 8 80 Green (RoHS NIPDAU | NIPDAUAG Level-2-260C-1 YEAR -40 to 85 VBUQ & no Sb/Br) TPS2069CDGN-2 ACTIVE HVSSOP DGN 8 80 Green (RoHS NIPDAUAG Level-2-260C-1 YEAR -40 to 85 PYSI & no Sb/Br) TPS2069CDGNR ACTIVE HVSSOP DGN 8 2500 Green (RoHS NIPDAU | NIPDAUAG Level-2-260C-1 YEAR -40 to 85 VBUQ & no Sb/Br) TPS2069CDGNR-2 ACTIVE HVSSOP DGN 8 2500 Green (RoHS NIPDAUAG Level-2-260C-1 YEAR -40 to 85 PYSI & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. Addendum-Page 2
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3
PACKAGE MATERIALS INFORMATION www.ti.com 17-Jul-2020 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS2000CDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPS2000CDGNR HVSSOP DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPS2001CDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPS2001CDGNR HVSSOP DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPS2041CDBVR SOT-23 DBV 5 3000 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS2041CDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS2041CDBVT SOT-23 DBV 5 250 178.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TPS2041CDBVT SOT-23 DBV 5 250 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS2051CDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS2051CDBVR SOT-23 DBV 5 3000 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS2051CDBVT SOT-23 DBV 5 250 178.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TPS2051CDBVT SOT-23 DBV 5 250 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS2061CDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS2061CDBVR SOT-23 DBV 5 3000 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS2061CDBVT SOT-23 DBV 5 250 178.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TPS2061CDBVT SOT-23 DBV 5 250 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS2061CDGNR HVSSOP DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPS2065CDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 PackMaterials-Page1
PACKAGE MATERIALS INFORMATION www.ti.com 17-Jul-2020 Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS2065CDBVR-2 SOT-23 DBV 5 3000 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS2065CDBVR-2 SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS2065CDBVT SOT-23 DBV 5 250 178.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TPS2065CDBVT-2 SOT-23 DBV 5 250 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS2065CDBVT-2 SOT-23 DBV 5 250 178.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TPS2065CDGNR HVSSOP DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPS2065CDGNR-2 HVSSOP DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPS2068CDGNR HVSSOP DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPS2069CDBVR SOT-23 DBV 5 3000 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS2069CDBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 TPS2069CDBVT SOT-23 DBV 5 250 178.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TPS2069CDBVT SOT-23 DBV 5 250 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS2069CDGNR HVSSOP DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPS2069CDGNR-2 HVSSOP DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS2000CDGKR VSSOP DGK 8 2500 366.0 364.0 50.0 TPS2000CDGNR HVSSOP DGN 8 2500 360.0 162.0 98.0 TPS2001CDGKR VSSOP DGK 8 2500 366.0 364.0 50.0 PackMaterials-Page2
PACKAGE MATERIALS INFORMATION www.ti.com 17-Jul-2020 Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS2001CDGNR HVSSOP DGN 8 2500 360.0 162.0 98.0 TPS2041CDBVR SOT-23 DBV 5 3000 210.0 185.0 35.0 TPS2041CDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS2041CDBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS2041CDBVT SOT-23 DBV 5 250 210.0 185.0 35.0 TPS2051CDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS2051CDBVR SOT-23 DBV 5 3000 210.0 185.0 35.0 TPS2051CDBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS2051CDBVT SOT-23 DBV 5 250 210.0 185.0 35.0 TPS2061CDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS2061CDBVR SOT-23 DBV 5 3000 210.0 185.0 35.0 TPS2061CDBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS2061CDBVT SOT-23 DBV 5 250 210.0 185.0 35.0 TPS2061CDGNR HVSSOP DGN 8 2500 366.0 364.0 50.0 TPS2065CDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS2065CDBVR-2 SOT-23 DBV 5 3000 210.0 185.0 35.0 TPS2065CDBVR-2 SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS2065CDBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS2065CDBVT-2 SOT-23 DBV 5 250 210.0 185.0 35.0 TPS2065CDBVT-2 SOT-23 DBV 5 250 180.0 180.0 18.0 TPS2065CDGNR HVSSOP DGN 8 2500 360.0 162.0 98.0 TPS2065CDGNR-2 HVSSOP DGN 8 2500 366.0 364.0 50.0 TPS2068CDGNR HVSSOP DGN 8 2500 366.0 364.0 50.0 TPS2069CDBVR SOT-23 DBV 5 3000 210.0 185.0 35.0 TPS2069CDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS2069CDBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS2069CDBVT SOT-23 DBV 5 250 210.0 185.0 35.0 TPS2069CDGNR HVSSOP DGN 8 2500 366.0 364.0 50.0 TPS2069CDGNR-2 HVSSOP DGN 8 2500 366.0 364.0 50.0 PackMaterials-Page3
PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 1.45 B A 0.90 PIN 1 INDEX AREA 1 5 2X 0.95 3.05 2.75 1.9 1.9 2 4 3 0.5 5X 0.3 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com
EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com
EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM 2 (1.9) 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com
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PACKAGE OUTLINE DGN0008C HVSSOP - 1.1 mm max height SCALE 4.000 SMALL OUTLINE PACKAGE C 5.05 A 4.75 TYP 0.1 C PIN 1 INDEX AREA SEATING PLANE 6X 0.65 8 1 2X 3.1 1.95 2.9 NOTE 3 4 5 0.37 8X 0.26 0.1 C A B 3.1 B 2.9 NOTE 4 0.23 0.13 SEE DETAIL A EXPOSED THERMAL PAD 4 5 0.25 GAGE PLANE 1.92 1.66 9 1.1 MAX 8 1 0.15 0.7 0 -8 0.05 0.4 DETA 20AIL A 1.60 TYPICAL 1.34 4218838/A 11/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-187. www.ti.com
EXAMPLE BOARD LAYOUT DGN0008C HVSSOP - 1.1 mm max height SMALL OUTLINE PACKAGE (2) NOTE 9 METAL COVERED BY SOLDER MASK (1.6) SYMM SOLDER MASK DEFINED PAD 8X (1.4) (R0.05) TYP 8 8X (0.45) 1 (3) 9 SYMM NOTE 9 (1.92) (1.1) 6X (0.65) 4 5 ( 0.2) TYP VIA (0.55) SEE DETAILS (4.4) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 15X SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDE15.000R MASK DETAILS 4218838/A 11/2017 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 8. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. 9. Size of metal pad may vary due to creepage requirement. www.ti.com
EXAMPLE STENCIL DESIGN DGN0008C HVSSOP - 1.1 mm max height SMALL OUTLINE PACKAGE (1.6) BASED ON 0.125 THICK STENCIL SYMM 8X (1.4) (R0.05) TYP 8 8X (0.45) 1 (1.92) SYMM BASED ON 0.125 THICK STENCIL 6X (0.65) 4 5 METAL COVERED SEE TABLE FOR BY SOLDER MASK DIFFERENT OPENINGS (4.4) FOR OTHER STENCIL THICKNESSES SOLDER PASTE EXAMPLE EXPOSED PAD 9: 100% PRINTED SOLDER COVERAGE BY AREA SCALE: 15X STENCIL SOLDER STENCIL THICKNESS OPENING 0.1 1.79 X 2.15 0.125 1.60 X 1.92 (SHOWN) 0.15 1.46 X 1.75 0.175 1.35 X 1.62 4218838/A 11/2017 NOTES: (continued) 10. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 11. Board assembly site may have different recommendations for stencil design. www.ti.com
PACKAGE OUTLINE DGN0008G PowerPAD TM VSSOP - 1.1 mm max height SCALE 4.000 SMALL OUTLINE PACKAGE C 5.05 A 4.75 TYP 0.1 C PIN 1 INDEX AREA SEATING PLANE 6X 0.65 8 1 2X 3.1 1.95 2.9 NOTE 3 4 5 0.38 8X 0.25 B 3.1 0.13 C A B 2.9 NOTE 4 0.23 0.13 SEE DETAIL A EXPOSED THERMAL PAD 4 5 0.25 GAGE PLANE 2.15 1.95 9 1.1 MAX 8 1 0.7 0.15 0 -8 0.05 0.4 DETA 20AIL A 1.846 TYPICAL 1.646 4225480/A 11/2019 PowerPAD is a trademark of Texas Instruments. NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-187. www.ti.com
EXAMPLE BOARD LAYOUT DGN0008G PowerPAD TM VSSOP - 1.1 mm max height SMALL OUTLINE PACKAGE (2) NOTE 9 METAL COVERED BY SOLDER MASK (1.846) SYMM SOLDER MASK DEFINED PAD 8X (1.4) (R0.05) TYP 8 8X (0.45) 1 (3) 9 SYMM NOTE 9 (2.15) 6X (0.65) (1.22) 5 4 ( 0.2) TYP VIA (0.55) SEE DETAILS (4.4) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 15X SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDE15.000R MASK DETAILS 4225480/A 11/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 8. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. 9. Size of metal pad may vary due to creepage requirement. www.ti.com
EXAMPLE STENCIL DESIGN DGN0008G PowerPAD TM VSSOP - 1.1 mm max height SMALL OUTLINE PACKAGE (1.846) BASED ON 0.125 THICK STENCIL SYMM 8X (1.4) (R0.05) TYP 8 8X (0.45) 1 (2.15) SYMM BASED ON 0.125 THICK STENCIL 6X (0.65) 4 5 METAL COVERED SEE TABLE FOR BY SOLDER MASK DIFFERENT OPENINGS (4.4) FOR OTHER STENCIL THICKNESSES SOLDER PASTE EXAMPLE EXPOSED PAD 9: 100% PRINTED SOLDER COVERAGE BY AREA SCALE: 15X STENCIL SOLDER STENCIL THICKNESS OPENING 0.1 2.06 X 2.40 0.125 1.846 X 2.15 (SHOWN) 0.15 1.69 X 1.96 0.175 1.56 X 1.82 4225480/A 11/2019 NOTES: (continued) 10. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 11. Board assembly site may have different recommendations for stencil design. www.ti.com
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