TPS2010A, TPS2011A TPS2012A, TPS2013A www.ti.com SLVS189C–DECEMBER1998–REVISEDSEPTEMBER2007 POWER-DISTRIBUTION SWITCHES FEATURES 1 • 33-mΩ(5-VInput)High-SideMOSFETSwitch • Short-CircuitandThermalProtection • OperatingRange...2.7Vto5.5V • Logic-LevelEnableInput • TypicalRiseTime...6.1ms • UndervoltageLockout • MaximumStandbySupplyCurrent...10μA • NoDrain-SourceBack-GateDiode • Availablein8-pinSOICand14-PinTSSOP Packages • AmbientTemperatureRange,–40(cid:176) Cto85(cid:176) C • 2-kVHuman-Body-Model,200-V Machine-ModelESDProtection DESCRIPTION The TPS201xA family of power distribution switches is intended for applications where heavy capacitive loads and short circuits are likely to be encountered. These devices are 50-mΩ N-channel MOSFET high-side power switches. The switch is controlled by a logic enable compatible with 5-V logic and 3-V logic. Gate drive is provided by an internal charge pump designed to control the power-switch rise times and fall times to minimize current surges during switching. The charge pump requires no external components and allows operation from suppliesaslowas2.7V. When the output load exceeds the current-limit threshold or a short is present, the TPS201xA limits the output current to a safe level by switching into a constant-current mode. When continuous heavy overloads and short circuits increase the power dissipation in the switch, causing the junction temperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from a thermal shutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures the switch remains off until valid input voltage is present. TPS201xA 0.2A- 2A TPS2014 600 mA TPS202x 0.2A- 2A TPS2015 1A TPS203x 0.2A- 2A TPS2041B 500 mA TPS2051B 500 mA TPS2045A 250 mA TPS2049 100 mA TPS2055A 250 mA TPS2061 1A TPS2065 1A TPS2068 1.5A TPS2069 1.5A 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsof TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©1998–2007,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

TPS2010A, TPS2011A TPS2012A, TPS2013A www.ti.com SLVS189C–DECEMBER1998–REVISEDSEPTEMBER2007 Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. DESCRIPTION (CONTINUED) The TPS201xA devices differ only in short-circuit current threshold. The TPS2010A limits at 0.3-A load, the TPS2011 at 0.9-A load, the TPS2012A at 1.5-A load, and the TPS2013A at 2.2-A load (see Available Options). The TPS201xA is available in an 8-pin small-outline integrated-circuit (SOIC) package and in a 14-pin thin-shrink small-outlinepackage(TSSOP)andoperatesoverajunctiontemperaturerangeof-40(cid:176) Cto125(cid:176) C.) AVAILABLEOPTIONS RECOMMENDED PACKAGEDDEVICES(1) TYPICALSHORT-CIRCUIT T ENABLE MAXIMUMCONTINUOUS CURRENTLIMITAT25(cid:176) C SMALLOUTLINE TSSOP A LOADCURRENT (A) (D)(2) (PWP)(3) (A) 0.2 0.3 TPS2010AD TPS2010APWPR 0.6 0.9 TPS2011AD TPS2011APWPR –40(cid:176) Cto85(cid:176) C Activelow 1 1.5 TPS2012AD TPS2012APWPR 1.5 2.2 TPS2013AD TPS2013APWPR (1) Forthemostcurrentpackageandorderinginformation,seethePackageOptionAddendumattheendofthisdocument,orseetheTI websiteatwww.ti.com. (2) TheDpackageisavailabletapedandreeled.AddanRsuffixtodevicetype(e.g.,TPS2010DR) (3) ThePWPpackageisonlyavailableleft-endtaped-and-reeled. TPS201xA FUNCTIONAL BLOCK DIAGRAM TERMINALFUNCTIONS TERMINAL NO. I/O DESCRIPTION NAME D PWP EN 4 7 I Enableinput.Logiclowturnsonpowerswitch. GND 1 1 I Ground IN 2,3 2–6 I Inputvoltage OUT 5–8 8–14 O Power-switchoutput 2 SubmitDocumentationFeedback Copyright©1998–2007,TexasInstrumentsIncorporated ProductFolderLink(s):TPS2010A,TPS2011ATPS2012A,TPS2013A

TPS2010A, TPS2011A TPS2012A, TPS2013A www.ti.com SLVS189C–DECEMBER1998–REVISEDSEPTEMBER2007 DETAILED DESCRIPTION POWER SWITCH The power switch is an N-channel MOSFET with a maximum on-state resistance of 50 mΩ (V = 5V). I(IN) Configured as a high-side switch, the power switch prevents current flow from OUT to IN and IN to OUT when disabled. CHARGE PUMP An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requires verylittlesupplycurrent. DRIVER The driver controls the gate voltage of the power switch. To limit large current surges and reduce the associated electromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and fall timesoftheoutputvoltage.Theriseandfalltimesaretypicallyinthe2-msto9-msrange. ENABLE (EN) Thelogicenabledisablesthepowerswitch,thebiasforthechargepump,driver,andothercircuitrytoreduce the supply current to less than 10 μA when a logic high is present on EN . A logic zero input on EN restores bias to the drive and control circuits and turns the power on. The enable input is compatible with both TTL and CMOS logiclevels. CURRENT SENSE A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry sends a control signal to the driver. The driver, in turn, reduces the gate voltage and drives the power FET into itssaturationregion,whichswitchestheoutput into a constant current mode and holds the current constant while varyingthevoltageontheload. THERMAL SENSE An internal thermal-sense circuit shuts off the power switch when the junction temperature rises to approximately 140(cid:176) C. Hysteresis is built into the thermal sense circuit. After the device has cooled approximately 20(cid:176) C, the switchturnsbackon.Theswitchcontinuestocycleoffandonuntilthefaultisremoved. UNDERVOLTAGE LOCKOUT A voltage sense circuit monitors the input voltage. When the input voltage is below approximately 2 V, a control signalturnsoffthepowerswitch. Copyright©1998–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLink(s):TPS2010A,TPS2011ATPS2012A,TPS2013A

TPS2010A, TPS2011A TPS2012A, TPS2013A www.ti.com SLVS189C–DECEMBER1998–REVISEDSEPTEMBER2007 ABSOLUTE MAXIMUM RATINGS overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) VALUE UNIT V Inputvoltagerange(2) –0.3to6 V I(IN) V Outputvoltagerange(2) –0.3toV +0.3 V O(OUT) I(IN) V Inputvoltagerange –0.3to6 V I(EN) I Continuousoutputcurrent InternallyLimited O(OUT) Continuoustotalpowerdissipation SeeDissipationRatingTable T Operatingvirtualjunctiontemperaturerange –40to125 (cid:176) C J T Storagetemperaturerange –65to150 (cid:176) C stg Leadtemperaturesoldering1,6mm(1/16inch)fromcasefor10seconds 260 (cid:176) C Humanbodymodel 2 kV ESD Electrostaticdischargeprotection Machinemodel 200 V (1) Stressesbeyondthoselistedunderabsolutemaximumratingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderrecommendedoperating conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) AllvoltagesarewithrespecttoGND. DISSIPATION RATINGS T ≤25(cid:176) C DERATINGFACTOR T =70(cid:176) C T =85(cid:176) C PACKAGE POWAERRATING ABOVET =25(cid:176) C POWAERRATING POWAERRATING A D 725mW 5.8mW/(cid:176) C 464mW 377mW PWP 700mW 5.6mW/(cid:176) C 448mW 364mW RECOMMENDED OPERATING CONDITIONS overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V 2.7 5.5 I(IN) Inputvoltage V V 0 5.5 IH TPS2010A 0 0.2 TPS2011A 0 0.6 I Continuousoutputcurrent A O TPS2012A 0 1 TPS2013A 0 1.5 T Operatingvirtualjunctiontemperature –40 125 (cid:176) C J 4 SubmitDocumentationFeedback Copyright©1998–2007,TexasInstrumentsIncorporated ProductFolderLink(s):TPS2010A,TPS2011ATPS2012A,TPS2013A

TPS2010A, TPS2011A TPS2012A, TPS2013A www.ti.com SLVS189C–DECEMBER1998–REVISEDSEPTEMBER2007 ELECTRICAL CHARACTERISTICS overrecommendedoperatingjunctiontemperaturerange,V =5.5V,I =ratedcurrent,EN=0V(unlessotherwisenoted) I(IN) O PARAMETER TESTCONDITIONS(1) MIN TYP MAX UNIT POWERSWITCH V =5V, T =25(cid:176) C, I =1.5A 33 36 I(IN) J O V =5V, T =85(cid:176) C, I =1.5A 38 46 I(IN) J O V =5V, T =125(cid:176) C, I =1.5A 44 50 I(IN) J O TPS2013A mΩ V =3.3V, T =25(cid:176) C, I =1.5A 37 41 I(IN) J O V =3.3V, T =85(cid:176) C, I =1.5A 43 52 I(IN) J O Staticdrain-sourceon-state VI(IN)=3.3V, TJ=125(cid:176) C, IO=1.5A 51 61 r DS(on) resistance V =5V, T =25(cid:176) C, I =0.18A 30 34 I(IN) J O V =5V, T =85(cid:176) C, I =0.18A 35 41 I(IN) J O V =5V, T =125(cid:176) C, I =0.18A 39 47 I(IN) J O TPS2010A mΩ V =3.3V, T =25(cid:176) C, I =0.18A 33 37 I(IN) J O V =3.3V, T =85(cid:176) C, I =0.18A 39 46 I(IN) J O V =3.3V, T =125(cid:176) C, I =0.18A 44 56 I(IN) J O V =5.5V, T =25(cid:176) C, C =1μF, R =10Ω 6.1 I(IN) J L L t Risetime,output ms r V =2.7V, T =25(cid:176) C, C =1μF, R =10Ω 8.6 I(IN) J L L V =5.5V, T =25(cid:176) C, C =1μF, R =10Ω 3.4 I(IN) J L L t Risetime,output ms f V =2.7V, T =25(cid:176) C, C =1μF, R =10Ω 3 I(IN) J L L ENABLEINPUT(EN) V High-levelinputvoltage 2.7V≤V ≤5.5V 2 V IH I(IN) 4.5V≤V ≤5.5V 0.8 I(IN) V Low-levelinputvoltage V IL 2.7V≤V ≤4.5V 0.5 I(IN) I Inputcurrent EN=0VorEN=V –0.5 0.5 μA I I(IN) t Turnontime C =100μF, R =10Ω 20 ms on L L t Turnofftime C =100μF, R =10Ω 40 ms off L L CURRENTLIMIT TPS2010A 0.22 0.3 0.4 TJ=25(cid:176) C,VI=5.5V, TPS2011A 0.66 0.9 1.1 I Short-circuitoutputcurrent OUTconnectedtoGND, A OS Deviceenableintoshortcircuit TPS2012A 1.1 1.5 1.8 TPS2013A 1.65 2.2 2.7 (1) Pulse-testingtechniquesmaintainjunctiontemperatureclosetoambienttemperature;thermaleffectsmustbetakenintoaccount separately. Copyright©1998–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLink(s):TPS2010A,TPS2011ATPS2012A,TPS2013A

TPS2010A, TPS2011A TPS2012A, TPS2013A www.ti.com SLVS189C–DECEMBER1998–REVISEDSEPTEMBER2007 ELECTRICAL CHARACTERISTICS (Continued) overrecommendedoperatingjunctiontemperaturerange,V =5.5V,I =ratedcurrent,EN=0V(unlessotherwisenoted) I(IN) O PARAMETER TESTCONDITIONS(1) MIN TYP MAX UNIT SUPPLYCURRENT T =25(cid:176) C 0.3 1 J Supplycurrent,low-leveloutput NoLoadonOUT EN=V μA I(IN) –40(cid:176) C≤T ≤125(cid:176) C 10 J T =25(cid:176) C 58 75 J Supplycurrent,high-leveloutput NoLoadonOUT EN=0V μA –40(cid:176) C≤T ≤125(cid:176) C 75 100 J Leakagecurrent OUTconnectedtoground EN=V –40(cid:176) C≤T ≤125(cid:176) C 10 μA I(IN) J UNDERVOLTAGELOCKOUT Low-levelinputvoltage 2 2.5 V Hysteresis T =25(cid:176) C 100 mV J (1) Pulse-testingtechniquesmaintainjunctiontemperatureclosetoambienttemperature;thermaleffectsmustbetakenintoaccount separately. 6 SubmitDocumentationFeedback Copyright©1998–2007,TexasInstrumentsIncorporated ProductFolderLink(s):TPS2010A,TPS2011ATPS2012A,TPS2013A

TPS2010A, TPS2011A TPS2012A, TPS2013A www.ti.com SLVS189C–DECEMBER1998–REVISEDSEPTEMBER2007 PARAMETER MEASUREMENT INFORMATION Figure1.TestCircuitandVoltageWaveforms Table1.TimingDiagrams FIGURE TurnonDelayandRiseTime 2 TurnoffDelayandFallTime 3 TurnonDelayandRiseTIMEwith1-μFLoad 4 TurnoffDelayandRiseTIMEwith1-μFLoad 5 DeviceEnabledintoShort 6 TPS2010A,TPS2011A,TPS2012A,andTPS2013A,RampedLoadonEnabledDevice 7,8,9,10 TPS2013A,InrushCurrent 11 7.9-ΩLoadConnectedtoanEnabledTPS2010ADevice 12 3.7-ΩLoadConnectedtoanEnabledTPS2010ADevice 13 3.7-ΩLoadConnectedtoanEnabledTPS2011ADevice 14 2.6-ΩLoadConnectedtoanEnabledTPS2011ADevice 15 2.6-ΩLoadConnectedtoanEnabledTPS2012ADevice 16 1.2-ΩLoadConnectedtoanEnabledTPS2012ADevice 17 1.2-ΩLoadConnectedtoanEnabledTPS2013ADevice 18 0.9-ΩLoadConnectedtoanEnabledTPS2013ADevice 19 Copyright©1998–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLink(s):TPS2010A,TPS2011ATPS2012A,TPS2013A

TPS2010A, TPS2011A TPS2012A, TPS2013A www.ti.com SLVS189C–DECEMBER1998–REVISEDSEPTEMBER2007 Figure2.TurnonDelayandRiseTime Figure3.TurnoffDelayandFallTime Figure4.TurnonDelayandRiseTimeWith1-μFLoad Figure5.TurnoffDelayandFallTimeWith1-μFLoad 8 SubmitDocumentationFeedback Copyright©1998–2007,TexasInstrumentsIncorporated ProductFolderLink(s):TPS2010A,TPS2011ATPS2012A,TPS2013A

TPS2010A, TPS2011A TPS2012A, TPS2013A www.ti.com SLVS189C–DECEMBER1998–REVISEDSEPTEMBER2007 Figure6.DeviceEnabledIntoShort Figure7.TPS2010A,RampedLoadonEnabledDevice Figure8.TPS2011A,RampedLoadonEnabledDevice Figure9.TPS2012A,RampedLoadonEnabledDevice Copyright©1998–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLink(s):TPS2010A,TPS2011ATPS2012A,TPS2013A

TPS2010A, TPS2011A TPS2012A, TPS2013A www.ti.com SLVS189C–DECEMBER1998–REVISEDSEPTEMBER2007 Figure10.TPS2013A,RampedLoadonEnabledDevice Figure11.TPS2013A,InrushCurrent Figure12.7.9-ΩLoadConnectedtoanEnabled Figure13.3.7-ΩLoadConnectedtoanEnabled TPS2010ADevice TPS2010ADevice 10 SubmitDocumentationFeedback Copyright©1998–2007,TexasInstrumentsIncorporated ProductFolderLink(s):TPS2010A,TPS2011ATPS2012A,TPS2013A

TPS2010A, TPS2011A TPS2012A, TPS2013A www.ti.com SLVS189C–DECEMBER1998–REVISEDSEPTEMBER2007 Figure14.3.7-ΩLoadConnectedtoanEnabled Figure15.2.6-ΩLoadConnectedtoanEnabled TPS2011ADevice TPS2011ADevice Figure16.2.6-ΩLoadConnectedtoanEnabled Figure17.1.2-ΩLoadConnectedtoanEnabled TPS2012ADevice TPS2012ADevice Copyright©1998–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLink(s):TPS2010A,TPS2011ATPS2012A,TPS2013A

TPS2010A, TPS2011A TPS2012A, TPS2013A www.ti.com SLVS189C–DECEMBER1998–REVISEDSEPTEMBER2007 Figure18.1.2-ΩLoadConnectedtoanEnabledTPS2013ADevice Figure19.0.9-ΩLoadConnectedtoanEnabledTPS2013ADevice 12 SubmitDocumentationFeedback Copyright©1998–2007,TexasInstrumentsIncorporated ProductFolderLink(s):TPS2010A,TPS2011ATPS2012A,TPS2013A

TPS2010A, TPS2011A TPS2012A, TPS2013A www.ti.com SLVS189C–DECEMBER1998–REVISEDSEPTEMBER2007 TYPICAL CHARACTERISTICS Table of Graphs FIGURE t Turnondelaytime vsOutputvoltage 20 d(on) t Turnoffdelaytime vsInputvoltage 21 d(off) t Risetime vsLoadcurrent 22 r t Falltime vsLoadcurrent 23 f Supplycurrent(enabled) vsJunctiontemperature 24 Supplycurrent(disabled) vsJunctiontemperature 25 Supplycurrent(enabled) vsInputvoltage 26 Supplycurrent(disabled) vsInputvoltage 27 I Short-circuitcurrentlimit vsInputvoltage 28 OS vsJunctiontemperature 29 r Staticdrain-sourceon-stateresistance vsInputvoltage 30 DS(on) vsJunctiontemperature 31 vsInputvoltage 32 vsJunctiontemperature 33 Undervoltagelockout InputvoltagevsTemperature 34 TURNONDELAYTIME TURNOFFDELAYTIME vs vs OUTPUTVOLTAGE INPUTVOLTAGE Figure20. Figure21. Copyright©1998–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLink(s):TPS2010A,TPS2011ATPS2012A,TPS2013A

TPS2010A, TPS2011A TPS2012A, TPS2013A www.ti.com SLVS189C–DECEMBER1998–REVISEDSEPTEMBER2007 RISETIME FALLTIME vs vs LOADCURRENT LOADCURRENT Figure22. Figure23. SUPPLYCURRENT(ENABLED) SUPPLYCURRENT(DISABLED) vs vs JUNCTIONTEMPERATURE JUNCTIONTEMPERATURE Figure24. Figure25. 14 SubmitDocumentationFeedback Copyright©1998–2007,TexasInstrumentsIncorporated ProductFolderLink(s):TPS2010A,TPS2011ATPS2012A,TPS2013A

TPS2010A, TPS2011A TPS2012A, TPS2013A www.ti.com SLVS189C–DECEMBER1998–REVISEDSEPTEMBER2007 SUPPLYCURRENT(ENABLED) SUPPLYCURRENT(DISABLED) vs vs INPUTVOLTAGE INPUTVOLTAGE Figure26. Figure27. SHORT-CIRCUITCURRENTLIMIT SHORT-CIRCUITCURRENTLIMIT vs vs INPUTVOLTAGE JUNCTIONTEMPERATURE Figure28. Figure29. Copyright©1998–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLink(s):TPS2010A,TPS2011ATPS2012A,TPS2013A

TPS2010A, TPS2011A TPS2012A, TPS2013A www.ti.com SLVS189C–DECEMBER1998–REVISEDSEPTEMBER2007 STATICDRAIN-SOURCEON-STATERESISTANCE STATICDRAIN-SOURCEON-STATERESISTANCE vs vs INPUTVOLTAGE JUNCTIONTEMPERATURE Figure30. Figure31. STATICDRAIN-SOURCEON-STATERESISTANCE STATICDRAIN-SOURCEON-STATERESISTANCE vs vs INPUTVOLTAGE JUNCTIONTEMPERATURE Figure32. Figure33. 16 SubmitDocumentationFeedback Copyright©1998–2007,TexasInstrumentsIncorporated ProductFolderLink(s):TPS2010A,TPS2011ATPS2012A,TPS2013A

TPS2010A, TPS2011A TPS2012A, TPS2013A www.ti.com SLVS189C–DECEMBER1998–REVISEDSEPTEMBER2007 UNDERVOLTAGELOCKOUT Figure34. Copyright©1998–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLink(s):TPS2010A,TPS2011ATPS2012A,TPS2013A

TPS2010A, TPS2011A TPS2012A, TPS2013A www.ti.com SLVS189C–DECEMBER1998–REVISEDSEPTEMBER2007 APPLICATION INFORMATION Figure35.TypicalApplication POWER-SUPPLY CONSIDERATIONS A 0.01-μF to 0.1-μF ceramic bypass capacitor between IN and GND, close to the device, is recommended. Placing a high-value electrolytic capacitor on the output and input pins is recommended when the output load is heavy. This precaution reduces power supply transients that may cause ringing on the input. Additionally, bypassing the output with a 0.01-μF to 0.1-μF ceramic capacitor improves the immunity of the device to short-circuittransients. OVERCURRENT A sense FET checks for overcurrent conditions. Unlike current-sense resistors, sense FETs do not increase the series resistance of the current path. When an overcurrent condition is detected, the device maintains a constant output current and reduces the output voltage accordingly. Complete shutdown occurs only if the fault is present longenoughtoactivatethermallimiting. Three possible overload conditions can occur. In the first condition, the output has been shorted before the device is enabled or before V has been applied (see Figure 6). The TPS201xA senses the short and I(IN) immediatelyswitchesintoaconstant-currentoutput. In the second condition, the excessive load occurs while the device is enabled. At the instant the excessive load occurs, very high currents may flow for a short time before the current-limit circuit can react (see Figure 12–Figure 19). After the current-limit circuit has tripped (reached the overcurrent trip threshold) the device switchesintoconstant-currentmode. In the third condition, the load has been gradually increased beyond the recommended operating current. The current is permitted to rise until the current-limit threshold is reached or until the thermal limit of the device is exceeded (see Figures Figure 77–Figure 10). The TPS201xA is capable of delivering current up to the current-limit threshold without damaging the device. Once the threshold has been reached, the device switches intoitsconstant-currentmode. POWER DISSIPATION AND JUNCTION TEMPERATURE The low on-resistance on the n-channel MOSFET allows small surface-mount packages, such as SOIC, to pass large currents. The thermal resistance of these packages are high compared to those of power packages; it is good design practice to check power dissipation and junction temperature. The first step is to find r at the DS(on) input voltage and operating temperature. As an initial estimate, use the highest operating ambient temperature of interestandreadr fromSLVS1892074Figure30–Figure33.Next,calculatethepowerdissipationusing: DS(on) P (cid:2)r (cid:1)I2 D DS(on) (1) Finally,calculatethejunctiontemperature: T (cid:3)P (cid:1)R (cid:2)T J D (cid:1)JA A (2) 18 SubmitDocumentationFeedback Copyright©1998–2007,TexasInstrumentsIncorporated ProductFolderLink(s):TPS2010A,TPS2011ATPS2012A,TPS2013A

TPS2010A, TPS2011A TPS2012A, TPS2013A www.ti.com SLVS189C–DECEMBER1998–REVISEDSEPTEMBER2007 Where: T =AmbientTemperature(cid:176) C A R =ThermalresistanceSOIC=172(cid:176) C/W θJA Compare the calculated junction temperature with the initial estimate. If they do not agree within a few degrees, repeat the calculation, using the calculated value as the new estimate. Two or three iterations are generally sufficienttogetanacceptableanswer. THERMAL PROTECTION Thermal protection prevents damage to the IC when heavy-overload or short-circuit faults are present for extended periods of time. The faults force the TPS201xA into constant current mode, which causes the voltage across the high-side switch to increase; under short-circuit conditions, the voltage across the switch is equal to the input voltage. The increased dissipation causes the junction temperature to rise to high levels. The protection circuit senses the junction temperature of the switch and shuts it off. Hysteresis is built into the thermal sense circuit,andafterthedevicehascooledapproximately20degrees,theswitchturnsbackon.Theswitchcontinues tocycleinthismanneruntiltheloadfaultorinputpowerisremoved. UNDERVOLTAGE LOCKOUT (UVLO) An undervoltage lockout ensures that the power switch is in the off state at power up. Whenever the input voltage falls below approximately 2 V, the power switch will be quickly turned off. This facilitates the design of hot-insertion systems where it is not possible to turn off the power switch before input power is removed. The UVLO will also keep the switch from being turned on until the power supply has reached at least 2 V, even if the switch is enabled. Upon reinsertion, the power switch will be turned on, with a controlled rise time to reduce EMI andvoltageovershoots. GENERIC HOT-PLUG APPLICATIONS (see Figure 36) In many applications it may be necessary to remove modules or p-c boards while the main unit is still operating. These are considered hot-plug applications. Such implementations require the control of current surges seen by the main power supply and the card being inserted. The most effective way to control these surges is to limit and slowly ramp the current and voltage being applied to the card, similar to the way in which a power supply normally turns on. Because of the controlled rise times and fall times of the TPS201xA series, these devices can be used to provide a softer start-up to devices being hot-plugged into a powered system. The UVLO feature of the TPS201xA also ensures the switch will be off after the card has been removed, and the switch will be off during the next insertion. The UVLO feature guarantees a soft start with a controlled rise time for every insertion ofthecardormodule. Figure36.TypicalHot-PlugImplementation By placing the TPS201xA between the V input and the rest of the circuitry, the input power will reach this CC device first after insertion. The typical rise time of the switch is approximately 9 ms, providing a slow voltage ramp at the output of the device. This implementation controls system surge currents and provides a hot-pluggingmechanismforanydevice. Copyright©1998–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLink(s):TPS2010A,TPS2011ATPS2012A,TPS2013A

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS2010AD ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 2010A & no Sb/Br) TPS2010ADR ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 2010A & no Sb/Br) TPS2011AD ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 2011A & no Sb/Br) TPS2011ADR ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 2011A & no Sb/Br) TPS2011ADRG4 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 2011A & no Sb/Br) TPS2011APWP ACTIVE HTSSOP PWP 14 90 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 2011A & no Sb/Br) TPS2012AD ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 2012A & no Sb/Br) TPS2012ADR ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 2012A & no Sb/Br) TPS2013AD ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 2013A & no Sb/Br) TPS2013ADR ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 2013A & no Sb/Br) TPS2013APWP ACTIVE HTSSOP PWP 14 90 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 2013A & no Sb/Br) TPS2013APWPR ACTIVE HTSSOP PWP 14 2000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 2013A & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS2010ADR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS2011ADR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS2012ADR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS2013ADR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS2013APWPR HTSSOP PWP 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS2010ADR SOIC D 8 2500 340.5 338.1 20.6 TPS2011ADR SOIC D 8 2500 340.5 338.1 20.6 TPS2012ADR SOIC D 8 2500 340.5 338.1 20.6 TPS2013ADR SOIC D 8 2500 340.5 338.1 20.6 TPS2013APWPR HTSSOP PWP 14 2000 350.0 350.0 43.0 PackMaterials-Page2

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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