Product Sample & Technical Tools & Support & Folder Buy Documents Software Community TPD7S019 SLLSE33E–AUGUST2010–REVISEDDECEMBER2016 TPD7S019 7-Channel Integrated ESD Solution for VGA Port with Integrated Level-Shifter and Matching Impedance 1 Features 3 Description • 7-ChannelESDProtectionIncludesESD The TPD7S019 device is an integrated electrostatic 1 discharge (ESD) circuit protection solution for VGA Protection,Level-Shifting,BufferingandSync and DVI-I connectors. It integrates transient voltage ImpedanceMatching suppression (TVS) protection diodes for VIDEO, DDC • ExceedsIEC61000-4-2(Level4)ESDProtection and SYNC signals and meets the IEC61000-4-2 toRequirementsontheExternalPins standard for ±8-kV contact ESD protection. The TVS – ±8-kVIEC61000-4-2ContactDischarge diodes only add low capacitances to help signals run at high-speed. It also provides level-shifting for the • VeryLowLoadingCapacitancefromESD DDC signals saving external level-shifters. Two ProtectionDiodesonVIDEOLines(2.5pF) noninverting drivers on HSYNC and VSYNC convert • 5-VDriversforHSYNCandVSYNCLines TTL input levels to CMOS output levels and each • IntegratedImpedanceMatchingResistorson buffer has a series termination resistor connected to SyncLines the SYNC_OUT pin, eliminating the external termination resistors. Three supply lines control the • BidirectionalLevel-ShiftingN-ChannelFETs power rails of the VIDEO, DDC and SYNC channels ProvidedforDDC_CLKandDDC_DATA to facilitate interfacing with low voltage video Channels controller ICs in mixed supply-voltage environments. • Flow-ThroughSingle-In-LinePinMappingEnsures TheTPD7S019comeswithtwopackageoptions.The noAdditionalBoardLayoutBurdenWhilePlacing 16-pin RSV is compact and space-saving. The 16-pin theESDProtectionChipNeartheConnector DBQ package and pinout are optimized for easy boardlayout. 2 Applications This ESD protection product is a good solution to • EndEquipment: protect the VGA and DVI-I ports for desktop and laptopPCs,settopboxes,TVsandmonitors. – DesktopandNotebookPCs – SetTopBoxes DeviceInformation(1) – TVs PARTNUMBER PACKAGE BODYSIZE(NOM) • Interfaces: SSOP(16) 4.90mm×3.90mm TPD7S019 – VGA UQFN(16) 2.60mm×1.80mm – DVI-I (1) For all available packages, see the orderable addendum at theendofthedatasheet. ApplicationSchematic 3.3 V 5 V 5 V 5 V 5 V RP RP 0.1µF 0.1µF VCC_DDC VCC_VDEO BYP VCC_SYNC 0.22µF 0.1µF VIDEO1 Red VIDEO2 Green VIDEO3 Blue VGAController RT SYNC_IN2 SYNC_OUT2 HSYNC SYNC_IN1 SYNC_OUT1 VSYNC DDC_IN2 DDC_OUT2 DDC_CLK DDC_IN1 DDC_OUT1 DDC_DAT TPD7S019 VGAConnector Copyright © 2016,Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

TPD7S019 SLLSE33E–AUGUST2010–REVISEDDECEMBER2016 www.ti.com Table of Contents 1 Features.................................................................. 1 7.4 DeviceFunctionalModes..........................................9 2 Applications........................................................... 1 8 ApplicationandImplementation........................ 10 3 Description............................................................. 1 8.1 ApplicationInformation............................................10 4 RevisionHistory..................................................... 2 8.2 TypicalApplication .................................................10 5 PinConfigurationandFunctions......................... 3 9 PowerSupplyRecommendations...................... 11 6 Specifications......................................................... 4 10 Layout................................................................... 12 6.1 AbsoluteMaximumRatings......................................4 10.1 LayoutGuidelines.................................................12 6.2 ESDRatings..............................................................4 10.2 LayoutExample....................................................12 6.3 RecommendedOperatingConditions.......................5 11 DeviceandDocumentationSupport................. 13 6.4 ThermalInformation..................................................5 11.1 DocumentationSupport........................................13 6.5 ElectricalCharacteristics...........................................5 11.2 ReceivingNotificationofDocumentationUpdates13 6.6 TypicalCharacteristics..............................................7 11.3 CommunityResources..........................................13 7 DetailedDescription.............................................. 8 11.4 Trademarks...........................................................13 7.1 Overview...................................................................8 11.5 ElectrostaticDischargeCaution............................13 7.2 FunctionalBlockDiagram.........................................8 11.6 Glossary................................................................13 7.3 FeatureDescription...................................................8 12 Mechanical,Packaging,andOrderable Information........................................................... 13 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionD(April2016)toRevisionE Page • UpdatedFigure6.................................................................................................................................................................. 10 ChangesfromRevisionC(November2015)toRevisionD Page • UpdatedtheFunctionalBlockDiagram.................................................................................................................................. 8 ChangesfromRevisionB(December2012)toRevisionC Page • AddedPinConfigurationandFunctionssection,ESDRatingstable,FeatureDescriptionsection,DeviceFunctional Modes,ApplicationandImplementationsection,PowerSupplyRecommendationssection,Layoutsection,Device andDocumentationSupportsection,andMechanical,Packaging,andOrderableInformationsection .............................. 1 ChangesfromOriginal(August2010)toRevisionA Page • RemovedPREVIEWstatusfromtheRSVpackage............................................................................................................... 3 ChangesfromRevisionA(March2012)toRevisionB Page • Removednonreleasedpartdescriptionsfromthedatasheet................................................................................................ 1 2 SubmitDocumentationFeedback Copyright©2010–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPD7S019

TPD7S019 www.ti.com SLLSE33E–AUGUST2010–REVISEDDECEMBER2016 5 Pin Configuration and Functions RSVPackage DBQPackage 16-PinUQFN 16-PinSSOP TopView TopView VCC_VIDEO VCC_SYNC SYNC_OUT2 SYNC_IN2 16 15 14 13 VIDEO1 1 12 SYNC_OUT1 VIDEO2 2 11 SYNC_IN1 VIDEO3 3 10 DDC_OUT2 GND 4 9 DDC_IN2 5 6 7 8 VCC_DDC BYP DC_OUT1 DDC_IN1 D PinFunctions PIN TYPE DESCRIPTION NAME DBQ RSV Bypasspin.Usinga0.2-µFbypasscapacitorincreasestheESDrobustnessofthe BYP 8 6 Power system DDC_IN1 10 8 I DDCsignalinput.ConnectstotheVGAcontrollersideofoneofthesynclines DDC_IN2 11 9 DDC_OUT1 9 7 O DDCsignaloutput.Connectstothevideoconnectorsideofoneofthesynclines DDC_OUT2 12 10 GND 6 4 — Ground SYNC_IN1 13 11 Syncsignalbufferinput.ConnectstotheVGAcontrollersideofoneofthesync I SYNC_IN2 15 13 lines SYNC_OUT1 14 12 Syncsignalbufferoutput.Connectstothevideoconnectorsideofoneofthesync O SYNC_OUT2 16 14 lines V 7 5 Power IsolatedsupplyinputfortheDDC_1andDDC_2level-shiftingN-FETgates CC_DDC IsolatedsupplyinputfortheSYNC_1andSYNC_2level-shiftersandtheir V 1 15 Power CC_SYNC associatedESDprotectioncircuits SupplypinspecificallyfortheVIDEO_1,VIDEO_2andVIDEO_3ESDprotection V 2 16 Power CC_VIDEO circuits VIDEO1 3 1 VIDEO2 4 2 ESD High-speedESDclampinput VIDEO3 5 3 Copyright©2010–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:TPD7S019

TPD7S019 SLLSE33E–AUGUST2010–REVISEDDECEMBER2016 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT V –0.5 6 CC_VIDEO Supplyvoltage V –0.5 6 V CC_DDC V –0.5 6 CC_SYNC IOvoltage V VIDEOxpins –0.5 V V IO(VIDEO) CC_VIDEO V SYNCpins –0.5 V V I(SYNC) CC_SYNC Inputvoltage V DDC_INxpins –0.5 6 V I(DDC) Outputvoltage V DDC_INxpins –0.5 6 V O(DDC) SYNC_INx,DDC_INx, V <0 –50 Inputclampcurrent I I mA IK VIDEOx Outputclampcurrent I SYNC_OUTx,DDC_OUTx V <0 –50 mA OK O SYNC_OUTx –24 24 mA Continuousoutputcurrent I O DDC_INxtoDDC_OUTx –5 5 mA Continuouscurrentthroughsupplypins V ,V ,V –50 50 mA CC_VIDEO CC_SYNC CC_DDC Storagetemperature T –55 125 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. 6.2 ESD Ratings VALUE UNIT TPD7S019inRSVPackage Allpinsexcept1,2,3,4,7,10, ±2000 12,and14 Human-bodymodel(HBM),per ANSI/ESDA/JEDECJS-001(1) Pins1,2,3,7,10,12,and14 ±15000 V Electrostaticdischarge V (ESD) Pin4 ±2000 Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) ±1000 IEC61000-4-2contactdischarge Pins1,2,3,7,10,12,and14 ±8000 TPD7S019inDBQPackage Allpinsexcept3,4,5,6,9,12, ±2000 14,and16 Human-bodymodel(HBM),per ANSI/ESDA/JEDECJS-001(1) Pins3,4,5,9,12,14,and16 ±15000 V Electrostaticdischarge V (ESD) Pin6 ±2000 Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) ±1000 IEC61000-4-2contactdischarge Pins3,4,5,9,12,14,and16 ±8000 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 4 SubmitDocumentationFeedback Copyright©2010–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPD7S019

TPD7S019 www.ti.com SLLSE33E–AUGUST2010–REVISEDDECEMBER2016 6.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V 0 5.5 CC_VIDEO Supplyvoltage V 0 5.5 V CC_DDC V 0 5.5 CC_SYNC IOvoltage V VIDEOxpins 0 V V IO(VIDEO) CC_VIDEO V SYNCpins 0 V V I(SYNC) CC_SYNC Inputvoltage V DDC_INxpins 0 5.5 V I(DDC) Outputvoltage V DDC_INxPins 0 5.5 V O(DDC) Operatingtemperature T –40 85 °C A 6.4 Thermal Information TPD7S019 THERMALMETRIC(1) DBQ(SSOP) RSV(UQFN) UNIT 16PINS 16PINS R Junction-to-ambientthermalresistance 115.8 124.5 °C/W θJA R Junction-to-case(top)thermalresistance 67 52.7 °C/W θJC(top) R Junction-to-boardthermalresistance 58.3 53.8 °C/W θJB ψ Junction-to-topcharacterizationparameter 19.9 1.4 °C/W JT ψ Junction-to-boardcharacterizationparameter 57.9 53.8 °C/W JB R Junction-to-case(bottom)thermalresistance N/A N/A °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. 6.5 Electrical Characteristics overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT ICC_VIDEO VCC_VIDEOsupplycurrent VCC_VIDEO=5V,VIDEOinputsatVCC_VIDEOorGND 1 10 µA ICC_DDC VCC_DDCsupplycurrent VCC_DDC=5V 1 10 µA SYNCinputsatGNDor 1 50 VCC_SYNC, µA ICC_SYNC VCC_SYNCsupplycurrent VCC_SYNC=5V SYNCoutputsunloaded SYNCinputsat3V; 2 mA SYNCoutputsunloaded IIO_VIDEO VIDEOinputandoutputpins VIO_VIDEO=3V 0.01 1 µA IOFF DDCpinpowerdownleakagecurrent VCC_DDC≤0.4V,VDDC_OUT=5V 0.01 1 µA Diodeforwardvoltageforlowerclamp VD ofVIDEO,DDC,SYNCoutputpins ID=8mA,lowerclampdiode –0.6 –0.8 –0.95 V RDYN_VIDEO Dynamicresistance(VIDEOpins) I=1A 1 Ω VIH High-levelSYNClogicinputvoltage VCC_SYNC=5V 2 V VIL Low-levelSYNClogicinputvoltage VCC_SYNC=5V 0.6 V VOH High-levelSYNClogicoutputvoltage IOH=0mA,VCC_SYNC=5V 4.85 V VOH High-levelSYNClogicoutputvoltage IOH=–24mA,VCC_SYNC=5V 2 V VOL Low-levelSYNClogicoutputvoltage IOL=0mA,VCC_SYNC=5V 0.15 V VOL Low-levelSYNClogicoutputvoltage IOL=24mA,VCC_SYNC=5V 0.8 V RT SYNCdriveroutputresistance VCC_SYNC=5V,SYNCinputsatGNDor3V 15 Ω CIO_VIDEO IOcapacitanceofVIDEOpins VIO=2.5V,testfrequencyis1MHz 2.5 4 pF tPLH SdeYlNayCdriverL=>Hpropagation CL=50pF;VCC=5V,inputtRandtF≤5ns 12 ns tPHL SdeYlNayCdriverH=>Lpropagation CL=50pF;VCC=5V,inputtRandtF≤5ns 12 ns tR,tF SYNCdriveroutputrise&falltimes CL=50pF;VCC=5V,inputtRandtF≤5ns 4 ns Copyright©2010–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:TPD7S019

TPD7S019 SLLSE33E–AUGUST2010–REVISEDDECEMBER2016 www.ti.com Electrical Characteristics (continued) overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT VBR VvoIDltaEgOeESDdiodebreak-down IIO=1mA 9 V 6 SubmitDocumentationFeedback Copyright©2010–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPD7S019

TPD7S019 www.ti.com SLLSE33E–AUGUST2010–REVISEDDECEMBER2016 6.6 Typical Characteristics T =10ns rf Figure1.TPD7S019-xxTLPVID1toGND,Barth Figure2.TPD7S019-xxIECClampingWaveformsPositive Contact V =5V CC_VIDEO Figure3.TPD7S019-xxIECClampingWaveformsNegative Figure4.LeakageCurrentthroughVIDEOPins Contact V =0V CC_DDC Figure5.I (DDC_OUTx) OFF Copyright©2010–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:TPD7S019

TPD7S019 SLLSE33E–AUGUST2010–REVISEDDECEMBER2016 www.ti.com 7 Detailed Description 7.1 Overview The TPD7S019 is an integrated protection solution for VGA or DVI-I ports by providing high-speed ESD protection, level-shifting and signal buffering. The TVS protection diodes for VIDEO signals, DDC signals and SYNC signals provide robust ESD clamping that meets the IEC61000-4-2 standard for ±8-kV contact stress. The signals run at high speed is minimally affected by the low capacitance added to each signal line. The integrated level-shiftersfortheDDCsignalshelpsaveexternalICs.TwobuffersontheHSYNCandVSYNCsignalsconvert TTL input level to CMOS output level, and it saves external components by integrating series termination resistors connected to the SYNC_OUT pin. The TPD7S019 takes in three signal rails to make the signals compatible with different voltages on VIDEO, DDC and SYNC. The two package options provide the latitude to choosebetweeneithersmallboardareaoreasierlayoutandbettersignalintegrity. TheendapplicationsofthisdeviceincludedesktopandlaptopPCs,settopboxes,TVs,andmonitors. 7.2 Functional Block Diagram V CC_VIDEO VIDEO1 VIDEO2 VIDEO3 GND BYP VSYNC V CC_DDC DDC_IN1 DDC_OUT1 SYNC_IN1 RT SYNC_OUT1 DDC_OUT2 DDC_IN2 R SYNC_IN2 T SYNC_OUT2 Copyright © 2016,Texas Instruments Incorporated 7.3 Feature Description TheTPD7S019isanintegratedprotectionsolutionforVGAandDVI-Iports.IthasthelowcapacitanceESDTVS diodes for the VIDEO signals to ensure high speed data transmission. Level-shifting on the DDC lines translate signals on the cable to the level can be processed by downstream ICs. Buffers on the SYNC lines condition the signal levels and quality. The integrated termination resistors help reduce external devices. The TPD7S019 exceeds IEC61000-4-2 (Level 4) ESD standard of ±8-kV contact discharge, making the system robust against system level ESD. The two package options provide the freedom to choose between a compact package or a flowthroughpackage. 8 SubmitDocumentationFeedback Copyright©2010–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPD7S019

TPD7S019 www.ti.com SLLSE33E–AUGUST2010–REVISEDDECEMBER2016 7.4 Device Functional Modes DDCleveltranslatorsandSYNCsignalbuffersareactiveandtheESDcellsonallthelinesareuntriggeredwhen the recommended operating conditions are met. The bidirectional voltage-level translators provide noninverting level-shiftingfromthesystemsidetotheconnectorside.EachconnectorsidepinhasanESDclampthattriggers when voltages are above V or below the lower diode's Vf. During ESD events, voltages as high as ±8-kV BR (contact ESD) can be directed to ground through the internal diode network. Once the voltages on the protected line fall below these trigger levels (usually within 10s of nano-seconds), these pins revert to a non-conductive state. Copyright©2010–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:TPD7S019

TPD7S019 SLLSE33E–AUGUST2010–REVISEDDECEMBER2016 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 8.1 Application Information When a system contains a human interface connector, it becomes vulnerable to large system-level ESD strikes that standard ICs cannot survive. The TPD7S019 provides IEC61000-4-2 Level 4 Contact ESD rating to the VGA or DVI-I port. The integrated voltage level-shifting, buffering and termination reduce the board space needed to implementthecontrollinesfunctions. 8.2 Typical Application 3.3 V 5 V 5 V 5 V 5 V RP RP 0.1µF 0.1µF V V CC_DDC CC_VDEO V BYP CC_SYNC 0.22µF 0.1µF VIDEO1 Red VIDEO2 Green VIDEO3 Blue VGAController R T SYNC_IN2 SYNC_OUT2 HSYNC SYNC_IN1 SYNC_OUT1 VSYNC DDC_IN2 DDC_OUT2 DDC_CLK DDC_IN1 DDC_OUT1 DDC_DAT TPD7S019 VGAConnector Copyright © 2016,Texas Instruments Incorporated Figure6. TypicalApplicationSchematicwithTPD7S019 8.2.1 DesignRequirements Inthisapplication,theTPD7S019isusedtoprotecttheVGAport.Table1 liststhesystemparameters. Table1.DesignParameters DESIGNPARAMETER VALUE Pull-upresistorsonDDClines 1.5kΩto2kΩ TerminationresistorsonVIDEOlines 50Ωto75Ω VIDEOsignalsdatarate 24MHzto388MHz RequiredIEC61000-4-2ESDProtection ±8-kVContact 10 SubmitDocumentationFeedback Copyright©2010–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPD7S019

TPD7S019 www.ti.com SLLSE33E–AUGUST2010–REVISEDDECEMBER2016 8.2.2 DetailedDesignProcedure Tobeginthedesignprocess,someparametersmustbedecidedupon;thedesignermustmakesure: • VoltagerangeontheprotectedlinemustnotexceedthereversestandoffvoltageoftheTVSdiode(s)(V ) RWM • OperatingfrequencyissupportedbytheI/OcapacitanceC oftheTVSdiode IO • IEC61000-4-2protectionrequirementiscoveredbytheIECperformanceoftheTVSdiode Forthisapplication,theDDCsignalsswitchbetween0Vand5V(withresistorpullingitupto5-Vpowersupply). The VIDEO and SYNC signal levels are between 0 V and V / V . All signals are not exceeding the CC_VIDEO CC_SYNC recommendedvaluesandtheESDcellsonthesepinsstayuntriggered. Depending on the resolution and the refresh rate of the display, the VIDEO (RGB) signals' bandwidth can be from 24 MHz to 388 MHz. The line capacitances from the ESD cells are 2.5 pF typical which is only takes up a smallportionofthetotalcapacitancebudgetforthemaximumfrequencyinthisrange. ±8-kVContactESDprovidedbytheTPD7S019meetstheESDdesigngoalof ±8kVcontact. Put 1.5-kΩ to 2-kΩ pullup resistor on the DDC lines to be compliant with the I2C standard. Termination resistors onVIDEOlinesare50Ω to75 Ωtomatchtheimpedanceonboardtrace. 8.2.3 ApplicationCurves Figure7.IEC61000-4-2ClampingVoltage,Positive Figure8.IEC61000-4-2ClampingVoltage,Negative Contact Contact 9 Power Supply Recommendations The TPD7S019 has three power supply pins: V , V and V . Depending on the system, the CC_DDC CC_SYNC CC_VIDEO recommendedvoltagelevelofthesethreepowersuppliescanbeashighas5.5V. Copyright©2010–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:TPD7S019

TPD7S019 SLLSE33E–AUGUST2010–REVISEDDECEMBER2016 www.ti.com 10 Layout 10.1 Layout Guidelines The optimum placement of this device is as close to the connector as possible. EMI during an ESD event can couple from the trace being struck to other nearby unprotected traces, resulting in early system failures. Therefore, the PCB designer needs to minimize the possibility of EMI coupling by keeping any unprotected tracesawayfromtheprotectedtraceswhicharebetweentheTVSandtheconnector. Routetheprotectedtracesasstraightaspossible. AvoidusingVIAsbetweentheconnecterandanI/OprotectionpinontheTPD7S019. Avoid90ºturnsintracessinceelectricfieldstendtobuilduponcorners,increasingEMIcoupling. MinimizeimpedanceonthepathtoGNDformaximumESDdissipation. ThecapacitorsonV ,V andV mustbeplacedclosetotheirrespectivepins. CC_VIDEO CC_DDC CC_SYNC TheVIDEOlinesinternalprotectioncircuitsarethesameandthusthesepinsareinterchangeableforrouting. 10.2 Layout Example Figure9. SimplifiedLayoutwithTPD7S019(OnlyIOLinesareShown) 12 SubmitDocumentationFeedback Copyright©2010–2016,TexasInstrumentsIncorporated ProductFolderLinks:TPD7S019

TPD7S019 www.ti.com SLLSE33E–AUGUST2010–REVISEDDECEMBER2016 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 RelatedDocumentation Forrelateddocumentationseethefollowing: • ReadingandUnderstandinganESDProtectionDatasheet • ESDLayoutGuide 11.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 11.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 11.4 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 11.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage. ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemore susceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications. 11.6 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©2010–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:TPD7S019

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPD7S019-15DBQR ACTIVE SSOP DBQ 16 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 PQ19-15 & no Sb/Br) TPD7S019-15RSVR ACTIVE UQFN RSV 16 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 85 ZUS & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 8-Feb-2018 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPD7S019-15DBQR SSOP DBQ 16 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPD7S019-15RSVR UQFN RSV 16 3000 177.8 12.4 2.0 2.8 0.7 4.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 8-Feb-2018 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPD7S019-15DBQR SSOP DBQ 16 2500 340.5 338.1 20.6 TPD7S019-15RSVR UQFN RSV 16 3000 183.0 183.0 20.0 PackMaterials-Page2

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PACKAGE OUTLINE DBQ0016A SSOP - 1.75 mm max height SCALE 2.800 SHRINK SMALL-OUTLINE PACKAGE C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 14X .0250 [0.635] 16 1 2X .189-.197 .175 [4.81-5.00] [4.45] NOTE 3 8 9 16X .008-.012 B .150-.157 [0.21-0.30] .069 MAX [3.81-3.98] [1.75] NOTE 4 .007 [0.17] C A B .005-.010 TYP [0.13-0.25] SEE DETAIL A .010 [0.25] GAGE PLANE .004-.010 0 - 8 [0.11-0.25] .016-.035 [0.41-0.88] DETAIL A (.041 ) TYPICAL [1.04] 4214846/A 03/2014 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 inch, per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MO-137, variation AB. www.ti.com

EXAMPLE BOARD LAYOUT DBQ0016A SSOP - 1.75 mm max height SHRINK SMALL-OUTLINE PACKAGE 16X (.063) [1.6] SYMM SEE DETAILS 1 16 16X (.016 ) [0.41] 14X (.0250 ) [0.635] 8 9 (.213) [5.4] LAND PATTERN EXAMPLE SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL .002 MAX .002 MIN [0.05] [0.05] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214846/A 03/2014 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBQ0016A SSOP - 1.75 mm max height SHRINK SMALL-OUTLINE PACKAGE 16X (.063) [1.6] SYMM 1 16 16X (.016 ) [0.41] SYMM 14X (.0250 ) [0.635] 8 9 (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.127 MM] THICK STENCIL SCALE:8X 4214846/A 03/2014 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

PACKAGE OUTLINE RSV0016A UQFN - 0.55 mm max height SCALE 5.000 ULTRA THIN QUAD FLATPACK - NO LEAD 1.85 B A 1.75 PIN 1 INDEX AREA 2.65 2.55 0.55 C 0.45 SEATING PLANE 0.05 0.05 C 0.00 2X 1.2 SYMM (0.13) TYP 5 ℄ 8 0.45 15X 0.35 4 9 SYMM 2X 1.2 ℄ 12X 0.4 1 0.25 12 16X 0.15 0.07 C A B 0.05 16 13 0.55 0.45 PIN 1 ID (45 X 0.1) ° 4220314/C 02/2020 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. www.ti.com

EXAMPLE BOARD LAYOUT RSV0016A UQFN - 0.55 mm max height ULTRA THIN QUAD FLATPACK - NO LEAD SYMM (0.7) ℄ 16 13 SEE SOLDER MASK DETAIL 16X (0.2) 1 12 SYMM 12X (0.4) (2.4) ℄ (R0.05) TYP 4 9 15X (0.6) 5 8 (1.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 25X 0.05 MIN 0.05 MAX ALL AROUND ALL AROUND METAL UNDER METAL EDGE SOLDER MASK EXPOSED METAL SOLDER MASK EXPOSED SOLDER MASK OPENING METAL OPENING NON SOLDER MASK DEFINED SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DETAILS 4220314/C 02/2020 NOTES: (continued) 3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). www.ti.com

EXAMPLE STENCIL DESIGN RSV0016A UQFN - 0.55 mm max height ULTRA THIN QUAD FLATPACK - NO LEAD (0.7) 16 13 16X (0.2) 1 12 SYMM 12X (0.4) (2.4) ℄ (R0.05) TYP 4 9 15X (0.6) 5 8 SYMM ℄ (1.6) SOLDER PASTE EXAMPLE BASED ON 0.125 MM THICK STENCIL SCALE: 25X 4220314/C 02/2020 NOTES: (continued) 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

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