TPA741 www.ti.com SLOS316C–JUNE2000–REVISEDJUNE2004 700-mW MONO LOW-VOLTAGE AUDIO POWER AMPLIFIER WITH DIFFERENTIAL INPUTS FEATURES DESCRIPTION • FullySpecifiedfor3.3-Vand5-VOperation The TPA741 is a bridge-tied load (BTL) audio power • WidePowerSupplyCompatibility2.5V-5.5V amplifier developed especially for low-voltage appli- • OutputPowerforR =8W cations where internal speakers are required. L Operating with a 3.3-V supply, the TPA741 can – 700mWatVDD=5V deliver 250-mW of continuous power into a BTL 8-W – 250mWatV =3.3V load at less than 0.6% THD+N throughout voice band DD • IntegratedDepopCircuitry frequencies. Although this device is characterized out to 20 kHz, its operation is optimized for narrower • ThermalandShort-CircuitProtection band applications such as wireless communications. • Surface-MountPackaging The BTL configuration eliminates the need for exter- – SOIC nal coupling capacitors on the output in most appli- cations, which is particularly important for small – PowerPAD™MSOP battery-powered equipment. This device features a shutdown mode for power-sensitive applications with D OR DGN PACKAGE a supply current of 7 µA during shutdown. The (TOP VIEW) TPA741 is available in an 8-pin SOIC surface-mount package and the surface-mount PowerPAD™ MSOP, SHUTDOWN 1 8 VO– which reduces board space by 50% and height by BYPASS 2 7 GND 40%. IN+ 3 6 VDD IN– 4 5 VO+ VDD 6 RF VDD Audio VDD/2 CS Input RI 4 IN– – VO+ 5 CI 3 IN+ + 2 BYPASS CB – VO– 8 700 mW + 7 GND 1 SHUTDOWN Bias From System Control Control Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. PowerPADisatrademarkofTexasInstruments. PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2000–2004,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

TPA741 www.ti.com SLOS316C–JUNE2000–REVISEDJUNE2004 These devices have limited built-in ESD protection. The leads should be shorted together or the device placedinconductivefoamduringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. AVAILABLEOPTIONS PACKAGEDDEVICES TA SMALLOUTLINE(1) MSOP(2) MSOPSYMBOLIZATION (D) (DGN) –40(cid:176)C to85(cid:176)C TPA741D TPA741DGN AJD (1) IntheDpackage,themaximumoutputpoweristhermallylimitedto350mW;700-mWpeakscanbedriven,aslongastheRMSvalue islessthan350mW. (2) TheDandDGNpackagesareavailabletapedandreeled.Toorderatapedandreeledpart,addthesuffixRtothepartnumber(e.g., TPA741DR). TerminalFunctions TERMINAL I/O DESCRIPTION NAME NO. BYPASSisthetaptothevoltagedividerforinternalmid-supplybias.Thisterminalshouldbeconnected BYPASS 2 I toa0.1-µFto2.2-µFcapacitorwhenusedasanaudioamplifier. GND 7 GNDisthegroundconnection. IN- 4 I IN-istheinvertinginput.IN-istypicallyusedastheaudioinputterminal. IN+ 3 I IN+isthenoninvertinginput.IN+istypicallytiedtotheBYPASSterminalforSEoperations. SHUTDOWN 1 I SHUTDOWNplacestheentiredeviceinshutdownmodewhenheldhigh. V 6 V isthesupplyvoltageterminal. DD DD V 5 O V isthepositiveBTLoutput. O+ O+ V 8 O V isthenegativeBTLoutput. O- O- ABSOLUTE MAXIMUM RATINGS overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) UNIT V Supplyvoltage 6v DD V Inputvoltage –0.3VtoV +0.3V I DD Continuoustotalpowerdissipation Internallylimited(seeDissipationRatingTable) T Operatingfree-airtemperaturerange –40(cid:176)C to85(cid:176)C A T Operatingjunctiontemperaturerange –40(cid:176)C to150(cid:176)C J T Storagetemperaturerange –65(cid:176)C to150(cid:176)C stg Leadtemperature1,6mm(1/16inch)fromcasefor10seconds 260(cid:176)C (1) Stressesbeyondthoselistedunder"absolutemaximumratings"maycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunder"recommendedoperating conditions"isnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. DISSIPATION RATING TABLE PACKAGE T £ 25(cid:176)C DERATINGFACTOR T =70(cid:176)C T =85(cid:176)C A A A D 725mW 5.8mW/(cid:176)C 464mW 377mW DGN 2.14W(1) 17.1mW/(cid:176)C 1.37W 1.11W (1) SeetheTexasInstrumentsdocument,PowerPADThermallyEnhancedPackageApplicationReport (SLMA002),formoreinformationonthePowerPADpackage.Thethermaldatawasmeasuredona PCBlayoutbasedontheinformationinthesectionentitledTexasInstrumentsRecommendedBoard forPowerPADofthatdocument. 2

TPA741 www.ti.com SLOS316C–JUNE2000–REVISEDJUNE2004 RECOMMENDED OPERATING CONDITIONS MIN MAX UNIT V Supplyvoltage, 2.5 5.5 V DD V High-levelvoltage(SHUTDOWN) 0.9V V IH DD V Low-levelvoltage(SHUTDOWN) 0.1V V IL DD T Operatingfree-airtemperature –40 85 (cid:176)C A ELECTRICAL CHARACTERISTICS atspecifiedfree-airtemperature,V =3.3V,T =25(cid:176)C (unlessotherwisenoted) DD A PARAMETER TESTCONDITIONS MIN TYP MAX UNIT |V | Outputoffsetvoltage(measureddifferentially) SHUTDOWN=0V,R =8W, RF=10kW 20 mV OS L PSRR Powersupplyrejectionratio V =3.2Vto3.4V 85 dB DD I Supplycurrent SHUTDOWN=0V,RF=10kW 1.35 2.5 mA DD I Supplycurrent,shutdownmode SHUTDOWN=V ,RF=10kW 7 50 µA DD(SD) (seeFigure6) DD |I | SHUTDOWN,V =3.3V,V =3.3V 1 µA IH DD i |I | SHUTDOWN,V =3.3V,V =0V 1 µA IL DD i OPERATING CONDITIONS V =3.3V,T =25(cid:176)C, R =8W DD A L PARAMETER TESTCONDITIONS MIN TYP MAX UNIT P Outputpower,See(1) THD=0.5%, SeeFigure9 250 mW O THD+N Totalharmonicdistortionplusnoise P =250mW, f=200Hzto4kHz,SeeFigure7 0.55% O B Maximumoutputpowerbandwidth A =-2V/V, THD=2%,SeeFigure7 20 kHz OM V B Unity-gainbandwidth Openloop, SeeFigure15 1.4 MHz 1 k Supplyripplerejectionratio f=1kHz, C =1µF,SeeFigure2 79 dB SVR B V Noiseoutputvoltage A =-1V/V, C =0.1µF,SeeFigure19 17 µV(rms) n V B (1) Outputpowerismeasuredattheoutputterminalsofthedeviceatf=1kHz. ELECTRICAL CHARACTERISTICS atspecifiedfree-airtemperature,V =5V,T =25(cid:176)C (unlessotherwisenoted) DD A PARAMETER TESTCONDITIONS MIN TYP MAX UNIT |V | Outputoffsetvoltage(measureddifferentially) SHUTDOWN=0V,R =8W, RF=10kW 20 mV OS L PSRR Powersupplyrejectionratio V =4.9Vto5.1V 78 dB DD I Supplycurrent SHUTDOWN=0V,RF=10kW 1.45 2.5 mA DD I Supplycurrent,shutdownmode(seeFig- SHUTDOWN=V ,RF=10kW 50 100 µA DD(SD) ure4) DD |I | SHUTDOWN,V =5.5V,V =V 1 µA IH DD i DD |I | SHUTDOWN,V =5.5V,V =0V 1 µA IL DD i 3

TPA741 www.ti.com SLOS316C–JUNE2000–REVISEDJUNE2004 OPERATING CHARACTERISTICS V =5V,T =25(cid:176)C, R =8W DD A L PARAMETER TESTCONDITIONS MIN TYP MAX UNIT P Outputpower THD=0.5%, SeeFigure13 700(1) mW O P =250mW,f=200Hzto4kHz, THD+N Totalharmonicdistortionplusnoise O 0.5% SeeFigure11 B Maximumoutputpowerbandwidth A =-2V/V, THD=2%,SeeFigure11 20 kHz OM V B Unity-gainbandwidth Openloop, SeeFigure16 1.4 MHz 1 k Supplyripplerejectionratio f=1kHz, C =1µF,SeeFigure2 80 dB SVR B V Noiseoutputvoltage A =-1V/V, C =0.1µF,SeeFigure20 17 µV(rms) n V B (1) TheDGNpackage,properlymounted,canconduct700-mWRMSpowercontinuously.TheDpackagecanonlyconduct350-mWRMS powercontinuouslywithpeaksto700mW. PARAMETER MEASUREMENT INFORMATION VDD 6 Audio RF VDD/2 CS VDD Input RI 4 IN– – VO+ 5 CI 3 IN+ + 2 BYPASS RL = 8 W CB – VO– 8 + 7 GND 1 SHUTDOWN Bias Control Figure1.BTLModeTestCircuit 4

TPA741 www.ti.com SLOS316C–JUNE2000–REVISEDJUNE2004 TYPICAL CHARACTERISTICS TableofGraphs FIGURE k Supplyripplerejectionratio vsFrequency 2 SVR I Supplycurrent vsSupplyvoltage 3,4 DD vsSupplyvoltage 5 P Outputpower O vsLoadresistance 6 vsFrequency 7,8,11,12 THD+N Totalharmonicdistortionplusnoise vsOutputpower 9,10,13,14 Open-loopgainandphase vsFrequency 15,16 Closed-loopgainandphase vsFrequency 17,18 V Outputnoisevoltage vsFrequency 19,20 n P Powerdissipation vsOutputpower 21,22 D SUPPLYRIPPLEREJECTIONRATIO SUPPLYCURRENT vs vs FREQUENCY SUPPLYVOLTAGE 0 1.8 RL = 8 W SHUTDOWN = 0 V dB −10 CB = 1 m F RF = 10 kW o − −20 1.6 ati R on −30 mA 1.4 ejecti −40 ent − pple R −50 y Curr 1.2 Ri −60 pl y up ppl −70 − S 1 − Su −80 VDD = 3.3 V IDD SVR −90 VDD = 5 V 0.8 k −100 0.6 20 100 1k 10k 20k 2.5 3 3.5 4 4.5 5 5.5 f − Frequency − Hz VDD − Supply Voltage − V Figure2. Figure3. 5

TPA741 www.ti.com SLOS316C–JUNE2000–REVISEDJUNE2004 SUPPLYCURRENT OUTPUTPOWER vs vs SUPPLYVOLTAGE SUPPLYVOLTAGE 90 1000 SHUTDOWN = VDD THD+N 1% 80 RF = 10 kW f = 1 kHz 800 70 A W m m− 60 − nt er 600 e w urr 50 Po RL = 8 W y C ut uppl 40 Outp 400 RL = 32 W − S 30 − O D P D I 20 200 10 0 0 2.5 3 3.5 4 4.5 5 5.5 2.5 3 3.5 4 4.5 5 5.5 VDD − Supply Voltage − V VDD − Supply Voltage − V Figure4. Figure5. OUTPUTPOWER TOTALHARMONICDISTORTION+NOISE vs vs LOADRESISTANCE FREQUENCY 800 10 THD+N = 1% % VDD = 3.3 V 700 f = 1 kHz oise − PROL == 82 5W0 mW N wer − mW 560000 VDD = 5 V stortion + 1 AV = −20 V/V o Di AV = −10 V/V ut P 400 nic p o ut m − O 300 VDD = 3.3 V Har 0.1 AV = −2 V/V PO 200 otal T − N 100 D+ H T 0 0.01 8 16 24 32 40 48 56 64 20 100 1k 10k 20k RL − Load Resistance − W f − Frequency − Hz Figure6. Figure7. 6

TPA741 www.ti.com SLOS316C–JUNE2000–REVISEDJUNE2004 TOTALHARMONICDISTORTION+NOISE TOTALHARMONICDISTORTION+NOISE vs vs FREQUENCY OUTPUTPOWER 10 10 % VDD = 3.3 V % VDD = 3.3 V oise − RAVL == −8 2W V/V oise − fA =V 1= k−H2 zV/V N N + + n n ortio 1 PO = 50 mW ortio 1 st st Di Di c c ni ni mo mo RL = 8 W ar ar H 0.1 H 0.1 al PO = 125 mW al ot ot T T − − N N + + D D TH PO = 250 mW TH 0.01 0.01 20 100 1k 10k 20k 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 f − Frequency − Hz PO − Output Power − W Figure8. Figure9. TOTALHARMONICDISTORTION+NOISE TOTALHARMONICDISTORTION+NOISE vs vs OUTPUTPOWER FREQUENCY 10 10 % % VDD = 5 V se − se − PROL == 87 0W0 mW oi oi N f = 20 kHz N AV = −20 V/V + + n n o 1 f = 10 kHz o 1 orti orti st st Di Di nic f = 1 kHz nic AV = −10 V/V o o m m Har 0.1 Har 0.1 AV =− 2 V/V Total f = 20 Hz VRDL D= =8 3W.3 V Total N − CB = 1 m F N − D+ AV = −2 V/V D+ H H T T 0.01 0.01 0.01 0.1 1 20 100 1k 10k 20k PO − Output Power − W f − Frequency − Hz Figure10. Figure11. 7

TPA741 www.ti.com SLOS316C–JUNE2000–REVISEDJUNE2004 TOTALHARMONICDISTORTION+NOISE TOTALHARMONICDISTORTION+NOISE vs vs FREQUENCY OUTPUTPOWER 10 10 e − % VRDL D= =8 5W V e − % Vf =D D1 =k H5 zV ois AV = −2 V/V PO = 50 mW ois AV = −2 V/V N N + + n n o 1 o 1 orti orti st st Di Di c c ni ni o o arm PO = 700 mW arm RL = 8 W H 0.1 H 0.1 otal PO = 350 mW otal T T − − N N + + D D H H T T 0.01 0.01 20 100 1k 10k 20k 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 f − Frequency − Hz PO − Output Power − W Figure12. Figure13. TOTALHARMONICDISTORTION+NOISE OPEN-LOOPGAINANDPHASE vs vs OUTPUTPOWER FREQUENCY 10 80 180° % VDD = 3.3 V e − 70 RL = Open 140° Nois 60 Phase 100° + 50 monic Distortion 1 ff == 110 k kHHzzf = 20 kHz n-Loop Gain − dB 234000 Gain 62−002°°0°Phase Har 0.1 f = 20 Hz Ope 10 −60° otal VDD = 5 V 0 −100° +N −T RCLB == 81 Wm F −−2100 −140° THD AV = −2 V/V −30 −180° 0.01 1 101 102 103 104 0.01 0.1 1 f − Frequency − kHz PO − Output Power − W Figure14. Figure15. 8

TPA741 www.ti.com SLOS316C–JUNE2000–REVISEDJUNE2004 OPEN-LOOPGAINANDPHASE CLOSED-LOOPGAINANDPHASE vs vs FREQUENCY FREQUENCY 80 180° 1 180° VDD = 5 V Phase 70 RL = Open 140° 0.75 0.5 170° 60 Phase 100° 0.25 p Gain − dB 354000 6200°° ase oop Gain − dB −−00.2.055 Gain 115600°° hase oo 20 Gain −20°Ph d-L −0.75 P L e pen- 10 −60° Clos −1 140° O 0 −1.25 VDD = 3.3 V −100° −1.5 RL = 8 W 130° −10 PO = 250 mW −140° −1.75 −20 −2 120° −30 −180° 101 102 103 104 105 106 1 101 102 103 104 f − Frequency − Hz f − Frequency − kHz Figure16. Figure17. CLOSED-LOOPGAINANDPHASE OUTPUTNOISEVOLTAGE vs vs FREQUENCY FREQUENCY 1 180° 100 Phase VDD = 3.3 V 0.75 BW = 22 Hz to 22 kHz 0.5 170° RL = 8 W or 32 W V AV = −1 V/V 0.25 dB m− ed-Loop Gain − −−−000..27.0555 Gain 115600°° Phase Noise Voltage 10 VO BTVLo+ os −1 140° ut Cl p ut −1.25 O −1.5 VRDL D= =8 5W V 130° − n −1.75 PO = 700 mW V −2 120° 101 102 103 104 105 106 1 f − Frequency − Hz 20 100 1k 10k 20k f − Frequency − Hz Figure18. Figure19. 9

TPA741 www.ti.com SLOS316C–JUNE2000–REVISEDJUNE2004 OUTPUTNOISEVOLTAGE POWERDISSIPATION vs vs FREQUENCY OUTPUTPOWER 100 350 VDD = 5 V VDD = 3.3 V BW = 22 Hz to 22 kHz RL = 8 W or 32 W 300 RL = 8 W V AV = −1 V/V W me Voltage − VOV Bo+TL pation − m 220500 ois 10 ssi N Di ut er 150 p w ut o O P − − D 100 RL = 32 W n P V 50 1 0 20 100 1k 10k 20k 0 200 400 600 f − Frequency − Hz PD − Output Power − mW Figure20. Figure21. POWERDISSIPATION vs OUTPUTPOWER 800 VDD = 5 V 700 RL = 8 W W 600 m − n 500 o ati p si 400 s Di wer 300 o P − PD 200 RL = 32 W 100 0 0 200 400 600 800 1000 PD − Output Power − mW Figure22. 10

TPA741 www.ti.com SLOS316C–JUNE2000–REVISEDJUNE2004 APPLICATION INFORMATION BRIDGE-TIED LOAD Figure 23 shows a linear audio power amplifier (APA) in a BTL configuration. The TPA741 BTL amplifier consists of two linear amplifiers driving both ends of the load. There are several potential benefits to this differential drive configuration, but initially consider power to the load. The differential drive to the speaker means that as one side is slewing up, the other side is slewing down, and vice versa. This, in effect, doubles the voltage swing on the load as compared to a ground referenced load. Plugging 2 · V into the power equation, where voltage is O(PP) squared,yields4· theoutputpowerfromthesamesupplyrailandloadimpedance(seeEquation1). V O(PP) V(rms) (cid:1) 2(cid:2)2 2 V (rms) Power (cid:1) R L (1) VDD VO(PP) RL 2x VO(PP) VDD –VO(PP) Figure23.Bridge-TiedLoadConfiguration Inatypicalportablehandheldequipmentsoundchanneloperatingat 3.3 V, bridging raises the power into an 8-W speakerfromasingled-ended(SE, ground reference) limit of 62.5 mW to 250 mW. In sound power that is a 6-dB improvement, which is loudness that can be heard. In addition to increased power, there are frequency response concerns. Consider the single-supply, SE configuration shown in Figure 24. A coupling capacitor is required to block the dc offset voltage from reaching the load. These capacitors can be quite large (approximately 33 µF to 1000 µF), so they tend to be expensive, heavy, occupy valuable PCB area, and have the additional drawback of limiting low-frequency performance of the system. This frequency-limiting effect is due to the high-pass filter networkcreatedwiththespeakerimpedanceandthecouplingcapacitanceandiscalculatedwithEquation2. f (cid:1) 1 c 2(cid:1)R C L C (2) For example, a 68-µF capacitor with an 8-W speaker would attenuate low frequencies below 293 Hz. The BTL configuration cancels the dc offsets, which eliminates the need for the blocking capacitors. Low-frequency performance is then limited only by the input network and speaker response. Cost and PCB space are also minimizedbyeliminatingthebulkycouplingcapacitor. 11

TPA741 www.ti.com SLOS316C–JUNE2000–REVISEDJUNE2004 APPLICATION INFORMATION (continued) VDD –3 dB VO(PP) CC RL VO(PP) fc Figure24.Single-EndedConfigurationandFrequencyResponse Increasing power to the load does carry a penalty of increased internal power dissipation. The increased dissipation is understandable considering that the BTL configuration produces 4· the output power of a SE configuration.Internaldissipationversusoutputpowerisdiscussedfurtherinthethermalconsiderationssection. BTL AMPLIFIER EFFICIENCY Linear amplifiers are notoriously inefficient. The primary cause of these inefficiencies is voltage drop across the output stage transistors. There are two components of the internal voltage drop. One is the headroom or dc voltage drop that varies inversely to output power. The second component is due to the sine-wave nature of the output. The total voltage drop can be calculated by subtracting the RMS value of the output voltage from V . DD The internal voltage drop multiplied by the RMS value of the supply current, I rms, determines the internal DD powerdissipationoftheamplifier. An easy-to-use equation to calculate efficiency starts out being equal to the ratio of power from the power supply to the power delivered to the load. To accurately calculate the RMS values of power in the load and in the amplifier,thecurrentandvoltagewaveformshapesmustfirstbeunderstood(seeFigure25). VO IDD VL(RMS) IDD(RMS) Figure25.VoltageandCurrentWaveformsforBTLAmplifiers Although the voltages and currents for SE and BTL are sinusoidal in the load, currents from the supply are different between SE and BTL configurations. In an SE application, the current waveform is a half-wave rectified shape, whereas in BTL it is a full-wave rectified waveform. This means RMS conversion factors are different. Keep in mind that for most of the waveform both the push and pull transistors are not on at the same time, which supports the fact that each amplifier in the BTL device only draws current from the supply for half the waveform. Thefollowingequationsarethebasisforcalculatingamplifierefficiency. 12

TPA741 www.ti.com SLOS316C–JUNE2000–REVISEDJUNE2004 APPLICATION INFORMATION (continued) P L Efficiency (cid:1) P SUP where 2 2 V V L(RMS) p PL (cid:1) R (cid:1) 2R L L V P VL(RMS) (cid:1) (cid:2)2 V 2V DD P PSUP (cid:1) VDDIDD(RMS) (cid:1) (cid:1)R L 2V P IDD(RMS) (cid:1) (cid:1)R L (3) 1(cid:2)2 (cid:1)V (cid:1)(cid:3)2P R (cid:4) P L L EfficiencyofaBTLconfiguration(cid:1) (cid:1) 4V 4V DD DD (4) Table 1 employs Equation 4 to calculate efficiencies for three different output power levels. The efficiency of the amplifier is quite low for lower power levels and rises sharply as power to the load is increased, resulting in a nearlyflatinternalpowerdissipationoverthenormaloperating range. The internal dissipation at full output power is less than in the half power range. Calculating the efficiency for a specific system is the key to proper power supplydesign. Table1.EfficiencyvsOutputPowerin3.3-V,8-W, BTLSystems INTERNAL OUTPUTPOWER EFFICIENCY PEAKVOLTAGE DISSIPATION (W) (%) (V) (W) 0.125 33.6 1.41 0.26 0.25 47.6 2.00 0.29 0.375 58.3 2.45(1) 0.28 (1) High-peakvoltagevaluescausetheTHDtoincrease. A final point to remember about linear amplifiers (either SE or BTL) is how to manipulate the terms in the efficiency equation to utmost advantage when possible. In Equation 4, V is in the denominator. This indicates DD thatasV goesdown,efficiencygoesup. DD 13

TPA741 www.ti.com SLOS316C–JUNE2000–REVISEDJUNE2004 APPLICATION SCHEMATICS Figure26isaschematicdiagramofatypicalhandheldaudioapplicationcircuit,configuredforagainof–10V/V. 50R kFW VDD 6 VDD Audio VDD/2 CS Input RI 1 m F 10 kW 4 IN– – VO+ 5 CI 3 IN+ + 2 BYPASS CB 2.2 m F – VO– 8 700 mW + 7 GND 1 SHUTDOWN Bias From System Control Control Figure26.TPA741ApplicationCircuit Figure 27 is a schematic diagram of a typical handheld audio application circuit, configured for a gain of –10 V/V withadifferentialinput. 50R kFW VDD 6 VDD Audio VDD/2 CS Input– RI 1 m F 10 kW 4 IN– – VO+ 5 CI 3 IN+ + RI RF Audio 10 kW 50 kW Input+ 2 BYPASS CI 2.2C m BF – VO– 8 700 mW + 7 GND 1 SHUTDOWN Bias From System Control Control Figure27.TPA741ApplicationCircuitWithDifferentialInput It is important to note that using the additional R resistor connected between IN+ and BYPASS will cause V /2 F DD to shift slightly, which could influence the THD+N performance of the amplifier. Although an additional external operational amplifier could be used to buffer BYPASS from R , tests in the laboratory have shown that the F THD+N performance is only minimally affected by operating in the fully differential mode as shown in Figure 27. ThefollowingsectionsdiscusstheselectionofthecomponentsusedinFigure26andFigure27. 14

TPA741 www.ti.com SLOS316C–JUNE2000–REVISEDJUNE2004 COMPONENT SELECTION Gain-SettingResistors,R andR F I ThegainforeachaudioinputoftheTPA741issetbyresistorsR andR accordingtoEquation5forBTLmode. F I (cid:3)R (cid:4) F BTLgain (cid:2) (cid:1)2 R I (5) BTL mode operation brings about the factor 2 in the gain equation due to the inverting amplifier mirroring the voltage swing across the load. Given that the TPA741 is an MOS amplifier, the input impedance is high; consequently, input leakage currents are not generally a concern, although noise in the circuit increases as the value of R increases. In addition, a certain range of R values is required for proper start-up operation of the F F amplifier. Taken together, it is recommended that the effective impedance seen by the inverting node of the amplifierbesetbetween5kW and20kW. TheeffectiveimpedanceiscalculatedinEquation6. R R Effectiveimpedance (cid:2) F I R (cid:1)R F I (6) As an example, consider an input resistance of 10 kW and a feedback resistor of 50 kW. The BTL gain of the amplifier would be -10 V/V and the effective impedance at the inverting terminal would be 8.3 kW, which is well withintherecommendedrange. For high-performance applications, metal film resistors are recommended because they tend to have lower noise levels than carbon resistors. For values of R above 50 kW, the amplifier tends to become unstable due to a pole F formed from R and the inherent input capacitance of the MOS input structure. For this reason, a small F compensation capacitor of approximately 5 pF should be placed in parallel with R when R is greater than 50 F F kW. This,ineffect,createsalow-passfilternetworkwiththecutofffrequencydefinedinEquation7. −3 dB f (cid:1) 1 c 2(cid:1)R C (7) F F fc (7) Forexample,ifR is100kW andC is5pF,thenf is318kHz,whichiswelloutsideoftheaudiorange. F F c InputCapacitor,C I In the typical application an input capacitor, C, is required to allow the amplifier to bias the input signal to the I proper dc level for optimum operation. In this case, C and R form a high-pass filter with the corner frequency I I determinedinEquation8. 15

TPA741 www.ti.com SLOS316C–JUNE2000–REVISEDJUNE2004 −3 dB f (cid:1) 1 c 2(cid:1)R C I I fc (8) The value of C is important to consider as it directly affects the bass (low-frequency) performance of the circuit. I Consider the example where R is 10 kW and the specification calls for a flat bass response down to 40 Hz. I Equation8isreconfiguredasEquation9. C (cid:1) 1 I 2(cid:1)R f I c (9) In this example, C is 0.4 µF, so one would likely choose a value in the range of 0.47 µF to 1 µF. A further I consideration for this capacitor is the leakage path from the input source through the input network (R, C) and I I thefeedbackresistor(R )totheload.Thisleakagecurrentcreatesadcoffsetvoltageattheinputtotheamplifier F that reduces useful headroom, especially in high-gain applications. For this reason, a low-leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most applications as the dc level there is held at V /2, which is likely higher DD thanthesourcedclevel.Itisimportanttoconfirmthecapacitorpolarityintheapplication. PowerSupplyDecoupling,C S The TPA741 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 µF, placed as close as possible to the device V lead, works best. For filtering lower DD frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater, placed near the audio poweramplifierisrecommended. MidrailBypassCapacitor,C B The midrail bypass capacitor, C , is the most critical capacitor and serves several important functions. During B start-up or recovery from shutdown mode, C determines the rate at which the amplifier starts up. The second B function is to reduce noise produced by the power supply caused by coupling into the output drive signal. This noiseisfromthemidrailgenerationcircuit internal to the amplifier, which appears as degraded PSRR and THD + N. The capacitor is fed from a 250-kW source inside the amplifier. To keep the start-up pop as low as possible, therelationshipshowninEquation10shouldbemaintained.Thisensuresthattheinputcapacitorisfullycharged beforethebypasscapacitorisfullychargedandtheamplifierstartsup. 10 1 (cid:3) (cid:4)CB(cid:1)250kW (cid:5) (cid:4)RF(cid:2)RI(cid:5)CI (10) As an example, consider a circuit where C is 2.2 µF, C is 0.47 µF, R is 50 kW, and R is 10 kW. Inserting these B I F I valuesintotheEquation10weget: 18.2£ 35.5 which satisfies the rule. Bypass capacitor, C , values of 0.1-µF to 2.2-µF ceramic or tantalum low-ESRcapacitors B arerecommendedforthebestTHDandnoiseperformance. 16

TPA741 www.ti.com SLOS316C–JUNE2000–REVISEDJUNE2004 USING LOW-ESR CAPACITORS Low-ESR capacitors are recommended throughout this applications section. A real (as opposed to ideal) capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance,themoretherealcapacitorbehaveslikeanidealcapacitor. 5-V Versus 3.3-V OPERATION The TPA741 operates over a supply range of 2.5 V to 5.5 V. This data sheet provides full specifications for 5-V and 3.3-V operation, as these are considered to be the two most common standard voltages. There are no special considerations for 3.3-V versus 5-V operation with respect to supply bypassing, gain setting, or stability. The most important consideration is that of output power. Each amplifier in TPA741 can produce a maximum voltage swing of V - 1 V. This means, for 3.3-V operation, clipping starts to occur when V = 2.3 V, as DD O(PP) opposed to V = 4 V for 5-V operation. The reduced voltage swing subsequently reduces maximum output O(PP) powerintoan8-W loadbeforedistortionbecomessignificant. Operation from 3.3-V supplies, as can be shown from the efficiency formula in Equation 4, consumes approximatelytwo-thirdsthesupplypowerofoperationfrom5-Vsuppliesforagivenoutput-powerlevel. HEADROOM AND THERMAL CONSIDERATIONS Linear power amplifiers dissipate a significant amount of heat in the package under normal operating conditions. A typical music CD requires 12 dB to 15 dB of dynamic headroom to pass the loudest portions without distortion as compared with the average power output. From the TPA741 data sheet, one can see that when the TPA741 isoperatingfroma5-Vsupplyintoa8-W speakerthat700-mWpeaksareavailable.ConvertingwattstodB: P P (cid:1) 10Log W (cid:1)10Log 700mW (cid:1)–1.5dB dB P 1W ref Subtractingtheheadroomrestrictiontoobtaintheaveragelisteninglevelwithoutdistortionyields: 1.5dB–15dB =–16.5(15-dBheadroom) 1.5dB–12dB =–13.5(12-dBheadroom) 1.5dB–9dB =–10.5(9-dBheadroom) 1.5dB–6dB =–7.5(6-dBheadroom) 1.5dB–3dB =–4.5(3-dBheadroom) ConvertingdBbackintowatts: P (cid:1) 10PdB(cid:2)10 xP W ref = 22mW(15-dBheadroom) = 44mW(12-dBheadroom) = 88mW(9-dBheadroom) = 175mW(6-dBheadroom) = 350mW(3-dBheadroom) This is valuable information to consider when attempting to estimate the heat dissipation requirements for the amplifier system. Comparing the absolute worst case, which is 700 mW of continuous power output with 0 dB of headroom, against 12-dB and 15-dB applications drastically affects maximum ambient temperature ratings for the system. Using the power dissipation curves for a 5-V, 8-W system, the internal dissipation in the TPA741 and maximumambienttemperaturesisshowninTable2. 17

TPA741 www.ti.com SLOS316C–JUNE2000–REVISEDJUNE2004 Table2.TPA741PowerRating,5-V,8-W, BTL DPACKAGE DGNPACKAGE PEAKOUTPUT POWER (SOIC) (MSOP) AVERAGE POWER OUTPUTPOWER DISSIPATION MAXIMUMAMBIENT MAXIMUMAMBIENT (mW) (mW) TEMPERATURE TEMPERATURE (0(cid:176) CFM) (0(cid:176) CFM) 700 700mW 675 34(cid:176)C 110(cid:176)C 700 350mW(3dB) 595 47(cid:176)C 115(cid:176)C 700 176mW(6dB) 475 68(cid:176)C 122(cid:176)C 700 88mW(9dB) 350 89(cid:176)C 125(cid:176)C 700 44mW(12dB) 225 111(cid:176)C 125(cid:176)C Table 2 shows that the TPA741 can be used to its full 700-mW rating without any heat sinking in still air up to 110(cid:176)C and34(cid:176)C fortheDGNpackage(MSOP)andDpackage(SOIC),respectively. 18

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPA741D ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 TPA741 & no Sb/Br) TPA741DGN ACTIVE HVSSOP DGN 8 80 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 AJD & no Sb/Br) TPA741DGNG4 ACTIVE HVSSOP DGN 8 80 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 AJD & no Sb/Br) TPA741DGNR ACTIVE HVSSOP DGN 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 AJD & no Sb/Br) TPA741DGNRG4 ACTIVE HVSSOP DGN 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 AJD & no Sb/Br) TPA741DR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 TPA741 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 6-Sep-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPA741DGNR HVSSOP DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPA741DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 6-Sep-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPA741DGNR HVSSOP DGN 8 2500 358.0 335.0 35.0 TPA741DR SOIC D 8 2500 350.0 350.0 43.0 PackMaterials-Page2

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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PACKAGE OUTLINE DGN0008D PowerPAD TM VSSOP - 1.1 mm max height SCALE 4.000 SMALL OUTLINE PACKAGE C 5.05 A 4.75 TYP 0.1 C PIN 1 INDEX AREA SEATING PLANE 6X 0.65 8 1 2X 3.1 1.95 2.9 NOTE 3 4 5 0.38 8X 0.25 B 3.1 0.13 C A B 2.9 NOTE 4 0.23 0.13 SEE DETAIL A EXPOSED THERMAL PAD 4 5 0.25 GAGE PLANE 1.89 1.63 9 1.1 MAX 8 1 0.7 0.15 0 -8 0.05 0.4 DETA 20AIL A 1.57 TYPICAL 1.28 4225481/A 11/2019 PowerPAD is a trademark of Texas Instruments. NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-187. www.ti.com

EXAMPLE BOARD LAYOUT DGN0008D PowerPAD TM VSSOP - 1.1 mm max height SMALL OUTLINE PACKAGE (2) NOTE 9 METAL COVERED BY SOLDER MASK (1.57) SYMM SOLDER MASK DEFINED PAD 8X (1.4) (R0.05) TYP 8 8X (0.45) 1 (3) 9 SYMM NOTE 9 (1.89) 6X (0.65) (1.22) 5 4 ( 0.2) TYP VIA (0.55) SEE DETAILS (4.4) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 15X SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDE15.000R MASK DETAILS 4225481/A 11/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 8. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. 9. Size of metal pad may vary due to creepage requirement. www.ti.com

EXAMPLE STENCIL DESIGN DGN0008D PowerPAD TM VSSOP - 1.1 mm max height SMALL OUTLINE PACKAGE (1.57) BASED ON 0.125 THICK STENCIL SYMM 8X (1.4) (R0.05) TYP 8 8X (0.45) 1 (1.89) SYMM BASED ON 0.125 THICK STENCIL 6X (0.65) 4 5 METAL COVERED SEE TABLE FOR BY SOLDER MASK DIFFERENT OPENINGS (4.4) FOR OTHER STENCIL THICKNESSES SOLDER PASTE EXAMPLE EXPOSED PAD 9: 100% PRINTED SOLDER COVERAGE BY AREA SCALE: 15X STENCIL SOLDER STENCIL THICKNESS OPENING 0.1 1.76 X 2.11 0.125 1.57 X 1.89 (SHOWN) 0.15 1.43 X 1.73 0.175 1.33 X 1.60 4225481/A 11/2019 NOTES: (continued) 10. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 11. Board assembly site may have different recommendations for stencil design. www.ti.com

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