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TP0610K-T1-GE3产品简介:
ICGOO电子元器件商城为您提供TP0610K-T1-GE3由Vishay设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 TP0610K-T1-GE3价格参考¥0.72-¥0.72。VishayTP0610K-T1-GE3封装/规格:晶体管 - FET,MOSFET - 单, 表面贴装 P 沟道 60V 185mA(Ta) 350mW(Ta) SOT-23-3(TO-236)。您可以下载TP0610K-T1-GE3参考资料、Datasheet数据手册功能说明书,资料中有TP0610K-T1-GE3 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | |
ChannelMode | Enhancement |
描述 | MOSFET P-CH 60V 185MA TO-236MOSFET 60V 0.185A 350mW 10ohm @ 4.5V |
产品分类 | FET - 单分离式半导体 |
FET功能 | 标准 |
FET类型 | MOSFET P 通道,金属氧化物 |
Id-ContinuousDrainCurrent | 53 A |
Id-连续漏极电流 | 53 A |
品牌 | Vishay / SiliconixVishay Siliconix |
产品手册 | |
产品图片 | |
rohs | 符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 晶体管,MOSFET,Vishay / Siliconix TP0610K-T1-GE3TrenchFET® |
数据手册 | |
产品型号 | TP0610K-T1-GE3TP0610K-T1-GE3 |
Pd-PowerDissipation | 350 mW |
Pd-功率耗散 | 350 mW |
RdsOn-Drain-SourceResistance | 10 Ohms |
RdsOn-漏源导通电阻 | 10 Ohms |
Vds-Drain-SourceBreakdownVoltage | - 60 V |
Vds-漏源极击穿电压 | - 60 V |
Vgs-Gate-SourceBreakdownVoltage | +/- 20 V |
Vgs-栅源极击穿电压 | 20 V |
不同Id时的Vgs(th)(最大值) | 3V @ 250µA |
不同Vds时的输入电容(Ciss) | 23pF @ 25V |
不同Vgs时的栅极电荷(Qg) | 1.7nC @ 15V |
不同 Id、Vgs时的 RdsOn(最大值) | 6 欧姆 @ 500mA,10V |
产品种类 | MOSFET |
供应商器件封装 | SOT-23-3(TO-236) |
其它名称 | TP0610K-T1-GE3-ND |
功率-最大值 | 350mW |
包装 | 带卷 (TR) |
商标 | Vishay / Siliconix |
安装类型 | 表面贴装 |
安装风格 | Through Hole |
封装 | Reel |
封装/外壳 | TO-236-3,SC-59,SOT-23-3 |
封装/箱体 | TO-236-3 |
工厂包装数量 | 3000 |
晶体管极性 | P-Channel |
最大工作温度 | + 150 C |
最小工作温度 | - 55 C |
标准包装 | 3,000 |
漏源极电压(Vdss) | 60V |
电流-连续漏极(Id)(25°C时) | 185mA (Ta) |
通道模式 | Enhancement |
配置 | Single |
零件号别名 | TP0610K-GE3 |
TP0610K Vishay Siliconix P-Channel 60 V (D-S) MOSFET FEATURES PRODUCT SUMMARY • Halogen-free According to IEC 61249-2-21 VDS (V) RDS(on) () VGS(th) (V) ID (mA) Definition (cid:129) TrenchFET® Power MOSFET - 60 6 at V = - 10 V - 1 to - 3 - 185 GS (cid:129) High-Side Switching (cid:129) Low On-Resistance: 6 (cid:129) Low Threshold: - 2 V (typ.) (cid:129) Fast Swtiching Speed: 20 ns (typ.) TO-236 (cid:129) Low Input Capacitance: 20 pF (typ.) (SOT-23) (cid:129) 2000 V ESD Protection Marking Code: 6Kwll (cid:129) Compliant to RoHS Directive 2002/95/EC 6K = Part Number Code for TP0610K G 1 w = Week Code ll = Lot Traceability APPLICATIONS 3 D (cid:129) Drivers: Relays, Solenoids, Lamps, Hammers, Display, Memories, Transistors, etc. S 2 (cid:129) Battery Operated Systems (cid:129) Power Supply Converter Circuits (cid:129) Solid-State Relays Top View Ordering Information: TP0610K-T1-E3 (Lead (Pb)-free) BENEFITS TP0610K-T1-GE3 (Lead (Pb)-free and Halogen-free) (cid:129) Ease in Driving Switches (cid:129) Low Offset (Error) Voltage (cid:129) Low-Voltage Operation (cid:129) High-Speed Circuits (cid:129) Easily Driven without Buffer ABSOLUTE MAXIMUM RATINGS T = 25 °C, unless otherwise noted A Parameter Symbol Limit Unit Drain-Source Voltage VDS - 60 V Gate-Source Voltage VGS ± 20 TA = 25 °C - 185 Continuous Drain Currenta ID TA = 100 °C - 115 mA Pulsed Drain Currentb IDM - 800 TA = 25 °C 350 Power Dissipationa PD mW TA = 100 °C 140 Maximum Junction-to-Ambienta RthJA 350 °C/W Operating Junction and Storage Temperature Range TJ, Tstg - 55 to 150 °C Notes: a. Surface mounted on FR4 board. b. Pulse width limited by maximum junction temperature. Document Number: 71411 www.vishay.com S10-1476-Rev. H, 05-Jul-10 1
TP0610K Vishay Siliconix SPECIFICATIONS T = 25 °C, unless otherwise noted A Limits Parameter Symbol Test Conditions Min. Typ.a Max. Unit Static Drain-Source Breakdown Voltage V V = 0 V, I = - 10 µA - 60 DS GS D V Gate-Threshold Voltage V V = V , I = - 250 µA - 1 - 3 GS(th) DS GS D V = 0 V, V = ± 20 V ± 10 µA DS GS V = 0 V, V = ± 10 V ± 200 DS GS Gate-Body Leakage I GSS V = 0 V, V = ± 10 V, T = 85 °C ± 500 DS GS J V = 0 V, V = ± 5 V ± 100 nA DS GS V = - 60 V, V = 0 V - 25 DS GS Zero Gate Voltage Drain Current I DSS V = - 60 V, V = 0 V, T = 85 °C - 250 DS GS J V = - 10 V, V = - 4.5 V - 50 On-State Drain Currenta I GS DS mA D(on) V = - 10 V, V = - 10 V - 600 GS DS V = - 4.5 V, I = - 25 mA 10 GS D Drain-Source On-Resistancea R V = - 10 V, I = - 500 mA 6 DS(on) GS D V = - 10 V, I = - 500 mA, T =125 °C 9 GS D J Forward Transconductancea g V = - 10 V, I = - 100 mA 80 mS fs DS D Diode Forward Voltage V I = - 200 mA, V = 0 V - 1.4 V SD S GS Dynamic Total Gate Charge Q 1.7 g V = - 30 V, V = - 15 V Gate-Source Charge Q DS GS 0.26 nC gs I - 500 mA D Gate-Drain Charge Q 0.46 gd Input Capacitance C 23 iss V = - 25 V, V = 0 V Output Capacitance C DS GS 10 pF oss f = 1 MHz Reverse Transfer Capacitance C 5 rss Switchingb Turn-On Time td(on) VDD = - 25 V, RL = 150 20 ns Turn-Off Time td(off) ID - 200 mA, VGEN = - 10 V, Rg = 10 35 Notes: a. Pulse test: PW 300 µs duty cycle 2 %. b. Switching time is essentially independent of operating temperature. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com Document Number: 71411 2 S10-1476-Rev. H, 05-Jul-10
TP0610K Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 1.0 1200 VGS = 10 V TJ = - 55 °C 7 V 0.8 8 V A) 900 A) m 25 °C nt ( 0.6 nt ( e e urr urr 125 °C C 6 V C 600 n n Drai 0.4 Drai - D 5 V - D I I 300 0.2 4 V 0.0 0 0 1 2 3 4 5 0 2 4 6 8 10 VDS- Drain-to-Source Voltage (V) VGS - Gate-to-Source Voltage (V) Output Characteristics Transfer Characteristics 20 40 VGS= 0 V 16 VGS = 4.5 V 32 Ω) e ( F) Ciss stanc 12 ce (p 24 On-Resi 8 VGS = 5 V apacitan 16 - C DS(on) VGS = 10 V C - Coss R 4 8 Crss 0 0 0 200 400 600 800 1000 0 5 10 15 20 25 ID - Drain Current (mA) VDS- Drain-to-Source Voltage (V) On-Resistance vs. Drain Current Capacitance 15 1.8 ID = 500 mA age (V) 12 VDS = 30 V ce 1.5 VGS = 10 V at 500 mA Gate-to-Source Volt 69 VDS = 48 V On-Resistan - DS(on)(Normalized) 001...692 VGS = 4.5 V at 25 mA - R S G 3 V 0.3 0 0.0 0.0 0.3 0.6 0.9 1.2 1.5 1.8 -50 - 25 0 25 50 75 100 125 150 Qg- Total Gate Charge (nC) TJ - Junction Temperature (°C) Gate Charge On-Resistance vs. Junction Temperature Document Number: 71411 www.vishay.com S10-1476-Rev. H, 05-Jul-10 3
TP0610K Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 1000 10 VGS = 0 V Ω) 8 ID = 500 mA urrent (A) 100 TJ = 125 °C esistance ( 6 C R e n- - SourcIS 10 TJ = 25 °C R - ODS(on) 24 ID = 200 mA TJ = - 55 °C 1 0 0.00 0.3 0.6 0.9 1.2 1.5 0 2 4 6 8 10 VSD- Source-to-Drain Voltage (V) VGS- Gate-to-Source Voltage (V) Source-Drain Diode Forward Voltage On-Resistance vs. Gate-Source Voltage 0.5 3 0.4 ID = 250 µA 2.5 0.3 ance (V) 0.2 W) 2 Vari 0.1 er ( 1.5 h) ow GS(t -0.0 P V 1 -0.1 TA = 25 °C 0.5 -0.2 -0.3 0 -50 -25 0 25 50 75 100 125 150 0.01 0.1 1 10 100 600 TJ - Junction Temperature (°C) Time (s) Threshold Voltage Variance Over Temperature Single Pulse Power, Junction-to-Ambient 2 nt 1 Transieance Duty Cycle = 0.5 ctive mped 0.2 zed Effehermal I 0.1 0.1 NPoDteMs: maliT 0.05 or t1 N 0.02 1. Duty Cyclet,2 D = t1 t2 2. Per Unit Base = RthJA = 350 °C/W Single Pulse 3. TJM- TA = PDMZthJA(t) 4. Surface Mounted 0.01 10-4 10-3 10-2 10-1 1 10 100 600 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Ambient Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?71411. www.vishay.com Document Number: 71411 4 S10-1476-Rev. H, 05-Jul-10
Package Information Vishay Siliconix SOT-23 (TO-236): 3-LEAD b 3 E1 E 1 2 e S e1 D 0.10 mm C A A2 0.004" C q 0.25 mm Gauge Plane Seating Plane Seating Plane A1 C L L1 MILLIMETERS INCHES Dim Min Max Min Max A 0.89 1.12 0.035 0.044 A1 0.01 0.10 0.0004 0.004 A2 0.88 1.02 0.0346 0.040 b 0.35 0.50 0.014 0.020 c 0.085 0.18 0.003 0.007 D 2.80 3.04 0.110 0.120 E 2.10 2.64 0.083 0.104 E1 1.20 1.40 0.047 0.055 e 0.95 BSC 0.0374 Ref e1 1.90 BSC 0.0748 Ref L 0.40 0.60 0.016 0.024 L1 0.64 Ref 0.025 Ref S 0.50 Ref 0.020 Ref q 3° 8° 3° 8° ECN: S-03946-Rev. K, 09-Jul-01 DWG: 5479 Document Number: 71196 www.vishay.com 09-Jul-01 1
AN807 Vishay Siliconix (cid:1) Mounting LITTLE FOOT SOT-23 Power MOSFETs Wharton McDaniel Surface-mounted LITTLE FOOT power MOSFETs use integrated ambient air. This pattern uses all the available area underneath the circuit and small-signal packages which have been been modified body for this purpose. to provide the heat transfer capabilities required by power devices. Leadframe materials and design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same. 0.114 2.9 0.081 See Application Note 826, Recommended Minimum Pad 2.05 Patterns With Outline Drawing Access for Vishay Siliconix 0.150 3.8 MOSFETs, (http://www.vishay.com/doc?72286), for the basis of the pad design for a LITTLE FOOT SOT-23 power MOSFET 0.059 footprint . In converting this footprint to the pad set for a power 1.5 device, designers must make two connections: an electrical connection and a thermal connection, to draw heat away from the package. 0.0394 0.037 1.0 0.95 FIGURE 1. Footprint With Copper Spreading The electrical connections for the SOT-23 are very simple. Pin 1 is the gate, pin 2 is the source, and pin 3 is the drain. As in the other LITTLE FOOT packages, the drain pin serves the additional Since surface-mounted packages are small, and reflow soldering function of providing the thermal connection from the package to is the most common way in which these are affixed to the PC the PC board. The total cross section of a copper trace connected board, “thermal” connections from the planar copper to the pads to the drain may be adequate to carry the current required for the have not been used. Even if additional planar copper area is used, application, but it may be inadequate thermally. Also, heat spreads there should be no problems in the soldering process. The actual in a circular fashion from the heat source. In this case the drain pin solder connections are defined by the solder mask openings. By is the heat source when looking at heat spread on the PC board. combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. Figure 1 shows the footprint with copper spreading for the SOT-23 A final item to keep in mind is the width of the power traces. The package. This pattern shows the starting point for utilizing the absolute minimum power trace width must be determined by the board area available for the heat spreading copper. To create this amount of current it has to carry. For thermal reasons, this pattern, a plane of copper overlies the drain pin and provides minimum width should be at least 0.020 inches. The use of wide planar copper to draw heat from the drain lead and start the traces connected to the drain plane provides a low-impedance process of spreading the heat so it can be dissipated into the path for heat to move away from the device. Document Number: 70739 www.vishay.com 26-Nov-03 1
Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR SOT-23 0.037 0.022 (0.950) (0.559) 6 2) 9 5) 0 9 4 4 1 6 0 2 0. 2. 0. 1. ( ( 9 4) 2 2 0 7 0. 0. ( 0.053 (1.341) 0.097 (2.459) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index Return to Index A P P L I C A T I O N N O T E Document Number: 72609 www.vishay.com Revision: 21-Jan-08 25
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