Product Order Technical Tools & Support & Folder Now Documents Software Community TLV702 SLVSAG6D–SEPTEMBER2010–REVISEDJULY2019 TLV702 300-mA, Low-I , Low-Dropout Regulator Q 1 Features 3 Description • VeryLowDropout: The TLV702 series of low-dropout (LDO) linear 1 regulators are low quiescent current devices with – 37mVatI =50mA,V =2.8V OUT OUT excellent line and load transient performance. These – 75mVatI =100mA,V =2.8V LDOs are designed for power-sensitive applications. OUT OUT – 220mVatI =300mA,V =2.8V A precision bandgap and error amplifier provides OUT OUT overall 2% accuracy. Low output noise, very high • 2%Accuracy power-supply rejection ratio (PSRR), and low-dropout • LowIQ:35μA voltage make this series of devices ideal for a wide • Fixed-OutputVoltageCombinationsPossiblefrom selection of battery-operated handheld equipment. All 1.2Vto4.8V device versions have thermal shutdown and current limitforsafety. • HighPSRR:68dBat1kHz • StableWithEffectiveCapacitanceof0.1 μF(1) Furthermore, these devices are stable with an effective output capacitance of only 0.1 μF. This • ThermalShutdownandOvercurrentProtection feature enables the use of cost-effective capacitors • Packages:5-PinSOT-23and1.5-mm ×1.5-mm, that have higher bias voltages and temperature 6-PinWSON derating. The devices regulate to specified accuracy (1) SeetheInputandOutputCapacitorRequirementsin withnooutputload. ApplicationInformation. TheTLV702Pseries also provides an active pulldown circuittoquicklydischargetheoutputs. 2 Applications The TLV702 series of LDO linear regulators are • WirelessHandsets available in SOT23-5 and 1.5-mm × 1.5-mm WSON-6 • SmartPhones packages. • ZigBee®Networks DeviceInformation(1) • Bluetooth®Devices PARTNUMBER PACKAGE BODYSIZE(NOM) • Li-IonBattery-OperatedHandheldProducts SOT-23(5) 2.90mm×1.60mm • WLANandOtherPCAdd-onCards TLV702 WSON(6) 1.50mm×1.50mm (1) For all available packages, see the orderable addendum at theendofthedatasheet. TypicalApplicationCircuit VIN IN OUT VOUT C C 1mF IN OUT Ceramic TLV702xx On Off EN GND 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

TLV702 SLVSAG6D–SEPTEMBER2010–REVISEDJULY2019 www.ti.com Table of Contents 1 Features.................................................................. 1 8 ApplicationandImplementation........................ 13 2 Applications........................................................... 1 8.1 ApplicationInformation............................................13 3 Description............................................................. 1 8.2 TypicalApplication..................................................13 4 RevisionHistory..................................................... 2 9 PowerSupplyRecommendations...................... 15 5 PinConfigurationandFunctions......................... 3 9.1 PowerDissipation...................................................15 6 Specifications......................................................... 4 10 Layout................................................................... 15 6.1 AbsoluteMaximumRatings......................................4 10.1 LayoutGuidelines.................................................15 6.2 ESDRatings ............................................................4 10.2 LayoutExamples...................................................16 6.3 RecommendedOperatingConditions.......................4 11 DeviceandDocumentationSupport................. 17 6.4 ThermalInformation..................................................4 11.1 DeviceSupport ....................................................17 6.5 ElectricalCharacteristics...........................................5 11.2 DocumentationSupport........................................17 6.6 TypicalCharacteristics..............................................6 11.3 ReceivingNotificationofDocumentationUpdates17 7 DetailedDescription............................................ 10 11.4 CommunityResources..........................................17 7.1 Overview.................................................................10 11.5 Trademarks...........................................................17 7.2 FunctionalBlockDiagrams.....................................10 11.6 ElectrostaticDischargeCaution............................17 7.3 FeatureDescription.................................................11 11.7 Glossary................................................................18 7.4 DeviceFunctionalModes........................................12 12 Mechanical,Packaging,andOrderable Information........................................................... 18 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionC(March2015)toRevisionD Page • ChangedOUTpinnumberfrom5to3inWSONcolumnofPinFunctionstable.................................................................. 3 • AddedfootnotetomaximumENvoltagespecification .......................................................................................................... 4 • AddedparameternamestoRecommendedOperatingConditionstable............................................................................... 4 ChangesfromRevisionB(February2011)toRevisionC Page • AddedESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection ................................................................................................. 1 • ChangedPinConfigurationandFunctionssection;updatedtableformat ............................................................................ 3 • DeletedOrderingInformationtable ....................................................................................................................................... 3 • Changed"free-airtemperature"to"junctiontemperature"inAbsoluteMaximumRatingsconditionstatement ...................4 • ChangedThermalInformationtable;updatedthermalresistancevaluesforallpackages .................................................. 4 • DeletedDissipationRatingstable.......................................................................................................................................... 4 • ChangedV dropoutvoltagetestconditions;deletedI =50mAandI =100mAwithV =2.8Vtest DO OUT OUT OUT parameters............................................................................................................................................................................. 5 • DeletedEVMDissipationRatingstable............................................................................................................................... 16 ChangesfromRevisionA(October2010)toRevisionB Page • AddedSON-6(DSE)packageandrelatedreferencestodatasheet..................................................................................... 1 2 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:TLV702

TLV702 www.ti.com SLVSAG6D–SEPTEMBER2010–REVISEDJULY2019 5 Pin Configuration and Functions DBVPackage 5-PinSOT-23 DSEPackage TopView 6-PinWSON TopView IN 1 5 OUT IN 1 6 EN GND 2 5 N/C GND 2 OUT 3 4 N/C EN 3 4 NC PinFunctions PIN I/O DESCRIPTION NAME SOT-23 WSON Inputpin.Asmall,1-μFceramiccapacitorisrecommendedfromthispintogroundto IN 1 1 I assurestabilityandgoodtransientperformance.SeeInputandOutputCapacitor RequirementsinApplicationInformationformoredetails. GND 2 2 — Groundpin Enablepin.DrivingENover0.9Vturnsontheregulator.DrivingENbelow0.4Vputs theregulatorintoshutdownmodeandreducesoperatingcurrentto1μA,nominal. EN 3 6 I ForTLV702P,outputvoltageisdischargedthroughaninternal120-Ωresistorwhen deviceisshutdown. NC 4 4,5 — Noconnection.Thispincanbetiedtogroundtoimprovethermaldissipation. Regulatedoutputvoltagepin.Asmall,1-μFceramiccapacitorisneededfromthispin OUT 5 3 O togroundtoassurestability.SeeInputandOutputCapacitorRequirementsin ApplicationInformationformoredetails. Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:TLV702

TLV702 SLVSAG6D–SEPTEMBER2010–REVISEDJULY2019 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings overoperatingjunctiontemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT IN –0.3 6 Voltage(2) EN –0.3 6(3) V OUT –0.3 6 Current(source) OUT Internallylimited Outputshort-circuitduration Indefinite Totalcontinuouspowerdissipation SeeThermalInformation Operatingvirtualjunction,T –55 150 J Temperature °C Storage,T –55 150 stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommendedOperating Conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmyaffectdevicereliability. (2) Allvoltagesarewithrespecttonetworkgroundterminal. (3) TheabsolutemaximumratingisV +0.3Vor6.0V,whicheverissmaller. IN 6.2 ESD Ratings VALUE UNIT Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001,allpins(1) ±2000 V(ESD) Electrostaticdischarge Chargeddevicemodel(CDM),perJEDECspecificationJESD22-C101, V allpins(2) ±500 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted). MIN NOM MAX UNIT V Inputvoltage 2 5.5 V IN V Outputvoltage 1.2 4.8 V OUT I Outputcurrent 0 300 mA OUT 6.4 Thermal Information TLV702 THERMALMETRIC(1) DBV(SOT-23) DSE(WSON) UNIT 5PINS 6PINS R Junction-to-ambientthermalresistance 249.2 321.3 °C/W θJA R Junction-to-case(top)thermalresistance 136.4 207.9 °C/W θJC(top) R Junction-to-boardthermalresistance 85.9 281.5 °C/W θJB ψ Junction-to-topcharacterizationparameter 19.5 42.4 °C/W JT ψ Junction-to-boardcharacterizationparameter 85.3 284.8 °C/W JB R Junction-to-case(bottom)thermalresistance N/A 142.3 °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. 4 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:TLV702

TLV702 www.ti.com SLVSAG6D–SEPTEMBER2010–REVISEDJULY2019 6.5 Electrical Characteristics AtV =V +0.5Vor2V(whicheverisgreater);I =10mA,V =0.9V,C =1μF,andT =–40°Cto+125°C, IN OUT(nom) OUT EN OUT J unlessotherwisenoted.TypicalvaluesareatT =25°C. J PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V Inputvoltagerange 2 5.5 V IN V DCoutputaccuracy –40°C≤T ≤125°C –2% 0.5% 2% OUT J V +0.5V≤V ≤5.5V, ΔV Lineregulation OUT(nom) IN 1 5 mV OUT(ΔVIN) I =10mA OUT ΔV Loadregulation 0mA≤I ≤300mA 1 15 mV OUT(ΔIOUT) OUT V Dropoutvoltage(1) V =0.98×V ,I =300mA 260 375 mV DO IN OUT(nom) OUT I Outputcurrentlimit V =0.9×V 320 500 860 mA CL OUT OUT(nom) I =0mA 35 55 μA OUT I Groundpincurrent GND I =300mA,V =V +0.5V 370 μA OUT IN OUT V ≤0.4V,V =2V 400 nA EN IN ISHDN Groundpincurrent(shutdown) VEN≤0.4V,2V≤VIN≤4.5V, 1 2 μA T =–40°Cto+85°C J V =2.3V,V =1.8V, PSRR Power-supplyrejectionratio IN OUT 68 dB I =10mA,f=1kHz OUT BW=100Hzto100kHz, V Outputnoisevoltage 48 μV n V =2.3V,V =1.8V,I =10mA RMS IN OUT OUT t Start-uptime(2) C =1μF,I =300mA 100 μs STR OUT OUT V Enablepinhigh(enabled) 0.9 V V EN(high) IN V Enablepinlow(disabled) 0 0.4 V EN(low) I Enablepincurrent V =V =5.5V 0.04 μA EN IN EN UVLO Undervoltagelockout V rising 1.9 V IN Activepulldownresistance R V =0V 120 Ω DISCHARGE (TLV702Ponly) EN Shutdown,temperatureincreasing 165 °C T Thermalshutdowntemperature sd Reset,temperaturedecreasing 145 °C T Operatingjunctiontemperature –40 125 °C J (1) V ismeasuredfordeviceswithV ≥2.35V. DO OUT(nom) (2) Start-uptime=timefromENassertionto0.98×V . OUT(nom) Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:TLV702

TLV702 SLVSAG6D–SEPTEMBER2010–REVISEDJULY2019 www.ti.com 6.6 Typical Characteristics Overoperatingtemperaturerange(T =–40°Cto+125°C),V =V +0.5Vor2V,whicheverisgreater;I =10mA, J IN OUT(nom) OUT V =V ,C =1μF,unlessotherwisenoted.TypicalvaluesareatT =25°C. EN IN OUT J 1.90 1.90 V = 1.8 V V = 1.8 V 1.88 OUT 1.88 OUT I = 10 mA I = 300 mA OUT OUT 1.86 1.86 1.84 1.84 V) 1.82 V) 1.82 (UT 1.80 (UT 1.80 O O V 1.78 V 1.78 1.76 +125°C 1.76 +125°C 1.74 +85°C 1.74 +85°C +25°C +25°C 1.72 -40°C 1.72 -40°C 1.70 1.70 2.1 2.6 3.1 3.6 4.1 4.6 5.1 5.6 2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 V (V) V (V) IN IN Figure1.LineRegulation Figure2.LineRegulation 1.90 350 I = 300 mA 1.88 VOUT= 1.8 V 300 OUT 1.86 1.84 250 (V) 1.82 mV) 200 VOUT 11..8708 V(DO 150 1.76 +125°C 100 +125°C 1.74 +85°C +85°C +25°C 50 +25°C 1.72 -40°C –40°C 1.70 0 0 50 100 150 200 250 300 2.25 2.75 3.25 3.75 4.25 4.75 I (mA) V (V) OUT IN Figure3.LoadRegulation Figure4.DropoutVoltagevsInputVoltage 300 1.90 VOUT= 4.8 V 1.88 VOUT= 1.8 V 250 1.86 1.84 200 V(mV)DO 150 V(V)OUT 111...887208 100 +125°C 1.76 +85°C 1.74 10mA 50 +25°C 150mA -40°C 1.72 200mA 0 1.70 0 50 100 150 200 250 300 -40 -25 -10 5 20 35 50 65 80 95 110 125 I (mA) Temperature (°C) OUT Figure5.DropoutVoltagevsOutputCurrent Figure6.OutputVoltagevsTemperature 6 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:TLV702

TLV702 www.ti.com SLVSAG6D–SEPTEMBER2010–REVISEDJULY2019 Typical Characteristics (continued) Overoperatingtemperaturerange(T =–40°Cto+125°C),V =V +0.5Vor2V,whicheverisgreater;I =10mA, J IN OUT(nom) OUT V =V ,C =1μF,unlessotherwisenoted.TypicalvaluesareatT =25°C. EN IN OUT J 50 450 V = 1.8 V 45 VOUT= 1.8 V 400 OUT 40 350 35 300 A) 30 A) 250 m m ( 25 ( ND ND 200 IG 20 IG 150 15 +125°C +125°C 10 +85°C 100 +85°C 5 +25°C 50 +25°C -40°C -40°C 0 0 2.1 2.6 3.1 3.6 4.1 4.6 5.1 5.6 0 50 100 150 200 250 300 V (V) I (mA) IN OUT Figure7.GroundPinCurrentvsInputVoltage Figure8.GroundPinCurrentvsLoad 50 2.5 V = 1.8 V 45 OUT VOUT= 1.8 V 40 2 35 A) 30 A) 1.5 I(mGND 2250 I(mSHDN 1 15 +125°C 10 0.5 +85°C +25°C 5 -40°C 0 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 2.1 2.6 3.1 3.6 4.1 4.6 5.1 5.6 Temperature (°C) V (V) IN Figure9.GroundPinCurrentvsTemperature Figure10.ShutdownCurrentvsInputVoltage 700 100 VOUT= 1.8 V 90 IOUT= 10 mA 600 80 I = 150 mA OUT 500 70 A) 400 dB) 60 (m R ( 50 ILIM 300 PSR 40 200 +125°C 30 +85°C 20 100 +25°C -40°C 10 V -V = 0.5 V IN OUT 0 0 2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 10 100 1 k 10 k 100 k 1 M 10 M VIN(V) Frequency (Hz) Figure11.CurrentLimitvsInputVoltage Figure12.Power-SupplyRippleRejectionvsFrequency Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:TLV702

TLV702 SLVSAG6D–SEPTEMBER2010–REVISEDJULY2019 www.ti.com Typical Characteristics (continued) Overoperatingtemperaturerange(T =–40°Cto+125°C),V =V +0.5Vor2V,whicheverisgreater;I =10mA, J IN OUT(nom) OUT V =V ,C =1μF,unlessotherwisenoted.TypicalvaluesareatT =25°C. EN IN OUT J 80 10 1 kHz VOUT= 1.8 V )Hz VOUT= 1.8 V 70 ÖV/ IOUT= 10 mA 60 10 kHz msity ( 1 CIN= COUT= 1mF n B) 50 De PSRR (d 4300 100 kHz al Noise 0.1 ctr 20 pe 0.01 S 10 put ut O 0 0.001 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 10 100 1 k 10 k 100 k 1 M 10 M Input Voltage (V) Frequency (Hz) Figure13.Power-SupplyRippleRejectionvsInputVoltage Figure14.OutputSpectralNoiseDensityvsFrequency tR= tF= 1ms 200 mA tR= tF= 1ms 10 mA div div 0 mA A/ A/ 0 m IOUT 0 mA 0 m IOUT 0 2 1 mV/div VOUT mV/div VOUT 50 5 V = 1.8 V V = 1.8 V OUT OUT 10ms/div 10ms/div Figure15.LoadTransientResponse Figure16.LoadTransientResponse tR= tF= 1ms tR= tF=1ms 300 mA v IOUT 50 mA div mA/di 0 mA 0 mA/ IOUT 0 mA 50 20 v V/di VOUT m div VOUT 0 V/ 10 m 0 2 V = 1.8 V V = 1.8 V OUT OUT 10ms/div 10ms/div Figure17.LoadTransientResponse Figure18.LoadTransientResponse 8 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:TLV702

TLV702 www.ti.com SLVSAG6D–SEPTEMBER2010–REVISEDJULY2019 Typical Characteristics (continued) Overoperatingtemperaturerange(T =–40°Cto+125°C),V =V +0.5Vor2V,whicheverisgreater;I =10mA, J IN OUT(nom) OUT V =V ,C =1μF,unlessotherwisenoted.TypicalvaluesareatT =25°C. EN IN OUT J Slew Rate = 1 V/ms V Slew Rate = 1 V/ms IN 2.9 V v div 2.9 V 1 V/di 2.3 V 1 V/ 2.3 V VIN div VOUT div VOUT V/ V/ m m 5 VOUT= 1.8 V 5 VOUT= 1.8 V I =300 mA I =1 mA OUT OUT 1 ms/div 1 ms/div Figure19.LineTransientResponse Figure20.LineTransientResponse Slew Rate = 1 V/ms V = 1.8 V OUT div 5.5 V IOVUTOU=T 3=0 10. 8m AV IOUT=1 mA VIN V/ 1 2.1 V VIN div V/ 1 div VOUT V/ m 0 1 V OUT 1 ms/div 200 ms/div Figure21.LineTransientResponse Figure22.V RampUp,RampDownResponse IN Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:TLV702

TLV702 SLVSAG6D–SEPTEMBER2010–REVISEDJULY2019 www.ti.com 7 Detailed Description 7.1 Overview The TLV702 series of low-dropout (LDO) linear regulators are low quiescent current devices with excellent line and load transient performance. These LDOs are designed for power-sensitive applications. A precision bandgap and error amplifier provides overall 2% accuracy. Low output noise, very high power-supply rejection ratio (PSRR), and low dropout voltage make this series of devices ideal for most battery-operated handheld equipment. All device versions have integrated thermal shutdown, current limit, and undervoltage lockout (UVLO). 7.2 Functional Block Diagrams IN OUT Current Limit Thermal Shutdown UVLO EN Bandgap LOGIC TLV702xx Series GND Figure23. TLV702BlockDiagram 10 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:TLV702

TLV702 www.ti.com SLVSAG6D–SEPTEMBER2010–REVISEDJULY2019 Functional Block Diagrams (continued) IN OUT Current Limit Thermal Shutdown UVLO 120W EN Bandgap LOGIC TLV702xxP Series GND Figure24. TLV702PBlockDiagram 7.3 Feature Description 7.3.1 InternalCurrentLimit The TLV702 internal current limit helps to protect the regulator during fault conditions. During current limit, the output sources a fixed amount of current that is largely independent of the output voltage. In such a case, the output voltage is not regulated, and is V = I × R . The PMOS pass transistor dissipates (V – V ) × OUT CL LOAD IN OUT I until thermal shutdown is triggered and the device turns off. As the device cools, it is turned on by the internal CL thermal shutdown circuit. If the fault condition continues, the device cycles between current limit and thermal shutdown.SeeThermalConsiderationformoredetails. The PMOS pass element in the TLV702 has a built-in body diode that conducts current when the voltage at OUT exceeds the voltage at IN. This current is not limited, so if extended reverse voltage operation is anticipated, externallimitingto5%oftheratedoutputcurrentisrecommended. 7.3.2 Shutdown The enable pin (EN) is active high. The device is enabled when voltage at EN pin goes above 0.9 V. The device is turned off when the EN pin is held at less than 0.4 V. When shutdown capability is not required, EN can be connectedtotheINpin. TheTLV702Pversionhasinternalactivepulldowncircuitrythatdischargestheoutputwithatimeconstantof: (120·R ) t= L ·C (120 + R ) OUT L where: • R =Loadresistance L • C =Outputcapacitor (1) OUT Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:TLV702

TLV702 SLVSAG6D–SEPTEMBER2010–REVISEDJULY2019 www.ti.com Feature Description (continued) 7.3.3 DropoutVoltage The TLV702 uses a PMOS pass transistor to achieve low dropout. When (V – V ) is less than the dropout IN OUT voltage (V ), the PMOS pass device is in the linear (triode) region of operation and the input-to-output DO resistance is the R of the PMOS pass element. V scales approximately with output current because the DS(on) DO PMOSdevicebehavesasaresistorindropout. As with any linear regulator, PSRR and transient response are degraded as (V – V ) approaches dropout. IN OUT ThiseffectisshowninFigure13. 7.3.4 UndervoltageLockout TheTLV702usesaUVLOcircuittokeeptheoutputshutoffuntilinternalcircuitryisoperatingproperly. 7.4 Device Functional Modes 7.4.1 NormalOperation Thedeviceregulatestothenominaloutputvoltageunderthefollowingconditions: • Theinputvoltageisgreaterthanthenominaloutputvoltageaddedtothedropoutvoltage. • Theoutputcurrentislessthanthecurrentlimit. • TheinputvoltageisgreaterthantheUVLOvoltage. 7.4.2 DropoutOperation If the input voltage is lower than the nominal output voltage plus the specified dropout voltage, but all other conditions are met for normal operation, the device operates in dropout mode. In this condition, the output voltage is the same as the input voltage minus the dropout voltage. The transient performance of the device is significantly degraded because the pass device is in a triode state and no longer regulates the output voltage of theLDO.Lineorloadtransientsindropoutmayresultinlargeoutputvoltagedeviations. Table1liststheconditionsthatleadtothedifferentmodesofoperation. Table1.DeviceFunctionalModeComparison PARAMETER OPERATINGMODE V I IN OUT Normalmode V >V +V I <I IN OUT(nom) DO OUT CL Dropoutmode V <V +V I <I IN OUT(nom) DO OUT CL Currentlimit V >UVLO I >I IN OUT CL 12 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:TLV702

TLV702 www.ti.com SLVSAG6D–SEPTEMBER2010–REVISEDJULY2019 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 8.1 Application Information The TLV702 belongs to a new family of next-generation value LDO regulators. These devices consume low quiescent current and deliver excellent line and load transient performance. These characteristics, combined with low noise and very good PSRR with little (V – V ) headroom, make this family of devices ideal for portable IN OUT RF applications. This family of regulators offers current limit and thermal protection, and is specified from –40°C to+125°C. 8.2 Typical Application VIN IN OUT VOUT C C 1mF IN OUT Ceramic TLV702xx On Off EN GND Figure25. TypicalApplicationCircuit 8.2.1 DesignRequirements Table2liststhedesignparameters. Table2.DesignParameters PARAMETER DESIGNREQUIREMENT Inputvoltage 2.5Vto3.3V Outputvoltage 1.8V Outputcurrent 100mA 8.2.2 DetailedDesignProcedure 8.2.2.1 InputandOutputCapacitorRequirements 1-μF X5R- and X7R-type ceramic capacitors are recommended because these capacitors have minimal variation invalueandequivalentseriesresistance(ESR)overtemperature. However, the TLV702 is designed to be stable with an effective capacitance of 0.1 μF or larger at the output. Thus, the device is stable with capacitors of other dielectric types as well, as long as the effective capacitance under operating bias voltage and temperature is greater than 0.1 μF. This effective capacitance refers to the capacitance that the LDO sees under operating bias voltage and temperature conditions; that is, the capacitance after taking both bias voltage and temperature derating into consideration. In addition to allowing the use of lower-cost dielectrics, this capability of being stable with 0.1-μF effective capacitance also enables the use of smallerfootprintcapacitorsthathavehigherderatinginsize-andspace-constrainedapplications. Using a 0.1-μF rated capacitor at the output of the LDO does not ensure stability because the effective capacitance under the specified operating conditions must not be less than 0.1 μF. Maximum ESR should be lessthan200mΩ. Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:TLV702

TLV702 SLVSAG6D–SEPTEMBER2010–REVISEDJULY2019 www.ti.com Althoughaninputcapacitor is not required for stability, it is good analog design practice to connect a 0.1-μF to 1- μF, low ESR capacitor across the IN pin and GND pin of the regulator. This capacitor counteracts reactive input sources and improves transient response, noise rejection, and ripple rejection. A higher-value capacitor may be necessary if large, fast rise-time load transients are anticipated, or if the device is not located close to the power source.Ifsourceimpedanceismorethan2Ω,a0.1-μFinputcapacitormaybenecessarytoensurestability. 8.2.2.2 TransientResponse As with any regulator, increasing the size of the output capacitor reduces overshoot and undershoot magnitude butincreasesthedurationofthetransientresponse. 8.2.3 ApplicationCurves tR= tF= 1ms VIN 2.9 V Slew Rate = 1 V/ms v mA/div IOUT 50 m0A mA 1 V/di 2.3 V 0 5 V/div VOUT V/div VOUT m m 20 5 VOUT= 1.8 V V = 1.8 V I =1 mA OUT OUT 10ms/div 1 ms/div Figure26.LoadTransientResponse Figure27.LineTransientResponse 14 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:TLV702

TLV702 www.ti.com SLVSAG6D–SEPTEMBER2010–REVISEDJULY2019 9 Power Supply Recommendations Connect a low output impedance power supply directly to the INPUT pin of the TLV702. Inductive impedances between the input supply and the INPUT pin can create significant voltage excursions at the INPUT pin during start-uporloadtransientevents. 9.1 Power Dissipation The ability to remove heat from the die is different for each package type, presenting different considerations in the printed-circuit-board (PCB) layout. The PCB area around the device that is free of other components moves theheatfromthedevicetotheambientair. Refer to Thermal Information for thermal performance on the TLV702 evaluation module (EVM). The EVM is a two-layerboardwithtwoouncesofcopperperside. Powerdissipationdependsoninputvoltageandload conditions. Power dissipation (P ) is equal to the product of D theoutputcurrentandthevoltagedropacrosstheoutputpasselement,asshowninEquation2. P = (V -V )´I D IN OUT OUT (2) 10 Layout 10.1 Layout Guidelines Input and output capacitors should be placed as close to the device pins as possible. To improve AC performance such as PSRR, output noise, and transient response, TI recommends designing the board with separate ground planes for V and V , with the ground plane connected only at the GND pin of the device. In IN OUT addition, the ground connection for the output capacitor should be connected directly to the GND pin of the device.HighESRcapacitorsmaydegradePSRRperformance. 10.1.1 ThermalConsideration Thermal protection disables the output when the junction temperature rises to approximately 165°C, allowing the device to cool. When the junction temperature cools to approximately 145°C, the output circuitry is again enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage as a resultofoverheating. Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heatsink.Forreliableoperation,junctiontemperatureshouldbelimitedto125°Cmaximum. To estimate the margin of safety in a complete design (including heatsink), increase the ambient temperature untilthethermalprotectionistriggered;useworst-caseloadsandsignalconditions. The internal protection circuitry of the TLV702 has been designed to protect against overload conditions. It was not intended to replace proper heatsinking. Continuously running the TLV702 into thermal shutdown degrades devicereliability. Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:TLV702

TLV702 SLVSAG6D–SEPTEMBER2010–REVISEDJULY2019 www.ti.com Layout Guidelines (continued) 10.1.2 PackageMounting Solder pad footprint recommendations for the TLV702 are available from the TI website at www.ti.com. The recommendedlandpatternfortheDBVandDSEpackagesareshowninFigure28andFigure29,respectively. 10.2 Layout Examples VIN VOUT IN OUT CIN GND COUT E N NC GND PLANE Represents via used for application specific connections Figure28. LayoutExamplefortheDBVPackage VIN IN EN CIN GND NC GND PLANE O UT NC VOUT COUT Represents via used for application specific connections Figure29. LayoutExamplefortheDSEPackage 16 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:TLV702

TLV702 www.ti.com SLVSAG6D–SEPTEMBER2010–REVISEDJULY2019 11 Device and Documentation Support 11.1 Device Support 11.1.1 DevelopmentSupport 11.1.1.1 SpiceModels Computer simulation of circuit performance using SPICE is often useful when analyzing the performance of analog circuits and systems. A SPICE model for the TLV702 is available through the product folders under Tools &Software. 11.1.2 DeviceNomenclature Table3.OrderingInformation(1) PRODUCT V (2) OUT TLV702xxyyyz XXisnominaloutputvoltage(forexample,28=2.8V). YYYisthepackagedesignator. Zistapeandreelquantity(R=3000,T=250). (1) ForthemostcurrentpackageandorderinginformationseethePackageOptionAddendumattheendofthisdocument,orvisitthe deviceproductfolderatwww.ti.com. (2) Outputvoltagesfrom1.2Vto4.8Vin50-mVincrementsareavailable.Contactfactoryfordetailsandavailability. 11.2 Documentation Support 11.2.1 RelatedDocumentation Forrelateddocumentationseethefollowing: TexasInstruments,UsingtheTLV700xxEVM-503user'sguide 11.3 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 11.4 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 11.5 Trademarks E2EisatrademarkofTexasInstruments. BluetoothisaregisteredtrademarkofBluetoothSIG. ZigBeeisaregisteredtrademarkoftheZigBeeAlliance. Allothertrademarksarethepropertyoftheirrespectiveowners. 11.6 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage. ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemore susceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications. Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:TLV702

TLV702 SLVSAG6D–SEPTEMBER2010–REVISEDJULY2019 www.ti.com 11.7 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 18 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:TLV702

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) HPA01091DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QWJ & no Sb/Br) HPA01198DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QVD & no Sb/Br) TLV70212DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QVN & no Sb/Br) TLV70212DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QVN & no Sb/Br) TLV70213DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 12UW & no Sb/Br) TLV70213DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 12UW & no Sb/Br) TLV70215DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 SIR & no Sb/Br) TLV70215DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 SIR & no Sb/Br) TLV70215PDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 SLG & no Sb/Br) TLV70215PDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 SLG & no Sb/Br) TLV70218DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QUW & no Sb/Br) TLV70218DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QUW & no Sb/Br) TLV70220PDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QXL & no Sb/Br) TLV70220PDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QXL & no Sb/Br) TLV70225DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QVF & no Sb/Br) TLV70225DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QVF & no Sb/Br) TLV70225DSER ACTIVE WSON DSE 6 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 SY & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TLV70225DSET ACTIVE WSON DSE 6 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 SY & no Sb/Br) TLV70228DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QUX & no Sb/Br) TLV70228DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QUX & no Sb/Br) TLV70228DSER ACTIVE WSON DSE 6 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 VY & no Sb/Br) TLV70228DSET ACTIVE WSON DSE 6 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 VY & no Sb/Br) TLV70228PDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QVA & no Sb/Br) TLV70228PDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QVA & no Sb/Br) TLV70229DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 SJW & no Sb/Br) TLV70229DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 SJW & no Sb/Br) TLV70229DSER ACTIVE WSON DSE 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 SZ & no Sb/Br) TLV70229DSET ACTIVE WSON DSE 6 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 SZ & no Sb/Br) TLV70230DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QUY & no Sb/Br) TLV70230DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QUY & no Sb/Br) TLV70231DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QUZ & no Sb/Br) TLV70231DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QUZ & no Sb/Br) TLV70233DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QVD & no Sb/Br) TLV70233DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QVD & no Sb/Br) TLV70233DSER ACTIVE WSON DSE 6 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 WK & no Sb/Br) Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TLV70233DSET ACTIVE WSON DSE 6 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 WK & no Sb/Br) TLV70233PDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 SLH & no Sb/Br) TLV70233PDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 SLH & no Sb/Br) TLV70235DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 SDT & no Sb/Br) TLV70235DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 SDT & no Sb/Br) TLV70236DSER ACTIVE WSON DSE 6 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 VZ & no Sb/Br) TLV70236DSET ACTIVE WSON DSE 6 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 VZ & no Sb/Br) TLV70237DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QXR & no Sb/Br) TLV70237DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QXR & no Sb/Br) TLV70237DSER ACTIVE WSON DSE 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 D8 & no Sb/Br) TLV70237DSET ACTIVE WSON DSE 6 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 D8 & no Sb/Br) TLV70242PDSER ACTIVE WSON DSE 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 B9 & no Sb/Br) TLV70242PDSET ACTIVE WSON DSE 6 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 B9 & no Sb/Br) TLV70243DSER ACTIVE WSON DSE 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 5Q & no Sb/Br) TLV70243DSET ACTIVE WSON DSE 6 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 5Q & no Sb/Br) TLV70245DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 SCK & no Sb/Br) TLV70245DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 SCK & no Sb/Br) TLV702475DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QWJ & no Sb/Br) Addendum-Page 3

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TLV702475DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 QWJ & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TLV702 : •Automotive: TLV702-Q1 Addendum-Page 4

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 5

PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2020 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TLV70212DBVR SOT-23 DBV 5 3000 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TLV70212DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TLV70212DBVT SOT-23 DBV 5 250 178.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70212DBVT SOT-23 DBV 5 250 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TLV70213DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TLV70213DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TLV70215DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TLV70215DBVR SOT-23 DBV 5 3000 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TLV70215DBVT SOT-23 DBV 5 250 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TLV70215DBVT SOT-23 DBV 5 250 178.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70215PDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TLV70215PDBVT SOT-23 DBV 5 250 178.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70218DBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 TLV70218DBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70218DBVR SOT-23 DBV 5 3000 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TLV70218DBVT SOT-23 DBV 5 250 178.0 8.4 3.3 3.2 1.4 4.0 8.0 Q3 TLV70218DBVT SOT-23 DBV 5 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70218DBVT SOT-23 DBV 5 250 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2020 Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TLV70220PDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TLV70220PDBVT SOT-23 DBV 5 250 178.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70225DBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70225DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TLV70225DBVT SOT-23 DBV 5 250 178.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70225DBVT SOT-23 DBV 5 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70225DSER WSON DSE 6 3000 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2 TLV70225DSET WSON DSE 6 250 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2 TLV70228DBVR SOT-23 DBV 5 3000 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TLV70228DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TLV70228DBVT SOT-23 DBV 5 250 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TLV70228DBVT SOT-23 DBV 5 250 178.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70228DSER WSON DSE 6 3000 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2 TLV70228DSET WSON DSE 6 250 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2 TLV70228PDBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70228PDBVT SOT-23 DBV 5 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70229DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TLV70229DBVT SOT-23 DBV 5 250 178.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70229DSER WSON DSE 6 3000 180.0 8.4 1.83 1.83 0.89 4.0 8.0 Q2 TLV70229DSET WSON DSE 6 250 180.0 8.4 1.83 1.83 0.89 4.0 8.0 Q2 TLV70230DBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70230DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TLV70230DBVT SOT-23 DBV 5 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70230DBVT SOT-23 DBV 5 250 178.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70231DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TLV70231DBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70231DBVT SOT-23 DBV 5 250 178.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70231DBVT SOT-23 DBV 5 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70233DBVR SOT-23 DBV 5 3000 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TLV70233DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TLV70233DBVT SOT-23 DBV 5 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70233DBVT SOT-23 DBV 5 250 178.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70233DBVT SOT-23 DBV 5 250 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TLV70233DSER WSON DSE 6 3000 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2 TLV70233DSET WSON DSE 6 250 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2 TLV70233PDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TLV70233PDBVT SOT-23 DBV 5 250 178.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70235DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TLV70235DBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70235DBVT SOT-23 DBV 5 250 178.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70235DBVT SOT-23 DBV 5 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70236DSER WSON DSE 6 3000 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2 TLV70236DSET WSON DSE 6 250 179.0 8.4 1.8 1.8 1.0 4.0 8.0 Q2 PackMaterials-Page2

PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2020 Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TLV70237DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TLV70237DBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70237DBVT SOT-23 DBV 5 250 178.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70237DBVT SOT-23 DBV 5 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70237DSER WSON DSE 6 3000 180.0 8.4 1.83 1.83 0.89 4.0 8.0 Q2 TLV70237DSET WSON DSE 6 250 180.0 8.4 1.83 1.83 0.89 4.0 8.0 Q2 TLV70242PDSER WSON DSE 6 3000 180.0 8.4 1.83 1.83 0.89 4.0 8.0 Q2 TLV70242PDSET WSON DSE 6 250 180.0 8.4 1.83 1.83 0.89 4.0 8.0 Q2 TLV70243DSER WSON DSE 6 3000 180.0 8.4 1.83 1.83 0.89 4.0 8.0 Q2 TLV70243DSET WSON DSE 6 250 180.0 8.4 1.83 1.83 0.89 4.0 8.0 Q2 TLV70245DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TLV70245DBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70245DBVT SOT-23 DBV 5 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV70245DBVT SOT-23 DBV 5 250 178.0 8.4 3.3 3.2 1.4 4.0 8.0 Q3 TLV702475DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TLV702475DBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV702475DBVT SOT-23 DBV 5 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 TLV702475DBVT SOT-23 DBV 5 250 178.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 *Alldimensionsarenominal PackMaterials-Page3

PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2020 Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TLV70212DBVR SOT-23 DBV 5 3000 210.0 185.0 35.0 TLV70212DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV70212DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV70212DBVT SOT-23 DBV 5 250 210.0 185.0 35.0 TLV70213DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV70213DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV70215DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV70215DBVR SOT-23 DBV 5 3000 210.0 185.0 35.0 TLV70215DBVT SOT-23 DBV 5 250 210.0 185.0 35.0 TLV70215DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV70215PDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV70215PDBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV70218DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV70218DBVR SOT-23 DBV 5 3000 183.0 183.0 20.0 TLV70218DBVR SOT-23 DBV 5 3000 210.0 185.0 35.0 TLV70218DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV70218DBVT SOT-23 DBV 5 250 183.0 183.0 20.0 TLV70218DBVT SOT-23 DBV 5 250 210.0 185.0 35.0 TLV70220PDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV70220PDBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV70225DBVR SOT-23 DBV 5 3000 183.0 183.0 20.0 TLV70225DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV70225DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV70225DBVT SOT-23 DBV 5 250 183.0 183.0 20.0 TLV70225DSER WSON DSE 6 3000 203.0 203.0 35.0 TLV70225DSET WSON DSE 6 250 203.0 203.0 35.0 TLV70228DBVR SOT-23 DBV 5 3000 210.0 185.0 35.0 TLV70228DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV70228DBVT SOT-23 DBV 5 250 210.0 185.0 35.0 TLV70228DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV70228DSER WSON DSE 6 3000 203.0 203.0 35.0 TLV70228DSET WSON DSE 6 250 203.0 203.0 35.0 TLV70228PDBVR SOT-23 DBV 5 3000 183.0 183.0 20.0 TLV70228PDBVT SOT-23 DBV 5 250 183.0 183.0 20.0 TLV70229DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV70229DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV70229DSER WSON DSE 6 3000 183.0 183.0 20.0 TLV70229DSET WSON DSE 6 250 183.0 183.0 20.0 TLV70230DBVR SOT-23 DBV 5 3000 183.0 183.0 20.0 TLV70230DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV70230DBVT SOT-23 DBV 5 250 183.0 183.0 20.0 TLV70230DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV70231DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV70231DBVR SOT-23 DBV 5 3000 183.0 183.0 20.0 PackMaterials-Page4

PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2020 Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TLV70231DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV70231DBVT SOT-23 DBV 5 250 183.0 183.0 20.0 TLV70233DBVR SOT-23 DBV 5 3000 210.0 185.0 35.0 TLV70233DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV70233DBVT SOT-23 DBV 5 250 183.0 183.0 20.0 TLV70233DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV70233DBVT SOT-23 DBV 5 250 210.0 185.0 35.0 TLV70233DSER WSON DSE 6 3000 203.0 203.0 35.0 TLV70233DSET WSON DSE 6 250 203.0 203.0 35.0 TLV70233PDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV70233PDBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV70235DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV70235DBVR SOT-23 DBV 5 3000 183.0 183.0 20.0 TLV70235DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV70235DBVT SOT-23 DBV 5 250 183.0 183.0 20.0 TLV70236DSER WSON DSE 6 3000 203.0 203.0 35.0 TLV70236DSET WSON DSE 6 250 203.0 203.0 35.0 TLV70237DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV70237DBVR SOT-23 DBV 5 3000 183.0 183.0 20.0 TLV70237DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV70237DBVT SOT-23 DBV 5 250 183.0 183.0 20.0 TLV70237DSER WSON DSE 6 3000 183.0 183.0 20.0 TLV70237DSET WSON DSE 6 250 183.0 183.0 20.0 TLV70242PDSER WSON DSE 6 3000 183.0 183.0 20.0 TLV70242PDSET WSON DSE 6 250 183.0 183.0 20.0 TLV70243DSER WSON DSE 6 3000 183.0 183.0 20.0 TLV70243DSET WSON DSE 6 250 183.0 183.0 20.0 TLV70245DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV70245DBVR SOT-23 DBV 5 3000 183.0 183.0 20.0 TLV70245DBVT SOT-23 DBV 5 250 183.0 183.0 20.0 TLV70245DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV702475DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV702475DBVR SOT-23 DBV 5 3000 183.0 183.0 20.0 TLV702475DBVT SOT-23 DBV 5 250 183.0 183.0 20.0 TLV702475DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 PackMaterials-Page5

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PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 1.45 B A 0.90 PIN 1 INDEX AREA 1 5 2X 0.95 3.05 2.75 1.9 1.9 2 4 3 0.5 5X 0.3 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com

EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM 2 (1.9) 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com

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