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TLV2772AMD产品简介：
ICGOO电子元器件商城为您提供TLV2772AMD由Texas Instruments设计生产，在icgoo商城现货销售，并且可以通过原厂、代理商等渠道进行代购。 TLV2772AMD价格参考。Texas InstrumentsTLV2772AMD封装/规格：线性 - 放大器 - 仪表，运算放大器，缓冲器放大器， 通用 放大器 2 电路 满摆幅 8-SOIC。您可以下载TLV2772AMD参考资料、Datasheet数据手册功能说明书，资料中有TLV2772AMD 详细功能的应用电路图电压和使用方法及教程。
| 参数 | 数值 |
| -3db带宽 | - |
| 产品目录 | 集成电路 (IC)半导体 |
| 描述 | IC OPAMP GP 5.1MHZ RRO 8SOIC运算放大器 - 运放 Dual 2.7V Rail Rail |
| 产品分类 | Linear - Amplifiers - Instrumentation, OP Amps, Buffer Amps集成电路 - IC |
| 品牌 | Texas Instruments |
| 产品手册 | |
| 产品图片 |
|
| rohs | 过渡期间含铅 / 不受限制有害物质指令(RoHS)规范要求限制 |
| 产品系列 | 放大器 IC,运算放大器 - 运放,Texas Instruments TLV2772AMD- |
| 数据手册 | |
| 产品型号 | TLV2772AMD |
| 产品目录页面 | |
| 产品种类 | 运算放大器 - 运放 |
| 供应商器件封装 | 8-SOIC |
| 共模抑制比—最小值 | 60 dB |
| 关闭 | No Shutdown |
| 其它名称 | 296-7589-5 |
| 包装 | 管件 |
| 单位重量 | 76 mg |
| 压摆率 | 10.5 V/µs |
| 双重电源电压 | +/- 3 V |
| 商标 | Texas Instruments |
| 增益带宽生成 | 5.1 MHz |
| 增益带宽积 | 5.1MHz |
| 安装类型 | 表面贴装 |
| 安装风格 | SMD/SMT |
| 封装 | Tube |
| 封装/外壳 | 8-SOIC（0.154"，3.90mm 宽） |
| 封装/箱体 | SOIC-8 |
| 工作温度 | -55°C ~ 125°C |
| 工作电源电压 | 2.5 V to 6 V, +/- 1.25 V to +/- 3 V |
| 工厂包装数量 | 75 |
| 技术 | CMOS |
| 放大器类型 | 通用 |
| 最大双重电源电压 | +/- 3 V |
| 最大工作温度 | + 125 C |
| 最小双重电源电压 | +/- 1.25 V |
| 最小工作温度 | - 55 C |
| 标准包装 | 75 |
| 电压-电源，单/双 (±) | 2.5 V ~ 5.5 V， ±1.25 V ~ 2.75 V |
| 电压-输入失调 | 360µV |
| 电流-电源 | 1mA |
| 电流-输入偏置 | 2pA |
| 电流-输出/通道 | 50mA |
| 电源电流 | 4 mA |
| 电路数 | 2 |
| 系列 | TLV2772AM |
| 转换速度 | 10.5 V/us |
| 输入偏压电流—最大 | 60 pA |
| 输入参考电压噪声 | 17 nV |
| 输入补偿电压 | 1.6 mV |
| 输出电流 | 50 mA |
| 输出类型 | 满摆幅 |
| 通道数量 | 2 Channel |
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PDF Datasheet 数据手册内容提取
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 (cid:1) High Slew Rate...10.5 V/µs Typ (cid:1) 2 pA Input Bias Current (cid:1) High-Gain Bandwidth...5.1 MHz Typ (cid:1) Characterized From T = −55°C to 125°C A (cid:1) (cid:1) Supply Voltage Range 2.5 V to 5.5 V Available in MSOP and SOT-23 Packages (cid:1) Rail-to-Rail Output (cid:1) Micropower Shutdown Mode...I < 1 µA DD (cid:1) 360 µV Input Offset Voltage (cid:1) Available in Q-Temp Automotive (cid:1) Low Distortion Driving 600-Ω High Reliability Automotive Applications 0.005% THD+N Configuration Control / Print Support (cid:1) Qualification to Automotive Standards 1 mA Supply Current (Per Channel) (cid:1) 17 nV/√Hz Input Noise Voltage description The TLV277x CMOS operational amplifier family combines high slew rate and bandwidth, rail-to-rail output swing, high output drive, and excellent dc precision. The device provides 10.5 V/µs of slew rate and 5.1 MHz of bandwidth while only consuming 1 mA of supply current per channel. This ac performance is much higher than current competitive CMOS amplifiers. The rail-to-rail output swing and high output drive make these devices a good choice for driving the analog input or reference of analog-to-digital converters. These devices also have low distortion while driving a 600-Ω load for use in telecom systems. These amplifiers have a 360-µV input offset voltage, a 17 nV/√Hz input noise voltage, and a 2-pA input bias current for measurement, medical, and industrial applications. The TLV277x family is also specified across an extended temperature range (−40°C to 125°C), making it useful for automotive systems, and the military temperature range (−55°C to 125°C), for military systems. These devices operate from a 2.5-V to 5.5-V single supply voltage and are characterized at 2.7 V and 5 V. The single-supply operation and low power consumption make these devices a good solution for portable applications. The following table lists the packages available. FAMILY PACKAGE TABLE NUMBER PACKAGE TYPES UUNNIIVVEERRSSAALL DDEEVVIICCEE OOFF SSHHUUTTDDOOWWNN EVM BOARD CHANNELS PDIP CDIP SOIC SOT-23 TSSOP MSOP LCCC CPAK TLV2770 1 8 — 8 — — 8 — — Yes TLV2771 1 — — 8 5 — — — — — TLV2772 2 8 8 8 — 8 8 20 10 — RReeffeerr ttoo tthhee EEVVMM SSeelleeccttiioonn GGuuiiddee TLV2773 2 14 — 14 — — 10 — — Yes ((LLiitt## SSLLOOUU006600)) TLV2774 4 14 — 14 — 14 — — — — TLV2775 4 16 — 16 — 16 — — — Yes A SELECTION OF SINGLE-SUPPLY OPERATIONAL AMPLIFIER PRODUCTS† VDD BW SLEW RATE IDD (per channel) DEVICE RAIL-TO-RAIL (V) (MHz) (V/µs) (µA) TLV277X 2.5 − 6.0 5.1 10.5 1000 O TLV247X 2.7 − 6.0 2.8 1.5 600 I/O TLV245X 2.7 − 6.0 0.22 0.11 23 I/O TLV246X 2.7 − 6.0 6.4 1.6 550 I/O †All specifications measured at 5 V. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet. (cid:1)(cid:26)(cid:27)(cid:28) (cid:29)(cid:30)(cid:31)!"#$% (cid:31)(cid:30)$%&(cid:27)$(cid:28) (cid:27)$’(cid:30)("&%(cid:27)(cid:30)$ (cid:30)$ )((cid:30)(cid:29)!(cid:31)%(cid:28) (cid:27)$ "(cid:30)(# %(cid:26)&$ (cid:30)$# )(cid:26)&(cid:28)# Copyright 1998−2004, Texas Instruments Incorporated (cid:30)’ (cid:29)#*#+(cid:30))"#$%(cid:14) (cid:1)(cid:26)# (cid:28)%&%!(cid:28) (cid:30)’ #&(cid:31)(cid:26) (cid:29)#*(cid:27)(cid:31)# (cid:27)(cid:28) (cid:27)$(cid:29)(cid:27)(cid:31)&%#(cid:29) (cid:30)$ %(cid:26)# )&,#-(cid:28). (cid:13)$ )((cid:30)(cid:29)!(cid:31)%(cid:28) (cid:31)(cid:30)")+(cid:27)&$% %(cid:30) (cid:10)(cid:11)(cid:2)(cid:15)(cid:23)(cid:21)(cid:9)(cid:15)01202(cid:7) &++ )&(&"#%#((cid:28) &(# %#(cid:28)%#(cid:29) (cid:28))#(cid:31)(cid:27)’/(cid:27)$, (cid:27)%(cid:28) #+#(cid:31)%((cid:27)(cid:31)&+ (cid:31)(cid:26)&(&(cid:31)%#((cid:27)(cid:28)%(cid:27)(cid:31)(cid:28)(cid:14) !$+#(cid:28)(cid:28) (cid:30)%(cid:26)#(3(cid:27)(cid:28)# $(cid:30)%#(cid:29)(cid:14) (cid:13)$ &++ (cid:30)%(cid:26)#( )((cid:30)(cid:29)!(cid:31)%(cid:28)(cid:7) )((cid:30)(cid:29)!(cid:31)%(cid:27)(cid:30)$ )((cid:30)(cid:31)#(cid:28)(cid:28)(cid:27)$, (cid:29)(cid:30)#(cid:28) $(cid:30)% $#(cid:31)#(cid:28)(cid:28)&((cid:27)+/ (cid:27)$(cid:31)+!(cid:29)# %#(cid:28)%(cid:27)$, (cid:30)’ &++ )&(&"#%#((cid:28)(cid:14) WWW.TI.COM 1
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TLV2770 and TLV2771 AVAILABLE OPTIONS PACKAGED DEVICES TA VVIIOOmmaaxx AATT 2255°°CC SMALL OUTLINE SOT-23 MSOP PLASTIC DIP (mV) (D) (DBV) (DGK) (P) TLV2770CD — TLV2770CDGK† TLV2770CP 0°C to 70°C 2.5 TLV2771CD TLV2771CDBV — — TLV2770ID — TLV2770IDGK† TLV2770IP 2.5 TLV2771ID TLV2771IDBV — — −−4400°°CC ttoo 112255°°CC TLV2770AID — — TLV2770AIP 1.6 TLV2771AID — — — †This device is in the Product Preview stage of development. Please contact your local TI sales office for availability. TLV2772 and TLV2773 AVAILABLE OPTIONS PACKAGED DEVICES TA VVIIOOmmaaxx AATT 2255°°CC SMALL OUTLINE MSOP MSOP PLASTIC DIP PLASTIC DIP (mV) (D) (DGK) (DGS) (N) (P) TLV2772CD TLV2772CDGK — — TLV2772CP 0°C to 70°C 2.5 TLV2773CD — TLV2773CDGS TLV2773CN — TLV2772ID TLV2772IDGK — — TLV2772IP 2.5 TLV2773ID — TLV2773IDGS TLV2773IN — −−4400°°CC ttoo 112255°°CC TLV2772AID — — — TLV2772AIP 1.6 TLV2773AID — — TLV2773AIN — TLV2774 and TLV2775 AVAILABLE OPTIONS PACKAGED DEVICES TA VVIIOOmmaaxx AATT 2255°°CC SMALL OUTLINE PLASTIC DIP PLASTIC DIP TSSOP (mV) (D) (N) (P) (PW) TLV2774CD — TLV2774CP TLV2774CPW 0°C to 70°C 2.7 TLV2775CD TLV2775CN — TLV2775CPW TLV2774ID — TLV2774IP TLV2774IPW 2.7 TLV2775ID TLV2775IN — TLV2775IPW −−4400°°CC ttoo 112255°°CC TLV2774AID — TLV2774AIP TLV2774AIPW 2.1 TLV2775AID TLV2775AIN — TLV2775AIPW TLV2772M/Q AND TLV2772AM/Q AVAILABLE OPTIONS PACKAGED DEVICES TA VIOmax AT 25°C SMALL CHIP CARRIER CERAMIC DIP CERAMIC TSSOP (mV) OUTLINE FLATPACK (FK) (JG) (PW) (D) (U) 2.5 TLV2772QD‡ — — — TLV2772QPW‡ −−4400°°CC ttoo 112255°°CC 1.6 TLV2772AQD‡ — — — TLV2772AQPW‡ 2.5 TLV2772MD TLV2772MFK TLV2772MJG TLV2772MU — −−5555°°CC ttoo 112255°°CC 1.6 TLV2772AMD TLV2772AMFK TLV2772AMJG TLV2772AMU — ‡Available in tape and reel 2 WWW.TI.COM
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 PACKAGE SYMBOLS PACKAGE TYPE PINS PART NUMBER SYMBOL† TLV2771CDBV VAMC SSOOTT2233 55 PPiinn TLV2771IDBV VAMI TLV2770CDGK xxTIABO TLV2770IDGK xxTIABP 88 PPiinn TLV2772CDGK xxTIAAF MMSSOOPP TLV2772IDGK xxTIAAG TLV2773CDGS xxTIABQ 1100 PPiinn TLV2773IDGS xxTIABR †xx represents the device date code. TLV277x PACKAGE PINOUT TLV2772M AND TLV2772AM FK PACKAGE (TOP VIEW) T + U D C O C DC N 1 N VN 3 2 1 20 19 NC 4 18 NC 1IN− 5 17 2OUT NC 6 16 NC 1IN+ 7 15 2IN− NC 8 14 NC 9 10 11 12 13 C DC+ C N NNN N G 2I NC − No internal connection WWW.TI.COM 3
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TLV277x PACKAGE PINOUTS(1) TLV2770 TLV2771 TLV2771 D, DGK† OR P PACKAGE DBV PACKAGE D PACKAGE (TOP VIEW) (TOP VIEW) (TOP VIEW) NC 1 8 SHDN OUT 1 5 VDD NC 1 8 NC IN− 2 7 VDD GND 2 IN− 2 7 VDD IN+ 3 6 OUT IN+ 3 6 OUT GND 4 5 NC IN+ 3 4 IN− GND 4 5 NC TLV2772 TLV2772M AND TLV2772AM TLV2773 D, DGK, JG, P, OR PW PACKAGE U PACKAGE DGS PACKAGE (TOP VIEW) (TOP VIEW) (TOP VIEW) 1OUT 1 8 VDD NC 1 10 NC 1OUT 1 10 VDD 1IN− 2 7 2OUT 1OUT 2 9 VDD+ 1IN− 2 9 2OUT 1IN+ 3 6 2IN− 1IN− 3 8 2OUT 1IN+ 3 8 2IN− GND 4 5 2IN+ 1IN+ 4 7 2IN− GND 4 7 2IN+ GND 5 6 2IN+ 1SHDN 5 6 2SHDN TLV2773 TLV2774 TLV2775 D OR N PACKAGE D, N, OR PW PACKAGE D, N, OR PW PACKAGE (TOP VIEW) (TOP VIEW) (TOP VIEW) 1OUT 1 14 VDD 1OUT 1 14 4OUT 1OUT 1 16 4OUT 1IN− 2 13 2OUT 1IN− 2 13 4IN− 1IN− 2 15 4IN− 1IN+ 3 12 2IN− 1IN+ 3 12 4IN+ 1IN+ 3 14 4IN+ GND 4 11 2IN+ VDD 4 11 GND VDD 4 13 GND NC 5 10 NC 2IN+ 5 10 3IN+ 2IN+ 5 12 3IN+ 1SHDN 6 9 2SHDN 2IN− 6 9 3IN− 2IN− 6 11 3IN− NC 7 8 NC 2OUT 7 8 3OUT 2OUT 7 10 3OUT 1/2SHDN 8 9 3/4SHDN †This device is in the Product Preview stage of development. Please contact your local TI sales office for availability. (1) SOT−23 may or may not be indicated TYPICAL PIN 1 INDICATORS Pin 1 Printed or Pin 1 Pin 1 Pin 1 Molded Dot Stripe Bevel Edges Molded ”U” Shape 4 WWW.TI.COM
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V DD Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±V ID DD Input voltage range, V (any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to V I DD Input current, I (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±4 mA I Output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA O Total current into V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA DD+ Total current out of GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Duration of short-circuit current (at or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, T : C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C A I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C Q suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C stg Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C †Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to GND. 2. Differential voltages are at the noninverting input with respect to the inverting input. Excessive current flows when input is brought below GND − 0.3 V. 3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. DISSIPATION RATING TABLE TTAA ≤≤ 2255°CC DDEERRAATTIINNGG FFAACCTTOORR TTAA == 7700°CC TTAA == 8855°CC TTAA == 112255°CC PPAACCKKAAGGEE POWER RATING ABOVE TA = 25°C POWER RATING POWER RATING POWER RATING D 725 mW 5.8 mW/°C 464 mW 377 mW 145 mW DBV 437 mW 3.5 mW/°C 280 mW 227 mW 87 mW DGK 424 mW 3.4 mW/°C 271 mW 220 mW 85 mW DGS 424 mW 3.4 mW/°C 271 mW 220 mW 85 mW FK 1375 mW 11.0 mW/°C 672 mW 546 mW 210 mW JG 1050 mW 8.4 mW/°C 880 mW 714 mW 275 mW N 1150 mW 9.2 mW/°C 736 mW 598 mW 230 mW P 1000 mW 8.0 mW/°C 640 mW 520 mW 200 mW PW 700 mW 5.6 mW/°C 448 mW 364 mW 140 mW U 675 mW 5.4 mW/°C 432 mW 350 mW 135 mW recommended operating conditions C SUFFIX I SUFFIX Q SUFFIX M SUFFIX UUNNIITT MIN MAX MIN MAX MIN MAX MIN MAX Supply voltage, VDD 2.5 6 2.5 6 2.5 6 2.5 6 V Input voltage range, VI GND VDD+ −1.3 GND VDD+ −1.3 GND VDD+ −1.3 GND VDD+ −1.3 V Common-mode input voltage, VIC GND VDD+ −1.3 GND VDD+ −1.3 GND VDD+ −1.3 GND VDD+ −1.3 V Operating free-air temperature, TA 0 70 −40 125 −40 125 −55 125 °C WWW.TI.COM 5
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, V = 2.7 V (unless otherwise noted) DD TLV277xC PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX 25°C 0.48 2.5 TTLLVV22777700//11//22 VVIC == 00,, VVOO == 00,, Full range 0.53 2.7 VVIIOO IInnppuutt ooffffsseett vvoollttaaggee RRSS == 5500 ΩΩ,, VVDDDD == ±±11..3355 VV,, 25°C 0.8 2.7 mmVV NNoo llooaadd TTLLVV22777733//44//55 Full range 0.86 2.9 TTeemmppeerraattuurree ccooeeffffiicciieenntt ooff iinnppuutt 2255°CC ttoo αVVIIOO offset voltage 125°C 22 µVV//°°CC IIIIOO IInnppuutt ooffffsseett ccuurrrreenntt VVRRIISSCC == == 55 0000,, ΩΩ VVVVOODDDD == ==00 ,,±11..3355 VV Fu2ll 5r°aCnge 12 16000 ppAA 25°C 2 60 IIIIBB IInnppuutt bbiiaass ccuurrrreenntt ppAA Full range 6 100 25°C 2.6 IIOOHH == −−00..667755 mmAA Full range 2.5 VVOOHH HHiigghh--lleevveell oouuttppuutt vvoollttaaggee 25°C 2.4 VV IIOOHH == −−22..22 mmAA Full range 2.1 25°C 0.1 VVIICC == 11..3355 VV,, IIOOLL == 00..667755 mmAA Full range 0.2 VVOOLL LLooww--lleevveell oouuttppuutt vvoollttaaggee 25°C 0.21 VV VVIICC == 11..3355 VV,, IIOOLL == 22..22 mmAA Full range 0.6 AAVVDD LLaaamrrpggleeif--issciiaggtnnioaanll ddiiffffeerreennttiiaall vvoollttaaggee VVVIIOCC === 011...633 55V VVto,, 2.1 V RRLL == 1100 kkΩΩ,, Fu2ll 5r°aCnge 2103 380 VV//mmVV ri(d) Differential input resistance 25°C 1012 Ω ci(c) Common-mode input capacitance f = 10 kHz 25°C 8 pF zo Closed-loop output impedance f = 100 kHz, AV = 10 25°C 25 Ω VVIICC == 00 ttoo 11..55 VV,, VVOO == VVDDDD//22,, 25°C 60 84 CCMMRRRR CCoommmmoonn--mmooddee rreejjeeccttiioonn rraattiioo RS = 50Ω Full range 60 82 ddBB SSuuppppllyy vvoollttaaggee rreejjeeccttiioonn rraattiioo VVDDDD == 22..77 VV ttoo 55 VV,, VVIICC == VVDDDD//22,, 25°C 70 89 kkSSVVRR (∆VDD /∆VIO) No load Full range 70 84 ddBB 25°C 1 2 IIDDDD SSuuppppllyy ccuurrrreenntt ((ppeerr cchhaannnneell)) VVOO == VVDDDD//22,, NNoo llooaadd mmAA Full range 2 SSuuppppllyy ccuurrrreenntt iinn sshhuuttddoowwnn ((ppeerr 25°C 0.8 1.5 IIDDDD((SSHHDDNN)) µµAA channel) Full range 1.3 2 TLV2770 1.47 TTuurrnnoonn vvoollttaaggee VV((OONN)) lleevveell TLV2773 AAVV == 55 2255°CC 1.43 VV TLV2775 1.40 TLV2770 1.27 TTuurrnnooffff vvoollttaaggee VV((OOFFFF)) lleevveell TLV2773 AAVV == 55 2255°CC 1.21 VV TLV2775 1.20 †Full range is 0°C to 70°C. 6 WWW.TI.COM
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 operating characteristics at specified free-air temperature, V = 2.7 V (unless otherwise noted) DD TLV277xC PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX 25°C 5 9 SR Slew rate at unity gain VVROOL ((=PP 1PP0)) ==kΩ 00..88 VV,, CCLL == 110000 ppFF,, Full 4.7 6 V/µs range f = 1 kHz 25°C 21 VVnn EEqquuiivvaalleenntt iinnppuutt nnooiissee vvoollttaaggee f = 10 kHz 25°C 17 nnVV//√√HHzz f = 0.1 Hz to 1 Hz 0.33 VVNN((PPPP)) PPeeaakk--ttoo--ppeeaakk eeqquuiivvaalleenntt iinnppuutt nnooiissee vvoollttaaggee 2255°°CC µVV f = 0.1 Hz to 10 Hz 0.86 In Equivalent input noise current f = 100 Hz 25°C 0.6 fA/√Hz AV = 1 0.0085% TTHHDD ++ NN TToottaall hhaarrmmoonniicc ddiissttoorrttiioonn pplluuss nnooiissee RRLL == 660000 ΩΩ,, AV = 10 2255°CC 0.025% ff == 11 kkHHzz AV = 100 0.12% Gain-bandwidth product f = 10 kHz, RL = 600 Ω, 25°C 4.8 MHz CL = 100 pF AV = −1, 0.1% 25°C 0.186 SStteepp == 11 VV,, ttss SSeettttlliinngg ttiimmee RL = 600 Ω, 0.01% 25°C 0.3 µss CL = 100 pF φm Phase margin at unity gain 25°C 46° Gain margin RRLL == 660000 ΩΩ,, CCLL == 110000 ppFF 25°C 12 dB †Full range is 0°C to 70°C. WWW.TI.COM 7
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, V = 5 V (unless otherwise noted) DD TLV277xC PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX 25°C 0.5 2.5 TTLLVV22777700//11//22 VVIC == 00,, VVOO == 00,, Full range 0.6 2.7 VVIIOO IInnppuutt ooffffsseett vvoollttaaggee RRSS == 5500 ΩΩ, VVDDDD == ±±22..55 VV,, 25°C 0.7 2.5 mmVV NNoo llooaadd TTLLVV22777733//44//55 Full range 0.78 2.7 TTeemmppeerraattuurree ccooeeffffiicciieenntt ooff iinnppuutt 2255°CC ttoo αVVIIOO offset voltage 125°C 22 µVV//°°CC IIIIOO IInnppuutt ooffffsseett ccuurrrreenntt VVRRIISSCC == == 55 0000,, ΩΩ VVVVOODDDD == ==00 ,,±22..55 VV Fu2ll 5r°aCnge 12 16000 ppAA 25°C 2 60 IIIIBB IInnppuutt bbiiaass ccuurrrreenntt ppAA Full range 6 100 25°C 4.9 IIOOHH == −−11..33 mmAA Full range 4.8 VVOOHH HHiigghh--lleevveell oouuttppuutt vvoollttaaggee 25°C 4.7 VV IIOOHH == −−44..22 mmAA Full range 4.4 25°C 0.1 VVIICC == 22..55 VV,, IIOOLL == 11..33 mmAA Full range 0.2 VVOOLL LLooww--lleevveell oouuttppuutt vvoollttaaggee 25°C 0.21 VV VVIICC == 22..55 VV,, IIOOLL == 44..22 mmAA Full range 0.6 AAVVDD LLaaamrrpggleeif--issciiaggtnnioaanll ddiiffffeerreennttiiaall vvoollttaaggee VVVIIOCC === 122 ..V55 tVVo,, 4 V RRLL == 1100 kkΩΩ,, Fu2ll 5r°aCnge 2103 450 VV//mmVV ri(d) Differential input resistance 25°C 1012 Ω ci(c) Common-mode input capacitance f = 10 kHz 25°C 8 pF zo Closed-loop output impedance f = 100 kHz, AV = 10 25°C 20 Ω VVIICC == 00 ttoo 33..77 VV,, VVOO == VVDDDD//22,, 25°C 70 96 CCMMRRRR CCoommmmoonn--mmooddee rreejjeeccttiioonn rraattiioo RS = 50Ω Full range 70 93 ddBB SSuuppppllyy vvoollttaaggee rreejjeeccttiioonn rraattiioo VVDDDD == 22..77 VV ttoo 55 VV,, VVIICC == VVDDDD//22,, 25°C 70 89 kkSSVVRR (∆VDD /∆VIO) No load Full range 70 84 ddBB 25°C 1 2 IIDDDD SSuuppppllyy ccuurrrreenntt ((ppeerr cchhaannnneell)) VVOO == VVDDDD//22,, NNoo llooaadd mmAA Full range 2 SSuuppppllyy ccuurrrreenntt iinn sshhuuttddoowwnn ((ppeerr 25°C 0.8 1.5 IIDDDD((SSHHDDNN)) channel) Full range 1.3 2 µAA TLV2770 2.59 VV((OONN)) TTuurrnnoonn vvoollttaaggee lleevveell TLV2773 AAVV == 55 2255°CC 2.47 VV TLV2775 2.48 TLV2770 2.41 VV((OOFFFF)) TTuurrnnooffff vvoollttaaggee lleevveell TLV2773 AAVV == 55 2255°CC 2.32 VV TLV2775 2.29 †Full range is 0°C to 70°C. 8 WWW.TI.COM
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 operating characteristics at specified free-air temperature, V = 5 V (unless otherwise noted) DD TLV277xC PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX 25°C 5 10.5 SR Slew rate at unity gain VVROOL ((=PP 1PP0)) ==kΩ 22 VV,, CCLL == 110000 ppFF,, Full 4.7 6 V/µs range f = 1 kHz 25°C 17 VVnn EEqquuiivvaalleenntt iinnppuutt nnooiissee vvoollttaaggee f = 10 kHz 25°C 12 nnVV//√√HHzz f = 0.1 Hz to 1 Hz 0.33 VVNN((PPPP)) PPeeaakk--ttoo--ppeeaakk eeqquuiivvaalleenntt iinnppuutt nnooiissee vvoollttaaggee 2255°°CC µVV f = 0.1 Hz to 10 Hz 0.86 In Equivalent input noise current f = 100 Hz 25°C 0.6 fA/√Hz AV = 1 0.005% TTHHDD ++ NN TToottaall hhaarrmmoonniicc ddiissttoorrttiioonn pplluuss nnooiissee RRLL == 660000 ΩΩ,, AV = 10 2255°CC 0.016% ff == 11 kkHHzz AV = 100 0.095% Gain-bandwidth product f = 10 kHz, RL = 600 Ω, 25°C 5.1 MHz CL = 100 pF AV = −1, 0.1% 25°C 0.335 SStteepp == 22 VV,, ttss SSeettttlliinngg ttiimmee RL = 600 Ω, 0.01% 25°C 0.6 µss CL = 100 pF φm Phase margin at unity gain 25°C 46° Gain margin RRLL == 660000 ΩΩ,, CCLL == 110000 ppFF 25°C 12 dB TLV2770 1.2 tt((OONN)) AAmmpplliiffiieerr ttuurrnnoonn ttiimmee TLV2773 AAVV == 55,, RRLL == OOppeenn,, 2255°CC 2.4 µµss MMeeaassuurreedd ttoo 5500%% ppooiinntt TLV2775 1.9 TLV2770 335 tt((OOFFFF)) AAmmpplliiffiieerr ttuurrnnooffff ttiimmee TLV2773 AAVV == 55 RRLL == OOppeenn,, 2255°CC 444 nnss MMeeaassuurreedd ttoo 5500%% ppooiinntt TLV2775 345 †Full range is 0°C to 70°C. WWW.TI.COM 9
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, V = 2.7 V (unless otherwise noted) DD TLV277xI TLV277xAI PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX MIN TYP MAX 25°C 0.48 2.5 0.48 1.6 TTLLVV22777700//11//22 VVIICC == 00,, VVOO == 00,, IInnppuutt ooffffsseett RRSS == 5500 ΩΩ Full range 0.53 2.7 0.53 1.9 VVIIOO vvoollttaaggee VVDDDD == ±11..3355 VV,, 25°C 0.8 2.7 0.8 2.1 mmVV TTLLVV22777733//44//55 NNoo llooaadd Full range 0.86 2.9 0.86 2.2 TTeemmppeerraattuurree ccooeeffffiicciieenntt ooff iinnppuutt 2255°CC ttoo αVVIIOO offset voltage 125°C 22 22 µVV//°°CC IIIIOO IInnppuutt ooffffsseett ccuurrrreenntt VVRRIISSCC == == 55 0000,, ΩΩ VVOO == 00,, Fu2ll 5r°aCnge 12 16205 12 16205 ppAA 25°C 2 60 2 60 IIIIBB IInnppuutt bbiiaass ccuurrrreenntt ppAA Full range 6 350 6 350 25°C 2.6 2.6 IIOOHH == −−00..667755 mmAA Full range 2.5 2.5 VVOOHH HHiigghh--lleevveell oouuttppuutt vvoollttaaggee 25°C 2.4 2.4 VV IIOOHH == −−22..22 mmAA Full range 2.1 2.1 VVIICC == 11..3355 VV,, 25°C 0.1 0.1 IOL = 0.675 mA Full range 0.2 0.2 VVOOLL LLooww--lleevveell oouuttppuutt vvoollttaaggee VVIICC == 11..3355 VV,, 25°C 0.21 0.21 VV IOL = 2.2 mA Full range 0.6 0.6 LLaarrggee--ssiiggnnaall ddiiffffeerreennttiiaall vvoollttaaggee VIICC = 1.35 V, 25°C 20 380 20 380 AAVVDD amplification RRLL == 1100 kkΩΩ, VV//mmVV VO = 0.6 V to 2.1 V Full range 13 13 ri(d) Differential input resistance 25°C 1012 1012 Ω Common-mode input ci(c) capacitance f = 10 kHz, 25°C 8 8 pF f = 100 kHz, zo Closed-loop output impedance AV = 10 25°C 25 25 Ω VIICC = 0 to 1.5 V, 25°C 60 84 60 84 CCMMRRRR CCoommmmoonn--mmooddee rreejjeeccttiioonn rraattiioo VVOO == VVDDDD//22,, ddBB RS = 50Ω Full range 60 82 60 82 SSuuppppllyy vvoollttaaggee rreejjeeccttiioonn rraattiioo VDDDD = 2.7 V to 5 V, 25°C 70 89 70 89 kkSSVVRR (∆VDD /∆VIO) VNVIIoCC l o==a VVdDDDD//22,, Full range 70 84 70 84 ddBB IIDDDD SSuuppppllyy ccuurrrreenntt ((ppeerr cchhaannnneell)) VVOO == VVDDDD//22,, 25°C 1 2 1 2 mmAA No load Full range 2 2 SSuuppppllyy ccuurrrreenntt iinn sshhuuttddoowwnn ((ppeerr 25°C 0.8 1.5 0.8 1.5 IIDDDD((SSHHDDNN)) µµAA channel) Full range 1.3 2 1.3 2 †Full range is − 40°C to 125°C. 10 WWW.TI.COM
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, V = 2.7 V (unless otherwise noted) DD (continued) TTEESSTT TLV277xI TLV277xAI PPAARRAAMMEETTEERR CONDITIONS TTAA†† MIN TYP MAX MIN TYP MAX UUNNIITT TLV2770 1.47 1.47 VV((OONN)) TTuurrnnoonn vvoollttaaggee lleevveell TLV2773 AAVV == 55 2255°CC 1.43 1.43 VV TLV2775 1.40 1.4 TLV2770 1.27 1.27 VV((OOFFFF)) TTuurrnnooffff vvoollttaaggee lleevveell TLV2773 AAVV == 55 2255°CC 1.21 1.21 VV TLV2775 1.20 1.2 †Full range is − 40°C to 125°C. operating characteristics at specified free-air temperature, V = 2.7 V (unless otherwise noted) DD TLV277xI TLV277xAI PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX MIN TYP MAX 25°C 5 9 5 9 SR Slew rate at unity gain VVROOL ((=PP 1PP0)) ==kΩ 00..88 VV,, CCLL == 110000 ppFF,, Full 4.7 6 4.7 6 V/µs range EEqquuiivvaalleenntt iinnppuutt nnooiissee f = 1 kHz 25°C 21 21 VVnn voltage f = 10 kHz 25°C 17 17 nnVV//√√HHzz Peak-to-peak f = 0.1 Hz to 1 Hz 25°C 0.33 0.33 µV VVNN((PPPP)) eeqquuiivvaalleenntt iinnppuutt nnooiissee voltage f = 0.1 Hz to 10 Hz 25°C 0.86 0.86 µV Equivalent input noise In current f = 100 Hz 25°C 0.6 0.6 fA/√Hz AV = 1 0.0085% 0.0085% TTHHDD ++ NN TToottaall hhaarrmmoonniicc RRLL == 660000 ΩΩ,, AV = 10 2255°CC 0.025% 0.025% ddiissttoorrttiioonn pplluuss nnooiissee ff == 11 kkHHzz AV = 100 0.12% 0.12% Gain-bandwidth f = 10 kHz, RL = 600 Ω, 25°C 4.8 4.8 MHz product CL = 100 pF AV = −1, 0.1% 25°C 0.186 0.186 Step = 0.85 V to ttss SSeettttlliinngg ttiimmee 11..8855 VV,, µss RL = 600 Ω, 0.01% 25°C 3.92 3.92 CL = 100 pF Phase margin at unity φm gain RRLL == 660000 ΩΩ,, CCLL == 110000 ppFF 25°C 46° 46° Gain margin 25°C 12 12 dB †Full range is −40°C to 125°C. WWW.TI.COM 11
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, V = 5 V (unless otherwise noted) DD TTEESSTT TLV277xI TLV277xAI PPAARRAAMMEETTEERR CONDITIONS TTAA†† MIN TYP MAX MIN TYP MAX UUNNIITT 25°C 0.5 2.5 0.5 1.6 TTLLVV22777700//11//22 VVIICC == 00,, NNoo llooaadd VVOO == 00,, Full range 0.6 2.7 0.6 1.9 VVIIOO IInnppuutt ooffffsseett vvoollttaaggee RRSS == 5500 Ω,, 25°C 0.7 2.5 0.7 2.1 mmVV TTLLVV22777733//44//55 VVDD == ±22..55 VV Full range 0.78 2.7 0.78 2.2 TTeemmppeerraattuurree ccooeeffffiicciieenntt ooff iinnppuutt 2255°CC ttoo αVVIIOO offset voltage 125°C 22 22 µVV//°°CC VVIICC == 00,, VVOO == 00,, 25°C 1 60 1 60 IIIIOO IInnppuutt ooffffsseett ccuurrrreenntt RRSS == 5500 Ω,, Full range 2 125 2 125 ppAA VVDDDD == ±22..55 VV 25°C 2 60 2 60 IIIIBB IInnppuutt bbiiaass ccuurrrreenntt ppAA Full range 6 350 6 350 25°C 4.9 4.9 IIOOHH == −−11..33 mmAA Full range 4.8 4.8 VVOOHH HHiigghh--lleevveell oouuttppuutt vvoollttaaggee 25°C 4.7 4.7 VV IIOOHH == −−44..22 mmAA Full range 4.4 4.4 VVIICC == 22..55 VV,, 25°C 0.1 0.1 IOL = 1.3 mA Full range 0.2 0.2 VVOOLL LLooww--lleevveell oouuttppuutt vvoollttaaggee VVIICC == 22..55 VV,, 25°C 0.21 0.21 VV IOL = 4.2 mA Full range 0.6 0.6 LLaarrggee--ssiiggnnaall ddiiffffeerreennttiiaall vvoollttaaggee VIICC = 2.5 V, 25°C 20 450 20 450 AAVVDD amplification RRLL == 1100 kkΩΩ, VV//mmVV VO = 1 V to 4 V Full range 13 13 ri(d) Differential input resistance 25°C 1012 1012 Ω ci(c) Common-mode input capacitance f = 10 kHz 25°C 8 8 pF f = 100 kHz, zo Closed-loop output impedance AV = 10 25°C 20 20 Ω VIICC = 0 to 3.7 V, 25°C 60 96 70 96 CCMMRRRR CCoommmmoonn--mmooddee rreejjeeccttiioonn rraattiioo VVOO == VVDDDD//22,, ddBB RS = 50Ω Full range 60 93 70 93 SSuuppppllyy vvoollttaaggee rreejjeeccttiioonn rraattiioo VDDDD = 2.7 V to 5 V, 25°C 70 89 70 89 kkSSVVRR (∆VDD /∆VIO) VVNIIoCC l o==a VVdDDDD//22,, Full range 70 84 70 84 ddBB IIDDDD SSuuppppllyy ccuurrrreenntt ((ppeerr cchhaannnneell)) VVOO == VVDDDD//22,, 25°C 1 2 1 2 mmAA No load Full range 2 2 SSuuppppllyy ccuurrrreenntt sshhuuttddoowwnn ((ppeerr 25°C 0.8 1.5 0.8 1.5 IIDDDD((SSHHDDNN)) channel) Full range 1.3 2 1.3 2 µAA †Full range is − 40°C to 125°C. 12 WWW.TI.COM
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, V = 5 V (unless otherwise noted) DD (continued) TTEESSTT TLV277xI TLV277xAI PPAARRAAMMEETTEERR CONDITIONS TTAA†† MIN TYP MAX MIN TYP MAX UUNNIITT TLV2770 2.59 2.59 VV((OONN)) TTuurrnnoonn vvoollttaaggee lleevveell TLV2773 AAVV == 55 2255°CC 2.47 2.47 VV TLV2775 2.48 2.48 TLV2770 2.41 2.41 VV((OOFFFF)) TTuurrnnooffff vvoollttaaggee lleevveell TLV2773 AAVV == 55 2255°CC 2.32 2.32 VV TLV2775 2.29 2.29 †Full range is − 40°C to 125°C. operating characteristics at specified free-air temperature, V = 5 V (unless otherwise noted) DD TLV277xI TLV277xAI PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX MIN TYP MAX 25°C 5 10.5 5 10.5 SR Slew rate at unity gain VVROOL ((=PP 1PP0)) ==kΩ 11..55 VV,, CCLL == 110000 ppFF,, Full 4.7 6 4.7 6 V/µs range EEqquuiivvaalleenntt iinnppuutt nnooiissee f = 1 kHz 25°C 17 17 VVnn voltage f = 10 kHz 25°C 12 12 nnVV//√√HHzz Peak-to-peak f = 0.1 Hz to 1 Hz 25°C 0.33 0.33 µV VVNN((PPPP)) eeqquuiivvaalleenntt iinnppuutt noise voltage f = 0.1 Hz to 10 Hz 25°C 0.86 0.86 µV Equivalent input noise In current f = 100 Hz 25°C 0.6 0.6 fA/√Hz AV = 1 0.005% 0.005% TTHHDD ++ NN TToottaall hhaarrmmoonniicc RRLL == 660000 ΩΩ,, AV = 10 2255°CC 0.016% 0.016% ddiissttoorrttiioonn pplluuss nnooiissee ff == 11 kkHHzz AV = 100 0.095% 0.095% Gain-bandwidth f = 10 kHz, RL = 600 Ω, 25°C 5.1 5.1 MHz product CL = 100 pF AV = −1, 0.1% 25°C 0.134 0.134 Step = 1.5 V to ttss SSeettttlliinngg ttiimmee 33..55 VV,, µss RL = 600 Ω, 0.01% 25°C 1.97 1.97 CL = 100 pF Phase margin at unity φm gain RRLL == 660000 ΩΩ,, CCLL == 110000 ppFF 25°C 46° 46° Gain margin 25°C 12 12 dB TLV2770 1.2 1.2 AAmmpplliiffiieerr AAVV == 55,, tt((OONN)) ttuurrnnoonn TLV2773 RRLL == OOppeenn,, 2255°CC 2.4 2.4 µµss ttiimmee MMeeaassuurreedd ttoo 5500%% ppooiinntt TLV2775 1.9 1.9 TLV2770 335 335 AAmmpplliiffiieerr AAVV == 55,, tt((OOFFFF)) ttuurrnnooffff TLV2773 RRLL == OOppeenn,, 2255°CC 444 444 nnss ttiimmee MMeeaassuurreedd ttoo 5500%% ppooiinntt TLV2775 345 345 †Full range is −40°C to 125°C. WWW.TI.COM 13
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, V = 2.7 V (unless otherwise noted) DD TLV2772Q TLV2772AQ PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† TLV2772M TLV2772AM UUNNIITT MIN TYP MAX MIN TYP MAX 25°C 0.44 2.5 0.44 1.6 VVIIOO IInnppuutt ooffffsseett vvoollttaaggee mmVV Full range 0.47 2.7 0.47 1.9 Temperature 25°C αVVIIOO ccoooffeeseffffiitcc viieeonnlttta oogffe iinnppuutt VVDD == ±11..3355 VV,, VOO = 0, 12tt5oo°C 22 22 µVV//°°CC VVIICC == 00,, RRSS == 5500 Ω 25°C 1 60 1 60 IIIIOO IInnppuutt ooffffsseett ccuurrrreenntt ppAA Full range 2 125 2 125 25°C 2 60 2 60 IIIIBB IInnppuutt bbiiaass ccuurrrreenntt ppAA Full range 6 350 6 350 00 −−00..33 00 −−00..33 2255°CC ttoo ttoo ttoo ttoo CCoommmmoonn--mmooddee 1.4 1.7 1.4 1.7 VVIICCRR iinnppuutt vvoollttaaggee rraannggee CCMMRRRR >> 6600 ddBB,, RRSS == 5500 ΩΩ 00 −−00..33 00 −−00..33 VV FFuullll rraannggee ttoo ttoo ttoo ttoo 1.4 1.7 1.4 1.7 25°C 2.6 2.6 IIOOHH == −−00..667755 mmAA HHiigghh--lleevveell oouuttppuutt Full range 2.45 2.45 VVOOHH vvoollttaaggee 25°C 2.4 2.4 VV IIOOHH == −−22..22 mmAA Full range 2.1 2.1 25°C 0.1 0.1 VVIICC == 11..3355 VV,, IIOOLL == 00..667755 mmAA LLooww--lleevveell oouuttppuutt Full range 0.2 0.2 VVOOLL vvoollttaaggee 25°C 0.21 0.21 VV VVIICC == 11..3355 VV,, IIOOLL == 22..22 mmAA Full range 0.6 0.6 Large-signal 25°C 20 380 20 380 AAVVDD ddaiimffffeeprrlieefinncttaiiaatillo vvnoollttaaggee VVVIIOCC === 011...633 55V VVto,, 2.1 V RRLL == 1100 kkΩΩ,,‡‡ Full range 13 13 VV//mmVV Differential input ri(d) resistance 25°C 1012 1012 Ω Common-mode ci(c) input capacitance f = 10 kHz, 25°C 8 8 pF Closed-loop zo output impedance f = 100 kHz, AV = 10 25°C 25 25 Ω CCoommmmoonn--mmooddee VVIICC == VVIICCRR ((mmiinn)),, VVOO == 11..55 VV,, 25°C 60 84 60 84 CCMMRRRR rejection ratio RS = 50Ω Full range 60 82 60 82 ddBB Supply voltage 25°C 70 89 70 89 VVDDDD == 22..77 VV ttoo 55 VV,, VVIICC == VVDDDD//22,, kkSSVVRR rreejjeeccttiioonn rraattiioo No load ddBB (∆VDD /∆VIO) Full range 70 84 70 84 SSuuppppllyy ccuurrrreenntt 25°C 1 2 1 2 IIDDDD VVOO == 11..55 VV,, NNoo llooaadd mmAA (per channel) Full range 2 2 †Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part. ‡Referenced to 1.35 V 14 WWW.TI.COM
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 operating characteristics at specified free-air temperature, V = 2.7 V (unless otherwise noted) DD TLV2772Q TLV2772AQ PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† TLV2772M TLV2772AM UUNNIITT MIN TYP MAX MIN TYP MAX 25°C 5 9 5 9 SR Slew rate at unity gain VVROOL ((=PP 1PP0)) ==kΩ 00..88 VV,, CCLL == 110000 ppFF,, Full 4.7 6 4.7 6 V/µs range EEqquuiivvaalleenntt iinnppuutt f = 1 kHz 25°C 21 21 VVnn noise voltage f = 10 kHz 25°C 17 17 nnVV//√√HHzz Peak-to-peak f = 0.1 Hz to 1 Hz 25°C 0.33 0.33 µV VVNN((PPPP)) eeqquuiivvaalleenntt iinnppuutt noise voltage f = 0.1 Hz to 10 Hz 25°C 0.86 0.86 µV Equivalent input In noise current f = 100 Hz 25°C 0.6 0.6 fA/√Hz AV = 1 0.0085% 0.0085% TTHHDD ++ NN TToottaall hhaarrmmoonniicc RRLL == 660000 ΩΩ,, AV = 10 2255°CC 0.025% 0.025% ddiissttoorrttiioonn pplluuss nnooiissee ff == 11 kkHHzz AV = 100 0.12% 0.12% Gain-bandwidth f = 10 kHz, RL = 600 Ω, 25°C 4.8 4.8 MHz product CL = 100 pF AV = −1, 0.1% 25°C 0.186 0.186 Step = 0.85 V to ttss SSeettttlliinngg ttiimmee 11..8855 VV,, µss RL = 600 Ω, 0.01% 25°C 3.92 3.92 CL = 100 pF Phase margin at φm unity gain RRLL == 660000 ΩΩ,, CCLL == 110000 ppFF 25°C 46° 46° Gain margin 25°C 12 12 dB †Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part. WWW.TI.COM 15
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, V = 5 V (unless otherwise noted) DD TLV2772Q TLV2772AQ PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† TLV2772M TLV2772AM UUNNIITT MIN TYP MAX MIN TYP MAX 25°C 0.36 2.5 0.36 1.6 VVIIOO IInnppuutt ooffffsseett vvoollttaaggee mmVV Full range 0.4 2.7 0.4 1.9 Temperature 25°C αVVIIOO ccooeeffffiicciieenntt ooff iinnppuutt ttoo 22 22 µVV//°°CC offset voltage VDDDD = ±2.5 V, VOO = 0, 125°C VVIICC == 00,, RRSS == 5500 ΩΩ 25°C 1 60 1 60 IIIIOO IInnppuutt ooffffsseett ccuurrrreenntt ppAA Full range 2 125 2 125 25°C 2 60 2 60 IIIIBB IInnppuutt bbiiaass ccuurrrreenntt ppAA Full range 6 350 6 350 00 −−00..33 00 −−00..33 2255°CC ttoo ttoo ttoo ttoo CCoommmmoonn--mmooddee 3.7 3.8 3.7 3.8 VVIICCRR iinnppuutt vvoollttaaggee rraannggee CCMMRRRR >> 6600 ddBB,, RRSS == 5500 ΩΩ 00 −−00..33 00 −−00..33 VV FFuullll rraannggee ttoo ttoo ttoo ttoo 3.7 3.8 3.7 3.8 25°C 4.9 4.9 IIOOHH == −−11..33 mmAA HHiigghh--lleevveell oouuttppuutt Full range 4.8 4.8 VVOOHH vvoollttaaggee 25°C 4.7 4.7 VV IIOOHH == −−44..22 mmAA Full range 4.4 4.4 25°C 0.1 0.1 VVIICC == 22..55 VV,, IIOOLL == 11..33 mmAA LLooww--lleevveell oouuttppuutt Full range 0.2 0.2 VVOOLL vvoollttaaggee 25°C 0.21 0.21 VV VVIICC == 22..55 VV,, IIOOLL == 44..22 mmAA Full range 0.6 0.6 Large-signal 25°C 20 450 20 450 AAVVDD ddaiimffffeeprrlieefinncttaiiaatillo vvnoollttaaggee VVVIIOCC === 122 ..V55 tVVo,, 4 V RRLL == 1100 kkΩΩ,,‡‡ Full range 13 13 VV//mmVV Differential input ri(d) resistance 25°C 1012 1012 Ω Common-mode ci(c) input capacitance f = 10 kHz, 25°C 8 8 pF Closed-loop zo output impedance f = 100 kHz, AV = 10 25°C 20 20 Ω CCoommmmoonn--mmooddee VVIICC == VVIICCRR ((mmiinn)),, VVOO == 33..77 VV,, 25°C 60 96 60 96 CCMMRRRR rejection ratio RS = 50Ω Full range 60 93 60 93 ddBB Supply voltage 25°C 70 89 70 89 VVDDDD == 22..77 VV ttoo 55 VV,, VVIICC == VVDDDD//22,, kkSSVVRR rreejjeeccttiioonn rraattiioo No load ddBB (∆VDD /∆VIO) Full range 70 84 70 84 SSuuppppllyy ccuurrrreenntt 25°C 1 2 1 2 IIDDDD VVOO == 11..55 VV,, NNoo llooaadd mmAA (per channel) Full range 2 2 †Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part. ‡Referenced to 2.5 V 16 WWW.TI.COM
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 operating characteristics at specified free-air temperature, V = 5 V (unless otherwise noted) DD TLV2772Q TLV2772AQ PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† TLV2772M TLV2772AM UUNNIITT MIN TYP MAX MIN TYP MAX 25°C 5 10.5 5 10.5 SR Slew rate at unity gain VVROOL ((=PP 1PP0)) ==kΩ 11..55 VV,, CCLL == 110000 ppFF,, Full 4.7 6 4.7 6 V/µs range EEqquuiivvaalleenntt iinnppuutt f = 1 kHz 25°C 17 17 VVnn noise voltage f = 10 kHz 25°C 12 12 nnVV//√√HHzz Peak-to-peak f = 0.1 Hz to 1 Hz 25°C 0.33 0.33 µV VVNN((PPPP)) eeqquuiivvaalleenntt iinnppuutt noise voltage f = 0.1 Hz to 10 Hz 25°C 0.86 0.86 µV Equivalent input In noise current f = 100 Hz 25°C 0.6 0.6 fA/√Hz AV = 1 0.005% 0.005% TTHHDD ++ NN TToottaall hhaarrmmoonniicc RRLL == 660000 ΩΩ,, AV = 10 2255°CC 0.016% 0.016% ddiissttoorrttiioonn pplluuss nnooiissee ff == 11 kkHHzz AV = 100 0.095% 0.095% Gain-bandwidth f = 10 kHz, RL = 600 Ω, 25°C 5.1 5.1 MHz product CL = 100 pF AV = −1, 0.1% 25°C 0.134 0.134 Step = 1.5 V to ttss SSeettttlliinngg ttiimmee 33..55 VV,, µss RL = 600 Ω, 0.01% 25°C 1.97 1.97 CL = 100 pF Phase margin at unity φm gain RRLL == 660000 ΩΩ,, CCLL == 110000 ppFF 25°C 46° 46° Gain margin 25°C 12 12 dB †Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part. WWW.TI.COM 17
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS Table of Graphs FIGURE Distribution 1,2 VVIIOO IInnppuutt ooffffsseett vvoollttaaggee vvss CCoommmmoonn--mmooddee iinnppuutt vvoollttaaggee 33,,44 Distribution 5,6 IIB/IIO Input bias and input offset currents vs Free-air temperature 7 VOH High-level output voltage vs High-level output current 8,9 VOL Low-level output voltage vs Low-level output current 10,11 VO(PP) Maximum peak-to-peak output voltage vs Frequency 12,13 vs Supply voltage 14 IOS Short-circuit output current vs Free-air temperature 15 VO Output voltage vs Differential input voltage 16 AVD Large-signal differential voltage amplification and phase margin vs Frequency 17,18 vs Load resistance 19 AVD Differential voltage amplification vs Free-air temperature 20,21 zo Output impedance vs Frequency 22,23 vs Frequency 24 CMRR Common-mode rejection ratio vs Free-air temperature 25 kSVR Supply-voltage rejection ratio vs Frequency 26,27 IDD Supply current (per channel) vs Supply voltage 28 vvss LLooaadd ccaappaacciittaannccee 2299 SSRR SSlleeww rraattee vs Free-air temperature 30 VO Voltage-follower small-signal pulse response 31,32 VO Voltage-follower large-signal pulse response 33,34 VO Inverting small-signal pulse response 35,36 VO Inverting large-signal pulse response 37,38 Vn Equivalent input noise voltage vs Frequency 39,40 Noise voltage (referred to input) Over a 10-second period 41 THD + N Total harmonic distortion plus noise vs Frequency 42,43 Gain-bandwidth product vs Supply voltage 44 B1 Unity-gain bandwidth vs Load capacitance 45 φm Phase margin vs Load capacitance 46 Gain margin vs Load capacitance 47 Amplifier with shutdown pulse turnon/off characteristics 48 − 50 Supply current with shutdown pulse turnon/off characteristics 51 − 53 Shutdown supply current vs Free-air temperature 54 Shutdown forward/reverse isolation vs Frequency 55, 56 18 WWW.TI.COM
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLV2772 DISTRIBUTION OF TLV2772 INPUT OFFSET VOLTAGE INPUT OFFSET VOLTAGE 40 40 VDD =2.7 V VDD =5 V 35 TRAL == 2150° kCΩ 35 RTAL == 2150° kCΩ % 30 % 30 mplifiers − 25 mplifiers − 25 Percentage of A 211005 Percentage of A 211005 5 5 0 0 −2.5 −2 −1.5 −1 −0.5 0 0.5 1 1.5 2 2.5 −2.5 −2 −1.5 −1 −0.5 0 0.5 1 1.5 2 2.5 VIO − Input Offset Voltage − mV VIO − Input Offset Voltage − mV Figure 1 Figure 2 INPUT OFFSET VOLTAGE INPUT OFFSET VOLTAGE vs vs COMMON-MODE INPUT VOLTAGE COMMON-MODE INPUT VOLTAGE 2 2 VDD = 2.7 V VDD = 5 V 1.5 TA = 25°C 1.5 TA = 25°C mV 1 mV 1 − − e e g 0.5 g 0.5 a a olt olt V V et 0 et 0 s s Off Off ut −0.5 ut −0.5 p p n n − I −1 − I −1 O O VI VI −1.5 −1.5 −2 −2 −1 −0.5 0 0.5 1 1.5 2 2.5 3 −1 −0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 VIC − Common-Mode Input Voltage − V VIC − Common-Mode Input Voltage − V Figure 3 Figure 4 WWW.TI.COM 19
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLV2772 DISTRIBUTION OF TLV2772 INPUT OFFSET VOLTAGE INPUT OFFSET VOLTAGE 35 35 VDD =2.7 V VDD =5 V 30 TA = 25°C to 125°C 30 TA = 25°C to 125°C % % mplifiers − 2205 mplifiers − 2205 A A Percentage of 1105 Percentage of 1105 5 5 0 0 −6 −3 0 3 6 9 12 −6 −3 0 3 6 9 12 αVIO − Temperature Coefficient − µV/°C αVIO − Temperature Coefficient − µV/°C Figure 5 Figure 6 INPUT BIAS AND OFFSET CURRENT HIGH-LEVEL OUTPUT VOLTAGE vs vs FREE-AIR TEMPERATURE HIGH-LEVEL OUTPUT CURRENT nA 0.20 3 − VDD = 5 V nts VIC = 0 VDD = 2.7 V e VO = 0 et Curr 0.15 RS = 50 Ω ge − V 2.5 s a put Off IIB ut Volt 2 TA = −40°C n p d I 0.10 Out 1.5 s an vel TA = 125°C a e ut Bi gh-L 1 − Inp 0.05 IIO − HiH 0.5 TA = 25°C O O I V I d TA = 85°C n a 0 0 B −75 −50 −25 0 25 50 75 100 125 0 5 10 15 20 25 I I TA − Free-Air Temperature − °C IOH − High-Level Output Current − mA Figure 7 Figure 8 20 WWW.TI.COM
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS HIGH-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE vs vs HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT CURRENT 5 3 4.5 VTAD D= =25 5° CV VDD = 2.7 V V − 2.5 ge 4 TA = −40°C − V TA = 125°C ut Volta 3.35 TA = 25°C Voltage 2 TA = 85°C utp ut el O 2.5 Outp 1.5 gh-Lev 2 TA = 125°C Level 1 TA = 25°C − Hi 1.5 TA = 85°C Low- VOH 1 − OL 0.5 TA = −40°C 0.5 V 0 0 0 5 10 15 20 25 30 35 40 45 50 55 0 5 10 15 20 25 30 IOH − High-Level Output Current − mA IOL − Low-Level Output Current − mA Figure 9 Figure 10 LOW-LEVEL OUTPUT VOLTAGE MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs vs LOW-LEVEL OUTPUT CURRENT FREQUENCY 3 V 5 VDD = 5 V TA = 125°C ge − VDD = 5 V RL = 10 kΩ a 1% THD ge − V 2.5 TA = 85°C ut Volt 4 olta 2 utp V O utput Peak 3 O 1.5 o- w-Level 1 TA = 25°C m Peak-t 2 V2%DD T H= D2.7 V o − L TA = −40°C mu VOL 0.5 Maxi 1 − P) P 0 O( 0 0 10 20 30 40 50 V 100 1000 10000 IOL − Low-Level Output Current − mA f − Frequency − kHz Figure 11 Figure 12 WWW.TI.COM 21
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE SHORT-CIRCUIT OUTPUT CURRENT vs vs FREQUENCY SUPPLY VOLTAGE V 5 60 − THD = 5% Output Voltage 43..455 VDD = 5TR VAL == 2650°0C Ω urrent − mA 3405 VVTAOIC = == 2 VV5DD°CDD //22 VID = −100 mV eak 3 ut C 15 P p m Peak-to- 2.25 VDD = 2.7 V Circuit Out −105 mu 1.5 rt- o xi h −30 Ma 1 − S VID = 100 mV − PP) 0.5 IOS −45 VO( 0 −60 100 1000 10000 2 3 4 5 6 7 f − Frequency − kHz VDD − Supply Voltage − V Figure 13 Figure 14 SHORT-CIRCUIT OUTPUT CURRENT OUTPUT VOLTAGE vs vs FREE-AIR TEMPERATURE DIFFERENTIAL INPUT VOLTAGE 60 5 RL = 600 Ω TA = 25°C mA 40 VID = −100 mV VDD = 5 V − 4 nt urre 20 − V C e ut ag 3 utp 0 VDD = 5 V Volt VDD = 2.7 V cuit O VO = 2.5 V utput 2 rt-Cir −20 − OO ho V S VID = 100 mV 1 − −40 S O I −60 0 −75 −50 −25 0 25 50 75 100 125 −1000−750 −500 −250 0 250 500 750 1000 TA − Free-Air Temperature − °C VID − Differential Input Voltage − µV Figure 15 Figure 16 22 WWW.TI.COM
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE MARGIN vs FREQUENCY 100 300 B VDD = 2.7 V d − RL = 600 Ω on 80 CL = 600 pF 240 ati AVD TA = 25°C s c e plifi 60 180 gre m e d al A 40 120 n − nti gi ere Phase Mar Diff 20 60 se al ha n P g 0 0 − e-Si m g φ r a −20 −60 L − D AV −40 −90 100 1k 10k 100k 1M 10M f − Frequency − Hz Figure 17 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE MARGIN vs FREQUENCY 100 300 B VDD = 5 V d − RL = 600 Ω on 80 CL = 600 pF 240 cati AVD TA = 25°C es plifi 60 180 gre m e d al A 40 120 n − nti gi ere Phase Mar Diff 20 60 se al ha n P g 0 0 − e-Si m g φ r a −20 −60 L − D AV −40 −90 100 1k 10k 100k 1M 10M f − Frequency − Hz Figure 18 WWW.TI.COM 23
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS DIFFERENTIAL VOLTAGE AMPLIFICATION DIFFERENTIAL VOLTAGE AMPLIFICATION vs vs LOAD RESISTANCE FREE-AIR TEMPERATURE 250 1000 V TA = 25°C V RL = 10 kΩ m m V/ V/ n − 200 n − RL = 1 MΩ o o 100 cati VDD = 5 V VDD = 2.7 V cati RL = 600 Ω plifi 150 plifi m m A A e e 10 g g a a olt 100 olt V V al al nti nti e e 1 Differ 50 Differ VDD = 2.7 V − − VIC = 1.35 V VD VD VO = 0.6 V to 2.1 V A 0 A 0.1 0.1 1 10 100 1000 −75 −50 −25 0 25 50 75 100 125 RL − Load Resistance − kΩ TA − Free-Air Temperature − °C Figure 19 Figure 20 DIFFERENTIAL VOLTAGE AMPLIFICATION OUTPUT IMPEDANCE vs vs FREE-AIR TEMPERATURE FREQUENCY 1000 100 V RL = 10 kΩ VDD = 2.7 V m TA = 25°C V/ − on 100 RL = 1 MΩ Ω 10 ati − plific ance AV = 100 Am RL = 600 Ω ed e 10 mp 1 oltag put I AV = 10 al V Out erenti 1 Z− O 0.10 AV = 1 Diff VDD = 5 V − VIC = 2.5 V VD VO = 1 V to 4 V A 0.1 0.01 −75 −50 −25 0 25 50 75 100 125 100 1k 10k 100k 1M TA − Free-Air Temperature − °C f − Frequency − Hz Figure 21 Figure 22 24 WWW.TI.COM
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS OUTPUT IMPEDANCE COMMON-MODE REJECTION RATIO vs vs FREQUENCY FREQUENCY 100 90 VDD = ±2.5 V B VDD = 2.7 V VIC = 1.35 V TA = 25°C o − d VDD = 5 V aTAnd = 2 2.55 °VC ati 80 Ω 10 R − n e o nc Av = 100 cti a e ut Imped 1 Mode Rej 70 Outp Av = 10 mon- 60 − m Zo 0.1 Av = 1 Co − 50 R R M C 0.01 40 100 1k 10k 100k 1M 10 100 1k 10k 100k 1M 10M f − Frequency − Hz f − Frequency − Hz Figure 23 Figure 24 COMMON-MODE REJECTION RATIO SUPPLY-VOLTAGE REJECTION RATIO vs vs FREE-AIR TEMPERATURE FREQUENCY 120 120 B VDD = 2.7 V − d 115 dB kSVR+ TA = 25°C o − 100 n Rati 110 Ratio kSVR− o n ejecti 105 ectio 80 R ej e R od 100 VDD = 2.7 V ge 60 M a on- 95 Volt mm ply- 40 Co 90 VDD = 5 V up − S R − 20 R 85 R M V C S k 80 0 −40 −20 0 20 40 60 80 100 120 140 10 100 1k 10k 100k 1M 10M TA − Free-Air Temperature − °C f − Frequency − Hz Figure 25 Figure 26 WWW.TI.COM 25
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS SUPPLY VOLTAGE REJECTION RATIO SUPPLY CURRENT (PER CHANNEL) vs vs FREQUENCY SUPPLY VOLTAGE 120 1.6 n Ratio − dB 100 kkSSVVRR+− VTAD D= =25 5° CV annel) − mA 11..24 TTTAAA === 1822555°°CC°C o 80 h ejecti Per C 1 TA = 0°C e R 60 nt ( 0.8 TA = −40°C g e − Supply Volta 40 − Supply Curr 00..46 R 20 D V D 0.2 S I k 0 0 10 100 1 k 10 k 100 k 1 M 10 M 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 f − Frequency − Hz VDD − Supply Voltage − V Figure 27 Figure 28 SLEW RATE SLEW RATE vs vs LOAD CAPACITANCE FREE-AIR TEMPERATURE 16 14 SR+ VDD = 5 V VDD = 2.7 V 14 AV = −1 RL = 10 kΩ TA = 25°C 13 CL = 100 pF SR− AV = 1 12 s µ s V/ µ 12 w Rate − 180 w Rate − 11 Sle Sle R − 6 R − 10 S S 4 9 2 0 8 10 100 1k 10k 100k −75 −50 −25 0 25 50 75 100 125 CL − Load Capacitance − pF TA − Free-Air Temperature − °C Figure 29 Figure 30 26 WWW.TI.COM
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS VOLTAGE-FOLLOWER VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE SMALL-SIGNAL PULSE RESPONSE 100 100 VDD = 2.7 V VDD = 5 V 80 RL = 600 Ω 80 RL = 600 Ω CL = 100 pF CL = 100 pF AV = 1 AV = 1 mV 60 TA = 25°C mV 60 TA = 25°C Output Voltage − 42000 Output Voltage − 42000 − − O O V −20 V −20 −40 −40 −60 −60 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 t − Time − µs t − Time − µs Figure 31 Figure 32 VOLTAGE-FOLLOWER VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE LARGE-SIGNAL PULSE RESPONSE 3 6 VDD = 2.7 V VDD = 5 V 2.5 RL = 600 Ω 5 RL = 600 Ω CL = 100 pF CL = 100 pF AV = 1 AV = 1 V 2 TA = 25°C V 4 TA = 25°C Output Voltage − 10..155 Output Voltage − 312 − − O O V 0 V 0 −0.5 −1 −1 −2 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 t − Time − µs t − Time − µs Figure 33 Figure 34 WWW.TI.COM 27
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS INVERTING SMALL-SIGNAL INVERTING SMALL-SIGNAL PULSE RESPONSE PULSE RESPONSE 100 100 VDD = 2.7 V VDD = 5 V 80 RL = 600 Ω RL = 600 Ω CL = 100 pF 80 CL = 100 pF AV = −1 AV = −1 mV 60 TA = 25°C mV 60 TA = 25°C age − 40 ge − 40 Volt olta put 20 ut V 20 Out 0 utp − O − O 0 V O −20 V −20 −40 −40 −60 −60 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 t − Time − µs t − Time − µs Figure 35 Figure 36 INVERTING LARGE-SIGNAL INVERTING LARGE-SIGNAL PULSE RESPONSE PULSE RESPONSE 3 4 2.5 3.5 2 V 3 age − 1.5 ge − V 2.5 Volt olta put 1 ut V 2 Out 0.5 utp − O − O 1.5 V 0 VRDL D= =6 020.7 Ω V VO 1 VRDL D= =6 050 V Ω CL = 100 pF CL = 100 pF −0.5 AV = −1 0.5 AV = −1 TA = 25°C TA = 25°C −1 1 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 t − Time − µs t − Time − µs Figure 37 Figure 38 28 WWW.TI.COM
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS EQUIVALENT INPUT NOISE VOLTAGE EQUIVALENT INPUT NOISE VOLTAGE vs vs FREQUENCY FREQUENCY 160 140 VDD = 2.7 V VDD = 5 V 140 RS = 20 Ω RS = 20 Ω Hz TA = 25°C Hz 120 TA = 25°C 120 nV/ nV 100 − e − 100 ge g a olta Volt 80 e V 80 se ois Noi 60 ut N 60 put − Inp 40 − In 40 Vn Vn 20 20 0 0 10 100 1k 10k 10 100 1k 10k f − Frequency − Hz f − Frequency − Hz Figure 39 Figure 40 NOISE VOLTAGE OVER A 10 SECOND PERIOD VDD = 5 V f = 0.1 Hz to 10 Hz 300 TA = 25°C 200 V n 100 − e g olta GND V e s −100 oi N −200 −300 0 1 2 3 4 5 6 7 8 9 10 t − Time − s Figure 41 WWW.TI.COM 29
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE vs vs FREQUENCY FREQUENCY 10 10 % % − VDD = 2.7 V − VDD = 5 V se RL = 600 Ω se RL = 600 Ω oi TA = 25°C oi TA = 25°C N N s s u 1 u 1 Pl Pl n n o o rti rti sto Av = 100 sto Di 0.1 Di 0.1 Av = 100 c c ni ni o Av = 10 o m m ar ar Av = 10 H H al 0.01 Av = 1 al 0.01 Tot Tot Av = 1 − − N N + + D D H H T 0.001 T 0.001 10 100 1k 10k 100k 10 100 1k 10k 100k f − Frequency − Hz f − Frequency − Hz Figure 42 Figure 43 GAIN-BANDWIDTH PRODUCT UNITY-GAIN BANDWIDTH vs vs SUPPLY VOLTAGE LOAD CAPACITANCE 5.2 5 RL = 600 Ω VDD = 5 V CL = 100 pF RL = 600 Ω z 5 fT A= 1=0 2 k5H°Cz 4 TA = 25°C H z M H − M uct 4.8 h − rod widt 3 h P 4.6 nd Rnull = 100 dt Ba andwi 4.4 Gain 2 Rnull = 50 B y- ain- Unit Rnull = 20 G 1 4.2 Rnull = 0 4 0 2 2.5 3 3.5 4 4.5 5 5.5 6 10 100 1k 10k 100k VDD − Supply Voltage − V CL − Load Capacitance − pF Figure 44 Figure 45 30 WWW.TI.COM
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS PHASE MARGIN GAIN MARGIN vs vs LOAD CAPACITANCE LOAD CAPACITANCE 90 0 VDD = 5 V VDD = 5 V 80 TRAL == 2650°0C Ω Rnull = 100 Ω 5 RTAL == 2650°0C Ω s 70 ree Rnull = 50 Ω 10 g se Margin − de 645000 Rnull = 20 Ω n Margin − dB 1250 RnullR =n u10ll0 = Ω 0 a ai 25 − Ph 30 G Rnull = 50 Ω m 30 φ 20 Rnull = 0 Rnull = 20 Ω 10 35 0 40 10 100 1k 10k 100K 10 100 1k 10k 100K CL − Load Capacitance − pF CL − Load Capacitance − pF Figure 46 Figure 47 TLV2770 TLV2773 AMPLIFIER WITH SHUTDOWN PULSE AMPLIFIER WITH SHUTDOWN PULSE TURNON/OFF CHARACTERISTICS TURNON/OFF CHARACTERISTICS 6 8 8 8 4 SHDN = VDD 7 6 SHDN = VDD 7 2 6 4 6 0 5 V 2 5 V wn Signal − V −−24 VATAVD D== =255 5° CV SHDN = GND 43 put Voltage − wn Signal − V −02 VATCCAVDhh aaD==nn =25nn5 ee5°ll C V12 SSwHDitcNh MedODSEHDN = GND 43 put Voltage − hutdo −6 2 − Out hutdo −4 Channel 1 2 − Out S O S O −8 1 V −6 1 V VO VO −10 0 −8 0 −12 −1 −10 −1 −4 −2 0 2 4 6 8 10 12 14 −2.5 0 2.5 5 7.5 10 12.5 15 t − Time − µs t − Time − µs Figure 48 Figure 49 WWW.TI.COM 31
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS TLV2775 − CHANNEL 1 TLV2770 AMPLIFIER WITH SHUTDOWN PULSE SUPPLY CURRENT WITH SHUTDOWN PULSE TURNON/OFF CHARACTERISTICS TURNON/OFF CHARACTERISTICS 8 8 6 24 6 SHDN = VDD 7 4 SHDN = VDD 21 4 6 2 18 A hutdown Signal − V −−0224 VATCCAVDhh aaD==nnC =25nnh5 ee5a°ll Cn V13n//24e lSS 1wHDitcNh MeSdOHDDEN = GND 5432 − Output Voltage − V hutdown Signal − V −−−0462 SVATHAVDD D=N= =25=5 5G° CVND 119652 − Supply Current − m S O S D −6 1 V −8 3 D I VO IDD −8 0 −10 0 −10 −1 −12 −3 −2.5 0 2.5 5 7.5 10 12.5 15 −4 −2 0 2 4 6 8 10 12 14 t − Time − µs t − Time − µs Figure 50 Figure 51 TLV2773 TLV2775 SUPPLY CURRENT WITH SHUTDOWN PULSE SUPPLY CURRENT WITH SHUTDOWN PULSE TURNON/OFF CHARACTERISTICS TURNON/OFF CHARACTERISTICS 6 70 6 70 3 SHDN = VDD 60 3 SHDN = VDD 60 0 50 0 50 SHDN = GND mA SHDN = GND mA − V −3 40 nt − − V −3 40 nt − wn Signal −6 VATCAVDh aD==n =25n5 e5°l C V1 Switched 30 ply Curre wn Signal −6 VATCAVDh aD==n =25n5 e5°l C V1/2 Switched 30 ply Curre hutdo −9 Channel 2 SHDN MODE 20 − Sup hutdo −9 Channel 3/4 SHDN MODE 20 − Sup S−12 10 D S −12 10 D D D IDD I IDD I −15 0 −15 0 −18 −3 −18 −3 −5 −2.5 0 2.5 5 7.5 10 12.5 15 −5 −2.5 0 2.5 5 7.5 10 12.5 15 t − Time − µs t − Time − µs Figure 52 Figure 53 32 WWW.TI.COM
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS SHUTDOWN SUPPLY CURRENT TLV2770 vs SHUTDOWN FORWARD ISOLATION FREE-AIR TEMPERATURE vs 7 FREQUENCY AV = 5 140 A 6 RL = OPEN µ− SHDN = GND 120 VI(PP) = 2.7 V urrent 5 n − dB 100 VI(PP) = 0.1 V C o pply 4 olati 80 Su VDD 5 V d Is wn 3 war 60 do or Shut 2 wn F 40 SHDN MODE I−DD 1 VDD 2.7 V Shutdo 20 AVRVDL D== =11 02 .k7Ω V 0 CL = 20 pF 0 TA = 25°C −75 −50 −25 0 25 50 75 100 125 −20 TA − Free-Air Temperature − °C 10 102 103 104 105 106 f − Frequency − Hz Figure 54 Figure 55 TLV2770 SHUTDOWN REVERSE ISOLATION vs FREQUENCY 140 120 VI(PP) = 2.7 V B d − 100 n o ati ol 80 s e I rs 60 VI(PP) = 0.1 V e v e R n 40 w SHDN MODE o d AV = 1 hut 20 VDD = 2.7 V S RL = 10 kΩ 0 CL = 20 pF TA = 25°C −20 10 102 103 104 105 106 f − Frequency − Hz Figure 56 WWW.TI.COM 33
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 PARAMETER MEASUREMENT INFORMATION _ Rnull + RL CL Figure 57 driving a capacitive load When the amplifier is configured in this manner, capacitive loading directly on the output will decrease the device’s phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater than 10 pF, it is recommended that a resistor be placed in series (R ) with the output of the amplifier, as NULL shown in Figure 58. A minimum value of 20 Ω should work well for most applications. RF RG Input _ RNULL Output + CLOAD Figure 58. Driving a Capacitive Load 34 WWW.TI.COM
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 APPLICATION INFORMATION offset voltage The output offset voltage, (V ) is the sum of the input offset voltage (V ) and both input bias currents (I ) times OO IO IB the corresponding gains. The following schematic and formula can be used to calculate the output offset voltage: RF (cid:2) (cid:4) (cid:2) (cid:4) (cid:2) (cid:4) (cid:2) (cid:4) RG IIB− VOO(cid:1)VIO 1(cid:3) RRF (cid:5)IIB(cid:3)RS 1(cid:3) RRF (cid:5)IIB–RF G G + − VI VO + RS IIB+ Figure 59. Output Offset Voltage Model general configurations When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier (see Figure 60). RG RF f (cid:1) 1 –3dB 2(cid:1)R1C1 − (cid:2) (cid:4) VI + VO VO (cid:1) 1(cid:3)RF (cid:2) 1 (cid:4) R1 V R 1(cid:3)sR1C1 C1 I G Figure 60. Single-Pole Low-Pass Filter If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this task. For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth. Failure to do this can result in phase shift of the amplifier. C1 R1 = R2 = R C1 = C2 = C Q = Peaking Factor (Butterworth Q = 0.707) VI + R1 R2 _ f (cid:1) 1 –3dB 2(cid:1)RC C2 RF RG = RF (2 − 1 ) RG Q Figure 61. 2-Pole Low-Pass Sallen-Key Filter WWW.TI.COM 35
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 APPLICATION INFORMATION using the TLV2772 as an accelerometer interface The schematic, shown in Figure 62, shows the ACH04-08-05 interfaced to the TLV1544 10-bit analog-to-digital converter (ADC). The ACH04-08-05 is a shock sensor designed to convert mechanical acceleration into electrical signals. The sensor contains three piezoelectric sensing elements oriented to simultaneously measure acceleration in three orthogonal, linear axes (x, y, z). The operating frequency is 0.5 Hz to 5 kHz. The output is buffered with an internal JFET and has a typical output voltage of 1.80 mV/g for the x and y axis and 1.35 mV/g for the z axis. Amplification and frequency shaping of the shock sensor output is done by the TLV2772 rail-to-rail operational amplifier. The TLV2772 is ideal for this application as it offers high input impedance, good slew rate, and excellent dc precision. The rail-to-rail output swing and high output drive are perfect for driving the analog input of the TLV1544 ADC. 1.23 V R3 C2 10 kΩ 2.2 nF R4 100 kΩ 3 V R2 1 Axis ACH04−08−05 1 MΩ 3 V R5 0.2C21 µF 2 + 8 1 1 kΩ Output to 3 _ TLV1544 (ADC) 1/2 R1 4 TLV2772 C0.322 µF 100 kΩ Signal Conditioning 3 V R6 2.2 kΩ 1.23 V Shock Sensor 1.23 V C TLV431 R A Voltage Reference Figure 62. Accelerometer Interface Schematic The sensor signal must be amplified and frequency-shaped to provide a signal the ADC can properly convert into the digital domain. Figure 62 shows the topology used in this application for one axis of the sensor. This system is powered from a single 3-V supply. Configuring the TLV431 with a 2.2-kΩ resistor produces a reference voltage of 1.23 V. This voltage is used to bias the operational amplifier and the internal JFETs in the shock sensor. 36 WWW.TI.COM
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 APPLICATION INFORMATION gain calculation Since the TLV2772 is capable of rail-to-rail output using a 3-V supply, V = 0 (min) to 3 V (max). With no signal O from the sensor, nominal V = reference voltage = 1.23 V. Therefore, the maximum negative swing from nominal O is 0 V − 1.23 V = −1.23 V and the maximum positive swing is 3 V − 1.23 V = 1.77 V. By modeling the shock sensor as a low impedance voltage source with output of 2.25 mV/g (max) in the x and y axis and 1.70 mV/g (max) in the z axis, the gain of the circuit is calculated by equation 1. OutputSwing Gain (cid:1) (1) SensorSignal(cid:6)Acceleration To avoid saturation of the operational amplifier, the gain calculations are based on the maximum negative swing of −1.23 V and the maximum sensor output of 2.25 mV/g (x and y axis) and 1.70 mV/g (z axis). Gain(x, y) (cid:1) (cid:7)1.23V (cid:1) 10.9 (2) 2.25mV(cid:8)g(cid:6)(cid:7)50g and Gain(z) (cid:1) –1.23V (cid:1) 14.5 (3) 1.70mV(cid:8)g(cid:6)–50g By selecting R3 = 10 kΩ and R4 = 100 kΩ, in the x and y channels, a gain of 11 is realized. By selecting R3 = 7.5 kΩ and R4 = 100 kΩ, in the z channel, a gain of 14.3 is realized. The schematic shows the configuration for either the x- or y-axis. bandwidth calculation To calculate the component values for the frequency shaping characteristics of the signal conditioning circuit, 1 Hz and 500 Hz are selected as the minimum required 3-dB bandwidth. To minimize the value of the input capacitor (C1) required to set the lower cutoff frequency requires a large value resistor for R2 is required. A 1-MΩ resistor is used in this example. To set the lower cutoff frequency, the required capacitor value for C1 is: C1 (cid:1) 1 (cid:1) 0.159µF (4) 2(cid:1)f R LOW 2 Using a value of 0.22 µF, a more common value of capacitor, the lower cutoff frequency is 0.724 Hz. To minimize the phase shift in the feedback loop caused by the input capacitance of the TLV2772, it is best to minimize the value of the feedback resistor R4. However, to reduce the required capacitance in the feedback loop a large value for R4 is required. Therefore, a compromise for the value of R4 must be made. In this circuit, a value of 100 kΩ has been selected. To set the upper cutoff frequency, the required capacitor value for C2 is: C2 (cid:1) 1 (cid:1) 3.18µF (5) 2(cid:1)f R HIGH 4 Using a 2.2-nF capacitor, the upper cutoff frequency is 724 Hz. R5 and C3 also cause the signal response to roll off. Therefore, it is beneficial to design this roll-off point to begin at the upper cutoff frequency. Assuming a value of 1 kΩ for R5, the value for C3 is calculated to be 0.22 µF. WWW.TI.COM 37
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 APPLICATION INFORMATION circuit layout considerations To achieve the levels of high performance of the TLV277x, follow proper printed-circuit board design techniques. A general set of guidelines is given in the following. (cid:1) Ground planes—It is highly recommended that a ground plane be used on the board to provide all components with a low inductive ground connection. However, in the areas of the amplifier inputs and output, the ground plane can be removed to minimize the stray capacitance. (cid:1) Proper power supply decoupling—Use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers depending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminal of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible to the supply terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less effective. The designer should strive for distances of less than 0.1 inches between the device power terminals and the ceramic capacitors. (cid:1) Sockets—Sockets can be used but are not recommended. The additional lead inductance in the socket pins will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board is the best implementation. (cid:1) Short trace runs/compact part placements—Optimum high performance is achieved when stray series inductance has been minimized. To realize this, the circuit layout should be made as compact as possible, thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of the amplifier. Its length should be kept as short as possible. This will help to minimize stray capacitance at the input of the amplifier. (cid:1) Surface-mount passive components—Using surface-mount passive components is recommended for high performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be kept as short as possible. 38 WWW.TI.COM
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 APPLICATION INFORMATION general power dissipation considerations For a given θ , the maximum power dissipation is shown in Figure 63 and is calculated by the following formula: JA (cid:2) (cid:4) T –T P (cid:1) MAX A D (cid:2) JA Where: P = Maximum power dissipation of TLV277x IC (watts) D T = Absolute maximum junction temperature (150°C) MAX T = Free-ambient air temperature (°C) A θJA = θJC + θCA θ = Thermal coefficient from junction to case JC θ = Thermal coefficient from case to ambient air (°C/W) CA MAXIMUM POWER DISSIPATION vs FREE-AIR TEMPERATURE 2 PDIP Package TJ = 150°C 1.75 Low-K Test PCB θJA = 104°C/W W n − 1.5 MSOP Package o pati 1.25 SOIC Package LθJoAw -=K 2 T6e0s°tC P/WCB si Low-K Test PCB Dis θJA = 176°C/W r 1 e w o m P 0.75 u m xi 0.5 a M 0.25 SOT-23 Package Low-K Test PCB 0 θJA = 324°C/W −55−40−25 −10 5 20 35 50 65 80 95 110 125 TA − Free-Air Temperature − °C NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB. Figure 63. Maximum Power Dissipation vs Free-Air Temperature WWW.TI.COM 39
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 APPLICATION INFORMATION shutdown function Three members of the TLV277x family (TLV2770/3/5) have a shutdown terminal for conserving battery life in portable applications. When the shutdown terminal is tied low, the supply current is reduced to 0.8 µA/channel, the amplifier is disabled, and the outputs are placed in a high impedance mode. To enable the amplifier, the shutdown terminal can either be left floating or pulled high. When the shutdown terminal is left floating, care needs to be taken to ensure that parasitic leakage current at the shutdown terminal does not inadvertently place the operational amplifier into shutdown. The shutdown terminal threshold is always referenced to V /2. DD Therefore, when operating the device with split supply voltages (e.g. ±2.5 V), the shutdown terminal needs to be pulled to V − (not GND) to disable the operational amplifier. DD The amplifier’s output with a shutdown pulse is shown in Figures 48, 49, and 50. The amplifier is powered with a single 5-V supply and configured as a noninverting configuration with a gain of 5. The amplifier turnon and turnoff times are measured from the 50% point of the shutdown pulse to the 50% point of the output waveform. The times for the single, dual, and quad are listed in the data tables. The bump on the rising edge of the TLV2770 output waveform is due to the start-up circuit on the bias generator. For the dual and quad (TLV2773/5), this bump is attributed to the bias generator’s start-up circuit as well as the crosstalk between the other channel(s), which are in shutdown. Figures 55 and 56 show the amplifier’s forward and reverse isolation in shutdown. The operational amplifier is powered by ±1.35-V supplies and configured as a voltage follower (AV = 1). The isolation performance is plotted across frequency for both 0.1 V and 2.7 V input signals. During normal operation, the amplifier would not PP PP be able to handle a 2.7-V input signal with a supply voltage of ±1.35 V since it exceeds the common-mode PP input voltage range (V ). However, this curve illustrates that the amplifier remains in shutdown even under ICR a worst case scenario. 40 WWW.TI.COM
(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:8) (cid:9)(cid:8)(cid:10)(cid:11)(cid:2)(cid:12) (cid:13)(cid:9) (cid:4)(cid:14)(cid:5)(cid:15)(cid:3) (cid:16)(cid:11)(cid:17)(cid:16)(cid:15)(cid:18)(cid:2)(cid:19)(cid:20)(cid:15)(cid:21)(cid:8)(cid:1)(cid:19) (cid:21)(cid:8)(cid:11)(cid:2)(cid:15)(cid:1)(cid:13)(cid:15)(cid:21)(cid:8)(cid:11)(cid:2) (cid:13)(cid:22)(cid:1)(cid:23)(cid:22)(cid:1) (cid:13)(cid:23)(cid:19)(cid:21)(cid:8)(cid:1)(cid:11)(cid:13)(cid:24)(cid:8)(cid:2) (cid:8)(cid:10)(cid:23)(cid:2)(cid:11)(cid:9)(cid:11)(cid:19)(cid:21)(cid:18) (cid:20)(cid:11)(cid:1)(cid:16) (cid:18)(cid:16)(cid:22)(cid:1)(cid:25)(cid:13)(cid:20)(cid:24) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 APPLICATION INFORMATION macromodel information Macromodel information provided was derived using Microsim Parts Release 8, the model generation software used with Microsim PSpice. The Boyle macromodel (see Note 4) and subcircuit in Figure 64 are generated using the TLV2772 typical electrical and operating characteristics at T = 25°C. Using this A information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases): (cid:1) (cid:1) Maximum positive output voltage swing Unity-gain frequency (cid:1) (cid:1) Maximum negative output voltage swing Common-mode rejection ratio (cid:1) (cid:1) Slew rate Phase margin (cid:1) (cid:1) Quiescent power dissipation DC output resistance (cid:1) (cid:1) Input bias current AC output resistance (cid:1) (cid:1) Open-loop voltage amplification Short-circuit output current limit NOTE 4: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal of Solid-State Circuits, SC-9, 353 (1974). 99 dln 3 egnd + VDD+ 92 9 fb css rss iss + − 90 91 rp + − vb roh2lim + dlp +vlp − vln IN− 2 10 vc r2 − − + dp j1 j2 − 6 C2 7 IN+ 53 + 1 vlim 11 12 dc gcm ga − 8 C1 rd1 rd2 ro1 4 54 de 5 GND − + ve OUT * TLV2772 operational amplifier macromodel subcircuit iss 3 10 dc 145.50E−6 * created using Parts release 8.0 on 12/12/97 at 10:08 hlim 90 0 vlim 1K * Parts is a MicroSim product. j1 11 2 10 jx1 * j2 12 1 10 jx2 * connections: noninverting input r2 6 9 100.00E3 * | inverting input rd1 4 11 5.3052E3 * | | positive power supply rd2 4 12 5.3052E3 * | | | negative power supply ro1 8 5 17.140 * | | | | output ro2 7 99 17.140 * | | | | | rp 3 4 4.5455E3 .subckt TLV2772 1 2 3 4 5 rss 10 99 1.3746E6 * vb 9 0 dc 0 c1 11 12 2.8868E-12 vc 3 53 dc .82001 c2 6 7 10.000E−12 ve 54 4 dc .82001 css 10 99 2.6302E−12 vlim 7 8 dc 0 dc 5 53 dy vlp 91 0 dc 47 de 54 5 dy vln 0 92 dc 47 dlp 90 91 dx .model dx D(Is=800.00E−18) dln 92 90 dx .model dy D(Is=800.00E−18 Rs=1m Cjo=10p) dp 4 3 dx .model jx1 PJF(Is=2.2500E−12 Beta=244.20E−6 egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5 + Vto=−.99765) fb 7 99 poly(5) vb vc ve vlp vln 0 .model jx2 PJF(Is=1.7500E−12 Beta=244.20E−6 15.513E6 −1E3 1E3 16E6 −16E6 + Vto=−1.002350) ga 6 0 11 12 188.50E−6 .ends gcm 0 6 10 99 9.4472E−9 *$ Figure 64. Boyle Macromodel and Subcircuit PSpice and Parts are trademarks of MicroSim Corporation. WWW.TI.COM 41
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) 5962-9858802QPA ACTIVE CDIP JG 8 1 TBD Call TI N / A for Pkg Type -55 to 125 9858802QPA TLV2772AM TLV2770AID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2770AI & no Sb/Br) TLV2770AIP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type -40 to 125 TLV2770AI & no Sb/Br) TLV2770CD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 2770C & no Sb/Br) TLV2770CDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 2770C & no Sb/Br) TLV2770CP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TLV2770C & no Sb/Br) TLV2770IDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 ABP & no Sb/Br) TLV2770IDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2770I & no Sb/Br) TLV2770IP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type -40 to 125 TLV2770I & no Sb/Br) TLV2771AIDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2771AI & no Sb/Br) TLV2771CD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 2771C & no Sb/Br) TLV2771CDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 VAMC & no Sb/Br) TLV2771CDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 VAMC & no Sb/Br) TLV2771CDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 VAMC & no Sb/Br) TLV2771CDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 2771C & no Sb/Br) TLV2771ID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2771I & no Sb/Br) TLV2771IDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 VAMI & no Sb/Br) Addendum-Page 1
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TLV2771IDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 VAMI & no Sb/Br) TLV2771IDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2771I & no Sb/Br) TLV2772AID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2772AI & no Sb/Br) TLV2772AIDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2772AI & no Sb/Br) TLV2772AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2772AI & no Sb/Br) TLV2772AIP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type -40 to 125 TLV2772AI & no Sb/Br) TLV2772AMD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 2772AM & no Sb/Br) TLV2772AMDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 2772AM & no Sb/Br) TLV2772AMJGB ACTIVE CDIP JG 8 1 TBD Call TI N / A for Pkg Type -55 to 125 9858802QPA TLV2772AM TLV2772AQPW ACTIVE TSSOP PW 8 150 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2772AQ & no Sb/Br) TLV2772CD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 2772C & no Sb/Br) TLV2772CDGK ACTIVE VSSOP DGK 8 80 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM 0 to 70 AAF & no Sb/Br) TLV2772CDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM 0 to 70 AAF & no Sb/Br) TLV2772CDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 2772C & no Sb/Br) TLV2772CP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TLV2772C & no Sb/Br) TLV2772ID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2772I & no Sb/Br) TLV2772IDGK ACTIVE VSSOP DGK 8 80 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 AAG & no Sb/Br) TLV2772IDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 AAG & no Sb/Br) Addendum-Page 2
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TLV2772IDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2772I & no Sb/Br) TLV2772IP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type -40 to 125 TLV2772IP & no Sb/Br) TLV2772MD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 2772M & no Sb/Br) TLV2772MDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 2772M & no Sb/Br) TLV2772QD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2772Q & no Sb/Br) TLV2772QPW ACTIVE TSSOP PW 8 150 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2772Q & no Sb/Br) TLV2772QPWR ACTIVE TSSOP PW 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2772Q & no Sb/Br) TLV2772QPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 2772Q & no Sb/Br) TLV2773AIN ACTIVE PDIP N 14 25 Green (RoHS NIPDAU N / A for Pkg Type -40 to 125 TLV2773AI & no Sb/Br) TLV2773CDGS ACTIVE VSSOP DGS 10 80 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 ABQ & no Sb/Br) TLV2773CDGSG4 ACTIVE VSSOP DGS 10 80 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 ABQ & no Sb/Br) TLV2773IDGSR ACTIVE VSSOP DGS 10 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 ABR & no Sb/Br) TLV2774AID ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2774A & no Sb/Br) TLV2774AIDR ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2774A & no Sb/Br) TLV2774AIN ACTIVE PDIP N 14 25 Green (RoHS NIPDAU N / A for Pkg Type -40 to 125 TLV2774A & no Sb/Br) TLV2774AIPW ACTIVE TSSOP PW 14 90 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 TY2774A & no Sb/Br) TLV2774CD ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TLV2774C & no Sb/Br) TLV2774CDG4 ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TLV2774C & no Sb/Br) Addendum-Page 3
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TLV2774CDR ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TLV2774C & no Sb/Br) TLV2774CN ACTIVE PDIP N 14 25 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TLV2774C & no Sb/Br) TLV2774CPW ACTIVE TSSOP PW 14 90 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 2774C & no Sb/Br) TLV2774CPWR ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TV2774 & no Sb/Br) TLV2774ID ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2774I & no Sb/Br) TLV2774IDG4 ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2774I & no Sb/Br) TLV2774IDR ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2774I & no Sb/Br) TLV2774IN ACTIVE PDIP N 14 25 Green (RoHS NIPDAU N / A for Pkg Type -40 to 125 TLV2774I & no Sb/Br) TLV2774IPW ACTIVE TSSOP PW 14 90 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 TY2774 & no Sb/Br) TLV2774IPWR ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 TY2774 & no Sb/Br) TLV2774IPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 TY2774 & no Sb/Br) TLV2775AIN ACTIVE PDIP N 16 25 Green (RoHS NIPDAU N / A for Pkg Type -40 to 125 TLV2775A & no Sb/Br) TLV2775AIPW ACTIVE TSSOP PW 16 90 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2775AI & no Sb/Br) TLV2775CN ACTIVE PDIP N 16 25 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TLV2775C & no Sb/Br) TLV2775ID ACTIVE SOIC D 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2775I & no Sb/Br) TLV2775IDR ACTIVE SOIC D 16 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2775I & no Sb/Br) TLV2775IPWR ACTIVE TSSOP PW 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2775I & no Sb/Br) TLV2775IPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2775I & no Sb/Br) Addendum-Page 4
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TLV2771, TLV2772, TLV2772A, TLV2772AM, TLV2774, TLV2774A : •Catalog: TLV2772A •Automotive: TLV2771-Q1, TLV2772-Q1, TLV2772A-Q1, TLV2772A-Q1 •Enhanced Product: TLV2772A-EP, TLV2772A-EP, TLV2774-EP, TLV2774A-EP Addendum-Page 5
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 •Military: TLV2772AM NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects •Enhanced Product - Supports Defense, Aerospace and Medical Applications •Military - QML certified for Military and Defense Applications Addendum-Page 6
PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TLV2770CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2770IDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TLV2770IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2771AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2771CDBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 TLV2771CDBVT SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 TLV2771CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2771IDBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 TLV2771IDBVT SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 TLV2771IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2772AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2772CDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TLV2772CDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TLV2772CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2772IDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TLV2772IDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TLV2772IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2772MDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 PackMaterials-Page1
PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2019 Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TLV2772QPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1 TLV2772QPWRG4 TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1 TLV2773IDGSR VSSOP DGS 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TLV2774AIDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TLV2774CDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TLV2774CPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 TLV2774IDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TLV2774IPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 TLV2775IDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 TLV2775IPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TLV2770CDR SOIC D 8 2500 340.5 338.1 20.6 TLV2770IDGKR VSSOP DGK 8 2500 358.0 335.0 35.0 TLV2770IDR SOIC D 8 2500 340.5 338.1 20.6 TLV2771AIDR SOIC D 8 2500 340.5 338.1 20.6 TLV2771CDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV2771CDBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV2771CDR SOIC D 8 2500 340.5 338.1 20.6 PackMaterials-Page2
PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2019 Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TLV2771IDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV2771IDBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV2771IDR SOIC D 8 2500 340.5 338.1 20.6 TLV2772AIDR SOIC D 8 2500 340.5 338.1 20.6 TLV2772CDGKR VSSOP DGK 8 2500 358.0 335.0 35.0 TLV2772CDGKR VSSOP DGK 8 2500 364.0 364.0 27.0 TLV2772CDR SOIC D 8 2500 340.5 338.1 20.6 TLV2772IDGKR VSSOP DGK 8 2500 358.0 335.0 35.0 TLV2772IDGKR VSSOP DGK 8 2500 364.0 364.0 27.0 TLV2772IDR SOIC D 8 2500 340.5 338.1 20.6 TLV2772MDR SOIC D 8 2500 350.0 350.0 43.0 TLV2772QPWR TSSOP PW 8 2000 367.0 367.0 35.0 TLV2772QPWRG4 TSSOP PW 8 2000 367.0 367.0 35.0 TLV2773IDGSR VSSOP DGS 10 2500 358.0 335.0 35.0 TLV2774AIDR SOIC D 14 2500 350.0 350.0 43.0 TLV2774CDR SOIC D 14 2500 350.0 350.0 43.0 TLV2774CPWR TSSOP PW 14 2000 367.0 367.0 35.0 TLV2774IDR SOIC D 14 2500 350.0 350.0 43.0 TLV2774IPWR TSSOP PW 14 2000 367.0 367.0 35.0 TLV2775IDR SOIC D 16 2500 350.0 350.0 43.0 TLV2775IPWR TSSOP PW 16 2000 367.0 367.0 35.0 PackMaterials-Page3
PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 1.45 B A 0.90 PIN 1 INDEX AREA 1 5 2X 0.95 3.05 2.75 1.9 1.9 2 4 3 0.5 5X 0.3 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com
EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com
EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM 2 (1.9) 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com
PACKAGE OUTLINE DGS0010A VSSOP - 1.1 mm max height SCALE 3.200 SMALL OUTLINE PACKAGE C 5.05 4.75 TYP SEATING PLANE A PIN 1 ID 0.1 C AREA 8X 0.5 10 1 3.1 2X 2.9 NOTE 3 2 5 6 0.27 10X 0.17 B 3.1 0.1 C A B 1.1 MAX 2.9 NOTE 4 0.23 TYP SEE DETAIL A 0.13 0.25 GAGE PLANE 0.15 0.7 0 - 8 0.05 0.4 DETAIL A TYPICAL 4221984/A 05/2015 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-187, variation BA. www.ti.com
EXAMPLE BOARD LAYOUT DGS0010A VSSOP - 1.1 mm max height SMALL OUTLINE PACKAGE 10X (1.45) 10X (0.3) SYMM (R0.05) TYP 1 10 SYMM 8X (0.5) 5 6 (4.4) LAND PATTERN EXAMPLE SCALE:10X SOOPLEDNEINRG MASK METAL MSOELTDAEL RU NMDAESRK SOOPLEDNEINRG MASK 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS NOT TO SCALE 4221984/A 05/2015 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com
EXAMPLE STENCIL DESIGN DGS0010A VSSOP - 1.1 mm max height SMALL OUTLINE PACKAGE 10X (1.45) SYMM (R0.05) TYP 10X (0.3) 1 10 SYMM 8X (0.5) 5 6 (4.4) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:10X 4221984/A 05/2015 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com
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PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com
EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com
EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com
MECHANICAL DATA MCER001A – JANUARY 1995 – REVISED JANUARY 1997 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE 0.400 (10,16) 0.355 (9,00) 8 5 0.280 (7,11) 0.245 (6,22) 1 4 0.065 (1,65) 0.045 (1,14) 0.063 (1,60) 0.020 (0,51) MIN 0.310 (7,87) 0.015 (0,38) 0.290 (7,37) 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0°–15° 0.015 (0,38) 0.100 (2,54) 0.014 (0,36) 0.008 (0,20) 4040107/C 08/96 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification. E. Falls within MIL STD 1835 GDIP1-T8 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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PACKAGE OUTLINE PW0008A TSSOP - 1.2 mm max height SCALE 2.800 SMALL OUTLINE PACKAGE C 6.6 TYP SEATING PLANE 6.2 PIN 1 ID A 0.1 C AREA 6X 0.65 8 1 3.1 2X 2.9 NOTE 3 1.95 4 5 0.30 8X 0.19 4.5 1.2 MAX B 0.1 C A B 4.3 NOTE 4 (0.15) TYP SEE DETAIL A 0.25 GAGE PLANE 0.15 0.75 0 - 8 0.05 0.50 DETAIL A TYPICAL 4221848/A 02/2015 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153, variation AA. www.ti.com
EXAMPLE BOARD LAYOUT PW0008A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 8X (1.5) 8X (0.45) SYMM (R0.05) 1 TYP 8 SYMM 6X (0.65) 5 4 (5.8) LAND PATTERN EXAMPLE SCALE:10X SOOPLEDNEINRG MASK METAL MSOELTDAEL RU NMDAESRK SOOPLEDNEINRG MASK 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS NOT TO SCALE 4221848/A 02/2015 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com
EXAMPLE STENCIL DESIGN PW0008A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 8X (1.5) SYMM (R0.05) TYP 8X (0.45) 1 8 SYMM 6X (0.65) 5 4 (5.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:10X 4221848/A 02/2015 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com
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PACKAGE OUTLINE PW0016A TSSOP - 1.2 mm max height SCALE 2.500 SMALL OUTLINE PACKAGE SEATING PLANE C 6.6 TYP 6.2 A 0.1 C PIN 1 INDEX AREA 14X 0.65 16 1 2X 5.1 4.55 4.9 NOTE 3 8 9 0.30 B 4.5 16X 0.19 1.2 MAX 4.3 0.1 C A B NOTE 4 (0.15) TYP SEE DETAIL A 0.25 GAGE PLANE 0.15 0.05 0.75 0.50 0 -8 DETA 20AIL A TYPICAL 4220204/A 02/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153. www.ti.com
EXAMPLE BOARD LAYOUT PW0016A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 16X (1.5) SYMM (R0.05) TYP 1 16X (0.45) 16 SYMM 14X (0.65) 8 9 (5.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 10X SOLDER MASK METAL UNDER SOLDER MASK OPENING METAL SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDE15.000R MASK DETAILS 4220204/A 02/2017 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com
EXAMPLE STENCIL DESIGN PW0016A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 16X (1.5) SYMM (R0.05) TYP 1 16X (0.45) 16 SYMM 14X (0.65) 8 9 (5.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE: 10X 4220204/A 02/2017 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com
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