Product Sample & Technical Tools & Support & Folder Buy Documents Software Community TLV271,TLV272,TLV274 SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 TLV27x Family of 550-µA/Ch, 3-MHz, Rail-to-Rail Output Operational Amplifiers 1 Features 3 Description • Rail-to-RailOutput Operating from 2.7 V to 16 V over the extended 1 industrial temperature range from -40°C to +125°C, • WideBandwidth:3MHz the TLV27x is a low power, wide bandwidth • HighSlewRate:2.4V/µs operational amplifier (opamp) with rail to rail output. • SupplyVoltageRange:2.7Vto16V This makes it an ideal alternative to the TLC27x family for applications where rail-to-rail output swings • SupplyCurrent:550µA/Channel are essential. The TLV27x provides 3-MHz bandwidth • InputNoiseVoltage:39nV/√Hz fromonly550µA. • InputBiasCurrent:1pA Like the TLC27x, the TLV27x is fully specified for 5-V • SpecifiedTemperatureRange: and ±5-V supplies. The maximum recommended – CommercialGrade:0°Cto70°C supplyvoltageis16V,whichallowsthedevicestobe operated from a variety of rechargeable cells (±8 V – IndustrialGrade: −40°Cto125°C suppliesdownto±1.35V). • UltrasmallPackaging: The CMOS inputs enable use in high-impedance – 5-PinSOT-23(TLV271) sensor interfaces, with the lower voltage operation – 8-PinMSOP(TLV272) making an attractive alternative for the TLC27x in • IdealUpgradeforTLC72xFamily battery-poweredapplications. All members are available in PDIP and SOIC with the 2 Applications singles in the small SOT-23 package, duals in the • E-Bike MSOP,andquadsintheTSSOPpackage. • PowerBanks The 2.7-V operation makes it compatible with Li-Ion • Smokedetectors powered systems and the operating supply voltage range of many micropower microcontrollers available • SolarInverters todayincludingTI’sMSP430. • Low-PowerMotorControls • Battery-PoweredInstruments DeviceInformation(1) • BuildingAutomation PARTNUMBER PACKAGE BODYSIZE(NOM) SOIC(8) 4.98mm×3.91mm OperationalAmplifier TLV271 SOT-23(5) 2.90mm×1.60mm PDIP(8) 9.81mm×6.35mm − SOIC(8) 4.98mm×3.91mm + TLV272 PDIP(8) 9.81mm×6.35mm VSSOP(8) 3.00mm×3.00mm Copyright © 2016, SOIC(14) 8.65mm×3.91mm Texas Instruments Incorporated TLV274 PDIP(14) 3.90mm×6.35mm TSSOP(14) 5.00mm×4.40mm (1) For all available packages, see the orderable addendum at theendofthedatasheet. 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

TLV271,TLV272,TLV274 SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 www.ti.com Table of Contents 1 Features.................................................................. 1 8.1 Overview.................................................................16 2 Applications........................................................... 1 8.2 FunctionalBlockDiagram.......................................16 3 Description............................................................. 1 8.3 FeatureDescription.................................................17 8.4 DeviceFunctionalModes........................................17 4 RevisionHistory..................................................... 2 9 ApplicationandImplementation........................ 18 5 DeviceComparisonTable..................................... 3 9.1 ApplicationInformation............................................18 6 PinConfigurationandFunctions......................... 4 9.2 TypicalApplication .................................................18 7 Specifications......................................................... 6 9.3 SystemExamples ..................................................19 7.1 AbsoluteMaximumRatings......................................6 10 PowerSupplyRecommendations..................... 21 7.2 RecommendedOperatingConditions.......................6 11 Layout................................................................... 21 7.3 ThermalInformation:TLV271...................................7 11.1 LayoutGuidelines.................................................21 7.4 ThermalInformation:TLV272...................................7 11.2 LayoutExample....................................................22 7.5 ThermalInformation:TLV274...................................7 12 DeviceandDocumentationSupport................. 23 7.6 ElectricalCharacteristics:DCCharacteristics...........8 7.7 ElectricalCharacteristics:InputCharacteristics........8 12.1 DocumentationSupport........................................23 7.8 ElectricalCharacteristics:OutputCharacteristics.....9 12.2 RelatedLinks........................................................23 7.9 ElectricalCharacteristics:PowerSupply................10 12.3 ReceivingNotificationofDocumentationUpdates23 7.10 ElectricalCharacteristics:DynamicPerformance.10 12.4 CommunityResource............................................23 7.11 ElectricalCharacteristics:Noise/Distortion 12.5 Trademarks...........................................................23 Performance.............................................................10 12.6 ElectrostaticDischargeCaution............................23 7.12 TypicalCharacteristics..........................................11 12.7 Glossary................................................................24 8 DetailedDescription............................................ 16 13 Mechanical,Packaging,andOrderable Information........................................................... 24 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionD(February2004)toRevisionE Page • AddedFeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementationsection,Power SupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,andMechanical, Packaging,andOrderableInformationsection ..................................................................................................................... 1 • DeletedContinuoustotalpowerdissipationparameterfromAbsoluteMaximumRatings..................................................... 6 • DeletedDissipationRatingstable.......................................................................................................................................... 7 • DeletedMacromodelInformation......................................................................................................................................... 21 2 SubmitDocumentationFeedback Copyright©2004–2016,TexasInstrumentsIncorporated ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 www.ti.com SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 5 Device Comparison Table SINGLES/ DEVICE(1) VDD(V) VIO(μV) IQ/Ch(μA) IIB(pA) GBW(MHz) SR(V/μs) SHUTDOWN RAIL-TO-RAIL DUALS/ QUADS TLV27x 2.7to16 500 550 1 3 2.4 — O S/D/Q TLC27x 3to16 1100 675 1 1.7 3.6 — — S/D/Q TLV237x 2.7to16 500 550 1 3 2.4 Yes I/O S/D/Q TLC227x 2.7to16 300 1100 1 2.2 3.6 — O D/Q TLV246x 2.7to6 150 550 1300 6.4 1.6 Yes I/O S/D/Q TLV247x 2.7to6 250 600 2 2.8 1.5 Yes I/O S/D/Q TLV244x 2.7to10 300 725 1 1.8 1.4 — O D/Q (1) Typicalvaluesmeasuredat5V,25°C. Copyright©2004–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 www.ti.com 6 Pin Configuration and Functions TLV271:DBVPackage TLV271:DandPPackages 5-PinSOT-23 8-PinSOICandPDIP TopView TopView OUT 1 5 VDD NC 1 8 NC IN- 2 7 VDD GND 2 IN+ 3 6 OUT GND 4 5 NC IN+ 3 4 IN- PinFunctions PIN TLV271 I/O DESCRIPTION NAME SOIC SOT-23 PDIP GND 2 4 — Negative(lowest)supplyorground(forsingle-supplyoperation) IN– 4 2 I Negative(inverting)input IN+ 3 3 I Positive(noninverting)input NC — 1,5,8 — Nointernalconnection(canbeleftfloating) OUT 1 6 O Output V 5 7 — Positive(highest)supply DD TLV272:D,DGK,andPPackages 8-PinSOIC,VSSOP,andPDIP TopView 1OUT 1 8 VDD 1IN- 2 7 2OUT 1IN+ 3 6 2IN- GND 4 5 2IN+ PinFunctions PIN TLV272 I/O DESCRIPTION NAME SOIC VSSOP PDIP GND 4 — Negative(lowest)supplyorground(forsingle-supplyoperation) 1IN– 2 I Invertinginput,channel1 1IN+ 3 I Noninvertinginput,channel1 2IN– 6 I Invertinginput,channel2 2IN+ 5 I Noninvertinginput,channel2 1OUT 1 O Output,channel1 2OUT 7 O Output,channel2 V 8 — Positive(highest)supply DD 4 SubmitDocumentationFeedback Copyright©2004–2016,TexasInstrumentsIncorporated ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 www.ti.com SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 TLV274:D,PW,andNPackages 14-PinSOIC,TSSOP,andPDIP TopView 1OUT 1 14 4OUT 1IN- 2 13 4IN- 1IN+ 3 12 4IN+ VDD 4 11 GND 2IN+ 5 10 3IN+ 2IN- 6 9 3IN- 2OUT 7 8 3OUT PinFunctions PIN TLV274 I/O DESCRIPTION NAME SOIC TSSOP PDIP GND 11 — Negativesupplyorground(forsingle-supplyoperation) 1IN– 2 I Invertinginput,channel1 1IN+ 3 I Noninvertinginput,channel1 2IN– 6 I Invertinginput,channel2 2IN+ 5 I Noninvertinginput,channel2 3IN– 9 I Invertinginput,channel3 3IN+ 10 I Noninvertinginput,channel3 4IN– 13 I Invertinginput,channel4 4IN+ 12 I Noninvertinginput,channel4 1OUT 1 O Output,channel1 2OUT 7 O Output,channel2 3OUT 8 O Output,channel3 4OUT 14 O Output,channel4 V 4 — Positivesupply DD Copyright©2004–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT Supply,V 16.5 V DD Voltage Differentialinput,V –V V V ID DD DD Input,V −0.2 V +0.2 V I DD Input,I –10 10 mA I Current Output,I –100 100 mA O C-suffix 0 70 °C Operating,T A I-suffix –40 125 °C Temperature Junction,T 150 °C J Storage,T –65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability.Allvoltage values,exceptdifferentialvoltages,arewithrespecttoGND. 7.2 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN NOM MAX UNIT Single-supply 2.7 16 Supplyvoltage,V V DD Split-supply ±1.35 ±8 Common-modeinputvoltage,V 0 V −1.35 V ICR DD C-suffix 0 70 Operatingfree-airtemperature,T °C A I-suffix –40 125 6 SubmitDocumentationFeedback Copyright©2004–2016,TexasInstrumentsIncorporated ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 www.ti.com SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 7.3 Thermal Information: TLV271 TLV271 THERMALMETRIC(1) D DBV P UNIT (SOIC) (SOT-23) (PDIP) 8PINS 5PINS 8PINS R Junction-to-ambientthermalresistance 127.2 221.7 49.2 °C/W θJA R Junction-to-case(top)thermalresistance 71.6 144.7 39.4 °C/W θJC(top) R Junction-to-boardthermalresistance 68.2 49.7 26.4 °C/W θJB ψ Junction-to-topcharacterizationparameter 22 26.1 15.4 °C/W JT ψ Junction-to-boardcharacterizationparameter 67.6 49 26.3 °C/W JB R Junction-to-case(bottom)thermalresistance n/a n/a n/a °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. 7.4 Thermal Information: TLV272 TLV272 THERMALMETRIC(1) D DGK P UNIT (SOIC) (VSSOP) (PDIP) 8PINS 8PINS 8PINS R Junction-to-ambientthermalresistance 127.2 186.6 49.2 °C/W θJA R Junction-to-case(top)thermalresistance 71.6 78.8 39.4 °C/W θJC(top) R Junction-to-boardthermalresistance 68.2 107.9 26.4 °C/W θJB ψ Junction-to-topcharacterizationparameter 22 15.5 15.4 °C/W JT ψ Junction-to-boardcharacterizationparameter 67.6 106.3 26.3 °C/W JB R Junction-to-case(bottom)thermalresistance n/a n/a n/a °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. 7.5 Thermal Information: TLV274 TLV274 THERMALMETRIC(1) D N PW UNIT (SOIC) (PDIP) (TSSOP) 14PINS 14PINS 14PINS R Junction-to-ambientthermalresistance 97 66.3 135 °C/W θJA R Junction-to-case(top)thermalresistance 56 20.5 45 °C/W θJC(top) R Junction-to-boardthermalresistance 53 26.8 66 °C/W θJB ψ Junction-to-topcharacterizationparameter 19 2.1 n/a °C/W JT ψ Junction-to-boardcharacterizationparameter 46 26.2 60 °C/W JB R Junction-to-case(bottom)thermalresistance n/a n/a n/a °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. Copyright©2004–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 www.ti.com 7.6 Electrical Characteristics: DC Characteristics atspecifiedfree-airtemperature,V =2.7V,5V,and±5V(unlessotherwisenoted) DD PARAMETER TESTCONDITIONS T (1) MIN TYP MAX UNIT A 25°C 0.5 5 V Inputoffsetvoltage mV IO V =V ,R =10kΩ,V =V ,R =50Ω Fullrange 7 IC DD/2 L O DD/2 S αV Offsetvoltagedrift 25°C 2 µV/°C IO V =0toV −1.35V, 25°C 58 70 IC DD V =2.7V RS=50Ω DD Fullrange 55 Common-mode V =0toV −1.35V, 25°C 65 80 CMRR IC DD V =5V dB rejectionratio RS=50Ω DD Fullrange 62 V =–5VtoV −1.35V, 25°C 69 85 IC DD V =±5V RS=50Ω DD Fullrange 66 25°C 97 106 V =2.7V DD Fullrange 76 Large-signaldifferential V =V /2, 25°C 100 110 A O(PP) DD V =5V dB VD voltageamplification RL=10kΩ DD Fullrange 86 25°C 100 115 V =±5V DD Fullrange 90 (1) Fullrangeis0°Cto70°CforC-suffixandfullrangeis–40°Cto125°CforI-suffix.Ifnotspecified,fullrangeis–40°Cto125°C. 7.7 Electrical Characteristics: Input Characteristics atspecifiedfree-airtemperature,V =2.7V,5V,and±5V(unlessotherwisenoted). DD PARAMETER TESTCONDITIONS T MIN TYP MAX UNIT A 25°C 1 60 V =5V,V =V /2, I Inputoffsetcurrent DD IC DD 70°C 100 pA IO V =V /2,R =50Ω O DD S 125°C 1000 25°C 1 60 V =5V,V =V /2, I Inputbiascurrent DD IC DD 70°C 100 pA IB V =V /2,R =50Ω O DD S 125°C 1000 r Differentialinputresistance 25°C 1000 GΩ i(d) Common-modeinput C f=21kHz 25°C 8 pF IC capacitance 8 SubmitDocumentationFeedback Copyright©2004–2016,TexasInstrumentsIncorporated ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 www.ti.com SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 7.8 Electrical Characteristics: Output Characteristics atspecifiedfree-airtemperature,V =2.7V,5V,and±5V(unlessotherwisenoted). DD PARAMETER TESTCONDITIONS T MIN TYP MAX UNIT A 25°C 2.55 2.58 V =2.7V DD Fullrange 2.48 25°C 4.9 4.93 V =V /2,I =–1mA V =5V IC DD OH DD Fullrange 4.85 25°C 4.92 4.96 V =±5V DD Fullrange 4.9 V High-leveloutputvoltage V OH 25°C 1.9 2.1 V =2.7V DD Fullrange 1.5 25°C 4.6 4.68 V =V /2,I =–5mA V =5V IC DD OH DD Fullrange 4.5 25°C 4.7 4.84 V =±5V DD Fullrange 4.65 25°C 0.1 0.15 V =2.7V DD Fullrange 0.22 25°C 0.05 0.1 V =V /2,I =1mA V =5V IC DD OH DD Fullrange 0.15 25°C –4.95 –4.92 V =±5V DD Fullrange –4.9 V Low-leveloutputvoltage V OL 25°C 0.5 0.7 V =2.7V DD Fullrange 1.1 25°C 0.28 0.4 V =V /2,I =5mA V =5V IC DD OH DD Fullrange 0.5 25°C –4.84 –4.7 V =±5V DD Fullrange –4.65 V =0.5Vfromrail, Positiverail 25°C 4 O VDD=2.7V Negativerail 25°C 5 V =0.5Vfromrail, Positiverail 25°C 7 I Outputcurrent O mA O VDD=5V Negativerail 25°C 8 V =0.5Vfromrail, Positiverail 25°C 13 O VDD=10V Negativerail 25°C 12 Copyright©2004–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 www.ti.com 7.9 Electrical Characteristics: Power Supply atspecifiedfree-airtemperature,V =2.7V,5V,and±5V(unlessotherwisenoted). DD PARAMETER TESTCONDITIONS T (1) MIN TYP MAX UNIT A V =2.7V 25°C 470 560 DD Supplycurrent VDD=5V 25°C 550 660 I V =V /2 µA DD (perchannel) O DD 25°C 625 800 V =10V DD Fullrange 1000 Supplyvoltagerejection 25°C 70 80 PSRR ratio V =2.7Vto16V,V =V /2,noload dB DD IC DD (ΔV /ΔV ) Fullrange 65 DD IO (1) Fullrangeis0°Cto70°CforC-suffixandfullrangeis–40°Cto125°CforI-suffix.Ifnotspecified,fullrangeis–40°Cto125°C. 7.10 Electrical Characteristics: Dynamic Performance overoperatingfree-airtemperaturerange(unlessotherwisenoted). PARAMETER TESTCONDITIONS T (1) MIN TYP MAX UNIT A V =2.7V 25°C 2.4 DD UGBW Unity-gainbandwidth R =2kΩ,C =10pF MHz L L V =5Vto10V 25°C 3 DD 25°C 1.35 2.1 V =2.7V V/µs DD Fullrange 1 Slewrateatunity VO(PP)=VDD/2, 25°C 1.45 2.4 SR C =50pF, V =5V V/µs gain RL=10kΩ DD Fullrange 1.2 L 25°C 1.8 2.6 V =±5V V/µs DD Fullrange 1.3 φ Phasemargin R =2kΩ C =10pF 25°C 65 ° m L L Gainmargin R =2kΩ C =10pF 25°C 18 dB L L V =2.7V, DD V =1V, (STEP)PP A =–1, 0.1% 2.9 V C =10pF L R =2kΩ L t Settingtime 25°C µs S V =5V,±5V DD V =1V, (STEP)PP A =–1, 0.1% 2 V C =47pF L R =2kΩ L (1) Fullrangeis0°Cto70°CforCsuffixandfullrangeis–40°Cto125°CforIsuffix.Ifnotspecified,fullrangeis–40°Cto125°C. 7.11 Electrical Characteristics: Noise/Distortion Performance overoperatingfree-airtemperaturerange(unlessotherwisenoted). PARAMETER TESTCONDITIONS T MIN TYP MAX UNIT A A =1 0.02% V =2.7V, V DD V =V /2V, A =10 25°C 0.05% O(PP) DD V R =2kΩ,f=10kHz Totalharmonicdistortion L AV=100 0.18% THD+N plusnoise A =1 0.02% V =5V,±5V, V DD V =V /2V, A =10 25°C 0.09% O(PP) DD V R =2kΩ,f=10kHz L A =100 0.5% V Equivalentinputnoise f=1kHz 39 V 25°C nV/√Hz n voltage f=10kHz 35 Equivalentinputnoise I f=1kHz 25°C 0.6 fA/√Hz n current 10 SubmitDocumentationFeedback Copyright©2004–2016,TexasInstrumentsIncorporated ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 www.ti.com SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 7.12 Typical Characteristics Table1.TableofGraphs DESCRIPTION FIGURENO. CMRR Common-moderejectionratio vsFrequency Figure1 Inputbiasandoffsetcurrent vsFree-airtemperature Figure2 Figure3, V Low-leveloutputvoltage vsLow-leveloutputcurrent OL Figure5,Figure7 Figure4, V High-leveloutputvoltage vsHigh-leveloutputcurrent OH Figure6,Figure8 V Peak-to-peakoutputvoltage vsFrequency Figure9 O(PP) I Supplycurrent vsSupplyvoltage Figure10 DD PSRR Power-supplyrejectionratio vsFrequency Figure11 A Differentialvoltagegainandphase vsFrequency Figure12 VD Gain-bandwidthproduct vsFree-airtemperature Figure13 vsSupplyvoltage Figure14 SR Slewrate vsFree-airtemperature Figure15 φ Phasemargin vsCapacitiveload Figure16 m V Equivalentinputnoisevoltage vsFrequency Figure17 n Figure18, Voltage-followerlarge-signalpulseresponse Figure19 Voltage-followersmall-signalpulseresponse Figure20 Figure21, Invertinglarge-signalresponse Figure22 Invertingsmall-signalresponse Figure23 Crosstalk vsFrequency Figure24 120 300 n Ratio (dB) 10800 VDD= 5 V, 10 V urrent (pA) 220500 VVDICD== V 2D.7D/ 2V, 5 V, and 10 V o C Rejecti 60 Offset 150 de VDD= 2.7 V nd 100 on-Mo 40 Bias a 50 mm 20 put 0 o n C I 0 -50 10 100 1 k 10 k 100 k 1 M -40 -25 -10 5 20 35 50 65 80 95 110 125 Frequency (Hz) Temperature (°C) Figure1.Common-ModeRejectionRatiovs Figure2.InputBiasandOffsetCurrentvs Frequency Free-AirTemperature Copyright©2004–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 www.ti.com 2.8 2.8 TA= 125°C VDD= 2.7 V V) 2.4 V) 2.4 T =-40°C e ( e ( A ag 2 ag 2 Volt TA= 70°C Volt TA= 125°C TA= 0°C utput 1.6 TA= 0°C utput 1.6 TA= 70°C O 1.2 O 1.2 el T = 25°C el Low-Lev 00..48 TA=-40°CA High-Lev 00..48 TA= 25°C V = 2.7 V DD 0 0 0 2 4 6 8 10 12 14 16 18 20 22 24 0 1 2 3 4 5 6 7 8 9 10 11 12 Low-Level Output Current (mA) High-Level Output Current (mA) Figure3.Low-LevelOutputVoltagevs Figure4.High-LevelOutputVoltagevs Low-LevelOutputCurrent High-LevelOutputCurrent 5 5 V = 5 V V = 5 V DD CC 4.5 4.5 utput Voltage (V) 32..3554 TAT=A 7=0 °1C25°C TA= 0°C utput Voltage (V) 32..3554 TA= 25°C TA= 0°CTA=-40°C O O evel 1.52 TA= 25°C TA=-40°C evel 1.52 TA= 70°C L L Low- 1 High- 1 TA= 125°C 0.5 0.5 0 0 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 0 5 10 15 20 25 30 35 40 45 Low-Level Output Current (mA) High-Level Output Current (mA) Figure5.Low-LevelOutputVoltagevs Figure6.High-LevelOutputVoltagevs Low-LevelOutputCurrent High-LevelOutputCurrent 10 10 Voltage (V) 86 VDD= 10 V TAT=A 7=0 °1C25°C Voltage (V) 86 TA=-40T°AC= 0°CVDD= 10 V utput TA= 25°C utput TA= 25°C O O el 4 el 4 Lev TA= 0°C Lev TA= 70°C Low- 2 TA=-40°C High- 2 TA= 125°C 0 0 0 20 40 60 80 100 120 0 20 40 60 80 100 120 Low-Level Output Current (mA) High-Level Output Current (mA) Figure7.Low-LevelOutputVoltagevs Figure8.High-LevelOutputVoltagevs Low-LevelOutputCurrent High-LevelOutputCurrent 12 SubmitDocumentationFeedback Copyright©2004–2016,TexasInstrumentsIncorporated ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 www.ti.com SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 11 1 oltage (V) 1890 VDD= 10 V ARCTAVLL==== 221-5 01k° 0WpCF A/ch) 000...897 AVVIC== 1VDD/2 TA= 70°C TA= 125°C put V 76 THD = 5% nt (m 0.6 ak-to-Peak Out 5342 VVDDDD== 52 .V7 V Supply Curre 0000....5342 TA=-40°C TA= 0°C TA= 25°C e P 1 0.1 0 0 10 100 1 k 10 k 100 k 1 M 10 M 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Frequency (Hz) Supply Voltage (V) Figure9.Peak-to-PeakOutputVoltagevs Figure10.SupplyCurrentvs Frequency SupplyVoltage 120 120 180 T = 25°C B) A 100 135 o (d 100 dB) Phase Power-Supply Rejection Rati 28460000 VDD= 2.7 VVDD= 5 V, 10 V Differential Voltage Gain ( -26842000000 VRCTDLLD=== = 221 5 05k° WpVCF Gain -490--419505305 °Phase () A 0 -40 -180 10 100 1 k 10 k 100 k 1 M 10 100 1 k 10 k 100 k 1 M 10 M Frequency (Hz) Frequency (Hz) Figure11.Power-SupplyRejectionRatiovs Figure12.DifferentialVoltageGainandPhase Frequency 4 3 SR- dth Product (MHz) 23..5532 VDD= 2.7 VVDD= 5 V VDD= 10 V Rate (V/s)m 12..552 SR + Gain Bandwi 01..551 Slew 0.51 ARCVLL=== 15100 kpWF T = 25°C A 0 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 2.5 4.5 6.5 8.5 10.5 12.5 14.5 Temperature (°C) Supply Voltage (V) Figure13.GainBandwidthProductvs Figure14.SlewRatevs Free-AirTemperature SupplyVoltage Copyright©2004–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 www.ti.com 3.5 100 90 3 SR- 80 Slew Rate (V/s)m 12..5521 VARDVLD=== 11 05 kVW SR + °Phase Margin () 246753000000 VRDLD== 2 5k WV RNULL= 0W RNRULNLU=LL 5=0 1W00W 0.5 CVIL== 35 0V pF 10 TAAV== 2O5p°eCn Loop 0 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 10 100 1000 Temperature (°C) Capacitive Load (pF) Figure15.SlewRatevs Figure16.PhaseMarginvs Free-AirTemperature CapacitiveLoad Öput Noise Voltage (nV/)Hz 107589460000000 VDD= 2.7 V, 5 V,T aAn=d 2150° CV Input Voltage (V) 30421 VI RTVACVADVILL=D==== = 3 2211 5 05Vk° PWpVCPF 3 e (V) n 30 g uivalent I 1200 VO 012 put Volta Eq 0 Out 10 100 1 k 10 k 100 k 0 2 4 6 8 10 12 14 16 18 Frequency (Hz) Time (ms) Figure17.EquivalentInputNoiseVoltagevs Figure18.Voltage-FollowerLarge-Signal Frequency PulseResponse V) 8 mV) 0.12 Input Voltage ( 6042 VOVI VVRDIL=D= = 62 1Vk0PW PV,,,TCAALV=== 21 510° pCF 0246 Output Voltage (V) Input Voltage ( 00..00804 VO VI VACVRTADVILL=D==== = 1 2211 05 05k0° WpV CmFVPP 0000...001182 Output Voltage (mV) 0 2 4 6 8 10 12 14 16 18 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 Time (ms) Time (ms) Figure19.Voltage-FollowerLarge-Signal Figure20.Voltage-FollowerSmall-Signal PulseResponse PulseResponse 14 SubmitDocumentationFeedback Copyright©2004–2016,TexasInstrumentsIncorporated ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 www.ti.com SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 Input Voltage (V) 30421 VI VDD= 5 V,AV= 1 Input Voltage (V) 60842 RVADVLD=== 2V 1Ik0=W V-1 VI VRIL== 32 VkPWP,,TCAL== 2150° pCF 3 e (V) TCAL== 2150° pCF VO 6 ge (V) g 4 a VO 012 utput Volta 02 Output Volt O 0 2 4 6 8 10 12 14 16 0 2 4 6 8 10 12 14 16 Time (ms) Time (ms) Figure21.InvertingLarge-SignalResponse Figure22.InvertingLarge-SignalResponse 0 V = 2.7 V, 5 V, and 10 V age (V) 0.1 -20 VADIV=D= 1 1 VDD/2 Input Volt 0.005 VVOI VACVRTADVILL=D==== = 1221V 05 05Ik0° =WpV CmF-V1PP 00..015 Voltage (V) Crosstalk (dB) -1---04680000 RTAL== 225 k°WC ut Crosstalk 0 utp -120 O -140 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 10 100 1 k 10 k 100 k Time (ms) Frequency (Hz) Figure23.InvertingSmall-SignalResponse Figure24.CrosstalkvsFrequency Copyright©2004–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 www.ti.com 8 Detailed Description 8.1 Overview The TLV27x operates from a single power supply and consumes only 550 µA of quiescent current. With rail-to- rail output swing capability and 3-MHz bandwidth, the TLV27x is ideal for battery-powered and industrial applications. 8.2 Functional Block Diagram VDD Bias OUT IN+ IN– GND Copyright © 2016, Texas Instruments Incorporated 16 SubmitDocumentationFeedback Copyright©2004–2016,TexasInstrumentsIncorporated ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 www.ti.com SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 8.3 Feature Description 8.3.1 RailtoRailOutput The TLV27x family of opamps features a rail to trail output stage. Rail to rail outputs allow for a wide dynamic range in low voltage systems. This feature along with low power and wide bandwidth make the TLV27x family suitableforportableandbatterypoweredsystems. 8.3.2 OffsetVoltage The output offset voltage (V ) is the sum of the input offset voltage (V ) and both input bias currents (I ) times OO IO IB thecorrespondinggains.UsetheschematicinFigure25andEquation1tocalculatetheoutputoffsetvoltage: R F R IIB- G + − V V I O + R S I IB+ Copyright © 2016,Texas Instruments Incorporated Figure25. OutputOffsetVoltageModel ( R ( ( R ( V = V 1 + F ±I R 1 + F ±I R OO IO R IB+ S R IB- F G G (1) 8.3.3 DrivingaCapacitiveLoad When the amplifier is configured in this manner, capacitive loading directly on the output decreases the device phase margin, leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater than 10 pF, TI recommends placing a resistor in series (R ) with the output of the amplifier, as shown in Figure 26. A NULL minimumvalueof20Ωshouldworkwellformostapplications. R F R G R Input − NULL Output + C LOAD V /2 DD Copyright © 2016,Texas Instruments Incorporated Figure26. DrivingaCapacitiveLoad 8.4 Device Functional Modes The TLV27x has a single functional mode. It is operational when the power supply applied to the device is between 2.7 V (±1.35 V) and 16 V (±8 V). Electrical parameters that can vary with operating conditions are showninTypicalCharacteristics. Copyright©2004–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information The TLV27x family offers outstanding DC and AC performance. These devices operate up to a 16-V power supply and offer ultra-low input bias current and 3-MHz bandwidth. These features make the TLV27x a robust operationalamplifierforbattery-poweredandindustrialapplications. 9.2 Typical Application 2.25 k(cid:13) 1 nF 2.25 k(cid:13) 1.13 k(cid:13) Input – Output 4 nF + Figure27. Second-Order,Low-PassFilter 9.2.1 DesignRequirements • Gain=1V/V • Low-passcutofffrequency=50kHz • –40-db/decfilterresponse • Maintainlessthan3-dBgainpeakinginthegainversusfrequencyresponse 9.2.2 DetailedDesignProcedure The infinite-gain multiple-feedback circuit for a low-pass network function is shown in Figure 27. Use Equation 2 tocalculatethevoltagetransferfunction. Output (cid:16)1RR C C (cid:11)s(cid:12) 1 3 2 5 Input s2(cid:14)(cid:11)s C (cid:12)(cid:11)1R (cid:14)1R (cid:14)1R (cid:12)(cid:14)1R R C C 2 1 3 4 3 4 2 5 (2) This circuit produces a signal inversion. For this circuit, the gain at DC and the low-pass cutoff frequency are calculatedbyEquation3: R Gain 4 R 1 1 f (cid:11)1R R C C (cid:12) C 3 4 2 5 2S (3) 18 SubmitDocumentationFeedback Copyright©2004–2016,TexasInstrumentsIncorporated ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 www.ti.com SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 Typical Application (continued) Software tools are readily available to simplify filter design. WEBENCH® Filter Designer is a simple, powerful, and easy-to-use active filter design program. The WEBENCH® Filter Designer lets you create optimized filter designsusingaselectionofTIoperationalamplifiersandpassivecomponentsfromTI'svendorpartners. Available as a web-based tool from the WEBENCH Design Center, WEBENCH Filter Designer allows you to design,optimize,andsimulatecompletemultistageactivefiltersolutionswithinminutes. 9.2.3 ApplicationCurve 20 0 b) d n ( -20 ai G -40 -60 100 1k 10k 100k 1M Frequency (Hz) Figure28. TLV27xSecond-Order,50-kHz,Low-PassFilter 9.3 System Examples 9.3.1 GeneralConfigurations When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required. The simplest way to accomplish this limiting is to place an RC filter at the noninverting terminal of the amplifier (seeFigure29andEquation4). R R G F V /2 DD − V VI + O R1 C1 Copyright © 2016,Texas Instruments Incorporated Figure29. Single-PoleLow-PassFilter V ( R (( 1 ( O = 1 + F V R 1 + sR C I G 1 1 1 f = -3db 2pR C 1 1 (4) Copyright©2004–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 www.ti.com System Examples (continued) If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter, shown in Figure 30, can be used for this task. For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth; refer to Equation 5. Failure to use an amplifier with this characteristic can result in phase shiftoftheamplifier. C 1 VI − R1 R2 C2 + R F R G V /2 DD Copyright © 2016,Texas Instruments Incorporated Figure30. Two-Pole,Low-Pass,Sallen-KeyFilter R = R = R 1 2 C = C = C 1 2 Q = Peaking Factor (ButterworthQ= 0.707) 1 f = -3db 2pRC R F R = ( 1 ( G 2- Q (5) 20 SubmitDocumentationFeedback Copyright©2004–2016,TexasInstrumentsIncorporated ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 www.ti.com SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 10 Power Supply Recommendations The TLV27x is specified for operation from 2.7 V to 16 V (±1.35 V to ±8 V); many specifications apply from –40°C to 125°C. Parameters that can exhibit significant variance with regard to operating voltage or temperature arepresentedintheTypicalCharacteristics. CAUTION Supply voltages larger than 16.5 V can permanently damage the device; see the AbsoluteMaximumRatings. Place 0.1-µF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high- impedance power supplies. For more detailed information on bypass capacitor placement, see Layout Guidelines. 11 Layout 11.1 Layout Guidelines To achieve the levels of high performance of the TLV27x, follow proper printed circuit board (PCB) design techniques.Ageneralsetofguidelinesisgiveninthefollowing. • Ground planes—TI highly recommends using a ground plane on the board to provide all components with a low-inductive ground connection. However, in the areas of the amplifier inputs and output, the ground plane canberemovedtominimizethestraycapacitance. • Proper power supply decoupling—Use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers depending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminal of every amplifier. Inaddition,the0.1-µFcapacitorshouldbeplacedascloseaspossibletothesupplyterminal.Asthisdistance increases, the inductance in the connecting trace makes the capacitor less effective. The designer should strivefordistancesoflessthan0.1inchesbetweenthedevicepowerterminalsandtheceramiccapacitors. • Sockets—Sockets can be used but are not recommended. The additional lead inductance in the socket pins often leads to stability problems. Surface-mount packages soldered directly to the printed-circuit board is the bestimplementation. • Short trace runs/compact part placements—Optimum high performance is achieved when stray series inductance has been minimized. To realize this, the circuit layout should be made as compact as possible, thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of the amplifier. Its length should be kept as short as possible. This helps to minimize stray capacitance at the input oftheamplifier. • Surface-mount passive components—Using surface-mount passive components is recommended for high performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray inductance and capacitance. If leaded components are used, TI recommends keeping the lead lengths as shortaspossible. Copyright©2004–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 www.ti.com 11.2 Layout Example VIN + RG VOUT RF (Schematic Representation) Place components Run the input traces close to device and to as far away from each other to reduce the supply lines parasitic errors VS+ RF as possible NC NC RG GND IN– VDD GND VIN IN+ OUT GND NC Use low-ESR, ceramic bypass capacitor Use low-ESR, GND VS– VOUT ceramic bypass Ground (GND) plane on another layer capacitor Copyright © 2016, Texas Instruments Incorporated Figure31. TLV27xLayoutExample 22 SubmitDocumentationFeedback Copyright©2004–2016,TexasInstrumentsIncorporated ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 www.ti.com SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 RelatedDocumentation The following documents are relevant to using the TLV27x, and recommended for reference. All are available for downloadatwww.ti.comunlessotherwisenoted. • CompensateTransimpedanceAmplifiersIntuitively (SBOA055) • Operationalamplifiergainstability,Part3:ACgain-erroranalysis (SLYT383) • Operationalamplifiergainstability,Part2:DCgain-erroranalysis(SLYT374) • Usingtheinfinite-gain,MFBfiltertopologyinfullydifferentialactivefilters (SLYT343) • OpAmpPerformanceAnalysis(SBOA054) • Single-SupplyOperationofOperationalAmplifiers (SBOA059) • TuninginAmplifiers(SBOA067) • Shelf-LifeEvaluationofLead-FreeComponentFinishes (SZZA046) 12.2 Related Links Table 2 lists quick access links. Categories include technical documents, support and community resources, toolsandsoftware,andquickaccesstosampleorbuy. Table2.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER SAMPLE&BUY DOCUMENTS SOFTWARE COMMUNITY TLV271 Clickhere Clickhere Clickhere Clickhere Clickhere TLV272 Clickhere Clickhere Clickhere Clickhere Clickhere TLV274 Clickhere Clickhere Clickhere Clickhere Clickhere 12.3 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 12.4 Community Resource The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.5 Trademarks E2EisatrademarkofTexasInstruments. WEBENCHisaregisteredtrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.6 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. Copyright©2004–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:TLV271 TLV272 TLV274

TLV271,TLV272,TLV274 SLOS351E–FEBRUARY2004–REVISEDNOVEMBER2016 www.ti.com 12.7 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 24 SubmitDocumentationFeedback Copyright©2004–2016,TexasInstrumentsIncorporated ProductFolderLinks:TLV271 TLV272 TLV274

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TLV271CD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 T271C & no Sb/Br) TLV271CDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 VBHC & no Sb/Br) TLV271CDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 VBHC & no Sb/Br) TLV271CDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 VBHC & no Sb/Br) TLV271CDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 VBHC & no Sb/Br) TLV271CDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 T271C & no Sb/Br) TLV271ID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 T271I & no Sb/Br) TLV271IDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 VBHI & no Sb/Br) TLV271IDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 VBHI & no Sb/Br) TLV271IDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 VBHI & no Sb/Br) TLV271IDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 VBHI & no Sb/Br) TLV271IDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 T271I & no Sb/Br) TLV271IP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type -40 to 125 T271I & no Sb/Br) TLV272CD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 T272C & no Sb/Br) TLV272CDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 T272C & no Sb/Br) TLV272CDGK ACTIVE VSSOP DGK 8 80 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM 0 to 70 AVF & no Sb/Br) TLV272CDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM 0 to 70 AVF & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TLV272CDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 T272C & no Sb/Br) TLV272CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 T272C & no Sb/Br) TLV272ID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 T272I & no Sb/Br) TLV272IDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 T272I & no Sb/Br) TLV272IDGK ACTIVE VSSOP DGK 8 80 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 AVG & no Sb/Br) TLV272IDGKG4 ACTIVE VSSOP DGK 8 80 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 AVG & no Sb/Br) TLV272IDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 AVG & no Sb/Br) TLV272IDGKRG4 ACTIVE VSSOP DGK 8 2500 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 AVG & no Sb/Br) TLV272IDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 T272I & no Sb/Br) TLV272IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 T272I & no Sb/Br) TLV272IP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type -40 to 125 T272I & no Sb/Br) TLV274CD ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TLV274C & no Sb/Br) TLV274CDG4 ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TLV274C & no Sb/Br) TLV274CDR ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TLV274C & no Sb/Br) TLV274CPW ACTIVE TSSOP PW 14 90 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TLV274C & no Sb/Br) TLV274CPWR ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TLV274C & no Sb/Br) TLV274CPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TLV274C & no Sb/Br) TLV274ID ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 TLV274I & no Sb/Br) Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TLV274IDG4 ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 TLV274I & no Sb/Br) TLV274IDR ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 TLV274I & no Sb/Br) TLV274IDRG4 ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 TLV274I & no Sb/Br) TLV274IN ACTIVE PDIP N 14 25 Green (RoHS NIPDAU N / A for Pkg Type -40 to 125 TLV274I & no Sb/Br) TLV274IPW ACTIVE TSSOP PW 14 90 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 TLV274I & no Sb/Br) TLV274IPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 TLV274I & no Sb/Br) TLV274IPWR ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 TLV274I & no Sb/Br) TLV274IPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 TLV274I & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 3

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TLV271, TLV272, TLV274 : •Automotive: TLV271-Q1, TLV272-Q1, TLV274-Q1 NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 4

PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2017 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TLV271CDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TLV271CDBVT SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 TLV271CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV271IDBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 TLV271IDBVT SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 TLV271IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV272CDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TLV272CDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TLV272CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV272IDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TLV272IDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TLV272IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV274CDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TLV274CPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 TLV274IDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TLV274IPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2017 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TLV271CDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV271CDBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV271CDR SOIC D 8 2500 340.5 338.1 20.6 TLV271IDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV271IDBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV271IDR SOIC D 8 2500 340.5 338.1 20.6 TLV272CDGKR VSSOP DGK 8 2500 358.0 335.0 35.0 TLV272CDGKR VSSOP DGK 8 2500 364.0 364.0 27.0 TLV272CDR SOIC D 8 2500 340.5 338.1 20.6 TLV272IDGKR VSSOP DGK 8 2500 364.0 364.0 27.0 TLV272IDGKR VSSOP DGK 8 2500 358.0 335.0 35.0 TLV272IDR SOIC D 8 2500 340.5 338.1 20.6 TLV274CDR SOIC D 14 2500 333.2 345.9 28.6 TLV274CPWR TSSOP PW 14 2000 367.0 367.0 35.0 TLV274IDR SOIC D 14 2500 333.2 345.9 28.6 TLV274IPWR TSSOP PW 14 2000 367.0 367.0 35.0 PackMaterials-Page2

PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 1.45 B A 0.90 PIN 1 INDEX AREA 1 5 2X 0.95 3.05 2.75 1.9 1.9 2 4 3 0.5 5X 0.3 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com

EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM 2 (1.9) 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com

None

None

None

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

None

None

None

None

IMPORTANTNOTICEANDDISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2020, Texas Instruments Incorporated