TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 (cid:0) (cid:0) Output Swing Includes Both Supply Rails 600-Ω Output Drive (cid:0) (cid:0) Extended Common-Mode Input Voltage High-Gain Bandwidth...1.8 MHz Typ Range...0 V to 4.25 V (Min) at 5-V Single (cid:0) Low Supply Current...750 µA Per Channel Supply Typ (cid:0) No Phase Inversion (cid:0) Macromodel Included (cid:0) Low Noise...16 nV/√Hz Typ at f = 1 kHz (cid:0) Available in Q-Temp Automotive (cid:0) Low Input Offset Voltage HighRel Automotive Applications 950 µV Max at T = 25°C (TLV244xA) Configuration Control/Print Support A (cid:0) Low Input Bias Current...1 pA Typ Qualification to Automotive Standards description HIGH-LEVEL OUTPUT VOLTAGE vs The TLV244x and TLV244xA are low-voltage HIGH-LEVEL OUTPUT CURRENT operational amplifiers from Texas Instruments. 3 The common-mode input voltage range of these VDD = 3 V devices has been extended over typical standard CMOS amplifiers, making them suitable for a wide V 2.5 range of applications. In addition, these devices e – diso d nroivt epnh atose t ihnev esrut pwphley nr athiles .c oTmhims osna-tmisfoiedse imnpoustt oltag 2 V design requirements without paying a premium ut TA = –40°C p for rail-to-rail input performance. They also exhibit ut 1.5 O rail-to-rail output performance for increased el dynamic range in single- or split-supply ev L 1 applications. This family is fully characterized at h- g 3-V and 5-V supplies and is optimized for Hi TA = 125°C low-voltage operation. Both devices offer – comparable ac performance while having lower OH 0.5 TA = 85°C TA = 25°C V noise, input offset voltage, and power dissipation than existing CMOS operational amplifiers. The 0 0 2 4 6 8 10 12 TLV244x has increased output drive over previous rail-to-rail operational amplifiers and can IOH – High-Level Output Current – mA drive 600-Ω loads for telecommunications Figure 1 applications. The other members in the TLV244x family are the low-power, TLV243x, and micro-power, TLV2422, versions. The TLV244x, exhibiting high input impedance and low noise, is excellent for small-signal conditioning for high-impedance sources, such as piezoelectric transducers. Because of the micropower dissipation levels and low-voltage operation, these devices work well in hand-held monitoring and remote-sensing applications. In addition, the rail-to-rail output feature with single- or split-supplies makes this family a great choice when interfacing with analog-to-digital converters (ADCs). For precision applications, the TLV244xA is available with a maximum input offset voltage of 950 µV. If the design requires single operational amplifiers, see the TI TLV2211/21/31. This is a family of rail-to-rail output operational amplifiers in the SOT-23 package. Their small size and low power consumption make them ideal for high density, battery-powered equipment. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Advanced LinCMOS is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright  2001, Texas Instruments Incorporated Products conform to specifications per the terms of Texas Instruments On products compliant to MIL-PRF-38535, all parameters are tested standard warranty. Production processing does not necessarily include unless otherwise noted. On all other products, production testing of all parameters. processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 TLV2442 AVAILABLE OPTIONS PACKAGED DEVICES VIOmax SMALL CERAMIC FLAT TA AT 25°C OUTLINE CHIP CARRIER CERAMIC DIP TSSOP PACK (FK) (JG) (PW) (D) (U) 0°C to 70°C 2.5 mV TLV2442CD — — TLV2442CPW — 950 µµV TLV2442AID — — TLV2442AIPW — –4400°°CC ttoo 8855°°CC 2.5 mV TLV2442ID — — — — 950 µµV TLV2442AQD — — TLV2442AQPW — –4400°°CC ttoo 112255°°CC 2.5 mV TLV2442QD — — TLV2442QPW — 950 µµV — TLV2442AMFK TLV2442AMJG — TLV2442AMU –5555°°CC ttoo 112255°°CC 2.5 mV — TLV2442MFK TLV2442MJG — TLV2442MU The D and PW packages are available taped and reeled. Add R suffix to device type (e.g., TLV2442CDR). TLV2444 AVAILABLE OPTIONS PACKAGED DEVICES VIOmax SMALL TA AT 25°C OUTLINE TSSOP (PW) (D) 0°C to 70°C 2.5 mV TLV2444CD TLV2444CPW 950 µµV TLV2444AID TLV2444AIPW –4400°°CC ttoo 112255°°CC 2.5 mV TLV2444ID TLV2444IPW The D and PW packages are available taped and reeled. Add R suffix to device type (e.g., TLV2444CDR). TLV2442 TLV2442 D OR JG PACKAGE PW PACKAGE (TOP VIEW) (TOP VIEW) 1OUT 1 8 VDD+ 1OUT 1 8 VDD+ 1IN– 2 7 2OUT 1IN– 2 7 2OUT 1IN+ 3 6 2IN– 1IN+ 3 6 2IN– V /GND 4 5 2IN+ VDD–/GND 4 5 2IN+ DD– TLV2442 TLV2442 TLV2444 FK PACKAGE U PACKAGE D OR PW PACKAGE (TOP VIEW) (TOP VIEW) (TOP VIEW) T + U D NC 1 10 NC C O C DC 1OUT 1 14 4OUT N 1 N VN 1OUT 2 9 VDD+ 1IN– 2 13 4IN– 1IN– 3 8 2OUT 3 2 1 20 19 1IN+ 3 12 4IN+ NC 4 18 NC 1IN+ 4 7 2IN– 1IN– 5 17 2OUT VDD–/GND 5 6 2IN+ VDD+ 4 11 VDD–/GND 2IN+ 5 10 3IN+ NC 6 16 NC 2IN– 6 9 3IN– 1IN+ 7 15 2IN– 2OUT 7 8 3OUT NC 8 14 NC 9 10 11 12 13 CD C+ C NN NN N G 2I / – D D V NC – No internal connection 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

equivalent schematic (each amplifier) COMPONENT COUNT Transistors 69 Q22 Q29 Q31 Q34 Q36 Diodes 5 Resistors 26 VB3 Capacitors 6 Q26 Q24 Q32 VB2 VB1 VDD+ Q25 Q27 Q33 Q35 VB4 P O S T Q23 Q30 O F Q37 F IC R10 E B R9 D1 W O X 6 ID 5 53 E 03 DA• Q3 R3 R4 R7 -INPAd LL Q13 Q15 Uv AS TaT , TEXAS 7 IN– Q1 Q4 Q6 Q8 Q10 Q18 -VOLncedLV24 52 Q20 T L4 65 IN+ Q7 Q9 R5 C2 VDD–/GND SLOS169HAGE OinCMO2, TLV C1 OUT – NOPES244 VB3 Q11 Q16 R6 C3 VEMRAR2A VB2 Q2 Q5 Q14 Q21 BER 1996 –TIONALAIL-TO, TLV24 R1 R2 Q12 Q17 Q19 REVISED M AMPL-RAIL O44, TLV R8 ARIFU2 VB4 CHIET44 2RP4 00SUA 3 1 T

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 V DD Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±V ID DD Input voltage, V (any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to V I DD Input current, I (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5 mA I Output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA O Total current into V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA DD+ Total current out of V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA DD– Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, T :C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C A I suffix (dual) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C I suffix (quad) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 125°C Q suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 125°C M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C stg Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C †Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VDD+ and VDD–. 2. Differential voltages are at IN+ with respect to IN–. Excessive current will flow if input is brought below VDD– – 0.3 V. 3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. DISSIPATION RATING TABLE PPAACCKKAAGGEE TAA ≤ 25°C DERATING FACTOR TAA = 70°C TAA = 85°C TAA = 125°C POWER RATING ABOVE TA = 25°C POWER RATING POWER RATING POWER RATING D (8) 725 mW 5.8 mW/°C 464 mW 377 mW 145 mW D (14) 1022 mW 7.6 mW/°C 900 mW 777 mW 450 mW FK 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW JG 1050 mW 8.4 mW/°C 672 mW 546 mW 210 mW PW (8) 525 mW 4.2 mW/°C 336 mW 273 mW 105 mW PW (14) 720 mW 5.6 mW/°C 634 mW 547 mW 317 mW U 675 mW 5.4 mW/°C 432 mW 350 mW 135 mW recommended operating conditions C SUFFIX I SUFFIX Q SUFFIX M SUFFIX UUNNIITT MIN MAX MIN MAX MIN MAX MIN MAX Supply voltage, VDD 2.7 10 2.7 10 2.7 10 2.7 10 V Input voltage range, VI VDD– VDD+ – 1 VDD– VDD+ – 1 VDD– VDD+ – 1.3 VDD– VDD+ – 1.3 V Common-mode input voltage, VDD– VDD+ – 1 VDD– VDD+ – 1 VDD– + 2 VDD+ – 1.3 VDD– + 2 VDD+ – 1.3 V VIC Operating free-air temperature, 0 70 –40 125 –40 125 –55 125 °C TA 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 electrical characteristics at specified free-air temperature, V = 3 V (unless otherwise noted) DD TLV2442 PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX TLV244xC 25°C 300 2000 TLV244xI Full range 2500 25°C 300 950 VVIIOO IInnppuutt ooffffsseett vvoollttaaggee TTLLVV224444xxAAII µµVV Full range 1500 TLV2442AQ 25°C 300 950 TLV2442AM Full range 1600 Temperature coefficient of input 25°C ααVVIIOO offset voltage to 85°C 22 µµVV//°°CC VVIICC == 11.55 VV, Input offset voltage long-term drift VO = 1.5 V, 25°C 0.002 µV/mo (see Note 4) RRSS = 5500 ΩΩ 25°C 0.5 60 IIIIOO IInnppuutt ooffffsseett ccuurrrreenntt ppAA Full range 150 25°C 1 60 –40°C to 150 85°C IIIIBB IInnppuutt bbiiaass ccuurrrreenntt ppAA 125°C 350 TLV2442Q/AQ Full range 260 TLV2442M/AM 0 –0.25 25°C to to 2.25 2.5 0 Full range to Common-mode input voltagge 2 VVIICCRR ||VVIIOO|| ≤≤ 55 mmVV, RRSS == 5500 ΩΩ VV range 0 –0.25 25°C to to to –55°C 2.25 2.5 0 125°C to 2 IO = –100 µA 25°C 2.98 VOH High-level output voltage 25°C 2.5 V IIOO == –33 mmAA Full range 2.25 VIC = 1.5 V, IO = 100 µA 25°C 0.02 VOL Low-level output voltage 25°C 0.63 V VVIICC == 11.55 VV, IIOO = 33 (cid:0)(cid:0)AA Full range 1 25°C 0.7 1 LLarge-siignall ddiifffferenttiiall RRLL == 660000 ΩΩ AVD VO = 1 V to 2 V Full range 0.4 V/mV vvoollttaaggee aammplliiffiiccaattiioonn RL = 1 MΩ 25°C 750 rid Differential input resistance 25°C 1000 GΩ ri Common-mode input resistance 25°C 1000 GΩ ci Common-mode input capacitance f = 10 kHz 25°C 8 pF zo Closed-loop output impedance f = 1 MHz, AV = 10 25°C 130 Ω †Full range for the C suffix is 0°C to 70°C. Full range for the dual I suffix is – 40°C to 85°C. Full range for the quad I suffix is – 40°C to 125°C. Full range for the Q suffix is –40°C to 125°C. Full range for the M suffix is – 55°C to 125°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 electrical characteristics at specified free-air temperature, V = 3 V (unless otherwise noted) DD (continued) TLV2442 PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX 25°C 65 75 VVIC = 00 tto 22.2255 VV, Full range 55 CCMMRRRR CCoommmmoonn--mmooddee rreejjeeccttiioonn rraattiioo VVOO == 11.55 VV, ddBB RS = 50Ω TLV2442Q/AQ Full range 50 TLV2442M/AM kkSSVVRR S(∆uVpDpDlyy-±v/o∆ltVaIggOe) rejjection ratio VNDDo DDlo a=d 2.7 V to 8 V,, VIICC = VDDDD/2,, Fu2ll 5ra°Cnge 8800 95 ddBB IIDDDD SSuuppppllyy ccuurrrreenntt ((ppeerr cchhaannnneell)) VNOOo l=o a1d.5 V, Fu2ll 5ra°Cnge 725 11110000 µµAA †Full range for the C suffix is 0°C to 70°C. Full range for the dual I suffix is – 40°C to 85°C. Full range for the quad I suffix is – 40°C to 125°C. Full range for the Q suffix is –40°C to 125°C. Full range for the M suffix is – 55°C to 125°C. operating characteristics at specified free-air temperature, V = 3 V DD TLV244x PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX 25°C 0.65 1.3 VO = 1 V to 2 V, Full 0.65 SR Slew rate at unity gain RL = 600 Ω, range V/µs CL = 100 pF TLV2442Q/AQ Full 0.4 TLV2442M/AM range f = 10 Hz 25°C 170 VVn EEqquuiivvaalleenntt iinnppuutt nnooiissee vvoollttaaggee nnVV//√√HHzz f = 1 kHz 25°C 18 f = 0.1 Hz to 1 Hz 25°C 2.6 VVNN((PPPP)) PPeeaakk-ttoo-ppeeaakk eeqquuiivvaalleenntt iinnppuutt nnooiissee vvoollttaaggee µµVV f = 0.1 Hz to 10 Hz 25°C 5.1 In Equivalent input noise current 25°C 0.6 fA/√Hz VVOO == 00..55 VV ttoo 22..55 VV,, AV = 1 0.08% THD + N Total harmonic distortion plus noise RL = 600 Ω, AV = 10 25°C 0.3% f = 1 kHz AV = 100 2% GGaaiinn-bbaannddwwiiddtthh pprroodduucctt f =10 kHz,, RLL = 600 Ω,, 2255°°CC 11.7755 MMHHzz CL = 100 pF BBOOMM MMaaxxiimmuumm oouuttppuutt-sswwiinngg bbaannddwwiiddtthh VOO((PPPP)) = 1 V,, RLL = 600 Ω,, 2255°°CC 00.99 MMHHzz AV = 1, CL = 100 pF AAVV == –11,, TToo 00.11%% 11.55 tts SSeettttlliinngg ttiimmee SRtLLe p= =6 0–02 Ω.3, V to 2.3 V,, 2255°°CC µµss TToo 00.0011%% 33.22 CL = 100 pF φm Phase margin at unity gain 25°C 65° Gain margin RRLL == 660000 ΩΩ, CCLL == 110000 ppFF 25°C 9 dB †Full range for the C suffix is 0°C to 70°C. Full range for the dual I suffix is – 40°C to 85°C. Full range for the quad I suffix is – 40°C to 125°C. Full range for the Q suffix is –40°C to 125°C. Full range for the M suffix is – 55°C to 125°C. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 electrical characteristics at specified free-air temperature, V = 5 V (unless otherwise noted) DD TLV244x PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX TLV244xC 25°C 300 2000 TLV244xI Full range 2500 25°C 300 950 VVIIOO IInnppuutt ooffffsseett vvoollttaaggee TTLLVV224444xxAA µµVV Full range 1500 TLV2442AQ 25°C 300 950 TLV2442AM Full range 1600 Temperature coefficient of input 25°C ααVVIIOO offset voltage to 85°C 22 µµVV//°°CC Input offset voltage long-term VDD± = ±2.5 V, VIC = 0, drift (see Note 4) VO = 0, RS = 50 Ω 25°C 0.002 µV/mo 25°C 0.5 60 IIIIOO IInnppuutt ooffffsseett ccuurrrreenntt ppAA Full range 150 25°C 1 60 –40°C to 150 85°C IIIIBB IInnppuutt bbiiaass ccuurrrreenntt ppAA 125°C 350 TLV2442Q/AQ Full range 260 TLV2442M/AM 0 –0.25 25°C to to Common-mode input voltagge 4.25 4.5 VVIICCRR ||VVIIOO|| ≤≤ 55 mmVV, RRSS == 5500 ΩΩ VV range 0 Full range to 4 IOH = –100 µA 25°C 4.97 VOH High-level output voltage 25°C 4 4.35 V IIOOHH == –55 mmAA Full range 4 VIC = 2.5 V, IOL = 100 µA 25°C 0.01 VOL Low-level output voltage 25°C 0.8 V VVIICC == 22.55 VV, IIOOLL == 55 (cid:0)(cid:0)AA Full range 1.25 25°C 0.9 1.3 AVVDD LLvvooallrttgaaegg-ees iiaagmmnapllll iiddffiiiiccffffaaettriiooennnttiiall VVVVIOOC === 1122 .VV55 ttVVoo, 44 VV RRL = 660000 ΩΩ‡‡ Full range 0.5 V/mV RL = 1 MΩ‡ 25°C 950 rid Differential input resistance 25°C 1000 GΩ ri Common-mode input resistance 25°C 1000 GΩ Common-mode input ci capacitance f = 10 kHz 25°C 8 pF zo Closed-loop output impedance f = 1 MHz, AV = 10 25°C 140 Ω CCMMRRRR CCoommmmoonn-mmooddee rreejjeeccttiioonn rraattiioo VIICC = 0 to 4.25 V,, VOO = 2.5 V,, 25°C 70 75 ddBB RS = 50Ω Full range 70 †Full range for the C suffix is 0°C to 70°C. Full range for the dual I suffix is – 40°C to 85°C. Full range for the quad I suffix is – 40°C to 125°C. Full range for the Q suffix is –40°C to 125°C. Full range for the M suffix is – 55°C to 125°C. ‡Referenced to 2.5 V NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 electrical characteristics at specified free-air temperature, V = 5 V (unless otherwise noted) DD (continued) TLV244x PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX kkSSVVRR SSuuppppllyy-vvoollttaaggee rreejjeeccttiioonn rraattiioo ((∆∆VVDDDD//∆∆VVIIOO)) VDDDD = 4.4 V to 8 V,, 25°C 80 95 ddBB VIC = VDD/2, No load Full range 80 25°C 750 1100 IIDDDD SSuuppppllyy ccuurrrreenntt ((ppeerr cchhaannnneell)) VVOO == 22.55 VV, NNoo llooaadd µµAA Full range 1100 †Full range for the C suffix is 0°C to 70°C. Full range for the dual I suffix is – 40°C to 85°C. Full range for the quad I suffix is – 40°C to 125°C. Full range for the Q suffix is –40°C to 125°C. Full range for the M suffix is – 55°C to 125°C. operating characteristics at specified free-air temperature, V = 5 V DD TLV244x PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX 25°C 0.75 1.4 VVO = 00.55 VV tto 22.55 VV, Full range 0.75 SSRR SSlleeww rraattee aatt uunniittyy ggaaiinn RRLL == 660000 ΩΩ‡‡, VV//µµss CL = 100 pF‡ TLV2442Q/AQ Full range 0.5 TLV2442M/AM f = 10 Hz 25°C 130 VVn EEqquuiivvaalleenntt iinnppuutt nnooiissee vvoollttaaggee nnVV//√√HHzz f = 1 kHz 25°C 16 Peak-to-peak eqquivalent input noise f = 0.1 Hz to 1 Hz 25°C 1.8 VVNN((PPPP)) µµVV voltage f = 0.1 Hz to 10 Hz 25°C 3.6 In Equivalent input noise current 25°C 0.6 fA/√Hz VVOO = 11..55 VV ttoo 33..55 VV,, AV = 1 0.017% THD + N Total harmonic distortion plus noise f = 1 kHz, AV = 10 25°C 0.17% RL = 600 Ω‡‡ AV = 100 1.5% Gain-bandwidth product f =10 kHz, RL = 600 Ω‡, 25°C 1.81 MHz CL = 100 pF‡ BOM Maximum output-swing bandwidth VROL (=P 6P0) 0= Ω2‡ V,, ACVL == 11,00 pF‡ 25°C 0.5 MHz AV = –1, To 0.1% 1.5 Step = 0.5 V to 2.5 V,, tts SSeettttlliinngg ttiimmee RL = 600 Ω‡, 2255°°CC µµss CL = 100 pF‡ To 0.01% 2.6 φm Phase margin at unity gain RRLL == 660000 ΩΩ‡‡, CCLL == 110000 ppFF‡‡ 25°C 68° Gain margin 25°C 8 dB †Full range for the C suffix is 0°C to 70°C. Full range for the dual I suffix is – 40°C to 85°C. Full range for the quad I suffix is – 40°C to 125°C. Full range for the Q suffix is –40°C to 125°C. Full range for the M suffix is – 55°C to 125°C. ‡Referenced to 2.5 V 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 TYPICAL CHARACTERISTICS Table of Graphs† FIGURE Distribution 2,, 3 VVIIOO IInnppuutt ooffffsseett vvoollttaaggee vs Common-mode input voltage 4, 5 αVIO Input offset voltage temperature coefficient Distribution 6, 7 IIB/IIO Input bias and input offset currents vs Free-air temperature 8 VOH High-level output voltage vs High-level output current 9, 10 VOL Low-level output voltage vs Low-level output current 11, 12 VO(PP) Maximum peak-to-peak output voltage vs Frequency 13 vs Supplyy voltagge 14 IIOOSS SShhoorrtt-cciirrccuuiitt oouuttppuutt ccuurrrreenntt vs Free-air temperature 15 VO Output voltage vs Differential Input voltage 16, 17 AVD Differential voltage amplification vs Load resistance 18 LLaarrggee-ssiiggnnaall ddiiffffeerreennttiiaall vvoollttaaggee aammpplliiffiiccaattiioonn aanndd pphhaassee mmaarrggiinn vvss FFrreeqquueennccyy 1199, 2200 AAVVDD LLaarrggee-ssiiggnnaall ddiiffffeerreennttiiaall vvoollttaaggee aammpplliiffiiccaattiioonn vvss FFrreeee-aaiirr tteemmppeerraattuurree 2211, 2222 zo Output impedance vs Frequency 23, 24 vs Freqquencyy 25 CCMMRRRR CCoommmmoonn-mmooddee rreejjeeccttiioonn rraattiioo vs Free-air temperature 26 vs Freqquencyy 27,, 28 kkSSVVRR SSuuppppllyy-vvoollttaaggee rreejjeeccttiioonn rraattiioo vs Free-air temperature 29 IDD Supply current vs Supply voltage 30 vs Load capacitance 31 SSRR SSlleeww rraattee vs Free-air temperature 32 Inverting large-signal pulse response 33, 34 Voltage-follower large-signal pulse response 35, 36 VVOO Inverting small-signal pulse response 37, 38 Voltage-follower small-signal pulse response 39, 40 Vn Equivalent input noise voltage vs Frequency 41, 42 Noise voltage Over a 10-second period 43 THD + N Total harmonic distortion plus noise vs Frequency 44, 45 vs Free-air temperature 46 GGaaiinn-bbaannddwwiiddtthh pprroodduucctt vs Supply voltage 47 vs Freqquencyy 19,, 20 φφm PPhhaassee mmaarrggiinn vs Load capacitance 48 Gain margin vs Load capacitance 49 B1 Unity-gain bandwidth vs Load capacitance 50 †For all graphs where VDD = 5 V, all loads are referenced to 2.5 V. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLV2442 DISTRIBUTION OF TLV2442 INPUT OFFSET VOLTAGE INPUT OFFSET VOLTAGE 20 20 868 Amplifiers From 868 Amplifiers From 18 1 Wafer Lot 18 1 Wafer Lot VDD = ±1.5 V VDD = ±2.5 V % 16 TA = 25°C % 16 TA = 25°C mplifiers – 1142 mplifiers – 1142 Percentage of A 18640 Percentage of A 18640 2 2 0 0 –700 –600–500–400 –300–200–100 0 100200 300 400500 600 700 800 900 –700 –600 –500–400 –300–200 –1000 100 200 300400 500600 700800 900 VIO – Input Offset Voltage – µV VIO – Input Offset Voltage – µV Figure 2 Figure 3 INPUT OFFSET VOLTAGE INPUT OFFSET VOLTAGE vs vs COMMON-MODE INPUT VOLTAGE COMMON-MODE INPUT VOLTAGE 2 2 VDD = 3 V VDD = 5 V 1.5 TA = 25°C 1.5 TA = 25°C V V m 1 m 1 – – e e g 0.5 g 0.5 a a olt olt V V et 0 et 0 s s Off Off ut –0.5 ut –0.5 p p n n – I –1 – I –1 O O VI VI –1.5 –1.5 –2 –2 –0.5 0 0.5 1 1.5 2 2.5 3 –0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VIC – Common-Mode Input Voltage – V VIC – Common-Mode Input Voltage – V Figure 4 Figure 5 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLV2442 INPUT OFFSET DISTRIBUTION OF TLV2442 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT VOLTAGE TEMPERATURE COEFFICIENT 15 18 32 Amplifiers From 1 32 Amplifiers From 2 Wafer Lot Wafer Lots plifiers – % 192 VP25D P°DCac t=ko a± 1g12e.55° VC plifiers – % 1125 VP25D P°DCac t=ko a± 1g22e.55° VC m m ge of A 6 ge of A 9 nta nta 6 Perce 3 Perce 3 0 0 –8 –7 –6 –5 –4 –3 –2 –1 0 1 2 3 4 –8 –7 –6 –5 –4 –3 –2 –1 0 1 2 3 4 αVIO – Temperature Coefficient – µV/°C αVIO – Temperature Coefficient – µV/°C Figure 6 Figure 7 INPUT BIAS AND INPUT OFFSET CURRENTS HIGH-LEVEL OUTPUT VOLTAGE vs vs FREE-AIR TEMPERATURE HIGH-LEVEL OUTPUT CURRENT A – p 35 3 ents VVIDCD = = 0 ±2.5 V VDD = 3 V et Curr 30 RVOS == 500 Ω e – V 2.5 s 25 g nput Off 20 ut Volta 2 TA = –40°C and I IIB Outp 1.5 s 15 el a v ut Bi 10 IIO h-Le 1 p g – In – Hi TA = 125°C d IIO IIO 5 VOH 0.5 TA = 85°C TA = 25°C n a B B 0 0 IIII 25 45 65 85 105 125 0 2 4 6 8 10 12 TA – Free-Air Temperature – °C IOH – High-Level Output Current – mA Figure 8 Figure 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 TYPICAL CHARACTERISTICS HIGH-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE vs vs HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT CURRENT 5 3 VDD = 5 V VDD = 3 V 4.5 V 2.5 e – 4 TA = –40°C – V TA = 125°C oltag 3.5 TA = 25°C age 2 Output V 2.35 utput Volt 1.5 TA = 85°C el O ev 2 el High-L 1.5 TA = 125°C ow-Lev 1 TA = 25°C – H 1 TA = 85°C – L TA = –40°C O L 0.5 V O 0.5 V 0 0 0 5 10 15 20 25 0 2 4 6 8 10 IOH – High-Level Output Current – mA IOL – Low-Level Output Current – mA Figure 10 Figure 11 LOW-LEVEL OUTPUT VOLTAGE MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs vs LOW-LEVEL OUTPUT CURRENT FREQUENCY 2.5 5 V VDD = 5 V ge – VDD = 5 V RL = 600 Ω a V 2 olt 4 e – TA = 125°C ut V g p olta Out Low-Level Output V 1.15 TA = 85°C TA = 25°C mum Peak-to-Peak 32 VDD = 3 V – 0.5 xi 1 OL TA = –40°C Ma V – P) 0 P O( 0 0 2 4 6 8 10 V 100 1 k 10 k 100 k 1 M 10 M IOL – Low-Level Output Current – mA f – Frequency – Hz Figure 12 Figure 13 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 TYPICAL CHARACTERISTICS SHORT-CIRCUIT OUTPUT CURRENT SHORT-CIRCUIT OUTPUT CURRENT vs vs SUPPLY VOLTAGE FREE-AIR TEMPERATURE 25 25 VO = VDD/2 VDD = 5 V mA 20 VTAIC = = 2 V5D°CD/2 VID = –100 mV mA 20 VO = 2.5 V Current – 1150 Current – 1150 VID = –100 mV Output 50 Output 50 Circuit –5 Circuit –5 – Short-S ––1105 VID = 100 mV – Short-S ––1105 VID = 100 mV O –20 O –20 I I –25 –25 2 3 4 5 6 7 8 9 10 –75 –50 –25 0 25 50 75 100 125 VDD – Supply Voltage – V TA – Free-Air Temperature – °C Figure 14 Figure 15 OUTPUT VOLTAGE OUTPUT VOLTAGE vs vs DIFFERENTIAL INPUT VOLTAGE DIFFERENTIAL INPUT VOLTAGE 3 5 VDD = 3 V VDD = 5 V VIC = 1.5 V VIC = 2.5 V 2.5 RL = 600 Ω RL = 600 Ω TA = 25°C 4 TA = 25°C V V e – 2 e – g g 3 a a olt olt V V ut 1.5 ut p p ut ut 2 O O – 1 – O O V V 1 0.5 0 0 –1000 –750 –500 –250 0 250 500 750 1000 –1000 –750 –500 –250 0 250 500 750 1000 VID – Differential Input Voltage – µV VID – Differential Input Voltage – µV Figure 16 Figure 17 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 TYPICAL CHARACTERISTICS DIFFERENTIAL VOLTAGE AMPLIFICATION vs LOAD RESISTANCE 100 V VO(PP) = 2 V m TA = 25°C V/ – n atio VDD = 5 V c plifi VDD = 3 V m A e 10 g a olt V al nti e r e Diff – D V A 1 0.1 1 10 100 1000 RL – Load Resistance – kΩ Figure 18 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE MARGIN vs FREQUENCY 80 180° VDD = 3 V RL = 600 Ω 60 CL = 600 pF 135° al TA = 25°C nti dB arge-Signal Differe ge Amplification – 24000 049°50°° – Phase Marginm ÁÁD – LDVolta φ ÁÁVV AA –20 –45° ÁÁ –40 –90° 10 k 100 k 1 M 10 M f – Frequency – Hz Figure 19 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE MARGIN vs FREQUENCY 80 180° VDD = 5 V RL = 600 Ω 60 CL = 600 pF 135° ntial dB TA = 25°C Signal Differe mplification – 4200 9405°° hase Margin e- A P rg e – ÁD – LaDÁVoltag 0 0° φm ÁVVÁ AA ÁÁ –20 –45° –40 –90° 10 k 100 k 1 M 10 M f – Frequency – Hz Figure 20 LARGE-SIGNAL DIFFERENTIAL LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION VOLTAGE AMPLIFICATION vs vs FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE 1000 1000 VDD = 3 V VDD = 5 V VIC = 2.5 V RL = 1 MΩ VIC = 2.5 V VO = 1 V to 4 V VO = 1 V to 4 V al V al V enti V/m 100 RL = 1 MΩ enti V/m 100 er – er – Diff on Diff on Signal plificati 10 Signal plificati 10 e- m e- m g A g A ÁÁAVD – LarAVDÁÁVoltage 1 RL = 600 Ω ÁÁÁÁAVD – LarAVDVoltage 1 RL = 600 Ω ÁÁ ÁÁ 0.1 0.1 –75 –50 –25 0 25 50 75 100 125 –75 –50 –25 0 25 50 75 100 125 TA – Free-Air Temperature – °C TA – Free-Air Temperature – °C Figure 21 Figure 22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 TYPICAL CHARACTERISTICS OUTPUT IMPEDANCE OUTPUT IMPEDANCE vs vs FREQUENCY FREQUENCY 1000 100 VDD = 3 V TA = 25°C AV = 100 ΩO 100 ΩO – – e AV = 100 e 10 c c n n a a d d e e AV = 10 p p m 10 m ut I AV = 10 ut I p p ut ut – O – O 1 AV = 1 zo zo 1 AV = 1 zo zo VDD = 5 V TA = 25°C 0.1 0.1 100 1 k 10 k 100 k 1 M 100 1 k 10 k 100 k 1 M f – Frequency – Hz f – Frequency – Hz Figure 23 Figure 24 COMMON-MODE REJECTION RATIO COMMON-MODE REJECTION RATIO vs vs FREQUENCY FREE-AIR TEMPERATURE 100 100 B TA = 25°C B VDD = 5 V Ratio – d 80 VVIDCD = = 2 .55 VV Ratio – d 90 Rejection 60 VVIDCD = = 1 .35 VV Rejection Mode Mode 80 VDD = 3 V mon- 40 mon- m m Co Co 70 R – 20 R – R R M M C C 0 60 10 100 1 k 10 k 100 k 1 M 10 M –75 –50 –25 0 25 50 75 100 125 f – Frequency – Hz TA – Free-Air Temperature – °C Figure 25 Figure 26 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 TYPICAL CHARACTERISTICS SUPPLY-VOLTAGE REJECTION RATIO SUPPLY-VOLTAGE REJECTION RATIO vs vs FREQUENCY FREQUENCY 100 100 – dB VTAD D= =25 3° CV – dB VTAD D= =25 5° CV o o ati 80 ati 80 R R n n o o cti cti Reje 60 kSVR+ Reje 60 kSVR+ e e g g a a kSVR– Volt 40 Volt 40 y- kSVR– y- pl pl p p u u S S – 20 – 20 R R R R VV VV SS SS kk kk 0 0 10 100 1 k 10 k 100 k 1 M 10 M 10 100 1 k 10 k 100 k 1 M 10 M f – Frequency – Hz f – Frequency – Hz Figure 27 Figure 28 SUPPLY-VOLTAGE REJECTION RATIO SUPPLY CURRENT vs vs FREE-AIR TEMPERATURE SUPPLY VOLTAGE 100 2.5 B VDD = 2.5 V to 8 V d – o ati 98 2 R A n m TA = 25°C o – cti nt TA = 85°C e Reje 96 Curre 1.5 TA = –40°C g y Volta 94 uppl 1 pply- D – SD u DD S II – 92 0.5 R R VV SS kk 90 0 –75 –50 –25 0 25 50 75 100 125 0 2 4 6 8 10 TA – Free-Air Temperature – °C VDD – Supply Voltage – V Figure 29 Figure 30 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 TYPICAL CHARACTERISTICS SLEW RATE SLEW RATE vs vs LOAD CAPACITANCE FREE-AIR TEMPERATURE 3 3 VDD = 5 V VDD = 5 V AV = –1 RL = 600 Ω 2.5 TA = 25°C 2.5 CL = 100 pF SR – AV = 1 µe – V/ s 2 SR + SR – µe – V/ s 2 Rat 1.5 Rat 1.5 w w e e SR + Sl Sl R – 1 R – 1 S S 0.5 0.5 0 0 10 100 1 k 10 k 100 k –75 –50 –25 0 25 50 75 100 125 CL – Load Capacitance – pF TA – Free-Air Temperature – °C Figure 31 Figure 32 INVERTING LARGE-SIGNAL PULSE RESPONSE INVERTING LARGE-SIGNAL PULSE RESPONSE 3 5 VDD = 3 V VDD = 5 V RL = 2 kΩ RL = 2 kΩ CL = 100 pF CL = 100 pF AV = –1 4 AV = –1 V TA = 25°C V TA = 25°C ge – 2 ge – Volta Volta 3 ut ut p p ut ut O O 2 O – O 1 O – O VV VV 1 0 0 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 t – Time – µs t – Time – µs Figure 33 Figure 34 18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 TYPICAL CHARACTERISTICS VOLTAGE-FOLLOWER VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE LARGE-SIGNAL PULSE RESPONSE 3 5 VDD = 3 V VDD = 5 V RL = 600 Ω RL = 600 Ω CL = 100 pF CL = 100 pF AV = 1 4 AV = 1 V TA = 25°C V TA = 25°C – – e 2 e g g olta olta 3 V V ut ut p p ut ut O O 2 O – O 1 O – O VV VV 1 0 0 0 1 2 3 4 5 6 7 8 9 10 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 t – Time – µs t – Time – µs Figure 35 Figure 36 INVERTING SMALL-SIGNAL PULSE RESPONSE INVERTING SMALL-SIGNAL PULSE RESPONSE 1.58 2.58 VDD = 3 V VDD = 5 V RL = 600 Ω RL = 600 Ω 1.56 CL = 100 pF 2.56 CL = 100 pF AV = –1 AV = –1 Voltage – V 11..5542 TA = 25°C Voltage – V 22..5524 TA = 25°C Output 1.5 Output 2.5 O – O O – O VV 1.48 VV 2.48 1.46 2.46 1.44 2.44 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 t – Time – µs t – Time – µs Figure 37 Figure 38 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 19

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 TYPICAL CHARACTERISTICS VOLTAGE-FOLLOWER VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE SMALL-SIGNAL PULSE RESPONSE 1.58 2.58 VDD = 3 V VDD = 5 V RL = 600 Ω RL = 600 Ω 1.56 CL = 100 pF 2.56 CL = 100 pF AV = –1 AV = –1 – V 1.54 TA = 25°C – V 2.54 TA = 25°C e e g g a a olt 1.52 olt 2.52 V V ut ut p p ut 1.5 ut 2.5 O O – – O O O O VV 1.48 VV 2.48 1.46 2.46 1.44 2.44 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 t – Time – µs t – Time – µs Figure 39 Figure 40 EQUIVALENT INPUT NOISE VOLTAGE EQUIVALENT INPUT NOISE VOLTAGE vs vs FREQUENCY FREQUENCY 200 140 Voltage – nV HznV/Hz 111468000 TRVADS D== 2=250 3° CΩ V Voltage – nV HznV/Hz 110200 TV RADS D= = 2= 25 05°C ΩV Equivalent Input Noise 118460200000 Equivalent Input Noise 648000 Vn – Vn 20 Vn – Vn 20 0 0 10 100 1 k 10 k 10 100 1 k 10 k f – Frequency – Hz f – Frequency – Hz Figure 41 Figure 42 20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 TYPICAL CHARACTERISTICS TOTAL HARMONIC DISTORTION PLUS NOISE NOISE VOLTAGE vs OVER A 10-SECOND PERIOD FREQUENCY 2000 % 10 Vf =D D0. 1= H5 zV to 10 se – VRDL D= =6 030 V Ω 1500 Hz TA = 25°C Noi TA = 25°C s u 1000 Pl ge – nV 500 stortion 1 AV = 100 a Di olt 0 c V ni Noise –500 Harmo 0.1 AV = 10 –1000 otal AV = 1 T – –1500 N + D H –2000 T 0.01 0 1 2 3 4 5 6 7 8 9 10 10 100 1 k 10 k 100 k t – Time – s f – Frequency – Hz Figure 43 Figure 44 TOTAL HARMONIC DISTORTION PLUS NOISE GAIN-BANDWIDTH PRODUCT vs vs FREQUENCY FREE-AIR TEMPERATURE % 10 3 Noise – TVRADL D== =265 05°0 CV Ω fCR =LL 1==0 16 k00H00 z pΩF ortion Plus 1 AV = 100 uct – MHz 2.5 st od Di Pr monic AV = 10 width 2 r d Ha 0.1 an Total ain-B 1.5 – G N + AV = 1 D H T 0.01 1 10 100 1 k 10 k 100 k –50 –25 0 25 50 75 100 125 f – Frequency – Hz TA – Free-Air Temperature – °C Figure 45 Figure 46 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 21

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 TYPICAL CHARACTERISTICS GAIN-BANDWIDTH PRODUCT PHASE MARGIN vs vs SUPPLY VOLTAGE LOAD CAPACITANCE 2 75° RL = 600 Ω CL = 100 pF Rnull = 100 Ω f = 10 kHz Hz 1.9 TA = 25°C 60° M – ct n u gi od 1.8 ar 45° r M dwidth P 1.7 – Phase 30° Rnull = 50 Ω an m m n-B φo Rnull = 20 Ω ai Rnull = 0 G 1.6 15° RL = 600 Ω TA = 25°C 1.5 0° 0 1 2 3 4 5 6 7 8 10 100 1 k 10 k 100 k |VDD±| – Supply Voltage – V CL – Load Capacitance – pF Figure 47 Figure 48 GAIN MARGIN UNITY-GAIN BANDWIDTH vs vs LOAD CAPACITANCE LOAD CAPACITANCE 25 TRAL == 2650°0C Ω Rnull = 50 Ω 2 TRAL == 2650°0C Ω z 20 H k – 1.5 h B dt d wi n – 15 Rnull = 100 Ω nd argi Rnull = 20 Ω n Ba 1 M ai n 10 G ai y- G nit U Rnull = 0 Á– Á0.5 5 1 ÁBÁ 0 0 10 100 1 K 10 K 100 K 10 100 1 k 10 k 100 k CL – Load Capacitance – pF CL – Load Capacitance – pF Figure 49 Figure 50 22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 APPLICATION INFORMATION macromodel information Macromodel information provided was derived using PSpice Parts model generation software. The Boyle macromodel (see Note 5) and subcircuit in Figure 51 were generated using the TLV244x typical electrical and operating characteristics at T = 25°C. Using this information, output simulations of the following key parameters A can be generated to a tolerance of 20% (in most cases): (cid:0) (cid:0) Maximum positive output voltage swing Unity gain frequency (cid:0) (cid:0) Maximum negative output voltage swing Common-mode rejection ratio (cid:0) (cid:0) Slew rate Phase margin (cid:0) (cid:0) Quiescent power dissipation DC output resistance (cid:0) (cid:0) Input bias current AC output resistance (cid:0) (cid:0) Open-loop voltage amplification Short-circuit output current limit NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers,” IEEE Journal of Solid-State Circuits, SC-9, 353 (1974). 99 DLN 3 EGND + VCC+ 92 9 FB RSS ISS + – 90 91 VB RO2 + DLP + – RP + – HLIM VLP VLN IN– 2 10 VC R2 – – + DP J1 J2 – 6 C2 7 IN+ 53 + 1 VLIM 11 12 DC GCM GA – 8 C1 RD1 RD2 60 RO1 VAD + DE – 54 5 VCC– 4 – + VE OUT .SUBCKT TLV2442 1 2 3 4 5 RD1 60 11 2.653E3 C1 11 12 14E–12 RD2 60 12 2.653E3 C2 6 7 60.00E–12 R01 8 5 50 DC 5 53 DX R02 7 99 50 DE 54 5 DX RP 3 4 4.310E3 DLP 90 91 DX RSS 10 99 925.9E3 DLN 92 90 DX VAD 60 4 –.5 DP 4 3 DX VB 9 0 DC 0 EGND 99 0 POLY (2) (3,0) (4,) 0 .5 .5 VC 3 53 DC .78 FB 7 99 POLY (5) VB VC VE VLP VLN 0 VE 54 4 DC .78 + 984.9E3 –1E6 1E6 1E6 –1E6 VLIM 7 8 DC 0 GA 6 0 11 12 377.0E–6 VLP 91 0 DC 1.9 GCM 0 6 10 99 134E–9 VLN 0 92 DC 9.4 ISS 3 10 DC 216.0E–6 .MODEL DX D (IS=800.0E–18) HLIM 90 0 VLIM 1K .MODEL JX PJF (IS=1.500E–12BETA=1.316E-3 J1 11 2 10 JX + VTO=–.270) J2 12 1 10 JX .ENDS R2 6 9 100.OE3 Figure 51. Boyle Macromodel and Subcircuit PSpice and Parts are registered trademarks of MicroSim Corporation. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 23

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 MECHANICAL DATA D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PIN SHOWN 0.050 (1,27) 0.020 (0,51) 0.010 (0,25) M 0.014 (0,35) 14 8 0.008 (0,20) NOM 0.244 (6,20) 0.228 (5,80) 0.157 (4,00) 0.150 (3,81) Gage Plane 0.010 (0,25) 1 7 0°–8° 0.044 (1,12) A 0.016 (0,40) Seating Plane 0.010 (0,25) 0.004 (0,10) 0.069 (1,75) MAX 0.004 (0,10) PINS ** 8 14 16 DIM 0.197 0.344 0.394 A MAX (5,00) (8,75) (10,00) 0.189 0.337 0.386 A MIN (4,80) (8,55) (9,80) 4040047/D 10/96 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). D. Falls within JEDEC MS-012 24 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 MECHANICAL DATA FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN NO. OF A B 18 17 16 15 14 13 12 TERMINALS MIN MAX MIN MAX ** 0.342 0.358 0.307 0.358 19 11 20 (8,69) (9,09) (7,80) (9,09) 20 10 0.442 0.458 0.406 0.458 28 (11,23) (11,63) (10,31) (11,63) 21 9 B SQ 0.640 0.660 0.495 0.560 44 22 8 (16,26) (16,76) (12,58) (14,22) A SQ 23 7 0.739 0.761 0.495 0.560 52 (18,78) (19,32) (12,58) (14,22) 24 6 0.938 0.962 0.850 0.858 68 (23,83) (24,43) (21,6) (21,8) 25 5 1.141 1.165 1.047 1.063 84 (28,99) (29,59) (26,6) (27,0) 26 27 28 1 2 3 4 0.020 (0,51) 0.080 (2,03) 0.010 (0,25) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.045 (1,14) 0.022 (0,54) 0.035 (0,89) 0.050 (1,27) 4040140/D 10/96 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a metal lid. D. The terminals are gold plated. E. Falls within JEDEC MS-004 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 25

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 MECHANICAL DATA JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE PACKAGE 0.400 (10,20) 0.355 (9,00) 8 5 0.280 (7,11) 0.245 (6,22) 1 4 0.065 (1,65) 0.045 (1,14) 0.310 (7,87) 0.020 (0,51) MIN 0.290 (7,37) 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.063 (1,60) 0°–15° 0.015 (0,38) 0.023 (0,58) 0.015 (0,38) 0.100 (2,54) 0.014 (0,36) 0.008 (0,20) 4040107/C 08/96 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification on press ceramic glass frit seal only. E. Falls within MIL-STD-1835 GDIP1-T8 26 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 MECHANICAL DATA PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PIN SHOWN 0,30 0,65 0,10 M 0,19 14 8 0,15 NOM 4,50 6,60 4,30 6,20 Gage Plane 0,25 1 7 0°–8° A 0,75 0,50 Seating Plane 0,15 1,20 MAX 0,10 0,05 PINS ** 8 14 16 20 24 28 DIM A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 4040064/E 08/96 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 27

TLV2442, TLV2442A, TLV2444, TLV2444A Advanced LinCMOS RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS SLOS169H – NOVEMBER 1996 – REVISED MARCH 2001 MECHANICAL DATA U (S-GDFP-F10) CERAMIC DUAL FLATPACK 0.250 (6,35) 0.246 (6,10) 0.006 (0,15) 0.004 (0,10) 0.080 (2,03) 0.045 (1,14) 0.050 (1,27) 0.026 (0,66) 0.300 (7,62) 0.350 (8,89) 0.350 (8,89) 0.250 (6,35) 0.250 (6,35) 0.019 (0,48) 1 10 0.015 (0,38) 0.050 (1,27) 0.250 (6,35) 5 6 0.025 (0,64) 0.005 (0,13) 1.000 (25,40) 0.750 (19,05) 4040179/B 03/95 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification only. E. Falls within MIL STD 1835 GDFP1-F10 and JEDEC MO-092AA 28 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) 5962-9751101QPA ACTIVE CDIP JG 8 1 TBD Call TI Call TI -55 to 125 9751101QPA TLV2442M 5962-9751102QPA ACTIVE CDIP JG 8 1 TBD Call TI Call TI -55 to 125 9751102QPA TLV2442AM TLV2442AID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 2442AI & no Sb/Br) TLV2442AIDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 2442AI & no Sb/Br) TLV2442AIPW ACTIVE TSSOP PW 8 150 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 TV2442 & no Sb/Br) TLV2442AIPWR ACTIVE TSSOP PW 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 2442AI & no Sb/Br) TLV2442AMJGB ACTIVE CDIP JG 8 1 TBD Call TI Call TI -55 to 125 9751102QPA TLV2442AM TLV2442AQD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 V2442A & no Sb/Br) TLV2442AQDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM V2442A & no Sb/Br) TLV2442AQPW ACTIVE TSSOP PW 8 150 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2442AQ & no Sb/Br) TLV2442AQPWR ACTIVE TSSOP PW 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2442AQ & no Sb/Br) TLV2442CD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 2442C & no Sb/Br) TLV2442CDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 2442C & no Sb/Br) TLV2442CDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 2442C & no Sb/Br) TLV2442CPW ACTIVE TSSOP PW 8 150 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TV2442 & no Sb/Br) TLV2442CPWR ACTIVE TSSOP PW 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TV2442 & no Sb/Br) TLV2442ID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 2442I & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TLV2442IDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 2442I & no Sb/Br) TLV2442IDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 2442I & no Sb/Br) TLV2442MJGB ACTIVE CDIP JG 8 1 TBD Call TI Call TI -55 to 125 9751101QPA TLV2442M TLV2442QPW ACTIVE TSSOP PW 8 150 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2442Q & no Sb/Br) TLV2442QPWR ACTIVE TSSOP PW 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2442Q & no Sb/Br) TLV2442QPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 2442Q & no Sb/Br) TLV2444AID ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2444AI & no Sb/Br) TLV2444AIPW ACTIVE TSSOP PW 14 90 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2444AI & no Sb/Br) TLV2444AIPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2444AI & no Sb/Br) TLV2444AIPWR ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2444AI & no Sb/Br) TLV2444AIPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2444AI & no Sb/Br) TLV2444CD ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 2444C & no Sb/Br) TLV2444CDR ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 2444C & no Sb/Br) TLV2444CDRG4 ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 2444C & no Sb/Br) TLV2444CPW ACTIVE TSSOP PW 14 90 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 2444C & no Sb/Br) TLV2444CPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 2444C & no Sb/Br) TLV2444CPWR ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 2444C & no Sb/Br) TLV2444ID ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2444I & no Sb/Br) Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TLV2444IDR ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2444I & no Sb/Br) TLV2444IPWR ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 2444I & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TLV2442, TLV2442A, TLV2442AM, TLV2442M, TLV2444A : Addendum-Page 3

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 •Catalog: TLV2442A, TLV2442 •Automotive: TLV2442-Q1, TLV2442A-Q1, TLV2442A-Q1, TLV2442-Q1, TLV2444A-Q1 •Military: TLV2442M, TLV2442AM NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects •Military - QML certified for Military and Defense Applications Addendum-Page 4

PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TLV2442AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2442AIPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1 TLV2442AQPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1 TLV2442CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2442IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2442QPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1 TLV2442QPWRG4 TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1 TLV2444AIPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 TLV2444CDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TLV2444CPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 TLV2444IDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TLV2444IPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TLV2442AIDR SOIC D 8 2500 340.5 338.1 20.6 TLV2442AIPWR TSSOP PW 8 2000 367.0 367.0 35.0 TLV2442AQPWR TSSOP PW 8 2000 367.0 367.0 35.0 TLV2442CDR SOIC D 8 2500 340.5 338.1 20.6 TLV2442IDR SOIC D 8 2500 340.5 338.1 20.6 TLV2442QPWR TSSOP PW 8 2000 367.0 367.0 35.0 TLV2442QPWRG4 TSSOP PW 8 2000 367.0 367.0 35.0 TLV2444AIPWR TSSOP PW 14 2000 367.0 367.0 35.0 TLV2444CDR SOIC D 14 2500 350.0 350.0 43.0 TLV2444CPWR TSSOP PW 14 2000 367.0 367.0 35.0 TLV2444IDR SOIC D 14 2500 350.0 350.0 43.0 TLV2444IPWR TSSOP PW 14 2000 367.0 367.0 35.0 PackMaterials-Page2

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PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

MECHANICAL DATA MCER001A – JANUARY 1995 – REVISED JANUARY 1997 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE 0.400 (10,16) 0.355 (9,00) 8 5 0.280 (7,11) 0.245 (6,22) 1 4 0.065 (1,65) 0.045 (1,14) 0.063 (1,60) 0.020 (0,51) MIN 0.310 (7,87) 0.015 (0,38) 0.290 (7,37) 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0°–15° 0.015 (0,38) 0.100 (2,54) 0.014 (0,36) 0.008 (0,20) 4040107/C 08/96 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification. E. Falls within MIL STD 1835 GDIP1-T8 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

PACKAGE OUTLINE PW0008A TSSOP - 1.2 mm max height SCALE 2.800 SMALL OUTLINE PACKAGE C 6.6 TYP SEATING PLANE 6.2 PIN 1 ID A 0.1 C AREA 6X 0.65 8 1 3.1 2X 2.9 NOTE 3 1.95 4 5 0.30 8X 0.19 4.5 1.2 MAX B 0.1 C A B 4.3 NOTE 4 (0.15) TYP SEE DETAIL A 0.25 GAGE PLANE 0.15 0.75 0 - 8 0.05 0.50 DETAIL A TYPICAL 4221848/A 02/2015 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT PW0008A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 8X (1.5) 8X (0.45) SYMM (R0.05) 1 TYP 8 SYMM 6X (0.65) 5 4 (5.8) LAND PATTERN EXAMPLE SCALE:10X SOOPLEDNEINRG MASK METAL MSOELTDAEL RU NMDAESRK SOOPLEDNEINRG MASK 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS NOT TO SCALE 4221848/A 02/2015 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN PW0008A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 8X (1.5) SYMM (R0.05) TYP 8X (0.45) 1 8 SYMM 6X (0.65) 5 4 (5.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:10X 4221848/A 02/2015 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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