TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 (cid:0) (cid:0) Self-Calibrates Input Offset Voltage to Slew Rate...2.5 V/µs 40 µV Max (cid:0) High Output Drive Capability...±50 mA (cid:0) Low Input Offset Voltage Drift...1 µV/°C (cid:0) Calibration Time...300 ms (cid:0) Input Bias Current...1 pA (cid:0) Characterized From –55°C to 125°C (cid:0) Open Loop Gain...120 dB (cid:0) Available in Q-Temp Automotive (cid:0) Rail-To-Rail Output Voltage Swing HighRel Automotive Applications (cid:0) Stable Driving 1000 pF Capacitive Loads Configuration Control / Print Support (cid:0) Qualification to Automotive Standards Gain Bandwidth Product...4.7 MHz description The TLC4501 and TLC4502 are the highest precision CMOS single supply rail-to-rail operational amplifiers available today. The input offset voltage is 10 µV typical and 40 µV maximum. This exceptional precision, combined with a 4.7-MHz bandwidth, 2.5-V/µs slew rate, and 50-mA output drive, is ideal for multiple applications including: data acquisition systems, measurement equipment, industrial control applications, and portable digital scales. These amplifiers feature self-calibrating circuitry which digitally trims the input offset voltage to less than 40 µV within the first 300 ms of operation. The offset is then digitally stored in an integrated successive approximation register (SAR). Immediately after the data is stored, the calibration circuitry effectively drops out of the signal path, shuts down, and the device functions as a standard operational amplifier. 3 Offset Control IN+ + 1 OUT 2 IN– – Calibration Circuitry SAR D/A A/D 8 5 V VDD 4 GND Power-On Control Oscillator Reset Logic Figure 1. Channel One of the TLC4502 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet. LinEPIC and Self-Cal are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright  2001, Texas Instruments Incorporated Products conform to specifications per the terms of Texas Instruments On products compliant to MIL-PRF-38535, all parameters are tested standard warranty. Production processing does not necessarily include unless otherwise noted. On all other products, production testing of all parameters. processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 description (continued) Using this technology eliminates the need for noisy and expensive chopper techniques, laser trimming, and power hungry, split supply bipolar operational amplifiers. TLC4501 TLC4502 TLC4502 D PACKAGE D OR JG PACKAGE U PACKAGE (TOP VIEW) (TOP VIEW) (TOP VIEW) NC 1 8 NC 1OUT 1 8 VDD+ NC 1 10 NC 1IN– 2 7 VDD+ 1IN– 2 7 2OUT 1OUT 2 9 VDD+ 1IN+ 3 6 OUT 1IN+ 3 6 2IN– 1IN– 3 8 2OUT VDD–/GND 4 5 NC VDD–/GND 4 5 2IN+ 1IN+ 4 7 2IN– VDD–/GND 5 6 2IN+ TLC4502 FK PACKAGE (TOP VIEW) T + U D C O C DC N 1 N VN 3 2 1 20 19 NC 4 18 NC 1IN– 5 17 2OUT NC 6 16 NC 1IN+ 7 15 2IN– NC 8 14 NC 9 10 11 12 13 CD C+ C NN NN N G 2I / – D D V NC – No internal connection AVAILABLE OPTIONS PACKAGED DEVICES TA VIOmax AT 25°C SMALL CHIP CARRIER CERAMIC DIP CERAMIC FLAT OUTLINE† PACK (FK) (JG) (D) (U) 40 µV TLC4501ACD — — — 50 µV TLC4502ACD — — — 00°°CC ttoo 7700°°CC 80 µV TLC4501CD — — — 100 µV TLC4502CD — — — 40 µV TLC4501AID — — — 50 µV TLC4502AID — — — –4400°°CC ttoo 112255°°CC 80 µV TLC4501ID — — — 100 µV TLC4502ID — — — 50 µV TLC4502AQD — — — –4400°°CC ttoo 112255°°CC 100 µV TLC4502QD — — — 50 µV TLC4502AMD TLC4502AMFKB TLC4502AMJGB TLC4502AMUB –5555°°CC ttoo 112255°°CC 100 µV TLC4502MD TLC4502MFKB TLC4502MJGB TLC4502MUB †The D package is also available taped and reeled. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V DD+ Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±7 V ID Input voltage range, V (any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 7 V I Input current, I (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5 mA I Output current, I (each output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA O Total current into V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA DD+ Total current out of V /GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA DD– Electrostatic discharge (ESD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . > 2 kV Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, T : TLC4502C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C A TLC4502I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 125°C TLC4502Q . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 125°C TLC4502M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C stg Case temperature for 60 seconds, T : FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C †Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to VDD–/GND. 2. Differential voltages are at IN+ with respect to IN–. Excessive current flows when an input is brought below VDD– – 0.3 V. 3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. DISSIPATION RATING TABLE PPAACCKKAAGGEE TAA ≤ 25°C DERATING FACTOR TAA = 70°C TAA = 85°C TAA = 125°C POWER RATING ABOVE TA = 25°C POWER RATING POWER RATING POWER RATING D 725 mW 5.8 mW/°C 464 mW 377 mW 145 mW FFKK 11337755 mWW 1111.00 mWW//°°CC 888800 mWW 771155 mWW 227755 mWW JJGG 11005500 mmWW 88.44 mmWW//°CC 667722 mmWW 554466 mmWW 221100 mmWW U 675 mW 5.4 mW/°C 432 mW 350 mW 135 mW recommended operating conditions TLC4502C TLC4502I TLC4502Q TLC4502M UUNNIITT MIN MAX MIN MAX MIN MAX MIN MAX Supply voltage, VDD 4 6 4 6 4 6 4 6 V Input voltage range, VI VDD– VDD+ – 2.3 VDD– VDD+ – 2.3 VDD– VDD+ – 2.3 VDD– VDD+ – 2.3 V Common-mode input voltage, VIC VDD– VDD+ – 2.3 VDD– VDD+ – 2.3 VDD– VDD+ – 2.3 VDD– VDD+ – 2.3 V Operating free-air temperature, TA 0 70 –40 125 –40 125 –55 125 °C POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 electrical characteristics at specified free-air temperature, V = 5 V, GND = 0 (unless otherwise DD noted) TLC450xC PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX TLC4501 –80 10 80 VVIIOO IInnppuutt ooffffsseett vvoollttaaggee VVIDDCDD = = 0 ±,2.5 V,, VROOS == 500,, Ω TTLLCC44550012A FFuullll rraannggee ––14000 1100 14000 µµVV TLC4502A –50 10 50 ααVVIIOO Temperature coefficient of input FFuullll rraannggee 11 µµVV//°°CC offset voltage IIIIOO IInnppuutt ooffffsseett ccuurrrreenntt VVVDIDCDD = = 0 ±±,22..55 VV,, VVROOS == 5000,, Ω Fu2ll 5ra°Cnge 1 56000 ppAA 25°C 1 60 IIIIBB IInnppuutt bbiiaass ccuurrrreenntt ppAA Full range 500 IOH = – 500 µA 25°C 4.99 VOH High-level output voltage 25°C 4.9 V IIOOHH == – 55 mmAA Full range 4.7 VIC = 2.5 V, IOL = 500 µA 25°C 0.01 VOL Low-level output voltage 25°C 0.1 V VVIICC == 22.55 VV, IIOOLL == 55 mmAA Full range 0.3 AAVVDD Laamrpggleif-icsaiggtnioanl differential voltagge VRIILCC = = 1 2 k.5Ω ,V,, VSOOee = N 1o tVe t4o 4 V,, Fu2ll 5ra°Cnge 220000 1000 VV//mmVV RI(D) Differential input resistance 25°C 10 kΩ RL Input resistance See Note 4 25°C 1012 Ω CL Common-mode input capacitance f = 10 kHz, P package 25°C 8 pF zO Closed-loop output impedance AV = 10, f = 100 kHz 25°C 1 Ω CCMMRRRR CCoommmmoonn-mmooddee rreejjeeccttiioonn rraattiioo VIICC = 0 to 2.7 V,, VOO = 2.5 V,, 25°C 90 100 ddBB RS = 1 kΩ Full range 85 Supplyy-voltagge rejjection ratio 25°C 90 100 kkSSVVRR (∆VDD±/∆VIO) VVDDDD == 44 VV ttoo 66 VV, VVIICC == 00, NNoo llooaadd Full range 90 ddBB 25°C 1 1.5 TTLLCC44550011//AA Full range 2 IIDDDD SSuuppppllyy ccuurrrreenntt VVOO == 22.55 VV, NNoo llooaadd mmAA 25°C 2.5 3.5 TTLLCC44550022//AA Full range 4 VVIITT((CCAALL)) CCaalliibbrraattiioonn iinnppuutt tthhrreesshhoolldd vvoollttaaggee FFuullll rraannggee 44 VV †Full range is 0°C to 70°C. NOTE 4: RL and CL values are referenced to 2.5 V. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 operating characteristics, V = 5 V DD TLC450xC, TLC450xAC PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX 25°C 1.5 2.5 V/µs SSRR SSlleeww rraattee aatt uunniittyy ggaaiinn VVOO == 00.55 VV ttoo 22.55 VV, CCLL == 110000 ppFF Full range 1 V/µs f = 10 Hz 25°C 70 VVn EEqquuiivvaalleenntt iinnppuutt nnooiissee vvoollttaaggee nnVV//√√HHz f = 1 kHz 25°C 12 Peak-to-peak eqquivalent input noise f = 0.1 to 1 Hz 25°C 1 VVNN((PPPP)) µµVV voltage f = 0.1 to 10 Hz 25°C 1.5 In Equivalent input noise current 25°C 0.6 fA/√Hz VO = 0.5 V to 2.5 V, AV = 1 25°C 0.02% ff = 1100 kkHHz, THD + N Total harmonic distortion plus noise RRLL = 11 kkΩΩ,, AV = 10 25°C 0.08% CL = 100 pF AV = 100 25°C 0.55% Gain-bandwidth product f = 10 kHz, RL = 1 kΩ, 25°C 4.7 MHz CL = 100 pF BOM Maximum output swing bandwidth VROL (=P 1P )k =Ω ,2 V, ACVL == 11,00 pF 25°C 1 MHz AV = –1, to 0.1% 25°C 1.6 Step = 0.5 V to 2.5 V, tts SSeettttlliinngg ttiimmee RL = 1 kΩ, µµss to 0.01% 25°C 2.2 CL = 100 pF φm Phase margin at unity gain RL = 1 kΩ, CL = 100 pF 25°C 74 Calibration time 25°C 300 ms †Full range is 0°C to 70°C. NOTE 4: RL and CL values are referenced to 2.5 V. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 electrical characteristics at specified free-air temperature, V = 5 V, GND = 0 (unless otherwise DD noted) TLC450xI PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX TLC4501 –80 10 80 VVIIOO IInnppuutt ooffffsseett vvoollttaaggee VVIDDCDD = = 0 ±,2.5 V,, VROOS == 500,, Ω TTLLCC44550012A FFuullll rraannggee ––14000 1100 14000 µµVV TLC4502A –50 10 50 ααVVIIOO Temperature coefficient of input FFuullll rraannggee 11 µµVV//°°CC offset voltage VDDDD = ±2.5 V, VOO = 0, 25°C 1 60 VIC = 0, RS = 50 Ω –40°C to pA IIO Input offset current 85°C 500 Full range 5 nA 25°C 1 60 VDD = ±2.5 V, VO = 0, –40°C to pA IIB Input bias current VIC = 0, RS = 50 Ω 85°C 500 Full range 10 nA IOH = – 500 µA 25°C 4.99 VOH High-level output voltage 25°C 4.9 V IIOOHH == – 55 mmAA Full range 4.7 VIC = 2.5 V, IOL = 500 µA 25°C 0.01 VOL Low-level output voltage 25°C 0.1 V VVIICC == 22.55 VV, IIOOLL == 55 mmAA Full range 0.3 AAVVDD Laamrpggleif-icsaiggtnioanl differential voltagge VRIILCC = = 1 2 k.5Ω ,V,, VSOOee = N 1o tVe t4o 4 V,, Fu2ll 5ra°Cnge 220000 1000 VV//mmVV RI(D) Differential input resistance 25°C 10 kΩ RL Input resistance See Note 4 25°C 1012 Ω CL Common-mode input capacitance f = 10 kHz, P package 25°C 8 pF zO Closed-loop output impedance AV = 10, f = 100 kHz 25°C 1 Ω CCMMRRRR CCoommmmoonn-mmooddee rreejjeeccttiioonn rraattiioo VIICC = 0 to 2.7 V,, VOO = 2.5 V,, 25°C 90 100 ddBB RS = 1 kΩ Full range 85 Supplyy-voltagge rejjection ratio 25°C 90 100 kkSSVVRR (∆VDD±/∆VIO) VVDDDD == 44 VV ttoo 66 VV, VVIICC == 00, NNoo llooaadd Full range 90 ddBB 25°C 1 1.5 TTLLCC44550011//AA Full range 2 IIDDDD SSuuppppllyy ccuurrrreenntt VVOO == 22.55 VV, NNoo llooaadd mmAA 25°C 2.5 3.5 TTLLCC44550022//AA Full range 4 VVIITT((CCAALL)) CCaalliibbrraattiioonn iinnppuutt tthhrreesshhoolldd vvoollttaaggee FFuullll rraannggee 44 VV †Full range is –40°C to 125°C. NOTE 4: RL and CL values are referenced to 2.5 V. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 operating characteristics, V = 5 V DD TLC450xI, TLC450xAI PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTA†† UUNNIITT MIN TYP MAX 25°C 1.5 2.5 V/µs SSRR SSlleeww rraattee aatt uunniittyy ggaaiinn VVOO == 00.55 VV ttoo 22.55 VV, CCLL == 110000 ppFF Full range 1 V/µs f = 10 Hz 25°C 70 VVn EEqquuiivvaalleenntt iinnppuutt nnooiissee vvoollttaaggee nnVV//√√HHz f = 1 kHz 25°C 12 Peak-to-peak eqquivalent input noise f = 0.1 to 1 Hz 25°C 1 VVNN((PPPP)) µµVV voltage f = 0.1 to 10 Hz 25°C 1.5 In Equivalent input noise current 25°C 0.6 fA/√Hz VO = 0.5 V to 2.5 V, AV = 1 25°C 0.02% ff = 1100 kkHHz, THD + N Total harmonic distortion plus noise RRLL = 11 kkΩΩ,, AV = 10 25°C 0.08% CL = 100 pF AV = 100 25°C 0.55% Gain-bandwidth product f = 10 kHz, RL = 1 kΩ, 25°C 4.7 MHz CL = 100 pF BOM Maximum output swing bandwidth VROL (=P 1P )k =Ω ,2 V, ACVL == 11,00 pF 25°C 1 MHz AV = –1, to 0.1% 25°C 1.6 Step = 0.5 V to 2.5 V, tts SSeettttlliinngg ttiimmee RL = 1 kΩ, µµss to 0.01% 25°C 2.2 CL = 100 pF φm Phase margin at unity gain RL = 1 kΩ, CL = 100 pF 25°C 74 Calibration time 25°C 300 ms †Full range is –40°C to 125°C. NOTE 4: RL and CL values are referenced to 2.5 V. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 electrical characteristics at specified free-air temperature, V = 5 V, GND = 0 (unless otherwise DD noted) TLC4502Q, PARAMETER TEST CONDITIONS TAA† TLC4502M UNIT MIN TYP MAX VVIIOO IInnppuutt ooffffsseett vvoollttaaggee VVDDICDD = = 0 ±,2.5 V,, VROOS == 500,, Ω TTLLCC44550022A FFuullll rraannggee ––15000 1100 15000 µµVV ααVVIIOO Temperature coefficient of input FFuullll rraannggee 11 µµVV//°°CC offset voltage IIIIOO IInnppuutt ooffffsseett ccuurrrreenntt VVVDDICDD = = 0 ±±,22..55 VV,, VVROOS == 5000,, Ω 12255°°CC 1 650 nnAA 25°C 1 60 IIIIBB IInnppuutt bbiiaass ccuurrrreenntt nnAA 125°C 10 IOH = – 500 µA 25°C 4.99 VOH High-level output voltage 25°C 4.9 V IIOOHH == – 55 mmAA Full range 4.7 VIC = 2.5 V, IOL = 500 µA 25°C 0.01 VOL Low-level output voltage 25°C 0.1 V VVIICC == 22.55 VV, IIOOLL == 55 mmAA Full range 0.3 AAVVDD Laamrpggleif-icsaiggtnioanl differential voltagge VRIILCC = = 1 2 k.5Ω ,V,, VSOOee = N 1o tVe t4o 4 V,, Fu2ll 5ra°Cnge 220000 1000 VV//mmVV RI(D) Differential input resistance 25°C 10 kΩ RL Input resistance See Note 4 25°C 1012 Ω CL Common-mode input capacitance f = 10 kHz, P package 25°C 8 pF zO Closed-loop output impedance AV = 10, f = 100 kHz 25°C 1 Ω CCMMRRRR CCoommmmoonn-mmooddee rreejjeeccttiioonn rraattiioo VIICC = 0 to 2.7 V,, VOO = 2.5 V,, 25°C 90 100 ddBB RS = 1 kΩ Full range 85 kkSSVVRR S(∆uVpDpDlyy-±vo/∆ltVaggIOe) rejjection ratio VNDDo DDlo a=d 4 V to 6 V,, VIICC = VDDDD /2,, Fu2ll 5ra°Cnge 9900 100 ddBB 25°C 2.5 3.5 IIDDDD SSuuppppllyy ccuurrrreenntt VVOO == 22.55 VV, NNoo llooaadd mmAA Full range 4 VVIITT((CCAALL)) CCaalliibbrraattiioonn iinnppuutt tthhrreesshhoolldd vvoollttaaggee FFuullll rraannggee 44 VV †Full range is –40°C to 125°C for Q suffix, –55°C to 125°C for M suffix. NOTE 4: RL and CL values are referenced to 2.5 V. 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 operating characteristics, V = 5 V DD TLC4502Q, TLC4502M, TLC4502AQ, PARAMETER TEST CONDITIONS TA† TLC4502AM UNIT MIN TYP MAX SSRR SSlleeww rraattee aatt uunniittyy ggaaiinn VOO = 0.5 V to 2.5 V,, CLL = 100 pF 25°C 1.5 2.5 V/µs See Note 4 Full range 1 V/µs f = 10 Hz 25°C 70 VVn EEqquuiivvaalleenntt iinnppuutt nnooiissee vvoollttaaggee nnVV//√√HHz f = 1 kHz 25°C 12 Peak-to-peak eqquivalent input noise f = 0.1 to 1 Hz 25°C 1 VVNN((PPPP)) µµVV voltage f = 0.1 to 10 Hz 25°C 1.5 In Equivalent input noise current 25°C 0.6 fA/√Hz VO = 0.5 V to 2.5 V, AV = 1 25°C 0.02% ff = 1100 kkHHz, THD + N Total harmonic distortion plus noise RRLL = 11 kkΩΩ,, AV = 10 25°C 0.08% CL = 100 pF AV = 100 25°C 0.55% Gain-bandwidth product f = 10 kHz, RL = 1 kΩ, 25°C 4.7 MHz CL = 100 pF BOM Maximum output swing bandwidth VROL (=P 1P )k =Ω ,2 V, ACVL == 11,00 pF 25°C 1 MHz AV = –1, to 0.1% 25°C 1.6 Step = 0.5 V to 2.5 V, tts SSeettttlliinngg ttiimmee RL = 1 kΩ, µµss to 0.01% 25°C 2.2 CL = 100 pF φm Phase margin at unity gain RL = 1 kΩ, CL = 100 pF 25°C 74 Calibration time 25°C 300 ms †Full range is –40°C to 125°C for Q suffix, –55°C to 125°C for M suffix. NOTE 4: RL and CL values are referenced to 2.5 V. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 TYPICAL CHARACTERISTICS Table of Graphs FIGURE Distribution 2, 3, 4 VVIIOO IInnppuutt ooffffsseett vvoollttaaggee vs Common-mode input voltage 5 αVIO Input offset voltage temperature coefficient Distribution 6, 7 VOH High-level output voltage vs High-level output current 8 VOL Low-level output voltage vs Low-level output current 9 VO(PP) Maximum peak-to-peak output voltage vs Frequency 10 IOS Short-circuit output current vs Free-air temperature 11 VO Output voltage vs Differential input voltage 12 vs Free-air temperature 13 AAVVDD LLaarrggee-ssiiggnnaall ddiiffffeerreennttiiaall vvoollttaaggee aammpplliiffiiccaattiioonn vs Frequency 14 zo Output impedance vs Frequency 15 vs Freqquencyy 16 CCMMRRRR CCoommmmoonn-mmooddee rreejjeeccttiioonn rraattiioo vs Free-air temperature 17 vs Load capacitance 18 SSRR SSlleeww rraattee vs Free-air temperature 19 Inverting large-signal pulse response 20 Voltage-follower large-signal pulse response 21 Inverting small-signal pulse response 22 Voltage-follower small-signal pulse response 23 Vn Equivalent input noise voltage vs Frequency 24 Input noise voltage Over a 10-second period 25 THD + N Total harmonic distortion plus noise vs Frequency 26 Gain-bandwidth product vs Free-air temperature 27 vs Load capacitance 28 φφm PPhhaassee mmaarrggiinn vs Frequency 14 Gain margin vs Load capacitance 29 PSRR Power-supply rejection ratio vs Free-air temperature 30 Calibration time at –40°C 31 Calibration time at 25°C 32 Calibration time at 85°C 33 Calibration time at 125°C 34 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLC4502 INPUT DISTRIBUTION OF TLC4502 INPUT OFFSET VOLTAGE OFFSET VOLTAGE 18 14 339 Amplifier From 2 Wafer Lot 486 Amplifier From 8 Wafer Lot 16 VDD =± 2.5 V VDD =± 2.5 V % TA = 40°C 12 TA = 25°C n – 14 % mplificatio 1102 mplifiers – 180 A A Of 8 of e e 6 g g a a nt 6 nt e e c c 4 er er P 4 P 2 2 0 0 –40 –30 –20 –10 0 10 20 30 40 –60 –50 –40 –30 –20 –10 0 10 20 30 40 50 60 VIO – Input Offset Voltage – µV VIO – Input Offset Voltage – µV Figure 2 Figure 3 INPUT OFFSET VOLTAGE DISTRIBUTION OF TLC4502 INPUT vs OFFSET VOLTAGE COMMON-MODE INPUT VOLTAGE 16 200 296 Amplifier From 2 Wafer Lot % 14 VTAD D= =85±° C2.5 V 150 TVRADS D == =255 0±° CΩ2.5 V n – 12 µV 100 o – ati ge plific 10 Volta 50 ntage Of Am 86 nput Offset –500 erce 4 – IO –100 P VI 2 –150 0 –200 50 40 30 20 10 0 10 20 30 40 50 –3 –2 –1 0 1 2 3 – – – – – VIO – Input Offset Voltage – µV VIC – Common-Mode Input Voltage – v Figure 4 Figure 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLC4502 INPUT OFFSET DISTRIBUTION OF TLC4502 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT VOLTAGE TEMPERATURE COEFFICIENT 25 20 30 Amplifiers From 1 Wafer Lot 30 Amplifiers From VDD =± 2.5 V 18 1 Wafer Lot TA = 25°C To –40°C VDD =± 2.5 V % 20 % 16 TA = 25°C To 85°C – – s s 14 r r e e plifi 15 plifi 12 m m A A Of Of 10 ge 10 ge 8 a a nt nt ce ce 6 r r e e P P 5 4 2 0 0 –3 –2 –1 0 1 2 3 5 3 5 2 5 1 5 0 5 1 5 2 5 3 5 αVIO – Temperature Coefficient – µV/°C –3. –α–2.VIO– – T–1.em–per–0.ature C0.oeffici1.ent – µ2.V/°C 3. Figure 6 Figure 7 HIGH-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE vs vs HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT CURRENT 5 2 TA = –40°C VDD = 5 V VDD = 5 V – V 4.5 VIC = 2.5 V – V 1.75 VIC = 2.5 V TA = 125°C e 4 e ag TA = 125°C ag 1.5 olt 3.5 olt TA = 85°C utput V 3 TA =T A2 5=° C85°C utput V 1.25 TA = 25°C el O 2.5 el O 1 v v Le 2 Le 0.75 h- w- Hig 1.5 Lo TA = –40°C ÁH – HÁ 1 – OL 0.5 ÁVVOOÁ V 0.25 0.5 0 0 0 10 20 30 40 50 60 70 80 0 10 20 30 40 50 60 70 80 IOH – High-Level Output Current – mA IOL – Low-Level Output Current – mA Figure 8 Figure 9 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 TYPICAL CHARACTERISTICS MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE SHORT-CIRCUIT OUTPUT CURRENT vs vs FREQUENCY FREE-AIR TEMPERATURE – V 10 69 ge VDD = 5 V olta mA 67 IOS+ put V 8 nt – ut re 65 k O Cur IOS– Pea 6 put 63 o- ut T O ak- uit 61 Pe 4 rc m Ci mu ort- 59 Maxi 2 – Sh – S 57 P) O P I VO( 0 55 100 1 k 10 k 100 k 1 M 10 M –50 –25 0 25 50 75 100 f – Frequency – Hz TA – Free-Air Temperature – °C Figure 10 Figure 11 LARGE-SIGNAL DIFFERENTIAL OUTPUT VOLTAGE VOLTAGE AMPLIFICATION vs vs DIFFERENTIAL INPUT VOLTAGE FREE-AIR TEMPERATURE 3 1600 VVDICD = = 2 5.5 V V RL = 1 kΩ 1400 2 RL = 1 kΩ TA = 25°C V ntial mV 1200 e – 1 ere – V/ put Voltag 0 Signal Diff plification 1800000 ut e- m O g A 600 – –1 ar e VO – LDoltag 400 VV –2 A 200 –3 0 –0.2 –0.15 –0.1 –0.05 0 0.05 0.1 0.15 0.2 –55 –30 –5 20 45 70 95 120 VID – Differential Input Voltage – mV TA – Free-Air Temperature – °C Figure 12 Figure 13 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE MARGIN vs FREQUENCY 80 180° VDD = 5 V RL = 1 kΩ 60 CL = 100 pF 135° al TA = 25°C Signal Differenti mplification – dB 2400 9405°° hase Margin e- A P rg e La ag 0 0° – DVolt V A –20 –45° –40 –90° 1 k 10 k 100 k 1 M 10 M 100 M f – Frequency – Hz Figure 14 OUTPUT IMPEDANCE vs FREQUENCY 1000 100 Ω – e 10 c n a d e p m 1 put I AV = 100 ut O 0.1 – O AV = 10 z 0.01 AV = 1 0.001 100 1 k 10 k 100 k 1 M f – Frequency – Hz Figure 15 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 TYPICAL CHARACTERISTICS COMMON-MODE REJECTION RATIO COMMON-MODE REJECTION RATIO vs vs FREQUENCY FREE-AIR TEMPERATURE 110 130 B VDD = 5 V B VDD = 5 V o – d 100 TVAIC = = 2 25.°5C V o – d 125 ati 90 ati R R 120 on 80 on ejecti 70 ejecti 115 R R de 60 de 110 o o M M on- 50 on- 105 m m m 40 m o o C C 100 – 30 – R R R R 95 M 20 M C C 10 90 100 1 k 10 k 100 k 1 M 10 M –50 –25 0 25 50 75 100 125 f – Frequency – Hz TA – Free-Air Temperature – °C Figure 16 Figure 17 SLEW RATE SLEW RATE vs vs LOAD CAPACITANCE FREE-AIR TEMPERATURE 6 8 VDD = 5 V RL = 1 kΩ 5 CL = 100 pF AV = 1 SR– 6 s s µV/ 4 µV/ Rate – 3 SR– SR+ Rate – 4 w w R – Sle 2 R – Sle SR+ S S 2 1 0 0 10 100 1 k 10 k 100 k –50 –25 0 25 50 75 100 125 CL – Load Capacitance – pF TA – Free-Air Temperature – °C Figure 18 Figure 19 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 TYPICAL CHARACTERISTICS VOLTAGE-FOLLOWER LARGE-SIGNAL INVERTING LARGE-SIGNAL PULSE RESPONSE PULSE RESPONSE 4.5 4.5 4 4 3.5 3.5 V V – – ge 3 ge 3 a a olt olt V V ut 2.5 ut 2.5 p p ut ut O 2 O 2 – – O VDD = 5 V O V 1.5 CRLL == 110 k0Ω pF V 1.5 VRDL D= =1 5k ΩV 1 ATAV == 2–51°C 1 ATCAVL === 21150°0C pF 0.5 0.5 0 25 50 75 100 125 150 175 200 0 25 50 75 100 125 150 175 200 t – Time – µs t – Time – µs Figure 20 Figure 21 VOLTAGE-FOLLOWER SMALL-SIGNAL INVERTING SMALL-SIGNAL PULSE RESPONSE PULSE RESPONSE 2.525 2.53 VDD = 5 V 2.52 RL = 1 kΩ 2.515 2.52 CL = 100 pF AV = 1 V 2.51 V TA = 25°C – Output Voltage – O 222..542.409.5955 VDD = 5 V – Output Voltage – O 222..45.591 V 2.485 RL = 1 kΩ V CL = 100 pF 2.48 2.48 AV = –1 2.475 TA 25°C 2.47 2.47 0 20 40 60 80 100 120 140 160 180 200 0 50 100 150 200 250 t – Time – µs t – Time – µs Figure 22 Figure 23 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 TYPICAL CHARACTERISTICS EQUIVALENT INPUT NOISE VOLTAGE vs INPUT NOISE VOLTAGE OVER FREQUENCY A 10-SECOND PERIOD 100 1200 HzHz 90 VRDSD = =2 05 ΩV Vf =D D0. 1= H5 zV To 10 Hz nv//nV/ TA = 25°C TA = 25°C – 80 ge V e Volta 6700 age – n 400 ut Nois 50 se Volt p oi n 40 N nt I ut –400 e 30 p val In ui 20 q E – N n 10 VV 0 –1200 10 100 1 k 10 k 100 k 0 1 2 3 4 5 6 7 8 9 10 f – Frequency – Hz t – Time – s Figure 24 Figure 25 TOTAL HARMONIC DISTORTION PLUS NOISE GAIN-BANDWIDTH PRODUCT vs vs FREQUENCY FREE-AIR TEMPERATURE % 1 6 – VDD = 5 V VDD = 5 V se RL = 1 kΩ TIED 2.5 V F = 10 kHz Noi RL = 1 kΩ on Plus AV = 100 ct – MHz 5.5 CL = 100 pF storti rodu onic Di 0.1 AV = 10 width P 5 m d r n a a H B Total Gain- 4.5 N – AV = 1 + D H T 0.01 4 100 1 k 10 k 100 k –40 –25 0 25 50 75 85 f – Frequency – Hz TA – Free-Air Temperature –°C Figure 26 Figure 27 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 TYPICAL CHARACTERISTICS PHASE MARGIN GAIN MARGIN vs vs LOAD CAPACITANCE LOAD CAPACITANCE 90 30 TA 25°C 75 25 Rnull = 50 Ω 60 B 20 n d gi – e Mar 45 Rnull = 20 Ω argin 15 Rnull = 50 Ω has n M Rnull = 20 Ω P ai 30 G 10 50 kΩ Rnull = 0 15 50 kΩ VDD+ Rnull 5 Rnull = 0 VI – + CL VDD– 0 0 10 100 1 k 10 k 100 k 10 100 1 k 10 k 100 k CL – Load Capacitance – pF CL – Load Capacitance – pF Figure 28 Figure 29 POWER SUPPLY REJECTION RATIO vs FREE-AIR TEMPERATURE CALIBRATION TIME AT –40°C 130 0.5 VDD = 4 V To 6 V B d VIC = VO = VDD/2 o – 125 0 ati R ction 120 ge – V –0.5 e a Rej Volt –1 ply 115 ut p p –1.5 u ut S O er 110 – ow VO –2 VDD = 2.5 V P GND = –2.5 V R – 105 RL = 1 kΩ to GND SR –2.5 AV = –1 P VI = 0 100 –3 –50 –25 0 25 50 75 100 125 0 100 200 300 400 500 600 700 800 900 1000 TA – Free-Air Temperature – °C t – Time – ms Figure 30 Figure 31 18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 TYPICAL CHARACTERISTICS CALIBRATION TIME AT 25°C CALIBRATION TIME AT 85°C 0.5 0.5 0 0 Output Voltage – V ––10–..155 Output Voltage – V ––10–..155 V– O –2 VGDNDD == 2–.25. 5V V V– O –2 VGDNDD == 2–.25. 5V V RL = 1 kΩ to GND RL = 1 kΩ to GND –2.5 AV = –1 –2.5 AV = –1 VI = 0 VI = 0 –3 –3 0 100 200 300 400 500 600 700 800 900 1000 0 100 200 300 400 500 600 700 800 900 1000 t – Time – ms t – Time – ms Figure 32 Figure 33 CALIBRATION TIME AT 125°C 0.5 0 V –0.5 – e g a olt –1 V ut p ut –1.5 O – O V –2 VDD = 2.5 V GND = –2.5 V RL = 1 kΩ to GND –2.5 AV = –1 VI = 0 –3 0 100 200 300 400 500 600 700 800 900 1000 t – Time – ms Figure 34 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 19

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 APPLICATION INFORMATION (cid:0) The TLC4502 is designed to operate with only a single 5-V power supply, have true differential inputs, and remain in the linear mode with an input common-mode voltage of 0. (cid:0) The TLC4502 has a standard dual-amplifier pinout, allowing for easy design upgrades. (cid:0) Large differential input voltages can be easily accommodated and, as input differential-voltage protection diodes are not needed, no large input currents result from large differential input voltage. Protection should be provided to prevent the input voltages from going negative more than –0.3 V at 25°C. An input clamp diode with a resistor to the device input terminal can be used for this purpose. (cid:0) For ac applications, where the load is capacitively coupled to the output of the amplifier, a resistor can be used from the output of the amplifier to ground. This increases the class-A bias current and prevents crossover distortion. Where the load is directly coupled, for example in dc applications, there is no crossover distortion. (cid:0) Capacitive loads, which are applied directly to the output of the amplifier, reduce the loop stability margin. Values of 500 pF can be accommodated using the worst-case noninverting unity-gain connection. Resistive isolation should be considered when larger load capacitance must be driven by the amplifier. The following typical application circuits emphasize operation on only a single power supply. When complementary power supplies are available, the TLC4502 can be used in all of the standard operational amplifier circuits. In general, introducing a pseudo-ground (a bias voltage of V/2 like that generated by the I TLE2426) allows operation above and below this value in a single-supply system. Many application circuits shown take advantage of the wide common-mode input-voltage range of the TLC4502, which includes ground. In most cases, input biasing is not required and input voltages that range to ground can easily be accommodated. description of calibration procedure To achieve high dc gain, large bandwidth, high CMRR and PSRR, as well as good output drive capability, the TLC4502 is built around a 3-stage topology: two gain stages, one rail-to-rail, and a class-AB output stage. A nested Miller topology is used for frequency compensation. During the calibration procedure, the operational amplifier is removed from the signal path and both inputs are tied to GND. Figure 35 shows a block diagram of the amplifier during calibration mode. 20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 VDD POWER-ON RESET S Q ENABLE COUNTER RC RCO R Q OSCILLATOR – CLOCK CAL CORE RESET DAC AMPLIFIER SAR + LPF RCO Figure 35. Block Diagram During Calibration Mode The class AB output stage features rail-to-rail voltage swing and incorporates additional switches to put the output node into a high-impedance mode during the calibration cycle. Small-replica output transistors (matched to the main output transistors) provide the amplifier output signal for the calibration circuit. The TLC4502 also features built-in output short-circuit protection. The output current flowing through the main output transistors is continuously being sensed. If the current through either of these transistors exceeds the preset limit (60 mA – 70 mA) for more than about 1 µs, the output transistors are shut down to approximately their quiescent operating point for approximately 5 ms. The device is then returned to normal operation. If the short circuit is still in place, it is detected in less than 1 µs and the device is shut down for another 5 ms. The offset cancellation uses a current-mode digital-to-analog converter (DAC), whose full-scale current allows for an adjustment of approximately ±5 mV to the input offset voltage. The digital code producing the cancellation current is stored in the successive-approximation register (SAR). During power up, when the offset cancellation procedure is initiated, an on-chip RC oscillator is activated to provide the timing of the successive-approximation algorithm. To prevent wide-band noise from interfering with the calibration procedure, an analog low-pass filter followed by a Schmitt trigger is used in the decision chain to implement an averaging process. Once the calibration procedure is complete, the RC oscillator is deactivated to reduce supply current and the associated noise. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 21

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 APPLICATION INFORMATION The key operational-amplifier parameters CMRR, PSRR, and offset drift were optimized to achieve superior offset performance. The TLC4502 calibration DAC is implemented by a binary-weighted current array using a pseudo-R-2R MOSFET ladder architecture, which minimizes the silicon area required for the calibration circuitry, and thereby reduces the cost of the TLC4502. Due to the performance (precision, PSRR, CMRR, gain, output drive, and ac performance) of the TLC4502, it is ideal for applications like: (cid:0) Data acquisition systems (cid:0) Medical equipment (cid:0) Portable digital scales (cid:0) Strain gauges (cid:0) Automotive sensors (cid:0) Digital audio circuits (cid:0) Industrial control applications It is also ideal in circuits like: (cid:0) A precision buffer for current-to-voltage converters, a/d buffers, or bridge applications (cid:0) High-impedance buffers or preamplifiers (cid:0) Long term integration (cid:0) Sample-and-hold circuits (cid:0) Peak detectors The TLC4502 self-calibrating operational amplifier is manufactured using Texas instruments LinEPIC process technology and is available in an 8-pin SOIC (D) Package. The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized for operation from –40°C to 125°C. The M-suffix devices are characterized for operation from –55°C to 125°C. 22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 APPLICATION INFORMATION R1 R2 R3 R4 R5 R6 V(REF)+ 90 kΩ 9 kΩ 1 kΩ 1 kΩ 9 kΩ 90 kΩ V(REF)– Gain = 10 Gain = 100 Gain = 100 Gain = 10 VVDDDD 0.1 pF 8 2 – 6 – 1/2 1 1/2 7 TLC4502 TLC4502 VO+ RP 3 5 VO– VI2 + + 4 1 kΩ RP VI1 1 kΩ (Gain (cid:2) 10) VO (cid:2) (cid:5)VI1(cid:1)VI2(cid:6)(cid:5)1(cid:0)R4R(cid:0)6R5(cid:6)(cid:0)V(REF) WhereR1(cid:2)R6,R2(cid:2)R5,andR3(cid:2)R4 (Gain (cid:2) 100) VO (cid:2) (cid:5)VI1(cid:1)VI2(cid:6)(cid:5)1(cid:0)R5R(cid:0)4R6(cid:6)(cid:0)V(REF) WhereR1(cid:2)R6,R2(cid:2)R5,andR3(cid:2)R4 Figure 36. Single-Supply Programmable Instrumentation Amplifier Circuit RP1 < 1 kΩ 5 + VI RP2 < 1 kΩ 3 + 1/2 TLC4502 VO 7 R3 1/2 6 TLC4502 1 – 4 2 – R4 R2 RG R1 VO (cid:2) VI(cid:3)(cid:5)1(cid:0)RR43(cid:6)(cid:0)(cid:5)2RR4(cid:6)(cid:4)(cid:0)V(REF) G V(REF) Where: R1 (cid:2) R4 and R2 (cid:2) R3 Figure 37. Two Operational-Amplifier Instrumentation Amplifier Circuit POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 23

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 APPLICATION INFORMATION 3 + R3 R5 1/2 TLC4502 1 2 – R1 2 – 1/2 VI RG TLC4502 VO R2 1 3 + 6 – R4 1/2 TLC4502 7 5 + R6 VO (cid:1) VI(cid:2)RR53(cid:3)(cid:2)2RR1(cid:0)1(cid:3)(cid:0) V(REF) V(REF) G Where: R1 (cid:1) R2, R3 (cid:1) R4, and R5 (cid:1) R6 Figure 38. Three Operational-Amplifier Instrumentation Amplifier Circuit VI R1 R4 2 – 1/2 1 R5 R2 TLC4502 3 + I1 I2 R3 Figure 39. Fixed Current-Source Circuit 24 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 APPLICATION INFORMATION 2 – 1/2 1 TLC4502 VO 3 VI + (cid:0) V V I O Figure 40. Voltage-Follower Circuit VI 2 – β ≥20 30 mA 1/2 600 mA TLC4502 1 100 Ω 3 + Figure 41. Lamp-Driver Circuit 2 – 1/2 1 TLC4502 3 + RL 240 Ω Figure 42. TTL-Driver Circuit POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 25

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 APPLICATION INFORMATION IO 3 + VI 1/2 1 TLC4502 2 – V RE (cid:0) I I O R E Figure 43. High-Compliance Current-Sink Circuit 2 – VI 1/2 1 R1 TLC4502 VO 10 kΩ 3 V(REF) + R2 10 MΩ Figure 44. Comparator With Hysteresis Circuit IB 6 – 2 – 1/2 7 IB TLC4502 VO ZO 1/2 1 5 TLC4502 + VI 3 + C1 1 µF ZI Figure 45. Low-Drift Detector Circuit 26 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS221B – MAY 1998 – REVISED APRIL 2001 APPLICATION INFORMATION macromodel information Macromodel information provided was derived using Microsim Parts Release 8, the model generation software used with Microsim PSpice. The Boyle macromodel (see Note 4) and subcircuit in Figure 46 are generated using the TLC4501 typical electrical and operating characteristics at T = 25°C. Using this A information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases): (cid:0) (cid:0) Maximum positive output voltage swing Unity-gain frequency (cid:0) (cid:0) Maximum negative output voltage swing Common-mode rejection ratio (cid:0) (cid:0) Slew rate Phase margin (cid:0) (cid:0) Quiescent power dissipation DC output resistance (cid:0) (cid:0) Input bias current AC output resistance (cid:0) (cid:0) Open-loop voltage amplification Short-circuit output current limit NOTE 4: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal of Solid-State Circuits, SC-9, 353 (1974). 99 EGND + FB RO2 – C2 3 R2 6 7 VDD+ + + ISS RSS CSS VD 9 + VLIM RP – VB GCM GA 8 – 2 10 53 – IN– DC RO1 J1 J2 IN+ OUT 1 11 12 DE DLN 5 92 C1 54 DP 90 91 RD1 RD2 + + + – DLP VE HLIM VLP VLN 4 – – – + VDD– .subckt TLC4501 1 2 3 4 5 r2 6 9 100.00E3 * rd1 3 11 4.2328E3 c1 11 12 1.4559E–12 rd2 3 12 4.2328E3 c2 6 7 8.0000E–12 ro1 8 5 5.0000E–3 css 10 99 1.0000E–30 ro2 7 99 5.0000E–3 dc 5 53 dy rp 3 4 5.0000E3 de 54 5 dy rss 10 99 10.000E6 dlp 90 91 dx vb 9 0 dc 0 dln 92 90 dx vc 3 53 dc .92918 dp 4 3 dx ve 54 4 dc .82918 egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5 vlim 7 8 dc 0 fb 7 99 poly(5) vb vc ve vlp vln 0 vlp 91 0 dc 67 + 84.657E9 –1E3 1E3 85E9 –85E9 vln 0 92 dc 67 ga 6 0 11 12 236.25E–6 .model dx D(Is=800.00E–18) gcm 0 6 10 99 2.3625E–9 .model dy D(Is=800.00E–18 Rs=1m Cjo=10p) iss 10 4 dc 20.000E–6 .model jx1 NJF(Is=500.00E–15 Beta=2.7907E–3 Vto=–1) hlim 90 0 vlim 1K .model jx2 NJF(Is=500.00E–15 Beta=2.7907E–3 Vto=–1) j1 11 2 10 jx1 .ends j2 12 1 10 jx2 Figure 46. Boyle Macromodel and Subcircuit PSpice and Parts are trademarks of MicroSim Corporation. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 27

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) 5962-9753701QPA ACTIVE CDIP JG 8 1 TBD Call TI N / A for Pkg Type -55 to 125 9753701QPA TLC4502M 5962-9753702QHA ACTIVE CFP U 10 1 TBD Call TI N / A for Pkg Type -55 to 125 9753702QHA TLC4502AM 5962-9753702QPA ACTIVE CDIP JG 8 1 TBD Call TI N / A for Pkg Type -55 to 125 9753702QPA TLC4502AM TLC4501ACD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 4501AC & no Sb/Br) TLC4501AID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 4501AI & no Sb/Br) TLC4501AIDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 4501AI & no Sb/Br) TLC4501CD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 4501C & no Sb/Br) TLC4501CDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 4501C & no Sb/Br) TLC4501ID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 4501I & no Sb/Br) TLC4501IDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 4501I & no Sb/Br) TLC4501IDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 4501I & no Sb/Br) TLC4502ACD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 4502AC & no Sb/Br) TLC4502ACDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 4502AC & no Sb/Br) TLC4502AID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 4502AI & no Sb/Br) TLC4502AIDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 4502AI & no Sb/Br) TLC4502AMD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 4502AM & no Sb/Br) TLC4502AMJGB ACTIVE CDIP JG 8 1 TBD Call TI N / A for Pkg Type -55 to 125 9753702QPA TLC4502AM Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TLC4502AMUB ACTIVE CFP U 10 1 TBD Call TI N / A for Pkg Type -55 to 125 9753702QHA TLC4502AM TLC4502CD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 4502C & no Sb/Br) TLC4502CDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 4502C & no Sb/Br) TLC4502ID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 4502I & no Sb/Br) TLC4502IDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 4502I & no Sb/Br) TLC4502IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 4502I & no Sb/Br) TLC4502MDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 4502M & no Sb/Br) TLC4502MJGB ACTIVE CDIP JG 8 1 TBD Call TI N / A for Pkg Type -55 to 125 9753701QPA TLC4502M TLC4502QD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 C4502Q & no Sb/Br) TLC4502QDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM C4502Q & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TLC4502, TLC4502A, TLC4502AM, TLC4502M : •Catalog: TLC4502A, TLC4502 •Military: TLC4502M, TLC4502AM NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product •Military - QML certified for Military and Defense Applications Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TLC4501AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLC4501IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLC4502ACDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLC4502AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLC4502CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLC4502IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TLC4501AIDR SOIC D 8 2500 340.5 338.1 20.6 TLC4501IDR SOIC D 8 2500 340.5 338.1 20.6 TLC4502ACDR SOIC D 8 2500 350.0 350.0 43.0 TLC4502AIDR SOIC D 8 2500 350.0 350.0 43.0 TLC4502CDR SOIC D 8 2500 350.0 350.0 43.0 TLC4502IDR SOIC D 8 2500 350.0 350.0 43.0 PackMaterials-Page2

PACKAGE OUTLINE U0010A CFP - 2.03 mm max height SCALE 1.400 CERAMIC FLATPACK .27 MAX .045 MAX .010 .002 PIN 1 ID GLASS .005 MIN TYP TYP 1 10 8X .050 .005 .27 MAX GLASS 10X .017 .002 5 6 +.019 5X .32 .01 .241 5X .32 .01 -.003 .005 .001 +.013 .067 -.012 .045 .026 4225582/A 01/2020 NOTES: 1. All linear dimensions are in inches. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. www.ti.com

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

MECHANICAL DATA MCER001A – JANUARY 1995 – REVISED JANUARY 1997 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE 0.400 (10,16) 0.355 (9,00) 8 5 0.280 (7,11) 0.245 (6,22) 1 4 0.065 (1,65) 0.045 (1,14) 0.063 (1,60) 0.020 (0,51) MIN 0.310 (7,87) 0.015 (0,38) 0.290 (7,37) 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0°–15° 0.015 (0,38) 0.100 (2,54) 0.014 (0,36) 0.008 (0,20) 4040107/C 08/96 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification. E. Falls within MIL STD 1835 GDIP1-T8 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

IMPORTANTNOTICEANDDISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2020, Texas Instruments Incorporated