TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 (cid:1) Trimmed Offset Voltage: D, JG, P, OR PW PACKAGE TLC277...500 µV Max at 25°C, (TOP VIEW) V = 5 V DD (cid:1) 1OUT 1 8 VDD Input Offset Voltage Drift...Typically 0.1 µV/Month, Including the First 30 Days 1IN– 2 7 2OUT 1IN+ 3 6 2IN– (cid:1) Wide Range of Supply Voltages Over GND 4 5 2IN+ Specified Temperature Range: 0°C to 70°C...3 V to 16 V –40°C to 85°C...4 V to 16 V –55°C to 125°C...4 V to 16 V FK PACKAGE (cid:1) Single-Supply Operation (TOP VIEW) (cid:1) Common-Mode Input Voltage Range T U D Extends Below the Negative Rail (C-Suffix, C O C DC N 1 NV N I-Suffix types) (cid:1) Low Noise...Typically 25 nV/√Hz at 3 2 1 20 19 NC 4 18 NC f = 1 kHz 1IN– 5 17 2OUT (cid:1) Output Voltage Range Includes Negative NC 6 16 NC Rail 1IN+ 7 15 2IN– (cid:1) High Input impedance...1012 Ω Typ NC 8 14 NC (cid:1) 9 10 11 12 13 ESD-Protection Circuitry (cid:1) Small-Outline Package Option Also C D C+ C N N NN N Available in Tape and Reel G 2I (cid:1) Designed-In Latch-Up Immunity NC – No internal connection description The TLC272 and TLC277 precision dual operational amplifiers combine a wide range of DISTRIBUTION OF TLC277 input offset voltage grades with low offset voltage INPUT OFFSET VOLTAGE drift, high input impedance, low noise, and speeds 30 approaching those of general-purpose BiFET 473 Units Tested From 2 Wafer Lots VDD = 5 V devices. 25 TA = 25°C P Package These devices use Texas Instruments silicon- goaffstee t LvionlCtaMgeO sStab iltietyc hfanro eloxgcye, edwinhgic hth ep srotavbidileitsy s – % 20 nit available with conventional metal-gate pro- U cesses. e of 15 g The extremely high input impedance, low bias nta currents, and high slew rates make these cost- ce 10 r effective devices ideal for applications previously Pe reserved for BiFET and NFET products. Four offset voltage grades are available (C-suffix and 5 I-suffix types), ranging from the low-cost TLC272 (10 mV) to the high-precision TLC277 (500 µV). 0 These advantages, in combination with good –800 –400 0 400 800 common-mode rejection and supply voltage VIO – Input Offset Voltage – µV rejection, make these devices a good choice for new state-of-the-art designs as well as for upgrading existing designs. LinCMOS is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright  2002, Texas Instruments Incorporated Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 description (continued) AVAILABLE OPTIONS PACKAGED DEVICES CCHHIIPP VIOmax SMALL CHIP CERAMIC PLASTIC TA AT 25°C OUTLINE CARRIER DIP DIP TSSOP FORM (PW) (Y) (D) (FK) (JG) (P) 550000 µµVV TTLLCC227777CCDD —— —— TTLLCC227777CCPP —— —— 22 mmVV TTLLCC227722BBCCDD — — TTLLCC227722BBCCPP — — 00°°CC ttoo 7700°°cc 55 mmVV TTLLCC227722AACCDD — — TTLLCC227722AACCPP — — 10mV TLC272CD — — TLC272CP TLC272CPW TLC272Y 550000 µµVV TTLLCC227777IIDD —— —— TTLLCC227777IIPP —— —— 22 mmVV TTLLCC227722BBIIDD — — TTLLCC227722BBIIPP — — –4400°°CC ttoo 8855°°CC 55 mmVV TTLLCC227722AAIIDD — — TTLLCC227722AAIIPP — — 10 mV TLC272ID — — TLC272IP — — The D package is available taped and reeled. Add R suffix to the device type (e.g., TLC277CDR). In general, many features associated with bipolar technology are available on LinCMOS operational amplifiers without the power penalties of bipolar technology. General applications such as transducer interfacing, analog calculations, amplifier blocks, active filters, and signal buffering are easily designed with the TLC272 and TLC277. The devices also exhibit low voltage single-supply operation, making them ideally suited for remote and inaccessible battery-powered applications. The common-mode input voltage range includes the negative rail. A wide range of packaging options is available, including small-outline and chip carrier versions for high-density system applications. The device inputs and outputs are designed to withstand –100-mA surge currents without sustaining latch-up. The TLC272 and TLC277 incorporate internal ESD-protection circuits that prevent functional failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2; however, care should be exercised in handling these devices as exposure to ESD may result in the degradation of the device parametric performance. The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized for operation from –40°C to 85°C. The M-suffix devices are characterized for operation over the full military temperature range of –55°C to 125°C. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 equivalent schematic (each amplifier) VDD P3 P4 R6 R1 R2 N5 IN– P5 P6 P1 P2 IN+ C1 R5 OUT N3 N1 N2 N4 N6 N7 R3 D1 R4 D2 R7 GND TLC272Y chip information This chip, when properly assembled, displays characteristics similar to the TLC272C. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS VDD (8) (3) 1IN+ + (1) 1OUT (2) 1IN– – (5) + 2IN+ (7) 2OUT (6) – 2IN– 60 (4) GND CHIP THICKNESS: 15 TYPICAL BONDING PADS: 4 × 4 MINIMUM TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS. 73 PIN (4) IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±V ID DD Input voltage range, V (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to V I DD Input current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5 mA I output current, I (each output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30 mA O Total current into V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 mA DD Total current out of GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 mA Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature, T : C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C A I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, P, or PW package . . . . . . . . . . . . 260°C Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package . . . . . . . . . . . . . . . . . . . . 300°C †Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to network ground. 2. Differential voltages are at IN+ with respect to IN–. 3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded (see application section). DISSIPATION RATING TABLE TA ≤ 25°C DERATING FACTOR TA = 70°C TA = 85°C TA = 125°C PACKAGE POWER RATING ABOVE TA = 25°C POWER RATING POWER RATING POWER RATING D 725 mW 5.8 mW/°C 464 mW 377 mW N/A FK 1375 mW 11 mW/°C 880 mW 715 mW 275 mW JG 1050 mW 8.4 mW/°C 672 mW 546 mW 210 mW P 1000 mW 8.0 mW/°C 640 mW 520 mW N/A PW 525 mW 4.2 mW/°C 336 mW N/A N/A recommended operating conditions C SUFFIX I SUFFIX M SUFFIX UUNNIITT MIN MAX MIN MAX MIN MAX Supply voltage, VDD 3 16 4 16 4 16 V VDD = 5 V –0.2 3.5 –0.2 3.5 0 3.5 CCoommmmoonn-mmooddee iinnppuutt vvoollttaaggee, VVIC VV VDD = 10 V –0.2 8.5 –0.2 8.5 0 8.5 Operating free-air temperature, TA 0 70 –40 85 –55 125 °C 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 electrical characteristics at specified free-air temperature, V = 5 V (unless otherwise noted) DD TLC272C, TLC272AC, PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† TLC272BC, TLC277C UUNNIITT MIN TYP MAX VVOO == 11..44 VV,, VVIICC == 00,, 25°C 1.1 10 TTLLCC227722CC RS = 50 Ω, RL = 10 kΩ Full range 12 mmVV VVOO == 11..44 VV,, VVIICC == 00,, 25°C 0.9 5 TTLLCC227722AACC RS = 50 Ω, RL = 10 kΩ Full range 6.5 VVIO IInnppuutt ooffffsseett vvoollttaaggee VVOO == 11..44 VV,, VVIICC == 00,, 25°C 230 2000 TTLLCC227722BBCC RS = 50 Ω, RL = 10 kΩ Full range 3000 µVV VVOO == 11..44 VV,, VVIICC == 00,, 25°C 200 500 TTLLCC227777CC RS = 50 Ω, RL = 10 kΩ Full range 1500 αVIO Temperature coefficient of input offset voltage 257°0C°C to 1.8 µV/°C 25°C 0.1 60 IIIO IInnppuutt ooffffsseett ccuurrrreenntt ((sseeee NNoottee 44)) 70°C 7 300 ppAA VVO = 22.55 VV, VVIC = 22.55 VV 25°C 0.6 60 IIIB IInnppuutt bbiiaass ccuurrrreenntt ((sseeee NNoottee 44)) 70°C 40 600 ppAA –0.2 –0.3 25°C to to V CCoommmmoonn-mmooddee iinnpuutt vvoollttaaggee rraannggee 4 4.2 VVICR (see Note 5) –0.2 Full range to V 3.5 25°C 3.2 3.8 VVOOHH HHiigghh-lleevveell oouuttpuutt vvoollttaaggee VVIIDD = 110000 mmVV,, RRLL = 1100 kkΩΩ 0°C 3 3.8 VV 70°C 3 3.8 25°C 0 50 VVOOLL LLooww-lleevveell oouuttpuutt vvoollttaaggee VVIIDD = –110000 mmVV,, IIOOLL = 00 0°C 0 50 mmVV 70°C 0 50 25°C 5 23 AAVVDD LLaarrggee-ssiiggnnaall ddiiffffeerreennttiiaall vvoollttaaggee aammplliiffiiccaattiioonn VVOO = 00..2255 VV ttoo 22 VV,, RRLL = 1100 kkΩΩ 0°C 4 27 VV//mmVV 70°C 4 20 25°C 65 80 CCMMRRRR CCoommmmoonn-mmooddee rreejjeeccttiioonn rraattiioo VVIICC = VVIICCRRmmiinn 0°C 60 84 ddBB 70°C 60 85 25°C 65 95 SSupplly-vollttage rejjecttiion rattiio kkSSVVRR ((∆∆VVDDDD//∆∆VVIIOO)) VVDDDD = 55 VV ttoo 1100 VV,, VVOO = 11..44 VV 0°C 60 94 ddBB 70°C 60 96 25°C 1.4 3.2 IDDDD Supplyy current ((two amplifiers)) VVO = 22.55 VV, VVIC = 22.55 VV, 0°C 1.6 3.6 mA NNoo llooaadd 70°C 1.2 2.6 †Full range is 0°C to 70°C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 electrical characteristics at specified free-air temperature, V = 10 V (unless otherwise noted) DD TLC272C, TLC272AC, PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† TLC272BC, TLC277C UUNNIITT MIN TYP MAX VVOO == 11..44 VV,, VVIICC == 00,, 25°C 1.1 10 TTLLCC227722CC RS = 50 Ω, RL = 10 kΩ Full range 12 mmVV VVOO == 11..44 VV,, VVIICC == 00,, 25°C 0.9 5 TTLLCC227722AACC RS = 50 Ω, RL = 10 kΩ Full range 6.5 VVIO IInnppuutt ooffffsseett vvoollttaaggee VVOO == 11..44 VV,, VVIICC == 00,, 25°C 290 2000 TTLLCC227722BBCC RS = 50 Ω, RL = 10 kΩ Full range 3000 µVV VVOO == 11..44 VV,, VVIICC == 00,, 25°C 250 800 TTLLCC227777CC RS = 50 Ω, RL = 10 kΩ Full range 1900 αVIO Temperature coefficient of input offset voltage 257°0C°C to 2 µV/°C 25°C 0.1 60 IIIO IInnppuutt ooffffsseett ccuurrrreenntt ((sseeee NNoottee 44)) 70°C 7 300 ppAA VVO = 55 VV, VVIC = 55 VV 25°C 0.7 60 IIIB IInnppuutt bbiiaass ccuurrrreenntt ((sseeee NNoottee 44)) 70°C 50 600 ppAA –0.2 –0.3 25°C to to V CCoommmmoonn-mmooddee iinnpuutt vvoollttaaggee rraannggee 9 9.2 VVICR (see Note 5) –0.2 Full range to V 8.5 25°C 8 8.5 VVOOHH HHiigghh-lleevveell oouuttpuutt vvoollttaaggee VVIIDD = 110000 mmVV,, RRLL = 1100 kkΩΩ 0°C 7.8 8.5 VV 70°C 7.8 8.4 25°C 0 50 VVOOLL LLooww-lleevveell oouuttpuutt vvoollttaaggee VVIIDD = –110000 mmVV,, IIOOLL = 00 0°C 0 50 mmVV 70°C 0 50 25°C 10 36 AAVVDD LLaarrggee-ssiiggnnaall ddiiffffeerreennttiiaall vvoollttaaggee aammplliiffiiccaattiioonn VVOO = 11 VV ttoo 66 VV,, RRLL = 1100 kkΩΩ 0°C 7.5 42 VV//mmVV 70°C 7.5 32 25°C 65 85 CCMMRRRR CCoommmmoonn-mmooddee rreejjeeccttiioonn rraattiioo VVIICC = VVIICCRRmmiinn 0°C 60 88 ddBB 70°C 60 88 25°C 65 95 SSupplly-vollttage rejjecttiion rattiio kkSSVVRR ((∆∆VVDDDD//∆∆VVIIOO)) VVDDDD = 55 VV ttoo 1100 VV,, VVOO = 11..44 VV 0°C 60 94 ddBB 70°C 60 96 25°C 1.9 4 IDDDD Supplyy current ((two amplifiers)) VVO = 55 VV, VVIC = 55 VV, 0°C 2.3 4.4 mA NNoo llooaadd 70°C 1.6 3.4 †Full range is 0°C to 70°C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 electrical characteristics at specified free-air temperature, V = 5 V (unless otherwise noted) DD TLC272I, TLC272AI, PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† TLC272BI, TLC277I UUNNIITT MIN TYP MAX VVOO == 11..44 VV,, VVIICC == 00,, 25°C 1.1 10 TTLLCC227722II RS = 50 Ω, RL = 10 kΩ Full range 13 mmVV VVOO == 11..44 VV,, VVIICC == 00,, 25°C 0.9 5 TTLLCC227722AAII RS = 50 Ω, RL = 10 kΩ Full range 7 VVIO IInnppuutt ooffffsseett vvoollttaaggee VVOO == 11..44 VV,, VVIICC == 00,, 25°C 230 2000 TTLLCC227722BBII RS = 50 Ω, RL = 10 kΩ Full range 3500 µVV VVOO == 11..44 VV,, VVIICC == 00,, 25°C 200 500 TTLLCC227777II RS = 50 Ω, RL = 10 kΩ Full range 2000 αVIO Temperature coefficient of input offset voltage 258°5C°C to 1.8 µV/°C 25°C 0.1 60 IIIO IInnppuutt ooffffsseett ccuurrrreenntt ((sseeee NNoottee 44)) 85°C 24 15 ppAA VVO = 22.55 VV, VVIC = 22.55 VV 25°C 0.6 60 IIIB IInnppuutt bbiiaass ccuurrrreenntt ((sseeee NNoottee 44)) 85°C 200 35 ppAA –0.2 –0.3 25°C to to V CCoommmmoonn-mmooddee iinnpuutt vvoollttaaggee rraannggee 4 4.2 VVICR (see Note 5) –0.2 Full range to V 3.5 25°C 3.2 3.8 VVOOHH HHiigghh-lleevveell oouuttpuutt vvoollttaaggee VVIIDD = 110000 mmVV,, RRLL = 1100 kkΩΩ –40°C 3 3.8 VV 85°C 3 3.8 25°C 0 50 VVOOLL LLooww-lleevveell oouuttpuutt vvoollttaaggee VVIIDD = –110000 mmVV,, IIOOLL = 00 –40°C 0 50 mmVV 85°C 0 50 25°C 5 23 LLarge-siignall ddiifffferenttiiall vollttage amplliiffiicattiion AAVVDD VVOO = 11 VV ttoo 66 VV,, RRLL = 1100 kkΩΩ –40°C 3.5 32 VV//mmVV 85°C 3.5 19 25°C 65 80 CCMMRRRR CCoommmmoonn-mmooddee rreejjeeccttiioonn rraattiioo VVIICC = VVIICCRRmmiinn –40°C 60 81 ddBB 85°C 60 86 25°C 65 95 SSupplly-vollttage rejjecttiion rattiio kkSSVVRR ((∆∆VVDDDD//∆∆VVIIOO)) VVDDDD = 55 VV ttoo 1100 VV,, VVOO = 11..44 VV –40°C 60 92 ddBB 85°C 60 96 25°C 1.4 3.2 IDDDD Supplyy current ((two amplifiers)) VVO = 22.55 VV, VVIC = 22.55 VV, –40°C 1.9 4.4 mA NNoo llooaadd 85°C 1.1 2.4 †Full range is –40°C to 85°C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted) TLC272I, TLC272AI, PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† TLC272BI, TLC277I UUNNIITT MIN TYP MAX VVOO == 11..44 VV,, VVIICC == 00,, 25°C 1.1 10 TTLLCC227722II RS = 50 Ω, RL = 10 kΩ Full range 13 mmVV VVOO == 11..44 VV,, VVIICC == 00,, 25°C 0.9 5 TTLLCC227722AAII RS = 50 Ω, RL = 10 kΩ Full range 7 VVIO IInnppuutt ooffffsseett vvoollttaaggee VVOO == 11..44 VV,, VVIICC == 00,, 25°C 290 2000 TTLLCC227722BBII RS = 50 Ω, RL = 10 kΩ Full range 3500 µVV VVOO == 11..44 VV,, VVIICC == 00,, 25°C 250 800 TTLLCC227777II RS = 50 Ω, RL = 10 kΩ Full range 2900 αVIO Temperature coefficient of input offset voltage 285°5C°C to 2 µV/°C 25°C 0.1 60 IIIO IInnppuutt ooffffsseett ccuurrrreenntt ((sseeee NNoottee 44)) 85°C 26 1000 ppAA VVO = 55 VV, VVIC = 55 VV 25°C 0.7 60 IIIB IInnppuutt bbiiaass ccuurrrreenntt ((sseeee NNoottee 44)) 85°C 220 2000 ppAA –0.2 –0.3 25°C to to V CCoommmmoonn-mmooddee iinnpuutt vvoollttaaggee rraannggee 9 9.2 VVICR (see Note 5) –0.2 Full range to V 8.5 25°C 8 8.5 VVOOHH HHiigghh-lleevveell oouuttpuutt vvoollttaaggee VVIIDD = 110000 mmVV,, RRLL = 1100 kkΩΩ –40°C 7.8 8.5 VV 85°C 7.8 8.5 25°C 0 50 VVOOLL LLooww-lleevveell oouuttpuutt vvoollttaaggee VVIIDD = –110000 mmVV,, IIOOLL = 00 –40°C 0 50 mmVV 85°C 0 50 25°C 10 36 AAVVDD LLaarrggee-ssiiggnnaall ddiiffffeerreennttiiaall vvoollttaaggee aammplliiffiiccaattiioonn VVOO = 11 VV ttoo 66 VV,, RRLL = 1100 kkΩΩ –40°C 7 46 VV//mmVV 85°C 7 31 25°C 65 85 CCMMRRRR CCoommmmoonn-mmooddee rreejjeeccttiioonn rraattiioo VVIICC = VVIICCRRmmiinn –40°C 60 87 ddBB 85°C 60 88 25°C 65 95 SSupplly-vollttage rejjecttiion rattiio kkSSVVRR ((∆∆VVDDDD//∆∆VVIIOO)) VVDDDD = 55 VV ttoo 1100 VV,, VVOO = 11..44 VV –40°C 60 92 ddBB 85°C 60 96 25°C 1.4 4 IDDDD Supplyy current ((two amplifiers)) VVO = 55 VV, VVIC = 55 VV, –40°C 2.8 5 mA NNoo llooaadd 85°C 1.5 3.2 †Full range is –40°C to 85°C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 electrical characteristics at specified free-air temperature, V = 5 V (unless otherwise noted) DD TLC272M, TLC277M PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX VVOO == 11..44 VV,, VVIICC == 00,, 25°C 1.1 10 TTLLCC227722MM mmVV RS = 50 Ω, RL = 10 kΩ Full range 12 VVIO IInnppuutt ooffffsseett vvoollttaaggee TTLLCC227777MM VVROOS === 5110..44 Ω VV,,, RVVIILCC = == 1 000,, kΩ Full2 r5a°nCge 200 3570500 µVV Temperature coefficient of input offset 25°C to αVIO voltage 125°C 2.1 µV/°C 25°C 0.1 60 pA IIIO IInnppuutt ooffffsseett ccuurrrreenntt ((sseeee NNoottee 44)) 125°C 1.4 15 nA VVO = 22.55 VV VVIC = 22.55 VV 25°C 0.6 60 pA IIIB IInnppuutt bbiiaass ccuurrrreenntt ((sseeee NNoottee 44)) 125°C 9 35 nA 0 –0.3 25°C to to V CCoommmmoonn-mmooddee iinnpuutt vvoollttaaggee rraannggee 4 4.2 VVICR (see Note 5) 0 Full range to V 3.5 25°C 3.2 3.8 VVOOHH HHiigghh-lleevveell oouuttpuutt vvoollttaaggee VVIIDD = 110000 mmVV,, RRLL = 1100 kkΩΩ –55°C 3 3.8 VV 125°C 3 3.8 25°C 0 50 VVOOLL LLooww-lleevveell oouuttpuutt vvoollttaaggee VVIIDD = –110000 mmVV,, IIOOLL = 00 –55°C 0 50 mmVV 125°C 0 50 25°C 5 23 AAVVDD LLaarrggee-ssiiggnnaall ddiiffffeerreennttiiaall vvoollttaaggee aammplliiffiiccaattiioonn VVOO = 00..2255 VV ttoo 22 VV RRLL = 1100 kkΩΩ –55°C 3.5 35 VV//mmVV 125°C 3.5 16 25°C 65 80 CCMMRRRR CCoommmmoonn-mmooddee rreejjeeccttiioonn rraattiioo VVIICC = VVIICCRRmmiinn –55°C 60 81 ddBB 125°C 60 84 25°C 65 95 SSupplly-vollttage rejjecttiion rattiio kkSSVVRR ((∆∆VVDDDD//∆∆VVIIOO)) VVDDDD = 55 VV ttoo 1100 VV,, VVOO = 11..44 VV –55°C 60 90 ddBB 125°C 60 97 25°C 1.4 3.2 IDDDD Supplyy current ((two amplifiers)) VVO = 22.55 VV, VVIC = 22.55 VV, –55°C 2 5 mA NNoo llooaadd 125°C 1 2.2 †Full range is –55°C to 125°C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 electrical characteristics at specified free-air temperature, V = 10 V (unless otherwise noted) DD TLC272M, TLC277M PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX VO = 1.4 V, VIC = 0, 25°C 1.1 10 TTLLCC227722MM mmVV RS = 50 Ω, RL = 10 kΩ Full range 12 VVIO IInnppuutt ooffffsseett vvoollttaaggee VO = 1.4 V, VIC = 0, 25°C 250 800 TTLLCC227777MM µVV RS = 50 Ω, RL = 10 kΩ Full range 4300 Temperature coefficient of input offset 25°C to αVIO voltage 125°C 2.2 µV/°C 25°C 0.1 60 pA IIIO IInnppuutt ooffffsseett ccuurrrreenntt ((sseeee NNoottee 44)) 125°C 1.8 15 nA VVO = 55 VV, VVIC = 55 VV 25°C 0.7 60 pA IIIB IInnppuutt bbiiaass ccuurrrreenntt ((sseeee NNoottee 44)) 125°C 10 35 nA 0 –0.3 25°C to to V CCoommmmoonn-mmooddee iinnpuutt vvoollttaaggee rraannggee 9 9.2 VVICR (see Note 5) 0 Full range to V 8.5 25°C 8 8.5 VVOOHH HHiigghh-lleevveell oouuttpuutt vvoollttaaggee VVIIDD = 110000 mmVV,, RRLL = 1100 kkΩΩ –55°C 7.8 8.5 VV 125°C 7.8 8.4 25°C 0 50 VVOOLL LLooww-lleevveell oouuttpuutt vvoollttaaggee VVIIDD = –110000 mmVV,, IIOOLL = 00 –55°C 0 50 mmVV 125°C 0 50 25°C 10 36 LLarge-siignall ddiifffferenttiiall vollttage AAVVDD aammpplliiffiiccaattiioonn VVOO = 11 VV ttoo 66 VV,, RRLL = 1100 kkΩΩ –55°C 7 50 VV//mmVV 125°C 7 27 25°C 65 85 CCMMRRRR CCoommmmoonn-mmooddee rreejjeeccttiioonn rraattiioo VVIICC = VVIICCRRmmiinn –55°C 60 87 ddBB 125°C 60 86 25°C 65 95 SSupplly-vollttage rejjecttiion rattiio kkSSVVRR ((∆∆VVDDDD//∆∆VVIIOO)) VVDDDD = 55 VV ttoo 1100 VV,, VVOO = 11..44 VV –55°C 60 90 ddBB 125°C 60 97 25°C 1.9 4 IDDDD Supplyy current ((two amplifiers)) VVO = 55 VV, VVIC = 55 VV, –55°C 3 6 mA NNoo llooaadd 125°C 1.3 2.8 †Full range is –55°C to 125°C. NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 electrical characteristics, V = 5 V, T = 25°C (unless otherwise noted) DD A TLC272Y PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS UUNNIITT MIN TYP MAX VVOO == 11..44 VV,, VVIICC == 00,, VVIO IInnppuutt ooffffsseett vvoollttaaggee RS = 50 Ω, RL = 10 kΩ 11.11 1100 mmVV αVIO Temperature coefficient of input offset voltage 1.8 µV/°C IIO Input offset current (see Note 4) 0.1 pA VVO = 22.55 VV, VVIC = 22.55 VV IIB Input bias current (see Note 4) 0.6 pA –0.2 –0.3 VICR Common-mode input voltage range (see Note 5) to to V 4 4.2 VOH High-level output voltage VID = 100 mV, RL = 10 kΩ 3.2 3.8 V VOL Low-level output voltage VID = –100 mV, IOL = 0 0 50 mV AVD Large-signal differential voltage amplification VO = 0.25 V to 2 V RL = 10 kΩ 5 23 V/mV CMRR Common-mode rejection ratio VIC = VICRmin 65 80 dB kSVR Supply-voltage rejection ratio (∆VDD/∆VIO) VDD = 5 V to 10 V, VO = 1.4 V 65 95 dB VO = 2.5 V, VIC = 2.5 V, IDD Supply current (two amplifiers) No load 1.4 3.2 mA NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. electrical characteristics, V = 10 V, T = 25°C (unless otherwise noted) DD A TLC272Y PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS UUNNIITT MIN TYP MAX VVOO == 11..44 VV,, VVIICC == 00,, VVIO IInnppuutt ooffffsseett vvoollttaaggee RS = 50 Ω, RL = 10 kΩ 11.11 1100 mmVV αVIO Temperature coefficient of input offset voltage 1.8 µV/°C IIO Input offset current (see Note 4) 0.1 pA VVO = 55 VV, VVIC = 55 VV IIB Input bias current (see Note 4) 0.7 pA –0.2 –0.3 VICR Common-mode input voltage range (see Note 5) to to V 9 9.2 VOH High-level output voltage VID = 100 mV, RL = 10 kΩ 8 8.5 V VOL Low-level output voltage VID = –100 mV, IOL = 0 0 50 mV AVD Large-signal differential voltage amplification VO = 1 V to 6 V, RL = 10 kΩ 10 36 V/mV CMRR Common-mode rejection ratio VIC = VICRmin 65 85 dB kSVR Supply-voltage rejection ratio (∆VDD/∆VIO) VDD = 5 V to 10 V, VO = 1.4 V 65 95 dB VO = 5 V, VIC = 5 V, IDD Supply current (two amplifiers) 1.9 4 mA No load NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically. 5. This range also applies to each input individually. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 operating characteristics at specified free-air temperature, VDD = 5 V TLC272C, TLC272AC, PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA TLC272BC, TLC277C UUNNIITT MIN TYP MAX 25°C 3.6 VVIIPPPP = 11 VV 0°C 4 RL = 10 kΩ, 70°C 3 SSRR SSlleeww rraattee aatt uunniittyy ggaaiinn CCL = 2200 ppFF, 25°C 2.9 VV//µss SSeeee FFiigguurree 11 VVIIPPPP = 22..55 VV 0°C 3.1 70°C 2.5 Vn Equivalent input noise voltage f = 1 kHz, RS = 20 Ω, 25°C 25 nV/√Hz See Figure 2 25°C 320 BBOOMM MMaaxxiimmuumm oouuttpuutt-sswwiinngg bbaannddwwiiddtthh VRRVOLL === 11VV00O kkHΩΩ,, CCSSeeLee = FF 22iigg00uu prreeFF, 11 0°C 340 kkHHzz 70°C 260 25°C 1.7 BB11 UUnniittyy-ggaaiinn bbaannddwwiiddtthh VSSVIee =ee FF1100iigg uumrrVVee, 33 CCL = 2200 pFF, 0°C 2 MMHHzz 70°C 1.3 25°C 46° φφmm Phase marggin VVI = 1100 mVV, ff = BB1, 0°C 47° CCLL == 2200 ppFF, SSeeee FFiigguurree 33 70°C 43° operating characteristics at specified free-air temperature, V = 10 V DD TLC272C, TLC272AC, PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA TLC272BC, TLC277C UUNNIITT MIN TYP MAX 25°C 5.3 VVIIPPPP = 11 VV 0°C 5.9 RL = 10 kΩ, 70°C 4.3 SSRR SSlleeww rraattee aatt uunniittyy ggaaiinn CCL = 2200 ppFF, 25°C 4.6 VV//µss SSeeee FFiigguurree 11 VVIIPPPP = 55..55 VV 0°C 5.1 70°C 3.8 Vn Equivalent input noise voltage f = 1 kHz, RS = 20 Ω, 25°C 25 nV/√Hz See Figure 2 25°C 200 BBOOMM MMaaxxiimmuumm oouuttpuutt-sswwiinngg bbaannddwwiiddtthh VRRVOLL === 11VV00O kkHΩΩ,, CCSSeeLee = FF 22iigg00uu prreeFF, 11 0°C 220 kkHHzz 70°C 140 25°C 2.2 BB11 UUnniittyy-ggaaiinn bbaannddwwiiddtthh VSSVIee =ee FF1100iigg uumrrVVee, 33 CCL = 2200 pFF, 0°C 2.5 MMHHzz 70°C 1.8 25°C 49° φφmm Phase marggin VVI = 1100 mVV, ff = BB1, 0°C 50° CCLL == 2200 ppFF, SSeeee FFiigguurree 33 70°C 46° 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 operating characteristics at specified free-air temperature, V = 5 V DD TLC272I, TLC272AI, PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA TLC272BI, TLC277I UUNNIITT MIN TYP MAX 25°C 3.6 VVIIPPPP = 11 VV –40°C 4.5 RL = 10 kΩ, 85°C 2.8 SSRR SSlleeww rraattee aatt uunniittyy ggaaiinn CCL = 2200 ppFF, 25°C 2.9 VV//µss SSeeee FFiigguurree 11 VVIIPPPP = 22..55 VV –40°C 3.5 85°C 2.3 Vn Equivalent input noise voltage fS =e e1 FkiHguz,re 2 RS = 20 Ω, 25°C 25 nV/√Hz 25°C 320 BBOOMM MMaaxxiimmuumm oouuttpuutt-sswwiinngg bbaannddwwiiddtthh VVRROLL === 11VV00O kkHΩΩ,, CCSSeeLee = FF 22iigg00uu prreeFF, 11 –40°C 380 kkHHzz 85°C 250 25°C 1.7 BB11 UUnniittyy-ggaaiinn bbaannddwwiiddtthh VVSSIee =ee FF1100iigg uumrrVVee, 33 CCL = 2200 pFF, –40°C 2.6 MMHHzz 85°C 1.2 25°C 46° φφmm Phase marggin VVI = 1100 mVV, ff = BB1, –40°C 49° CCLL == 2200 ppFF, SSeeee FFiigguurree 33 85°C 43° operating characteristics at specified free-air temperature, V = 10 V DD TLC272I, TLC272AI, PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA TLC272BI, TLC277I UUNNIITT MIN TYP MAX 25°C 5.3 VVIIPPPP = 11 VV –40°C 6.8 RL = 10 kΩ, 85°C 4 SSRR SSlleeww rraattee aatt uunniittyy ggaaiinn CCL = 2200 ppFF, 25°C 4.6 VV//µss SSeeee FFiigguurree 11 VVIIPPPP = 55..55 VV –40°C 5.8 85°C 3.5 Vn Equivalent input noise voltage fS =e e1 FkiHguz,re 2 RS = 20 Ω, 25°C 25 nV/√Hz 25°C 200 BBOOMM MMaaxxiimmuumm oouuttpuutt-sswwiinngg bbaannddwwiiddtthh VVRROLL === 11VV00O kkHΩΩ,, CCSSeeLee = FF 22iigg00uu prreeFF, 11 –40°C 260 kkHHzz 85°C 130 25°C 2.2 BB11 UUnniittyy-ggaaiinn bbaannddwwiiddtthh VVSSIee =ee FF1100iigg uumrrVVee, 33 CCL = 2200 pFF, –40°C 3.1 MMHHzz 85°C 1.7 25°C 49° φφmm Phase marggin VVI = 1100 mVV, ff = BB1, –40°C 52° CCLL == 2200 ppFF, SSeeee FFiigguurree 33 85°C 46° POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 operating characteristics at specified free-air temperature, VDD = 5 V TLC272M, TLC277M PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA UUNNIITT MIN TYP MAX 25°C 3.6 VVIIPPPP = 11 VV –55°C 4.7 RL = 10 kΩ, 125°C 2.3 SSRR SSlleeww rraattee aatt uunniittyy ggaaiinn CCL = 2200 ppFF, 25°C 2.9 VV//µss SSeeee FFiigguurree 11 VVIIPPPP = 22..55 VV –55°C 3.7 125°C 2 Vn Equivalent input noise voltage f = 1 kHz, RS = 20 Ω, 25°C 25 nV/√Hz See Figure 2 25°C 320 BBOOMM MMaaxxiimmuumm oouuttpuutt-sswwiinngg bbaannddwwiiddtthh VRRVOLL === 11VV00O kkHΩΩ,, CCSSeeLee = FF 22iigg00uu prreeFF, 11 –55°C 400 kkHHzz 125°C 230 25°C 1.7 BB11 UUnniittyy-ggaaiinn bbaannddwwiiddtthh VSSVIee =ee FF1100iigg uumrrVVee, 33 CCL = 2200 pFF, –55°C 2.9 MMHHzz 125°C 1.1 25°C 46° φφmm Phase marggin VVI = 1100 mVV, ff = BB1, –55°C 49° CCLL == 2200 ppFF, SSeeee FFiigguurree 33 125°C 41° operating characteristics at specified free-air temperature, V = 10 V DD TLC272M, TLC277M PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA UUNNIITT MIN TYP MAX 25°C 5.3 VVIIPPPP = 11 VV –55°C 7.1 RL = 10 kΩ, 125°C 3.1 SSRR SSlleeww rraattee aatt uunniittyy ggaaiinn CCL = 2200 ppFF, 25°C 4.6 VV//µss SSeeee FFiigguurree 11 VVIIPPPP = 55..55 VV –55°C 6.1 125°C 2.7 Vn Equivalent input noise voltage f = 1 kHz, RS = 20 Ω, 25°C 25 nV/√Hz See Figure 2 25°C 200 BBOOMM MMaaxxiimmuumm oouuttpuutt-sswwiinngg bbaannddwwiiddtthh VRRVOLL === 11VV00O kkHΩΩ,, CCSSeeLee = FF 22iigg00uu prreeFF, 11 –55°C 280 kkHHzz 125°C 110 25°C 2.2 BB11 UUnniittyy-ggaaiinn bbaannddwwiiddtthh VSSVIee =ee FF1100iigg uumrrVVee, 33 CCL = 2200 pFF, –55°C 3.4 MMHHzz 125°C 1.6 25°C 49° φφmm Phase marggin VVI = 1100 mVV, ff = BB1, –55°C 52° CCLL == 2200 ppFF, SSeeee FFiigguurree 33 125°C 44° 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 operating characteristics, VDD = 5 V, TA = 25°C TLC272Y PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS UUNNIITT MIN TYP MAX SSRR SSlleeww rraattee aatt uunniittyy ggaaiinn RRLL == 1100 kkΩΩ,, CCLL == 2200 pFF,, VIPP = 1 V 3.6 VV//µss See Figure 1 VIPP = 2.5 V 2.9 Vn Equivalent input noise voltage f = 1 kHz, RS = 20 Ω, See Figure 2 25 nV/√Hz VO = VOH, CL = 20 pF, RL = 10 kΩ, BOM Maximum output-swing bandwidth 320 kHz See Figure 1 B1 Unity-gain bandwidth VI = 10 mV, CL = 20 pF, See Figure 3 1.7 MHz φm Phase margin VI = 10 mV, f = B1, CL = 20 pF, 46° See Figure 3 operating characteristics, VDD = 10 V, TA = 25°C TLC272Y PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS UUNNIITT MIN TYP MAX SSRR SSlleeww rraattee aatt uunniittyy ggaaiinn RRLL == 1100 kkΩΩ,, CCLL == 2200 pFF,, VIPP = 1 V 5.3 VV//µss See Figure 1 VIPP = 5.5 V 4.6 Vn Equivalent input noise voltage f = 1 kHz, RS = 20 Ω, See Figure 2 25 nV/√Hz VO = VOH, CL = 20 pF, RL = 10 kΩ, BOM Maximum output-swing bandwidth 200 kHz See Figure 1 B1 Unity-gain bandwidth VI = 10 mV, CL = 20 pF, See Figure 3 2.2 MHz φm Phase margin VI = 10 mV, f = B1, CL = 20 pF, 49° See Figure 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 PARAMETER MEASUREMENT INFORMATION single-supply versus split-supply test circuits Because the TLC272 and TLC277 are optimized for single-supply operation, circuit configurations used for the various tests often present some inconvenience since the input signal, in many cases, must be offset from ground. This inconvenience can be avoided by testing the device with split supplies and the output load tied to the negative rail. A comparison of single-supply versus split-supply test circuits is shown below. The use of either circuit gives the same result. VDD VDD+ – – VO VO VI + VI + CL RL CL RL VDD– (a) SINGLE SUPPLY (b) SPLIT SUPPLY Figure 1. Unity-Gain Amplifier 2 kΩ 2 kΩ VDD VDD+ 20 Ω – – 1/2 VDD VO VO + + 20 Ω 20 Ω 20 Ω VDD– (a) SINGLE SUPPLY (b) SPLIT SUPPLY Figure 2. Noise-Test Circuit 10 kΩ 10 kΩ 100 Ω VDD 100 Ω VDD+ VI – VI – VO VO 1/2 VDD + + CL CL VDD– (a) SINGLE SUPPLY (b) SPLIT SUPPLY Figure 3. Gain-of-100 Inverting Amplifier 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 PARAMETER MEASUREMENT INFORMATION input bias current Because of the high input impedance of the TLC272 and TLC277 operational amplifiers, attempts to measure the input bias current can result in erroneous readings. The bias current at normal room ambient temperature is typically less than 1 pA, a value that is easily exceeded by leakages on the test socket. Two suggestions are offered to avoid erroneous measurements: 1. Isolate the device from other potential leakage sources. Use a grounded shield around and between the device inputs (see Figure 4). Leakages that would otherwise flow to the inputs are shunted away. 2. Compensate for the leakage of the test socket by actually performing an input bias current test (using a picoammeter) with no device in the test socket. The actual input bias current can then be calculated by subtracting the open-socket leakage readings from the readings obtained with a device in the test socket. One word of caution: many automatic testers as well as some bench-top operational amplifier testers use the servo-loop technique with a resistor in series with the device input to measure the input bias current (the voltage drop across the series resistor is measured and the bias current is calculated). This method requires that a device be inserted into the test socket to obtain a correct reading; therefore, an open-socket reading is not feasible using this method. 8 5 V = VIC 1 4 Figure 4. Isolation Metal Around Device Inputs (JG and P packages) low-level output voltage To obtain low-supply-voltage operation, some compromise was necessary in the input stage. This compromise results in the device low-level output being dependent on the common-mode input voltage level as well as the differential input voltage level. When attempting to correlate low-level output readings with those quoted in the electrical specifications, these two conditions should be observed. If conditions other than these are to be used, please refer to Figures 14 through 19 in the Typical Characteristics of this data sheet. input offset voltage temperature coefficient Erroneous readings often result from attempts to measure temperature coefficient of input offset voltage. This parameter is actually a calculation using input offset voltage measurements obtained at two different temperatures. When one (or both) of the temperatures is below freezing, moisture can collect on both the device and the test socket. This moisture results in leakage and contact resistance, which can cause erroneous input offset voltage readings. The isolation techniques previously mentioned have no effect on the leakage since the moisture also covers the isolation metal itself, thereby rendering it useless. It is suggested that these measurements be performed at temperatures above freezing to minimize error. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 PARAMETER MEASUREMENT INFORMATION full-power response Full-power response, the frequency above which the operational amplifier slew rate limits the output voltage swing, is often specified two ways: full-linear response and full-peak response. The full-linear response is generally measured by monitoring the distortion level of the output while increasing the frequency of a sinusoidal input signal until the maximum frequency is found above which the output contains significant distortion. The full-peak response is defined as the maximum output frequency, without regard to distortion, above which full peak-to-peak output swing cannot be maintained. Because there is no industry-wide accepted value for significant distortion, the full-peak response is specified in this data sheet and is measured using the circuit of Figure 1. The initial setup involves the use of a sinusoidal input to determine the maximum peak-to-peak output of the device (the amplitude of the sinusoidal wave is increased until clipping occurs). The sinusoidal wave is then replaced with a square wave of the same amplitude. The frequency is then increased until the maximum peak-to-peak output can no longer be maintained (Figure5). A square wave is used to allow a more accurate determination of the point at which the maximum peak-to-peak output is reached. (a) f = 1 kHz (b) BOM > f > 1 kHz (c) f = BOM (d) f > BOM Figure 5. Full-Power-Response Output Signal test time Inadequate test time is a frequent problem, especially when testing CMOS devices in a high-volume, short-test-time environment. Internal capacitances are inherently higher in CMOS than in bipolar and BiFET devices and require longer test times than their bipolar and BiFET counterparts. The problem becomes more pronounced with reduced supply levels and lower temperatures. 18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 TYPICAL CHARACTERISTICS Table of Graphs FIGURE VIO Input offset voltage Distribution 6, 7 αVIO Temperature coefficient of input offset voltage Distribution 8, 9 vvss HHiigghh--lleevveell oouuttpuutt ccuurrrreenntt 1100,, 1111 VVOOHH HHiigghh-lleevveell oouuttpuutt vvoollttaaggee vvss SSuuppllyy vvoollttaaggee 1122 vs Free-air temperature 13 vvss CCoommmmoonn--mmooddee iinnpuutt vvoollttaaggee 1144,, 1155 vvss DDiiffffeerreennttiiaall iinnpuutt vvoollttaaggee 1166 VVOL LLooww-lleevveell oouuttppuutt vvoollttaaggee vvss FFrreeee-aaiirr tteemmpeerraattuurree 1177 vs Low-level output current 18, 19 vvss SSuuppllyy vvoollttaaggee 2200 AAVVDD LLaarrggee-ssiiggnnaall ddiiffffeerreennttiiaall vvoollttaaggee aammplliiffiiccaattiioonn vvss FFrreeee-aaiirr tteemmpeerraattuurree 2211 vs Frequency 32, 33 IIB Input bias current vs Free-air temperature 22 IIO Input offset current vs Free-air temperature 22 VIC Common-mode input voltage vs Supply voltage 23 vvss SSuuppllyy vvoollttaaggee 2244 IIDD SSuuppppllyy ccuurrrreenntt vs Free-air temperature 25 vvss SSuuppllyy vvoollttaaggee 2266 SSRR SSlleeww rraattee vs Free-air temperature 27 Normalized slew rate vs Free-air temperature 28 VO(PP) Maximum peak-to-peak output voltage vs Frequency 29 vvss FFrreeee-aaiirr tteemmpeerraattuurree 3300 BB1 UUnniittyy-ggaaiinn bbaannddwwiiddtthh vs Supply voltage 31 vvss SSuuppllyy vvoollttaaggee 3344 φφmm PPhhaassee mmaarrggiinn vvss FFrreeee-aaiirr tteemmpeerraattuurree 3355 vs Load capacitance 36 Vn Equivalent input noise voltage vs Frequency 37 Phase shift vs Frequency 32, 33 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 19

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLC272 DISTRIBUTION OF TLC272 INPUT OFFSET VOLTAGE INPUT OFFSET VOLTAGE 60 60 ÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌ ÌÌÌÌÌÌÌÌÌÌÌ 753 Amplifiers Tested From 6 Wafer Lots 753 Amplifiers Tested From 6 Wafer Lots ÌÌÌÌÌÌVDDÌÌÌ = 5 ÌÌÌV ÌÌÌÌÌÌÌÌÌ ÌÌÌVDÌÌÌD = ÌÌÌ10 VÌÌÌÌÌÌÌÌÌÌ 50ÌÌÌÌTA =ÌÌ 25°ÌÌC ÌÌ 50 ÌÌTAÌÌ = 25ÌÌ°CÌÌ P Package P Package % ÌÌÌÌÌ % ÌÌÌÌ s – 40 s – 40 nit nit U U e of 30 e of 30 g g a a nt nt e e c 20 c 20 er er P P 10 10 0 0 –5 –4 –3 –2 –1 0 1 2 3 4 5 –5 –4 –3 –2 –1 0 1 2 3 4 5 VIO – Input Offset Voltage – mV VIO – Input Offset Voltage – mV Figure 6 Figure 7 DISTRIBUTION OF TLC272 AND TLC277 DISTRIBUTION OF TLC272 AND TLC277 INPUT OFFSET VOLTAGE INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT TEMPERATURE COEFFICIENT 60 60 Ì3Ì24 AÌmpÌlifierÌs TeÌstedÌ FroÌm 8Ì WaÌfer LÌotsÌ ÌÌ324 ÌAmpÌlifieÌrs TÌesteÌd FrÌom Ì8 WaÌfer ÌLotsÌ 50 ÌVTÌAD D=Ì =25 5° CÌV to Ì125°ÌC ÌÌÌÌÌÌ 50ÌÌVTAD D=Ì =25 5°Ì CV toÌ 125Ì°C ÌÌÌÌÌÌ ÌPÌ PaÌckagÌe ÌÌÌÌÌÌÌÌ ÌÌP PaÌckaÌge ÌÌÌÌÌÌÌÌ % Outliers: % Outliers: s – 40 Ì(Ì1) 20Ì.5 µÌV/°CÌÌÌÌÌÌÌÌ s – 40ÌÌ(1) 2Ì1.2 ̵V/°ÌC ÌÌÌÌÌÌÌ nit nit U U e of 30 e of 30 g g a a nt nt e e erc 20 erc 20 P P 10 10 ÁÁ 0 0 –10 –8 –6 –4 –2 0 2 4 6 8 10 –10 –8 –6 –4 –2 0 2 4 6 8 10 αVIO – Temperature Coefficient – µV/°C αVIO – Temperature Coefficient – µV/°C Figure 8 Figure 9 20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 TYPICAL CHARACTERISTICS† HIGH-LEVEL OUTPUT VOLTAGE HIGH-LEVEL OUTPUT VOLTAGE vs vs HIGH-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT CURRENT 5 16 VID = 100 mV VID = 100 mV ge – V 4 TSAee = N 2o5t°eC A e – V 14 VDD = 16 V TA = 25°C a g 12 Volt olta put 3 VDD = 5 V ut V 10 Out VDD = 4 V utp vel el O 8 VDD = 10 V Le 2 VDD = 3 V ev gh- h-L 6 ÁÁVOH – HiVOHÁÁ1 ÁÁOH – HigOHÁÁ 4 VV ÁÁ ÁÁ 2 0 0 0 –2 –4 –6 –8 –10 0 –5 –10 –15 ––2200 –25 –30 –35 –40 IOH – High-Level Output Current – mA IOH – High-Level Output Current – mA NOTE A: The 3-V curve only applies to the C version. Figure 10 Figure 11 HIGH-LEVEL OUTPUT VOLTAGE HIGH-LEVEL OUTPUT VOLTAGE vs vs SUPPLY VOLTAGE FREE-AIR TEMPERATURE 16 VDD –1.6 ÌÌVÌÌID =ÌÌ 100ÌÌ mVÌ IOH = –5 mA Voltage – V 1124 ÌÌTRÌÌAL == ÌÌ2150° kCÌÌΩ Ì Voltage – V VVDDDD ––11..87 VDD = 5 V VID = 100 mA ÁHigh-Level Output Á1068 ÁHigh-Level Output ÁVVDDVDDD D–– 21–..129 VDD = 10 V ÁOH – OHÁ 4 ÁOH – OHÁVDD –2.2 ÁVVÁ 2 ÁVVÁVDD –2.3 0 VDD –2.4 0 2 4 6 8 10 12 14 16 –75 –50 –25 0 20 50 75 100 125 VDD – Supply Voltage – V TA – Free-Air Temperature – °C Figure 12 Figure 13 †Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 21

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 TYPICAL CHARACTERISTICS† LOW-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE vs vs COMMON-MODE INPUT VOLTAGE COMMON-MODE INPUT VOLTAGE 700 500 VDD = 5 V VDD = 10 V Voltage – mV 665055000 ITOAL = = 2 55 °mCA Voltage – mV 450 TIOAL = = 2 55 °mCA Output 500 VID = –100 mV Output 400 VID = –100 mV w-Level 450 w-Level 350 VVIIDD == ––12 .V5 V ÁÁOL – LoOLÁÁ400 VID = –1 V ÁOL – LoOLÁ300 ÁVVÁ350 ÁVVÁ 300 250 0 0.5 1 1.5 2 2.5 3 3.5 4 0 1 2 3 4 5 6 7 8 9 10 VIC – Common-Mode Input Voltage – V VIC – Common-Mode Input Voltage – V Figure 14 Figure 15 LOW-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE vs vs DIFFERENTIAL INPUT VOLTAGE FREE-AIR TEMPERATURE 800 900 IOL = 5 mA IOL = 5 mA V 700 VIC = |VID/2| V 800 VID = –1 V e – m 600 TA = 25°C e – m 700 VIC = 0.5 V g g a a Volt 500 Volt 600 VDD = 5 V ut VDD = 5 V ut p p 500 ut 400 ut O O el el 400 Lev 300 Lev VDD = 10 V w- VDD = 10 V w- 300 o o ÁLÁ200 ÁLÁ ÁL – LÁ ÁL – LÁ200 OO OO VV 100 VV ÁÁ ÁÁ100 0 0 –1 –2 –3 –4 –5 –6 –7 –8 –9 –10 0 –75 –50 –25 0 25 50 75 100 125 VID – Differential Input Voltage – V TA – Free-Air Temperature – °C Figure 16 Figure 17 †Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 TYPICAL CHARACTERISTICS† LOW-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE vs vs LOW-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT CURRENT 1.0 3.0 0.9 ÌÌVÌÌID =ÌÌ –1 ÌÌV ÌÌÌÌVID ÌÌ= –1ÌÌ V Ì ge – V 0.8 ÌÌÌTVSÌÌÌAIeCe = =N ÌÌÌ2 o05.t°5eC ÌÌÌVA VDD = 5 V ge – V 2.5 ÌÌÌÌÌÌVTAIC = ÌÌÌ= 2 05.°5ÌÌÌC V Ì VDD = 16 V Volta 0.7 VDD = 4 V Volta 2.0 utput 0.6 VDD = 3 V utput VDD = 10 V O 0.5 O 1.5 Level 0.4 Level w- w- 1.0 o 0.3 o ÁÁVOL – LVOLÁÁ0.2 ÁÁVVOL – LOLÁÁ0.5 0.1 ÁÁ 0 0 0 1 2 3 4 5 6 7 8 0 5 10 15 20 25 30 IOL – Low-Level Output Current – mA IOL – Low-Level Output Current – mA NOTE A: The 3-V curve only applies to the C version. Figure 18 Figure 19 LARGE-SIGNAL LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION DIFFERENTIAL VOLTAGE AMPLIFICATION vs vs SUPPLY VOLTAGE FREE-AIR TEMPERATURE 60 50 TA = –55°C RL = 10 kΩ 45 RL = 10 kΩ al V 50 ÌTÌA = Ì0°CÌ al V 40 VDD = 10 V enti V/m enti V/m al Differ ation – 40 al Differ ation – 3305 n c n c Sig plifi 30 Sig plifi 25 e- m ÌÌÌÌ e- m ÁÁVD – LargVDÁÁVoltage A 20 ÌÌÌÌÌÌTTTAAA ===ÌÌÌ 128255ÌÌÌ5°°CC°CÌÁÁVD – LargÁÁVDVoltage A 1250 VDD = 5 V ÁAAÁ ÁAAÁ 10 10 5 0 0 0 2 4 6 8 10 12 14 16 –75 –50 –25 0 25 50 75 100 125 VDD – Supply Voltage – V TA – Free-Air Temperature – °C Figure 20 Figure 21 †Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 23

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 TYPICAL CHARACTERISTICS† COMMON-MODE INPUT BIAS CURRENT AND INPUT OFFSET CURRENT INPUT VOLTAGE POSITIVE LIMIT vs vs FREE-AIR TEMPERATURE SUPPLY VOLTAGE A 10000 16 rents – p 1000 SVVDIeCeD =N = o5 1 tVe0 AV e – V 14 TA = 25°C et Cur ÌIIBÌ Voltag 12 Offs 100 put 10 s and ÌÌIIOÌÌ ode In 8 a M put Bi 10 mon- 6 n m – I Co 4 IIO 1 – C nd VI 2 a B II 0.1 0 25 35 45 55 65 75 85 95 105 115 125 0 2 4 6 8 10 12 14 16 TA – Free-Air Temperature – °C VDD – Supply Voltage – V NOTE A: The typical values of input bias current and input offset current below 5 pA were determined mathematically. Figure 22 Figure 23 SUPPLY CURRENT SUPPLY CURRENT vs vs SUPPLY VOLTAGE FREE-AIR TEMPERATURE 5 4 4.5 VO = VDD/2 VO = VDD/2 3.5 No Load No Load 4 TA = –55°C A A 3 m m Supply Current – 23..2355 ÌÌÌÌTA =ÌÌ 25°ÌÌC ÌTAÌ = 0Ì°C Supply Current – 12..255 VDD = 10 V – DD 1.5 – DD 1 VDD = 5 V I 1 ÌÌÌÌ I TA = 70°C ÌÌÌÌ 0.5 0.5 ÌTAÌ = 12Ì5°CÌ 0 0 0 2 4 6 8 10 12 14 16 –75 –50 –25 0 25 50 75 100 125 VDD – Supply Voltage – V TA – Free-Air Temperature – °C Figure 24 Figure 25 †Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 24 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 TYPICAL CHARACTERISTICS† SLEW RATE SLEW RATE vs vs SUPPLY VOLTAGE FREE-AIR TEMPERATURE 8 8 AV = 1 AV = 1 7 VRILP =P 1=0 1 k VΩ 7 VDD = 10 V CRLL == 2100 pkΩF CL = 20 pF VIPP = 5.5 V See Figure 1 s 6 TA = 25°C 6 µ See Figure 1 s ew Rate – V/ 54 µw Rate – V/ 45 VVIDPDP == 110 V V SR – Sl 3 R – Sle 3 S 2 2 VDD = 5 V VIPP = 1 V 1 1 VDD = 5 V VIPP = 2.5 V 0 0 0 2 4 6 8 10 12 14 16 –75 –50 –25 0 25 50 75 100 125 VDD – Supply Voltage – V TA – Free-Air Temperature – °C Figure 26 Figure 27 NORMALIZED SLEW RATE MAXIMUM PEAK OUTPUT VOLTAGE vs vs FREE-AIR TEMPERATURE FREQUENCY 1.5 – V 10 AV = 1 e 1.4 VIPP = 1 V ag 9 VDD = 10 V 1.3 VDD = 10 V RCLL == 1200 pkΩF put Volt 8 TA = 125°C ate 1.2 Out 7 TA = 25°C ew R 1.1 VDD = 5 V eak 6 TA = –55°C malized Sl 01..90 Peak-to-P 54 VDD = 5 V r m o N 0.8 mu 3 xi 0.7 Ma 2 RL = 10 kΩ – See Figure 1 0.6 P) 1 P 0.5 VO( 0 –75 –50 –25 0 25 50 75 100 125 10 100 1000 10000 TA – Free-Air Temperature – °C f – Frequency – kHz Figure 28 Figure 29 †Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 25

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 TYPICAL CHARACTERISTICS† UNITY-GAIN BANDWIDTH UNITY-GAIN BANDWIDTH vs vs FREE-AIR TEMPERATURE SUPPLY VOLTAGE 3.0 2.5 VDD = 5 V VI = 10 mV VI = 10 mV CL = 20 pF z CL = 20 pF Hz TA = 25°C H M width – M 2.5 See Figure 3 dwidth – 2.0 See Figure 3 d n n a ain Ba 2.0 Gain B nity-G Unity- 1.5 – U1 1.5 – B1 B 1.0 1.0 –75 –50 –25 0 25 50 75 100 125 0 2 4 6 8 10 12 14 16 TA – Free-Air Temperature – °C VDD – Supply Voltage – V Figure 30 Figure 31 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY 107 VDD = 5 V 106 RL = 10 kΩ al TA = 25°C nti 105 0° e n Differ catio 104 30° Signal Amplifi 103 AVD 60° Shift ge- ge se Lar olta 102 90° Pha Á– V Phase Shift ÁAVD AVD 101 120° 1 150° 0.1 180° 10 100 1 k 10 k 100 k 1 M 10 M f – Frequency – Hz Figure 32 †Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 26 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 TYPICAL CHARACTERISTICS† LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY 107 VDD = 10 V 106 RL = 10 kΩ al TA = 25°C nti 105 0° e n Signal Differ Amplificatio 110034 AVD 6300°° se Shift Large- oltage 102 90° Pha Á– ÁV Phase Shift VD VD 101 120° ÁAAÁ 1 150° 0.1 180° 10 100 1 k 10 k 100 k 1 M 10 M f – Frequency – Hz Figure 33 PHASE MARGIN PHASE MARGIN vs vs SUPPLY VOLTAGE FREE-AIR TEMPERATURE 53° 50° 52° VDD = 5 V VI = 10 mV 51° 48° CL = 20 pF See Figure 3 n n gi 50° gi ar ar 46° M M se 49° se a a h h P P – 48° – 44° m m m m φ VI = 10 mV φ 47° CL = 20 pF TA = 25°C 42° 46° See Figure 3 45° 40° 0 2 4 6 8 10 12 14 16 –75 –50 –25 0 25 50 75 100 125 VDD – Supply Voltage – V TA – Free-Air Temperature – °C Figure 34 Figure 35 †Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 27

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 TYPICAL CHARACTERISTICS PHASE MARGIN EQUIVALENT INPUT NOISE VOLTAGE vs vs CAPACITIVE LOAD FREQUENCY 50° 400 z 45° VTVADI = D= 1 =205 5m° CVV – nV/H TRVADS D== =225 05° CΩV See Figure 3 ge 300 See Figure 2 a n olt e Margi 40° Noise V m – Phasm 35° nt Input 200 e φ al uiv 100 30° q E – N n VV 25° 0 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 CL – Capacitive Load – pF f – Frequency – Hz Figure 36 Figure 37 28 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 APPLICATION INFORMATION single-supply operation While the TLC272 and TLC277 perform well using dual power supplies (also called balanced or split supplies), the design is optimized for single-supply operation. This design includes an input common-mode voltage range that encompasses ground as well as an output voltage range that pulls down to ground. The supply voltage range extends down to 3 V (C-suffix types), thus allowing operation with supply levels commonly available for TTL and HCMOS; however, for maximum dynamic range, 16-V single-supply operation is recommended. Many single-supply applications require that a voltage be applied to one input to establish a reference level that is above ground. A resistive voltage divider is usually sufficient to establish this reference level (see Figure 38). The low input bias current of the TLC272 and TLC277 permits the use of very large resistive values to implement the voltage divider, thus minimizing power consumption. The TLC272 and TLC277 work well in conjunction with digital logic; however, when powering both linear devices and digital logic from the same power supply, the following precautions are recommended: 1. Power the linear devices from separate bypassed supply lines (see Figure 39); otherwise, the linear device supply rails can fluctuate due to voltage drops caused by high switching currents in the digital logic. 2. Use proper bypass techniques to reduce the probability of noise-induced errors. Single capacitive decoupling is often adequate; however, high-frequency applications may require RC decoupling. VDD R4 R1 R2 VI – VO VREF (cid:1) VDD R1 R(cid:2)3 R3 + VREF R3 C VO (cid:1) (VREF(cid:3)VI) RR42 (cid:2) VREF 0.01 µF Figure 38. Inverting Amplifier With Voltage Reference Power – OUT Logic Logic Logic Supply + (a) COMMON SUPPLY RAILS – Power OUT Logic Logic Logic Supply + (b) SEPARATE BYPASSED SUPPLY RAILS (preferred) Figure 39. Common vs Separate Supply Rails POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 29

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 APPLICATION INFORMATION input characteristics The TLC272 and TLC277 are specified with a minimum and a maximum input voltage that, if exceeded at either input, could cause the device to malfunction. Exceeding this specified range is a common problem, especially in single-supply operation. Note that the lower range limit includes the negative rail, while the upper range limit is specified at V – 1 V at T = 25°C and at V – 1.5 V at all other temperatures. DD A DD The use of the polysilicon-gate process and the careful input circuit design gives the TLC272 and TLC277 very good input offset voltage drift characteristics relative to conventional metal-gate processes. Offset voltage drift in CMOS devices is highly influenced by threshold voltage shifts caused by polarization of the phosphorus dopant implanted in the oxide. Placing the phosphorus dopant in a conductor (such as a polysilicon gate) alleviates the polarization problem, thus reducing threshold voltage shifts by more than an order of magnitude. The offset voltage drift with time has been calculated to be typically 0.1 µV/month, including the first month of operation. Because of the extremely high input impedance and resulting low bias current requirements, the TLC272 and TLC277 are well suited for low-level signal processing; however, leakage currents on printed-circuit boards and sockets can easily exceed bias current requirements and cause a degradation in device performance. It is good practice to include guard rings around inputs (similar to those of Figure 4 in the Parameter Measurement Information section). These guards should be driven from a low-impedance source at the same voltage level as the common-mode input (see Figure 40). Unused amplifiers should be connected as grounded unity-gain followers to avoid possible oscillation. noise performance The noise specifications in operational amplifier circuits are greatly dependent on the current in the first-stage differential amplifier. The low input bias current requirements of the TLC272 and TLC277 result in a very low noise current, which is insignificant in most applications. This feature makes the devices especially favorable over bipolar devices when using values of circuit impedance greater than 50 kΩ, since bipolar devices exhibit greater noise currents. – VI – – OUT OUT OUT VI + + VI + (a) NONINVERTING AMPLIFIER (b) INVERTING AMPLIFIER (c) UNITY-GAIN AMPLIFIER Figure 40. Guard-Ring Schemes output characteristics The output stage of the TLC272 and TLC277 is designed to sink and source relatively high amounts of current (see typical characteristics). If the output is subjected to a short-circuit condition, this high current capability can cause device damage under certain conditions. Output current capability increases with supply voltage. All operating characteristics of the TLC272 and TLC277 are measured using a 20-pF load. The devices can drive higher capacitive loads; however, as output load capacitance increases, the resulting response pole occurs at lower frequencies, thereby causing ringing, peaking, or even oscillation (see Figure 41). In many cases, adding a small amount of resistance in series with the load capacitance alleviates the problem. 30 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 APPLICATION INFORMATION output characteristics (continued) (a) CL = 20 pF, RL = NO LOAD (b) CL = 130 pF, RL = NO LOAD 2.5 V – TA = 25°C f = 1 kHz VO VIPP = 1 V VI + CL –2.5 V (c) CL = 150 pF, RL = NO LOAD (d) TEST CIRCUIT Figure 41. Effect of Capacitive Loads and Test Circuit Although the TLC272 and TLC277 possess excellent high-level output voltage and current capability, methods for boosting this capability are available, if needed. The simplest method involves the use of a pullup resistor (R ) connected from the output to the positive supply rail (see Figure 42). There are two disadvantages to the P use of this circuit. First, the NMOS pulldown transistor N4 (see equivalent schematic) must sink a comparatively large amount of current. In this circuit, N4 behaves like a linear resistor with an on resistance between approximately 60 Ω and 180 Ω, depending on how hard the operational amplifier input is driven. With very low values of RP, a voltage offset from 0 V at the output occurs. Second, pullup resistor RP acts as a drain load to N4 and the gain of the operational amplifier is reduced at output voltage levels where N5 is not supplying the output current. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 31

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 APPLICATION INFORMATION output characteristics (continued) VDD VI + IP RP – VO C IF R2 R1 IL RL – VO Rp = VDD – VO + IF + IL + IP ÁÁÁÁÁÁÁÁÁ ÁIpÁ = PÁulluÁp cuÁrrenÁt reqÁuireÁd byÁ the operational amplifier Á(tÁypicÁallyÁ 500Á µA)ÁÁÁÁ Figure 42. Resistive Pullup to Increase V Figure 43. Compensation for Input Capacitance OH feedback Operational amplifier circuits almost always employ feedback, and since feedback is the first prerequisite for oscillation, some caution is appropriate. Most oscillation problems result from driving capacitive loads (discussed previously) and ignoring stray input capacitance. A small-value capacitor connected in parallel with the feedback resistor is an effective remedy (see Figure 43). The value of this capacitor is optimized empirically. electrostatic discharge protection The TLC272 and TLC277 incorporate an internal electrostatic discharge (ESD) protection circuit that prevents functional failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2. Care should be exercised, however, when handling these devices as exposure to ESD may result in the degradation of the device parametric performance. The protection circuit also causes the input bias currents to be temperature dependent and have the characteristics of a reverse-biased diode. latch-up Because CMOS devices are susceptible to latch-up due to their inherent parasitic thyristors, the TLC272 and TLC277 inputs and outputs were designed to withstand –100-mA surge currents without sustaining latch-up; however, techniques should be used to reduce the chance of latch-up whenever possible. Internal protection diodes should not, by design, be forward biased. Applied input and output voltage should not exceed the supply voltage by more than 300 mV. Care should be exercised when using capacitive coupling on pulse generators. Supply transients should be shunted by the use of decoupling capacitors (0.1 µF typical) located across the supply rails as close to the device as possible. The current path established if latch-up occurs is usually between the positive supply rail and ground and can be triggered by surges on the supply lines and/or voltages on either the output or inputs that exceed the supply voltage. Once latch-up occurs, the current flow is limited only by the impedance of the power supply and the forward resistance of the parasitic thyristor and usually results in the destruction of the device. The chance of latch-up occurring increases with increasing temperature and supply voltages. 32 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 APPLICATION INFORMATION 10 kΩ 10 kΩ 0.016 µF 0.016 µF 10 kΩ VI – 1/2 10 kΩ 5 V TLC272 – 1/2 10 kΩ + – TLC272 1/2 + TLC272 Low Pass + High Pass 5 kΩ Band Pass R = 5 kΩ(3/d-1) (see Note A) NOTE A: d = damping factor, 1/Q Figure 44. State-Variable Filter 12 V H.P. VI + 5082-2835 1/2 TLC272 + 1/2 – TLC272 VO 0.5 µF N.O. – Mylar Reset 100 kΩ Figure 45. Positive-Peak Detector POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 33

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 APPLICATION INFORMATION VI (see Note A) 1.2 kΩ 100 kΩ 0.47 µF 4.7 kΩ TL431 20 kΩ –1/2 1 kΩ TIP31 0.1 µF TLC272 15 Ω + TIS193 250 µF, + 25 V – VO (see Note B) 10 kΩ 47 kΩ 0.01 µF 22 kΩ 110 Ω NOTES: A. VI = 3.5 to 15 V B. VO = 2 V, 0 to 1 A Figure 46. Logic-Array Power Supply 9 V VO (see Note A) 0.1 µF 10 kΩ 9 V C 100 kΩ 1/2 TLC272 – R2 1/2 10 kΩ TLC272 VO (see Note B) + 100 kΩ (cid:1) (cid:2) f (cid:1) 1 R1 R1 47 kΩ O 4C(R2) R3 R3 NOTES: A. VO(PP) = 8 V B. VO(PP) = 4 V Figure 47. Single-Supply Function Generator 34 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC272, TLC272A, TLC272B, TLC272Y, TLC277 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS091E – OCTOBER 1987 – REVISED FEBRUARY 2002 APPLICATION INFORMATION 5 V VI– + 1/2 10 kΩ 100 kΩ TLC277 – – 1/2 TLC277 VO + 10 kΩ R1,10 kΩ – 10 kΩ 95 kΩ (see Note A) 1/2 TLC277 VI+ + –5 V NOTE B: CMRR adjustment must be noninductive. Figure 48. Low-Power Instrumentation Amplifier 5 V – 1/2 10 RMΩ 10 RMΩ TLC272 VO VI + 2C 540 pF f (cid:1) 1 R/2 NOTCH 2(cid:1)RC 5 MΩ C C 270 pF 270 pF Figure 49. Single-Supply Twin-T Notch Filter POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 35

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TLC272ACD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 272AC & no Sb/Br) TLC272ACDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 272AC & no Sb/Br) TLC272ACP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TLC272ACP & no Sb/Br) TLC272ACPE4 ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TLC272ACP & no Sb/Br) TLC272AID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 272AI & no Sb/Br) TLC272AIDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 272AI & no Sb/Br) TLC272AIP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type -40 to 85 TLC272AIP & no Sb/Br) TLC272BCD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 272BC & no Sb/Br) TLC272BCDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 272BC & no Sb/Br) TLC272BCP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TLC272BCP & no Sb/Br) TLC272BCPE4 ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TLC272BCP & no Sb/Br) TLC272BID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 272BI & no Sb/Br) TLC272BIDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 272BI & no Sb/Br) TLC272BIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 272BI & no Sb/Br) TLC272BIP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type -40 to 85 TLC272BIP & no Sb/Br) TLC272CD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 272C & no Sb/Br) TLC272CDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 272C & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TLC272CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 272C & no Sb/Br) TLC272CP ACTIVE PDIP P 8 50 Pb-Free NIPDAU N / A for Pkg Type 0 to 70 TLC272CP (RoHS) TLC272CPE4 ACTIVE PDIP P 8 50 Pb-Free NIPDAU N / A for Pkg Type 0 to 70 TLC272CP (RoHS) TLC272CPSR ACTIVE SO PS 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 P272 & no Sb/Br) TLC272CPW ACTIVE TSSOP PW 8 150 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 P272C & no Sb/Br) TLC272CPWR ACTIVE TSSOP PW 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 P272C & no Sb/Br) TLC272CPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 P272C & no Sb/Br) TLC272ID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 272I & no Sb/Br) TLC272IDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 272I & no Sb/Br) TLC272IDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 272I & no Sb/Br) TLC272IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 272I & no Sb/Br) TLC272IP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type -40 to 85 TLC272IP & no Sb/Br) TLC272IPE4 ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type -40 to 85 TLC272IP & no Sb/Br) TLC277CD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 277C & no Sb/Br) TLC277CDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 277C & no Sb/Br) TLC277CDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 277C & no Sb/Br) TLC277CP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TLC277CP & no Sb/Br) TLC277CPSR ACTIVE SO PS 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 P277 & no Sb/Br) Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TLC277ID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 277I & no Sb/Br) TLC277IDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 277I & no Sb/Br) TLC277IDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 277I & no Sb/Br) TLC277IP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type -40 to 85 TLC277IP & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 3

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 4

PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2018 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TLC272ACDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLC272AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLC272BCDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLC272BIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLC272CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLC272CPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1 TLC272IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLC277CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLC277CPSR SO PS 8 2000 330.0 16.4 8.35 6.6 2.5 12.0 16.0 Q1 TLC277IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2018 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TLC272ACDR SOIC D 8 2500 340.5 338.1 20.6 TLC272AIDR SOIC D 8 2500 340.5 338.1 20.6 TLC272BCDR SOIC D 8 2500 340.5 338.1 20.6 TLC272BIDR SOIC D 8 2500 340.5 338.1 20.6 TLC272CDR SOIC D 8 2500 340.5 338.1 20.6 TLC272CPWR TSSOP PW 8 2000 367.0 367.0 35.0 TLC272IDR SOIC D 8 2500 340.5 338.1 20.6 TLC277CDR SOIC D 8 2500 340.5 338.1 20.6 TLC277CPSR SO PS 8 2000 367.0 367.0 38.0 TLC277IDR SOIC D 8 2500 340.5 338.1 20.6 PackMaterials-Page2

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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PACKAGE OUTLINE PW0008A TSSOP - 1.2 mm max height SCALE 2.800 SMALL OUTLINE PACKAGE C 6.6 TYP SEATING PLANE 6.2 PIN 1 ID A 0.1 C AREA 6X 0.65 8 1 3.1 2X 2.9 NOTE 3 1.95 4 5 0.30 8X 0.19 4.5 1.2 MAX B 0.1 C A B 4.3 NOTE 4 (0.15) TYP SEE DETAIL A 0.25 GAGE PLANE 0.15 0.75 0 - 8 0.05 0.50 DETAIL A TYPICAL 4221848/A 02/2015 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT PW0008A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 8X (1.5) 8X (0.45) SYMM (R0.05) 1 TYP 8 SYMM 6X (0.65) 5 4 (5.8) LAND PATTERN EXAMPLE SCALE:10X SOOPLEDNEINRG MASK METAL MSOELTDAEL RU NMDAESRK SOOPLEDNEINRG MASK 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS NOT TO SCALE 4221848/A 02/2015 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN PW0008A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 8X (1.5) SYMM (R0.05) TYP 8X (0.45) 1 8 SYMM 6X (0.65) 5 4 (5.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:10X 4221848/A 02/2015 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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