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ICGOO电子元器件商城为您提供TL7705BIP由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 提供TL7705BIP价格参考¥1.86-¥4.59以及Texas InstrumentsTL7705BIP封装/规格参数等产品信息。 你可以下载TL7705BIP参考资料、Datasheet数据手册功能说明书, 资料中有TL7705BIP详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)半导体

描述

IC 4.55V SUPPLY MONITOR 8-DIP监控电路 4.55V Monitor

产品分类

PMIC - 监控器

品牌

Texas Instruments

产品手册

点击此处下载产品Datasheet

产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

电源管理 IC,监控电路,Texas Instruments TL7705BIP-

NumberofInputsMonitored

1 Input

数据手册

点击此处下载产品Datasheet

产品型号

TL7705BIP

产品目录页面

点击此处下载产品Datasheet

产品种类

监控电路

人工复位

Manual Reset

供应商器件封装

8-PDIP

其它名称

296-3244-5
TL7705BIPE4
TL7705BIPE4-ND

包装

管件

单位重量

440.400 mg

受监控电压数

1

商标

Texas Instruments

复位

高有效/低有效

复位超时

标准传输延迟为 270 ns

安装类型

通孔

安装风格

Through Hole

封装

Tube

封装/外壳

8-DIP(0.300",7.62mm)

封装/箱体

PDIP-8

工作温度

-40°C ~ 85°C

工作电源电流

1800 uA

工厂包装数量

50

最大工作温度

+ 85 C

最小工作温度

- 40 C

标准包装

50

欠电压阈值

4.5 V

电压-阈值

4.55V

电池备用开关

No Backup

电源电压-最大

18 V

电源电压-最小

3.6 V

监视器

No Watchdog

类型

简单复位/加电复位

系列

TL7705B

被监测输入数

1 Input

输出

补充型

输出类型

Active High, Active Low, Open Drain

过电压阈值

4.6 V

重置延迟时间

Programmable

阈值电压

4.55 V

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PDF Datasheet 数据手册内容提取

Product Sample & Technical Tools & Support & Folder Buy Documents Software Community TL7702B,TL7705B,TL7733B SLVS037N–SEPTEMBER1989–REVISEDSEPTEMBER2016 TL7702B, TL7733B, and TL7705B Supply-Voltage Supervisors 1 Features 3 Description • Power-OnResetGenerator The TL7702B, TL7705B, and TL7733B are 1 integrated-circuit supply-voltage supervisors designed • AutomaticResetGenerationAfterVoltageDrop for use as reset controllers in microcomputer and • RESETOutputDefinedFromVCC≥1V microprocessor systems. The supply-voltage • PrecisionVoltageSensor supervisor monitors the supply for undervoltage conditions at the SENSE input. When an • Temperature-CompensatedVoltageReference undervoltage condition occurs during normal • TrueandComplementResetOutputs operation,outputsRESETandRESETgoactive. • ExternallyAdjustablePulseDuration The TL7702BC, TL7705BC, and TL7733BC are characterized for operation from 0°C to 70°C. The 2 Applications TL7702BI, TL7705BI, and TL7733BI are • DigitalSignalProcessors(DSPs) characterized for operation from –40°C to 85°C. The TL7705BQ is characterized for operation from –40°C • Microcontrollers(MCUs) to125°C. • FPGAs,ASICs • NotebooksandDesktopcomputers DeviceInformation(1) • Set-TopBoxes PARTNUMBER PACKAGE BODYSIZE(NOM) • IndustrialControlSystems TL77xxBD SOIC(8) 4.90mm×3.91mm TL77xxBP PDIP(8) 9.81mm×6.35mm (1) For all available packages, see the orderable addendum at theendofthedatasheet. FunctionalBlockDiagram 8 VCC Reference Voltage 1 6 3 RESET CT + 7 VX Reference – 5 SENSE Voltage 2 RESET R1 (see Note 1) + R2 – (see Note 1) 2 RESIN 1 REF 4 GND Copyright © 2016, Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

TL7702B,TL7705B,TL7733B SLVS037N–SEPTEMBER1989–REVISEDSEPTEMBER2016 www.ti.com Table of Contents 1 Features.................................................................. 1 8.3 FeatureDescription.................................................10 2 Applications........................................................... 1 8.4 DeviceFunctionalModes........................................10 3 Description............................................................. 1 9 ApplicationandImplementation........................ 11 4 RevisionHistory..................................................... 2 9.1 ApplicationInformation............................................11 9.2 TypicalApplication..................................................11 5 PinConfigurationandFunctions......................... 3 10 PowerSupplyRecommendations..................... 13 6 Specifications......................................................... 4 11 Layout................................................................... 14 6.1 AbsoluteMaximumRatings......................................4 6.2 ESDRatings..............................................................4 11.1 LayoutGuidelines.................................................14 6.3 RecommendedOperatingConditions.......................4 11.2 LayoutExample....................................................14 6.4 ThermalInformation..................................................4 12 DeviceandDocumentationSupport................. 15 6.5 ElectricalCharacteristics:TL77xxBC,TL77xxBI,and 12.1 RelatedLinks........................................................15 TL7705BQ..................................................................5 12.2 ReceivingNotificationofDocumentationUpdates15 6.6 SwitchingCharacteristics:TL77xxBC,TL77xxBI,and 12.3 CommunityResources..........................................15 TL7705BQ..................................................................5 12.4 Trademarks...........................................................15 6.7 TypicalCharacteristics..............................................7 12.5 ElectrostaticDischargeCaution............................15 7 ParameterMeasurementInformation..................7 12.6 Glossary................................................................15 8 DetailedDescription.............................................. 9 13 Mechanical,Packaging,andOrderable 8.1 Overview...................................................................9 Information........................................................... 15 8.2 FunctionalBlockDiagram.........................................9 4 Revision History ChangesfromRevisionM(May2003)toRevisionN Page • AddedESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection.................................................................................................. 1 • DeletedOrderingInformationtable;seePOAattheendofthedatasheet........................................................................... 1 • DeletedLeadtemperaturerow............................................................................................................................................... 4 • ChangedR forD(SOIC)from97to109.2andforP(PDIP)from85to51.4.................................................................... 4 θJA 2 SubmitDocumentationFeedback Copyright©1989–2016,TexasInstrumentsIncorporated ProductFolderLinks:TL7702B TL7705B TL7733B

TL7702B,TL7705B,TL7733B www.ti.com SLVS037N–SEPTEMBER1989–REVISEDSEPTEMBER2016 5 Pin Configuration and Functions DorPPackage 8-PinSOICorPDIP TopView REF 1 8 VCC RESIN 2 7 SENSE CT 3 6 RESET GND 4 5 RESET Not to scale PinFunctions PIN I/O DESCRIPTION NAME NO. Timingcapacitorinput.Thetimingcapacitordeterminesthetimedelaythattheresetoutputsremain CT 3 O activeafterthevoltageattheSENSEinputexceedsthepositive-goingthresholdvalue. GND 4 — Ground Referencevoltage.SeeElectricalCharacteristics:TL77xxBC,TL77xxBI,andTL7705BQforreference REF 1 O voltageoutputandspecification. RESET 6 O Activehighreset.SeeFigure1forRESETfunctionandtiming. RESET 5 O Activelowreset.SeeFigure1forRESETfunctionandtiming. Resetinput.WhentheResetInputislow,theRESEToutputgoeslowandtheRESETgoeshigh.When RESIN 2 I theResetInputishigh,theRESETandRESEToutputsareallowedtotriggerbasedontheSENSE voltage. SENSE 7 I Senseinput.Voltageinputtobesupervised.SeeFigure1forSENSEfunctionandtiming. VCC 8 — Supplyvoltage.SeeRecommendedOperatingConditionsforrecommendedvoltageinputrange. Copyright©1989–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:TL7702B TL7705B TL7733B

TL7702B,TL7705B,TL7733B SLVS037N–SEPTEMBER1989–REVISEDSEPTEMBER2016 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT Supplyvoltage(2),V 20 V CC RESIN –0.3 20 Inputvoltage,V V I SENSE –0.3 20 High-leveloutputcurrent,I (RESET) –30 mA OH Low-leveloutputcurrent,I (RESET) 30 mA OL Operatingvirtualjunctiontemperature,T 150 °C J Storagetemperature,T –65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Allvoltagevaluesarewithrespecttothenetworkgroundterminal. 6.2 ESD Ratings VALUE UNIT Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) 2000 V Electrostaticdischarge V (ESD) Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) 1000 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V Supplyvoltage 3.6 18 V CC V High-levelinputvoltage RESIN 2 18 V IH V Low-levelinputvoltage RESIN 0 0.8 V IL V Inputvoltage SENSE 0 18 V I I High-leveloutputcurrent RESET –20 mA OH I Low-leveloutputcurrent RESET 20 mA OL TL77xxBC 0 70 T Operatingfree-airtemperature TL77xxBI –40 85 °C A TL7705BQ –40 125 6.4 Thermal Information TL77xxB THERMALMETRIC(1)(2) D(SOIC) P(PDIP) UNIT 8PINS 8PINS R Junction-to-ambientthermalresistance 109.2 51.4 °C/W θJA R Junction-to-case(top)thermalresistance 56 40.6 °C/W θJC(top) R Junction-to-boardthermalresistance 49.9 28.6 °C/W θJB ψ Junction-to-topcharacterizationparameter 11.4 17.7 °C/W JT ψ Junction-to-boardcharacterizationparameter 49.4 28.5 °C/W JB (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. (2) MaximumpowerdissipationisafunctionofT ,R ,andT .Themaximumallowablepowerdissipationatanyallowableambient J(max) θJA A temperatureisP =(T –T )/R .OperatingattheabsolutemaximumT of150°Ccanaffectreliability. D J(max) A θJA J 4 SubmitDocumentationFeedback Copyright©1989–2016,TexasInstrumentsIncorporated ProductFolderLinks:TL7702B TL7705B TL7733B

TL7702B,TL7705B,TL7733B www.ti.com SLVS037N–SEPTEMBER1989–REVISEDSEPTEMBER2016 6.5 Electrical Characteristics: TL77xxBC, TL77xxBI, and TL7705BQ overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V High-leveloutputvoltage,RESET I =–16mA V –1.5 V OH OH CC V Low-leveloutputvoltage,RESET I =16mA 0.4 V OL OL V Referencevoltage,REF I =–500µA,T =25°C 2.48 2.53 2.58 V REF ref A TL7702B 2.505 2.53 2.555 TL7705B T =25°C 4.5 4.55 4.6 A Negative-goinginput TL7733B 3.03 3.08 3.13 V thresholdvoltageat V IT– SENSEinput TL7702B 2.48 2.53 2.58 TL7705B T =fullrange(2) 4.45 4.55 4.65 A TL7733B 3 3.08 3.16 TL7702B 10 Hysteresis,SENSE V TL7705B V =3.6Vto18V,T =25°C 30 mV HYS (V –V ) CC A IT+ IT– TL7733B 10 V Power-upresetvoltage(3) I atRESET=2mA,T =25°C 1 V RES OL A RESIN V =0.4VtoV –10 I CC I Inputcurrent µA I SENSE,TL7702B V =V to18V –0.1 –2 I REF I High-leveloutputcurrent,RESET V =18V,seeFigure8 50 µA OH O I Low-leveloutputcurrent,RESET V =0V,seeFigure7 –50 µA OL O V =15V,RESIN≥2V 1.8 3 SENSE I Supplycurrent µA CC V =18V,T =fullrange(2) 3.5 CC A (1) Allelectricalcharacteristicsaremeasuredwith0.1-µFcapacitorsconnectedatREF,CT,andVCCtoGND. (2) Fullrangeis0°Cto70°CfortheC-suffixdevices,–40°Cto85°CfortheI-suffixdevices,and–40°Cto125°CfortheQ-suffixdevice. (3) ThisisthelowestvoltageatwhichRESETbecomesactive. 6.6 Switching Characteristics: TL77xxBC, TL77xxBI, and TL7705BQ V =5V,C open,T =25°C,overoperatingfree-airtemperaturerange(unlessotherwisenoted) CC T A PARAMETER FROM(INPUT) TO(OUTPUT) TESTCONDITIONS MIN TYP MAX UNIT Propagationdelaytimefromlow- SeeFigure1, t RESIN RESET 270 500 ns PLH leveltohigh-leveloutput Figure2,Figure7 Propagationdelaytimefrom SeeFigure1, t RESIN RESET 270 500 ns PHL high-leveltolow-leveloutput Figure2,Figure8 RESIN SeeFigure9, 150 t Effectivepulseduration ns w SENSE Figure10 100 RESET SeeFigure7, 75 t Risetime ns r RESET Figure8,Figure1 75 150 RESET SeeFigure7, 150 200 t Falltime ns f RESET Figure8,Figure1 50 Copyright©1989–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:TL7702B TL7705B TL7733B

TL7702B,TL7705B,TL7733B SLVS037N–SEPTEMBER1989–REVISEDSEPTEMBER2016 www.ti.com Voltage Fault VIT+ VIT– VIT+ SENSE 0 V VIH RESIN Undefined 2 V 0.8 V VIL tf tr tPLH 90% 90% 90% VOH RESET 50% 10% td tf td td 90% RESET 50% 10% 10% 10% 10% VOL tr tPHL Copyright © 2016, Texas Instruments Incorporated Figure1. TimingDiagram VCC and SENSE VIT+ VIT- VIT– VIT+ Vres Vres 0 RESET td td Output Undefined Output Undefined 0 Copyright © 2016, Texas Instruments Incorporated Figure2. V andV TimingDiagram IT RES 6 SubmitDocumentationFeedback Copyright©1989–2016,TexasInstrumentsIncorporated ProductFolderLinks:TL7702B TL7705B TL7733B

TL7702B,TL7705B,TL7733B www.ti.com SLVS037N–SEPTEMBER1989–REVISEDSEPTEMBER2016 6.7 Typical Characteristics 20 700 RESET tr 18 600 s 16 RESET tr me - n 500 RESET tf Ti –Time n ns 1142 eassertion 430000 o D erti t - RESET tf ss 10 200 A – t 8 RESET tf 100 RESET tr 6 0 0 2 4 6 8 10 0 2 4 6 8 10 RL –L oad Resistance – k(cid:159) RL – Load Resistance – k(cid:159) Figure3.AssertionTimevsLoadResistance Figure4.DeassertionTimevsLoadResistance 36 2.1 1.9 30 1.7 – nsme 24 –me µs 1.5 – Assertion Tit 1182 RESET tr RESET tf t- Deassertion Ti 0011....9713 RESET tf and RESET tr 0.5 6 0.3 0 25 50 75 100 125 150 175 200 0 25 50 75 100 125 150 175 200 CL -Load Capacitance - pF CL - Load Capacitance - pF Figure5.AssertionTimevsLoadCapacitance Figure6.DeassertionTimevsLoadCapacitance 7 Parameter Measurement Information 5 V VCC DUT RESET RL 15 pF (see Note 1) (see Note 2) RESET OUTPUT CONFIGURATION Copyright © 2016, Texas Instruments Incorporated (1) ForI andI ,R =10kΩ.Forallswitchingcharacteristics,R =511Ω. OL OH L L (2) Thisfigureincludesjigandprobecapacitance. Figure7. RESETOutputConfiguration Copyright©1989–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:TL7702B TL7705B TL7733B

TL7702B,TL7705B,TL7733B SLVS037N–SEPTEMBER1989–REVISEDSEPTEMBER2016 www.ti.com Parameter Measurement Information (continued) 5V RL (see Note 1) RESET DUT 15 pF (see Note 2) GND RESET OUTPUT CONFIGURATION Copyright © 2016, Texas Instruments Incorporated (1) ForI andI ,R =10kΩ.Forallswitchingcharacteristics,R =511Ω. OL OH L L (2) Thisfigureincludesjigandprobecapacitance. Figure8. RESETOutputConfiguration tw 5 V 2.5 V 0 V RESIN Figure9. InputPulseDefinitionRESIN tw VT + 2V VT VT - 2V SENSE Figure10. InputPulseDefinitionSENSE 8 SubmitDocumentationFeedback Copyright©1989–2016,TexasInstrumentsIncorporated ProductFolderLinks:TL7702B TL7705B TL7733B

TL7702B,TL7705B,TL7733B www.ti.com SLVS037N–SEPTEMBER1989–REVISEDSEPTEMBER2016 8 Detailed Description 8.1 Overview The TL7702B, TL7705B, and TL7733B are integrated-circuit supply-voltage supervisors designed for use as reset controllers in microcomputer and microprocessor systems. The supply-voltage supervisor monitors the supply for undervoltage conditions at the SENSE input. During power up, the RESET output becomes active (low) when V attains a value approaching 1 V. As V approaches 3 V (assuming that SENSE is above V ), CC CC T+ thedelay-timerfunctionactivatesatimedelay,afterwhichoutputs RESETandRESETgoinactive(highandlow, respectively). When an undervoltage condition occurs during normal operation, outputs RESET and RESET go active. To ensure that a complete reset occurs, the reset outputs remain active for a time delay after the voltage at the SENSE input exceeds the positive-going threshold value. The time delay is determined by the value of the externalcapacitorC :t ≈2.6 × 104×C ,whereC isinfarads(F)andt isinseconds(s). T d T T d Anexternalcapacitor(typically0.1µF)mustbeconnectedtoREFtoreducetheinfluenceoffasttransientsinthe supplyvoltage. 8.2 Functional Block Diagram The functional block diagram is shown for illustrative purposes only; the actual circuit includes a trimming networktoadjustthereferencevoltageandsense-comparatortrippoint. 8 VCC Reference Voltage 1 6 3 RESET CT + 7 VX Reference – 5 SENSE Voltage 2 RESET R1 (see Note 1) + R2 – (see Note 1) 2 RESIN 1 REF 4 GND Copyright © 2016, Texas Instruments Incorporated Copyright©1989–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:TL7702B TL7705B TL7733B

TL7702B,TL7705B,TL7733B SLVS037N–SEPTEMBER1989–REVISEDSEPTEMBER2016 www.ti.com 8.3 Feature Description 8.3.1 WideSupply-VoltageRange TheTL77xxBfamilyoperatesusingawidesupplyvoltagefrom3.6Vto18V. 8.3.2 AdjustablePulseDuration The CT pin enables the ability to set a user-defined time delay in order to ensure that the fault condition is recognized. The external capacitor charges based on an internal current source until the voltage at the CT pin exceedsthatoftheinternalreferencevoltage. The time delay is determined by the value of the external capacitor C : t ≈ 2.6 × 104 × C , where C is in T d T T farads(F)andt isinseconds(s). d The current source to charge the timing capacitor varies ±15%. Reference Voltage 2 is approximately 1.8 V and varies approximately ±5%. Once the timing capacitor charges, it discharges to about 0.6 V, not completely to 0V. 8.4 Device Functional Modes Figure11displayshowtheRESETandRESEToutputpinsrespondtothechangeinthetheSENSEand RESIN input pins. When the RESIN pin is high, the RESET outputs are able to respond to a drop in the supply voltage at the SENSE pin. When the RESIN pin is low, the RESET and RESET pins are set HIGH and LOW respectively. Voltage Fault VIT+ VIT– VIT+ SENSE 0 V VIH RESIN Undefined 2 V 0.8 V VIL tf tr tPLH 90% 90% 90% VOH RESET 50% 10% td tf td td 90% RESET 50% 10% 10% 10% 10% VOL tr tPHL Copyright © 2016, Texas Instruments Incorporated Figure11. TL77xxBRESETand RESETResponseandTiming 10 SubmitDocumentationFeedback Copyright©1989–2016,TexasInstrumentsIncorporated ProductFolderLinks:TL7702B TL7705B TL7733B

TL7702B,TL7705B,TL7733B www.ti.com SLVS037N–SEPTEMBER1989–REVISEDSEPTEMBER2016 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information Figure 12 shows an application where the TL7705B device is being used to sense the voltage supply for a microcontroller that is supplied with 5 V. If the voltage supply drops below the threshold voltage, the RESET pin ispulledLOW,signalingthemicrocontrollertoreset. 9.2 Typical Application TL7705B Copyright © 2016, Texas Instruments Incorporated Figure12. ResetControllerSchematicforaMicroprocessor 9.2.1 DesignRequirements The external components required include the decoupling capacitor for the REF pin and the timing capacitor for the CT pin. Additionally, because the RESET output is open collector, a pullup resistor is required to ensure the correctHIGHlevelforthemicrocontrollerRESETpin. 9.2.2 DetailedDesignProcedure TIrecommendspullupandpulldownresistorsof10kΩ. Toachievea2.6mstimedelay,useC =0.1µF. T Both outputs of the TL770xB must be terminated with similar value resistors, even when only one is being used. This prevents unwanted plateauing in either output waveform during switching, which may be interpreted as an undefinedstateordelaysystemreset Copyright©1989–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:TL7702B TL7705B TL7733B

TL7702B,TL7705B,TL7733B SLVS037N–SEPTEMBER1989–REVISEDSEPTEMBER2016 www.ti.com Typical Application (continued) 9.2.3 ApplicationCurve 4.65 4.6 V) (T- 4.55 VI 4.5 4.45 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 Temperature (°C) D001 Figure13. TL7705BThresholdVoltagevsTemperature 12 SubmitDocumentationFeedback Copyright©1989–2016,TexasInstrumentsIncorporated ProductFolderLinks:TL7702B TL7705B TL7733B

TL7702B,TL7705B,TL7733B www.ti.com SLVS037N–SEPTEMBER1989–REVISEDSEPTEMBER2016 10 Power Supply Recommendations System VS Supply 8 10 k(cid:159) VCC 7 5 To System SENSE RESET Reset Input 2 RESET RESIN (from system) 1 REF RT 3 CT RESET 6 To System (see text) RESET GND 0.1 µF CT 4 10 k(cid:159) Copyright © 2016, Texas Instruments Incorporated Figure14. SystemResetControllerWithUndervoltageSensing When the TL770xB SENSE terminal is used to monitor V , TI recommends a current-limiting resistor in series CC with C . During normal operation, the timing capacitor is charged by the onboard current source to approximately T V or an internal voltage clamp (≈7.1-V Zener), whichever is less. When the circuit then is subjected to an CC undervoltage condition during which V is rapidly slewed down, the voltage on CT exceeds that on V . This CC CC forward biases a secondary path internally, which falsely activates the outputs. A fault is indicated when V CC dropsbelowV ,notwhenV fallsbelowV . (CT) SENSE T– Addingtheexternalresistor,R ,preventsfalsetriggering.Itsvalueiscalculatedasfollows: T (V –V )/R (CT) T- T where • V =V or7.1V,whicheverisless (CT) CC • V =4.55V(nom) T– • R =valueofseriesresistorrequired (1) T ForV =5V CC (5–4.55)/R <1mA (2) T Therefore, R >450Ω (3) T Usinga20%-toleranceresistor,R shouldbegreaterthan560 Ω. T Adding this series resistor changes the duration of the reset pulse by no more than 10%. R extends the T discharge of C , but also skews the V threshold. These effects tend to cancel one another. The precise T (CT) percentage change can be derived theoretically, but the equation is complicated by this interaction and is dependentuponthedurationofthesupply-voltagefaultcondition. Both outputs of the TL770xB must be terminated with similar value resistors, even when only one is being used. This prevents unwanted plateauing in either output waveform during switching, which may be interpreted as an undefinedstateordelaysystemreset. Copyright©1989–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:TL7702B TL7705B TL7733B

TL7702B,TL7705B,TL7733B SLVS037N–SEPTEMBER1989–REVISEDSEPTEMBER2016 www.ti.com 11 Layout 11.1 Layout Guidelines Figure 15 shows an example layout for the TL7705B device. As the RESET and RESET pins are open collector outputs, place pullup and pulldown resistors on the RESET and RESET pins respectively. A capacitor must be placedontheREFpintostabilizethereference.Thiscanhelptopreventfalsetriggeringifnoisecouplesintothe reference. 11.2 Layout Example 5V 1 REF VCC 8 2 RESIN SENSE 7 10 k(cid:13) 3 CT RESET 6 0.1 (cid:29)F 0.1 (cid:29)F 4 GND RESET 5 10 k(cid:13) GND Figure15. TL7705BLayoutExample 14 SubmitDocumentationFeedback Copyright©1989–2016,TexasInstrumentsIncorporated ProductFolderLinks:TL7702B TL7705B TL7733B

TL7702B,TL7705B,TL7733B www.ti.com SLVS037N–SEPTEMBER1989–REVISEDSEPTEMBER2016 12 Device and Documentation Support 12.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources,toolsandsoftware,andquickaccesstosampleorbuy. Table1.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER SAMPLE&BUY DOCUMENTS SOFTWARE COMMUNITY TL7702B Clickhere Clickhere Clickhere Clickhere Clickhere TL7705B Clickhere Clickhere Clickhere Clickhere Clickhere TL7733B Clickhere Clickhere Clickhere Clickhere Clickhere 12.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 12.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.4 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage. ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemore susceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications. 12.6 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©1989–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:TL7702B TL7705B TL7733B

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TL7702BCD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 7702BC & no Sb/Br) TL7702BCDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 7702BC & no Sb/Br) TL7702BCDRE4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 7702BC & no Sb/Br) TL7702BCDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 7702BC & no Sb/Br) TL7702BCP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TL7702BCP & no Sb/Br) TL7702BCPE4 ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TL7702BCP & no Sb/Br) TL7702BID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 7702BI & no Sb/Br) TL7702BIDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 7702BI & no Sb/Br) TL7702BIP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type -40 to 85 TL7702BIP & no Sb/Br) TL7705BCD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-2-260C-1 YEAR 0 to 70 7705BC & no Sb/Br) TL7705BCDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR 0 to 70 7705BC & no Sb/Br) TL7705BCDRE4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR 0 to 70 7705BC & no Sb/Br) TL7705BCDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR 0 to 70 7705BC & no Sb/Br) TL7705BCP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TL7705BCP & no Sb/Br) TL7705BID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 7705BI & no Sb/Br) TL7705BIDE4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 7705BI & no Sb/Br) TL7705BIDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 7705BI & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TL7705BIP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type -40 to 85 TL7705BIP & no Sb/Br) TL7705BQD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 7705BQ & no Sb/Br) TL7705BQDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 7705BQ & no Sb/Br) TL7705BQDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 7705BQ & no Sb/Br) TL7705BQDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 7705BQ & no Sb/Br) TL7733BCD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 7733BC & no Sb/Br) TL7733BCDE4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 7733BC & no Sb/Br) TL7733BCDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 7733BC & no Sb/Br) TL7733BCDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 7733BC & no Sb/Br) TL7733BCDRE4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 7733BC & no Sb/Br) TL7733BCP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TL7733BCP & no Sb/Br) TL7733BID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 7733BI & no Sb/Br) TL7733BIDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 7733BI & no Sb/Br) TL7733BIDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 7733BI & no Sb/Br) TL7733BIP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type -40 to 85 TL7733BIP & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 20-Feb-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TL7702BCDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL7702BIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL7705BCDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL7705BIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL7705BQDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL7705BQDRG4 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL7733BCDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL7733BIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 20-Feb-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TL7702BCDR SOIC D 8 2500 340.5 338.1 20.6 TL7702BIDR SOIC D 8 2500 340.5 338.1 20.6 TL7705BCDR SOIC D 8 2500 340.5 338.1 20.6 TL7705BIDR SOIC D 8 2500 340.5 338.1 20.6 TL7705BQDR SOIC D 8 2500 350.0 350.0 43.0 TL7705BQDRG4 SOIC D 8 2500 350.0 350.0 43.0 TL7733BCDR SOIC D 8 2500 340.5 338.1 20.6 TL7733BIDR SOIC D 8 2500 340.5 338.1 20.6 PackMaterials-Page2

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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