Product Order Technical Tools & Support & Folder Now Documents Software Community TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M SLOS080N–SEPTEMBER1978–REVISEDJULY2017 TL07xx Low-Noise JFET-Input Operational Amplifiers 1 Features 3 Description • LowPowerConsumption The TL07xx JFET-input operational amplifiers 1 incorporate well-matched, high-voltage JFET and • WideCommon-ModeandDifferentialVoltage bipolar transistors in a monolithic integrated circuit. Ranges The devices feature high slew rates, low-input bias • LowInputBiasandOffsetCurrents and offset currents, and low offset-voltage • OutputShort-CircuitProtection temperature coefficient. The low harmonic distortion and low noise make the TL07x series ideally suited • LowTotalHarmonicDistortion:0.003%(Typical) for high-fidelity and audio pre-amplifier applications. • LowNoise The TL071 device has offset pins to support external V =18nV/√Hz(Typical)atf=1kHz inputoffsetcorrection. n • High-InputImpedance:JFETInputStage DeviceInformation(1) • InternalFrequencyCompensation PARTNUMBER PACKAGE BODYSIZE(NOM) • Latch-Up-FreeOperation SOIC(14) 8.65mm×3.91mm • HighSlewRate:13V/μs(Typical) TL07xxD SOIC(8) 4.90mmx3.90mm • Common-ModeInputVoltageRange TL07xxJG CDIP(8) 9.59mmx6.67mm IncludesV CC+ TL074xJ CDIP(14) 19.56mm×6.92mm 2 Applications TL07xxP PDIP(8) 9.59mmx6.35mm TL07xxPS SO(8) 6.20mmx5.30mm • MotorIntegratedSystems:UPS TL074xN PDIP(14) 19.3mm×6.35mm • DrivesandControlSolutions:ACInverterandVF TL074xNS SO(14) 10.30mm×5.30mm Drives TL07xxPW TSSOP(8) 4.40mmx3.00mm • Renewables:SolarInverters TL074xPW TSSOP(14) 5.00mm×4.40mm • ProAudioMixers (1) For all available packages, see the orderable addendum at • DLPFrontProjectionSystem theendofthedatasheet. • Oscilloscopes LogicSymbols TL071 TL072 (each amplifier) OFFSET N1 TL074 (each amplifier) IN+ + IN+ + OUT OUT IN− − IN− − OFFSET N2 Copyright © 2017,Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M SLOS080N–SEPTEMBER1978–REVISEDJULY2017 www.ti.com Table of Contents 1 Features.................................................................. 1 TL07xBC,TL07xI.....................................................19 2 Applications........................................................... 1 6.18 TypicalCharacteristics..........................................20 3 Description............................................................. 1 6.1 ParameterMeasurementInformation.....................25 4 RevisionHistory..................................................... 2 7 DetailedDescription............................................ 26 7.1 Overview.................................................................26 5 PinConfigurationandFunctions......................... 4 7.2 FunctionalBlockDiagram.......................................26 6 Specifications....................................................... 10 7.3 FeatureDescription.................................................27 6.1 AbsoluteMaximumRatings....................................10 7.4 DeviceFunctionalModes........................................27 6.2 ESDRatings............................................................10 8 ApplicationandImplementation........................ 28 6.3 RecommendedOperatingConditions.....................10 8.1 ApplicationInformation............................................28 6.4 ThermalInformation:TL071x..................................11 8.2 TypicalApplication..................................................28 6.5 ThermalInformation:TL072x..................................11 8.3 UnityGainBuffer.....................................................29 6.6 ThermalInformation:TL072x(cont.).......................11 8.4 SystemExamples...................................................30 6.7 ThermalInformation:TL074x..................................11 9 PowerSupplyRecommendations...................... 32 6.8 ThermalInformation:TL074x(cont)........................12 6.9 ThermalInformation:TL074x(cont)........................12 10 Layout................................................................... 32 6.10 ElectricalCharacteristics:TL071C,TL072C, 10.1 LayoutGuidelines.................................................32 TL074C....................................................................13 10.2 LayoutExample....................................................33 6.11 ElectricalCharacteristics:TL071AC,TL072AC, 11 DeviceandDocumentationSupport................. 34 TL074AC..................................................................14 11.1 DocumentationSupport........................................34 6.12 ElectricalCharacteristics:TL071BC,TL072BC, 11.2 RelatedLinks........................................................34 TL074BC..................................................................15 11.3 CommunityResources..........................................34 6.13 ElectricalCharacteristics:TL071I,TL072I, 11.4 Trademarks...........................................................34 TL074I......................................................................16 11.5 ElectrostaticDischargeCaution............................34 6.14 ElectricalCharacteristics:TL071M,TL072M........17 11.6 Glossary................................................................34 6.15 ElectricalCharacteristics:TL074M.......................18 12 Mechanical,Packaging,andOrderable 6.16 SwitchingCharacteristics:TL07xM.......................19 Information........................................................... 35 6.17 SwitchingCharacteristics:TL07xC,TL07xAC, 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionM(February2014)toRevisionN Page • Updateddatasheettexttolatestdocumentationandtranslationstandards......................................................................... 1 • AddedTL072MandTL074Mdevicestodatasheet ............................................................................................................. 1 • RewrotetextinDescriptionsection ....................................................................................................................................... 1 • ChangedTL07x8-pinPDIPpackageto8-pinCDIPpackageinDeviceInformationtable .................................................. 1 • Deleted20-pinLCCCpackagefromDeviceInformationtable ............................................................................................. 1 • Added2017copyrightstatementtofrontpageschematic..................................................................................................... 1 • DeletedTL071xFK(LCCC)pinoutdrawingandpinouttableinPinConfigurationsandFunctionssection ........................4 • UpdatedpinoutdiagramsandpinouttablesinPinConfigurationsandFunctionssection ................................................... 5 • DeleteddifferentialinputvoltageparameterfromAbsoluteMaximumRatingstable ......................................................... 10 • DeletedtablenotesfromAbsoluteMaximumRatingstable ............................................................................................... 10 • AddednewtablenotetoAbsoluteMaximumRatingstable ................................................................................................ 10 • Changedminimumsupplyvoltagevaluefrom–18Vto–0.3VinAbsoluteMaximumRatingstable................................. 10 • Changedmaximumsupplyvoltagefrom18Vto36VinAbsoluteMaximumRatingstable............................................... 10 • Changedminimuminputvoltagevaluefrom–15VtoV –0.3VinAbsoluteMaximumRatingstable...........................10 CC– • Changedmaximuminputvoltagefrom15VtoV +36VinAbsoluteMaximumRatingstable....................................... 10 CC– • AddedinputclampcurrentparametertoAbsoluteMaximumRatingstable ....................................................................... 10 • Changedcommon-modevoltagemaximumvaluefromV –4VtoV intheRecommendedOperating CC+ CC+ Conditionstable.................................................................................................................................................................... 10 2 SubmitDocumentationFeedback Copyright©1978–2017,TexasInstrumentsIncorporated ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M www.ti.com SLOS080N–SEPTEMBER1978–REVISEDJULY2017 Revision History (continued) • ChangeddevicesinRecommendedOperatingConditionstablefromTL07xAandTL07xBtoTL07xACand TL07xBC .............................................................................................................................................................................. 10 • AddedTL07xIoperatingfree-airtemperatureminimumvalueof–40°CtoRecommendedOperatingConditionstable ...10 • AddedU(CFP)packagethermalvaluestoThermalInformation:TL072x(cont.)table...................................................... 11 • AddedW(CFP)packagethermalvaluestoThermalInformation:TL074x(cont.)table..................................................... 12 • AddedFigure20toTable1 ................................................................................................................................................. 20 • AddedFigure20toTypicalCharacteristicssection............................................................................................................. 24 • AddedsecondTypicalApplicationsectionapplicationcurves ............................................................................................ 29 • ReformatteddocumentreferencesinLayoutGuidelinessection ........................................................................................ 32 • UpdatedformattingofdocumentreferenceinRelatedDocumentationsection .................................................................. 34 ChangesfromRevisionL(February2014)toRevisionM Page • AddedDeviceInformationtable,PinConfigurationandFunctionssection,ESDRatingstable,FeatureDescription section,DeviceFunctionalModes,ApplicationandImplementationsection,PowerSupplyRecommendations section,Layoutsection........................................................................................................................................................... 1 • MovedTypicalCharacteristicsintoSpecificationssection. ................................................................................................. 20 ChangesfromRevisionK(January2014)toRevisionL Page • MovedT toHandlingRatingstable .................................................................................................................................. 10 stg • AddedDeviceandDocumentationSupportsection............................................................................................................. 34 • AddedMechanical,Packaging,andOrderableInformationsection..................................................................................... 34 ChangesfromRevisionJ(March2005)toRevisionK Page • UpdateddocumenttonewTIdatasheetformat-nospecificationchanges.......................................................................... 1 • AddedESDwarning............................................................................................................................................................. 34 Copyright©1978–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M SLOS080N–SEPTEMBER1978–REVISEDJULY2017 www.ti.com 5 Pin Configuration and Functions TL071xD,P,andPSPackage 8-PinSOIC,PDIP,SO TopView OFFSET N1 1 8 NC IN– 2 7 VCC+ IN+ 3 6 OUT VCC– 4 5 OFFSET N2 Not to scale NC-nointernalconnection PinFunctions:TL071x PIN I/O DESCRIPTION NAME NO. IN– 2 I Invertinginput IN+ 3 I Noninvertinginput NC 8 — Donotconnect OFFSETN1 1 — Inputoffsetadjustment OFFSETN2 5 — Inputoffsetadjustment OUT 6 O Output VCC– 4 — Powersupply VCC+ 7 — Powersupply 4 SubmitDocumentationFeedback Copyright©1978–2017,TexasInstrumentsIncorporated ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M www.ti.com SLOS080N–SEPTEMBER1978–REVISEDJULY2017 TL072xD,JG,P,PSandPWPackage 8-PinSOIC,CDIP,PDIP,SO TopView 1OUT 1 8 VCC+ 1IN– 2 7 2OUT 1IN+ 3 6 2IN– VCC– 4 5 2IN+ Not to scale PinFunctions:TL072x PIN I/O DESCRIPTION NAME NO. 1IN– 2 I Invertinginput 1IN+ 3 I Noninvertinginput 1OUT 1 O Output 2IN– 6 I Invertinginput 2IN+ 5 I Noninvertinginput 2OUT 7 O Output VCC– 4 — Powersupply VCC+ 8 — Powersupply Copyright©1978–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M SLOS080N–SEPTEMBER1978–REVISEDJULY2017 www.ti.com TL072xUPackage 10-PinCFP TopView NC 1 10 NC 1OUT 2 9 VCC+ 1IN– 3 8 2OUT 1IN+ 4 7 2IN– VCC– 5 6 2IN+ Not to scale NC-nointernalconnection PinFunctions:TL072x PIN I/O DESCRIPTION NAME NO. 1IN– 3 I Invertinginput 1IN+ 4 I Noninvertinginput 1OUT 2 O Output 2IN– 7 I Invertinginput 2IN+ 6 I Noninvertinginput 2OUT 8 O Output NC 1,10 — Donotconnect VCC– 5 — Powersupply VCC+ 9 — Powersupply 6 SubmitDocumentationFeedback Copyright©1978–2017,TexasInstrumentsIncorporated ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M www.ti.com SLOS080N–SEPTEMBER1978–REVISEDJULY2017 TL072FKPackage 20-PinLCCC TopView T + U C C O C C C N 1 N V N 3 2 1 0 9 2 1 NC 4 18 NC 1IN– 5 17 2OUT NC 6 16 NC 1IN+ 7 15 2IN– NC 8 14 NC 0 1 2 3 9 1 1 1 1 Not to scale C – C + C N C N N N VC 2I NC-nointernalconnection PinFunctions:TL072x PIN I/O DESCRIPTION NAME NO. 1IN– 5 I Invertinginput 1IN+ 7 I Noninvertinginput 1OUT 2 O Output 2IN– 15 I Invertinginput 2IN+ 12 I Noninvertinginput 2OUT 17 O Output 1,3,4,6,8, NC 9,11,13,14, — Donotconnect 16,18,19 VCC– 10 — Powersupply VCC+ 20 — Powersupply Copyright©1978–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M SLOS080N–SEPTEMBER1978–REVISEDJULY2017 www.ti.com TL074D,N,NS,PW,J,andWPackages 14-PinSOIC,PDIP,SO,TSSOP,CDIPandCFP TopView 1OUT 1 14 4OUT 1IN– 2 13 4IN– 1IN+ 3 12 4IN+ VCC+ 4 11 VCC– 2IN+ 5 10 3IN+ 2IN– 6 9 3IN– 2OUT 7 8 3OUT Not to scale PinFunctions:TL074x PIN I/O DESCRIPTION NAME NO. 1IN– 2 I Invertinginput 1IN+ 3 I Noninvertinginput 1OUT 1 O Output 2IN– 6 I Invertinginput 2IN+ 5 I Noninvertinginput 2OUT 7 O Output 3IN– 9 I Invertinginput 3IN+ 10 I Noninvertinginput 3OUT 8 O Output 4IN– 13 I Invertinginput 4IN+ 12 I Noninvertinginput 4OUT 14 O Output V 11 — Powersupply CC– V 4 — Powersupply CC+ 8 SubmitDocumentationFeedback Copyright©1978–2017,TexasInstrumentsIncorporated ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M www.ti.com SLOS080N–SEPTEMBER1978–REVISEDJULY2017 TL074FKPackage 20-PinLCCC TopView T T – U U – N O C O N 1I 1 N 4 4I 3 2 1 0 9 2 1 1IN+ 4 18 4IN+ NC 5 17 NC VCC+ 6 16 VCC– NC 7 15 NC 2IN+ 8 14 3IN+ 0 1 2 3 9 1 1 1 1 Not to scale – T C T – N U N U N 2I O O 3I 2 3 NC-nointernalconnection PinFunctions:TL074x PIN I/O DESCRIPTION NAME NO. 1IN– 3 I Invertinginput 1IN+ 4 I Noninvertinginput 1OUT 2 O Output 2IN– 9 I Invertinginput 2IN+ 8 I Noninvertinginput 2OUT 10 O Output 3IN– 13 I Invertinginput 3IN+ 14 I Noninvertinginput 3OUT 12 O Output 4IN– 19 I Invertinginput 4IN+ 18 I Noninvertinginput 4OUT 20 O Output 1,5,7,11, NC — Donotconnect 15,17 VCC– 16 — Powersupply VCC+ 6 — Powersupply Copyright©1978–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M SLOS080N–SEPTEMBER1978–REVISEDJULY2017 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted) (1) MIN MAX UNIT V -V Supplyvoltage –0.3 36 V CC+ CC– V Inputvoltage (2) V –0.3 V +36 V I CC– CC– I Inputclampcurrent –50 mA IK Durationofoutputshortcircuit(3) Unlimited T Operatingvirtualjunctiontemperature 150 °C J Casetemperaturefor60seconds-FKpackage 260 °C Leadtemperature1.8mm(1/16inch)fromcasefor10seconds 300 °C T Storagetemperature –65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommendedOperating Conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Differentialvoltageonlylimitedbyinputvoltage. (3) Theoutputmaybeshortedtogroundortoeithersupply.Temperatureandsupplyvoltagesmustbelimitedtoensurethatthedissipation ratingisnotexceeded. 6.2 ESD Ratings VALUE UNIT Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±2000 V(ESD) Electrostaticdischarge Charged-devicemodel(CDM),perJEDECspecificationJESD22- V C101(2) ±1000 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V Supplyvoltage (1) 5 15 V CC+ V Supplyvoltage (1) –5 –15 V CC– V Common-modevoltage V +4 V V CM CC– CC+ TL07xM –55 125 TL08xQ –40 125 T Operatingfree-airtemperature °C A TL07xI –40 85 TL07xAC,TL07xBC,TL07xC 0 70 (1) V andV arenotrequiredtobeofequalmagnitude,providedthatthetotalV (V –V )isbetween10Vand30V. CC+ CC– CC CC+ CC– 10 SubmitDocumentationFeedback Copyright©1978–2017,TexasInstrumentsIncorporated ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M www.ti.com SLOS080N–SEPTEMBER1978–REVISEDJULY2017 6.4 Thermal Information: TL071x TL071x THERMALMETRIC(1) D(SOIC) P(PDIP) PS(SO) UNIT 8PINS 8PINS 8PINS R Junction-to-ambientthermalresistance 97 85 95 °C/W θJA R Junction-to-case(top)thermalresistance — — — °C/W θJC(top) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. 6.5 Thermal Information: TL072x TL072x THERMALMETRIC(1) D(SOIC) JG(CDIP) P(PDIP) PS(SO) UNIT 8PINS 8PINS 8PINS 8PINS R Junction-to-ambientthermalresistance 97 — 85 95 °C/W θJA R Junction-to-case(top)thermalresistance — 15.05 — — °C/W θJC(top) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. 6.6 Thermal Information: TL072x (cont.) TL072x THERMALMETRIC(1) PW(TSSOP) U(CFP) FK(LCCC) UNIT 8PINS 10PINS 20PINS R Junction-to-ambientthermalresistance 150 169.8 — °C/W θJA R Junction-to-case(top)thermalresistance — 62.1 5.61 °C/W θJC(top) R Junction-to-boardthermalresistance — 176.2 — °C/W θJB ψ Junction-to-topcharacterizationparameter — 48.4 — °C/W JT ψ Junction-to-boardcharacterizationparameter — 144.1 — °C/W JB R Junction-to-case(bottom)thermalresistance — 5.4 — °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. 6.7 Thermal Information: TL074x TL074x THERMALMETRIC(1) D(SOIC) N(PDIP) NS(SO) UNIT 14PINS 14PINS 14PINS R Junction-to-ambientthermalresistance 86 80 76 °C/W θJA R Junction-to-case(top)thermalresistance — — — °C/W θJC(top) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. Copyright©1978–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M SLOS080N–SEPTEMBER1978–REVISEDJULY2017 www.ti.com 6.8 Thermal Information: TL074x (cont). TL074x THERMALMETRIC(1) J(CDIP) PW(TSSOP) W(CFP) UNIT 14PINS 14PINS 14PINS R Junction-to-ambientthermalresistance — 113 128.8 °C/W θJA R Junction-to-case(top)thermalresistance 14.5 — 56.1 °C/W θJC(top) R Junction-to-boardthermalresistance — — 127.6 °C/W θJB ψ Junction-to-topcharacterizationparameter — — 29 °C/W JT ψ Junction-to-boardcharacterizationparameter — — 106.1 °C/W JB R Junction-to-case(bottom)thermalresistance — — 0.5 °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. 6.9 Thermal Information: TL074x (cont). TL074x THERMALMETRIC(1) FK(LCCC) UNIT 20PINS R Junction-to-ambientthermalresistance — °C/W θJA R Junction-to-case(top)thermalresistance 5.61 °C/W θJC(top) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. 12 SubmitDocumentationFeedback Copyright©1978–2017,TexasInstrumentsIncorporated ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M www.ti.com SLOS080N–SEPTEMBER1978–REVISEDJULY2017 6.10 Electrical Characteristics: TL071C, TL072C, TL074C V =±15V(unlessotherwisenoted) CC± PARAMETER TESTCONDITIONS (1) (2) MIN TYP MAX UNIT V Inputoffsetvoltage VO=0 TA=25°C 3 10 mV IO RS=50Ω TA=Fullrange 13 α Temperaturecoefficientof VO=0 T =Fullrange 18 µV/°C inputoffsetvoltage R =50Ω A S T =25°C 5 100 pA A I Inputoffsetcurrent V =0 IO O T =Fullrange 10 nA A T =25°C 65 200 pA I Inputbiascurrent (3) V =0 A IB O T =Fullrange 7 nA A Common-modeinputvoltage V T =25°C ±11 –12to15 V ICR range A R =10kΩ T =25°C ±12 ±13.5 L A Maximumpeakoutput V R ≥10kΩ ±12 V OM voltageswing L T =Fullrange A R ≥2kΩ ±10 L A Large-signaldifferential VO=±10V TA=25°C 25 200 V/mV VD voltageamplification RL≥2kΩ TA=Fullrange 15 B Utility-gainbandwidth T =25°C 3 MHz 1 A r Inputresistance T =25°C 1012 Ω I A V =V Common-moderejection IC ICR(min) CMRR V =0 T =25°C 70 100 dB ratio O A R =50Ω S V =±9Vto±15V Supplyvoltagerejectionratio CC k V =0 T =25°C 70 100 dB SVR (ΔV /ΔV ) O A CC± IO R =50Ω S Supplycurrent(each I V =0;noload T =25°C 1.4 2.5 mA CC amplifier) O A V /V Crosstalkattenuation A =100 T =25°C 120 dB O1 O2 VD A (1) Allcharacteristicsaremeasuredunderopen-loopconditionswithzerocommon-modevoltage,unlessotherwisespecified. (2) FullrangeisT =0°Cto70°C. A (3) InputbiascurrentsofanFET-inputoperationalamplifierarenormaljunctionreversecurrents,whicharetemperaturesensitive,as showninFigure1.Pulsetechniquesmustbeusedthatmaintainthejunctiontemperatureasclosetotheambienttemperatureas possible. Copyright©1978–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M SLOS080N–SEPTEMBER1978–REVISEDJULY2017 www.ti.com 6.11 Electrical Characteristics: TL071AC, TL072AC, TL074AC V =±15V(unlessotherwisenoted) CC± PARAMETER TESTCONDITIONS (1) (2) MIN TYP MAX UNIT V Inputoffsetvoltage VO=0 TA=25°C 3 6 mV IO RS=50Ω TA=Fullrange 7.5 α Temperaturecoefficientof VO=0 T =Fullrange 18 µV/°C inputoffsetvoltage R =50Ω A S T =25°C 5 100 pA A I Inputoffsetcurrent V =0 IO O T =Fullrange 2 nA A T =25°C 65 200 pA I Inputbiascurrent (3) V =0 A IB O T =Fullrange 7 nA A Common-modeinputvoltage V T =25°C ±11 –12to15 V ICR range A R =10kΩ T =25°C ±12 ±13.5 L A Maximumpeakoutput V R ≥10kΩ ±12 V OM voltageswing L T =Fullrange A R ≥2kΩ ±10 L A Large-signaldifferential VO=±10V TA=25°C 50 200 V/mV VD voltageamplification RL≥2kΩ TA=Fullrange 25 B Utility-gainbandwidth T =25°C 3 MHz 1 A r Inputresistance T =25°C 1012 Ω I A V =V IC ICR(min) CMRR Common-moderejectionratio V =0 T =25°C 75 100 dB O A R =50Ω S V =±9Vto±15V Supply-voltagerejectionratio CC k V =0 T =25°C 80 100 dB SVR (ΔV /ΔV ) O A CC± IO R =50Ω S Supplycurrent I V =0;noload T =25°C 1.4 2.5 mA CC (eachamplifier) O A V /V Crosstalkattenuation A =100 T =25°C 120 dB O1 O2 VD A (1) Allcharacteristicsaremeasuredunderopen-loopconditionswithzerocommon-modevoltage,unlessotherwisespecified. (2) FullrangeisT =0°Cto70°C. A (3) InputbiascurrentsofanFET-inputoperationalamplifierarenormaljunctionreversecurrents,whicharetemperaturesensitive,as showninFigure1.Pulsetechniquesmustbeusedthatmaintainthejunctiontemperatureasclosetotheambienttemperatureas possible. 14 SubmitDocumentationFeedback Copyright©1978–2017,TexasInstrumentsIncorporated ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M www.ti.com SLOS080N–SEPTEMBER1978–REVISEDJULY2017 6.12 Electrical Characteristics: TL071BC, TL072BC, TL074BC V =±15V(unlessotherwisenoted) CC± PARAMETER TESTCONDITIONS (1) (2) MIN TYP MAX UNIT V Inputoffsetvoltage VO=0 TA=25°C 2 3 mV IO RS=50Ω TA=Fullrange 5 α Temperaturecoefficientof VO=0 T =Fullrange 18 µV/°C inputoffsetvoltage R =50Ω A S T =25°C 5 100 pA A I Inputoffsetcurrent V =0 IO O T =Fullrange 2 nA A T =25°C 65 200 pA I Inputbiascurrent (3) V =0 A IB O T =Fullrange 7 nA A Common-modeinput V T =25°C ±11 –12to15 V ICR voltagerange A R =10kΩ T =25°C ±12 ±13.5 L A Maximumpeakoutput V R ≥10kΩ ±12 V OM voltageswing L T =Fullrange A R ≥2kΩ ±10 L A Large-signaldifferential VO=±10V TA=25°C 50 200 V/mV VD voltageamplification RL≥2kΩ TA=Fullrange 25 B Utility-gainbandwidth T =25°C 3 MHz 1 A r Inputresistance T =25°C 1012 Ω I A V =V Common-moderejection IC ICR(min) CMRR V =0 T =25°C 75 100 dB ratio O A R =50Ω S V =±9Vto±15V Supply-voltagerejection CC k V =0 T =25°C 80 100 dB SVR ratio(ΔV /ΔV ) O A CC± IO R =50Ω S Supplycurrent(each I V =0;noload T =25°C 1.4 2.5 mA CC amplifier) O A V /V Crosstalkattenuation A =100 T =25°C 120 dB O1 O2 VD A (1) Allcharacteristicsaremeasuredunderopen-loopconditionswithzerocommon-modevoltage,unlessotherwisespecified. (2) FullrangeisT =0°Cto70°C. A (3) InputbiascurrentsofanFET-inputoperationalamplifierarenormaljunctionreversecurrents,whicharetemperaturesensitive,as showninFigure1.Pulsetechniquesmustbeusedthatmaintainthejunctiontemperatureasclosetotheambienttemperatureas possible. Copyright©1978–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M SLOS080N–SEPTEMBER1978–REVISEDJULY2017 www.ti.com 6.13 Electrical Characteristics: TL071I, TL072I, TL074I V =±15V(unlessotherwisenoted) CC± PARAMETER TESTCONDITIONS (1) (2) MIN TYP MAX UNIT V Inputoffsetvoltage VO=0 TA=25°C 3 6 mV IO RS=50Ω TA=Fullrange 8 α Temperaturecoefficientof VO=0 T =Fullrange 18 µV/°C inputoffsetvoltage R =50Ω A S T =25°C 5 100 pA A I Inputoffsetcurrent V =0 IO O T =Fullrange 2 nA A T =25°C 65 200 pA I Inputbiascurrent (3) V =0 A IB O T =Fullrange 7 nA A Common-modeinputvoltage V T =25°C ±11 –12to15 V ICR range A R =10kΩ T =25°C ±12 ±13.5 L A Maximumpeakoutput V R ≥10kΩ ±12 V OM voltageswing L T =Fullrange A R ≥2kΩ ±10 L A Large-signaldifferential VO=±10V TA=25°C 50 200 V/mV VD voltageamplification RL≥2kΩ TA=Fullrange 25 B Utility-gainbandwidth T =25°C 3 MHz 1 A r Inputresistance T =25°C 1012 Ω I A V =V Common-moderejection IC ICR(min) CMRR V =0 T =25°C 75 100 dB ratio O A R =50Ω S V =±9Vto±15V Supply-voltagerejectionratio CC k V =0 T =25°C 80 100 dB SVR (ΔV /ΔV ) O A CC± IO R =50Ω S Supplycurrent(each I V =0;noload T =25°C 1.4 2.5 mA CC amplifier) O A V /V Crosstalkattenuation A =100 T =25°C 120 dB O1 O2 VD A (1) Allcharacteristicsaremeasuredunderopen-loopconditionswithzerocommon-modevoltage,unlessotherwisespecified. (2) T =–40°Cto85°C. A (3) InputbiascurrentsofanFET-inputoperationalamplifierarenormaljunctionreversecurrents,whicharetemperaturesensitive,as showninFigure1.Pulsetechniquesmustbeusedthatmaintainthejunctiontemperatureasclosetotheambienttemperatureas possible. 16 SubmitDocumentationFeedback Copyright©1978–2017,TexasInstrumentsIncorporated ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M www.ti.com SLOS080N–SEPTEMBER1978–REVISEDJULY2017 6.14 Electrical Characteristics: TL071M, TL072M V =±15V(unlessotherwisenoted) CC± PARAMETER TESTCONDITIONS (1) (2) MIN TYP MAX UNIT V Inputoffsetvoltage VO=0 TA=25°C 3 6 mV IO RS=50Ω TA=Fullrange 9 Temperaturecoefficient V =0 α O T =Fullrange 18 μV/°C VIO ofinputoffsetvoltage R =50Ω A S T =25°C 5 100 pA A I Inputoffsetcurrent V =0 IO O T =Fullrange 20 nA A T =25°C 65 200 pA A I Inputbiascurrent V =0 IB O T =Fullrange 50 nA A Common-modeinput V T =25°C ±11 –12to15 V ICR voltagerange A R =10kΩ T =25°C ±12 ±13.5 L A Maximumpeakoutput V R ≥10kΩ ±12 V OM voltageswing L T =Fullrange A R ≥2kΩ ±10 L A Large-signaldifferential VO=±10V TA=25°C 35 200 V/mV VD voltageamplification RL≥2kΩ TA=Fullrange 15 B Unity-gainbandwidth 3 MHz 1 r Inputresistance 1012 Ω i V =V , Common-moderejection IC ICR(min) CMRR V =0 T =25°C 80 86 dB ratio O A R =50Ω S V =±9Vto±15V Supply-voltagerejection CC k V =0 T =25°C 80 86 dB SVR ratio(ΔV /ΔV ) O A CC± IO R =50Ω S Supplycurrent I V =0;noload T =25°C 1.4 2.5 mA CC (eachamplifier) O A V /V Crosstalkattenuation A =100 T =25°C 120 dB O1 O2 VD A (1) InputbiascurrentsofanFET-inputoperationalamplifierarenormaljunctionreversecurrents,whicharetemperaturesensitive,as showninFigure1.Pulsetechniquesthatmaintainthejunctiontemperatureasclosetotheambienttemperatureaspossiblemustbe used. (2) Allcharacteristicsaremeasuredunderopen-loopconditionswithzerocommon-modevoltage,unlessotherwisespecified.Fullrangeis T =–55°Cto+125°C. A Copyright©1978–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M SLOS080N–SEPTEMBER1978–REVISEDJULY2017 www.ti.com 6.15 Electrical Characteristics: TL074M V =±15V(unlessotherwisenoted) CC± PARAMETER TESTCONDITIONS (1) (2) MIN TYP MAX UNIT V Inputoffsetvoltage VO=0 TA=25°C 3 9 mV IO RS=50Ω TA=Fullrange 15 Temperaturecoefficient α V =0,R =50Ω T =Fullrange 18 μV/°C VIO ofinputoffsetvoltage O S A T =25°C 5 100 pA A I Inputoffsetcurrent V =0 IO O T =Fullrange 20 nA A T =25°C 65 200 pA A I Inputbiascurrent V =0 IB O T =Fullrange 20 nA A Common-modeinput V T =25°C ±11 –12to15 V ICR voltagerange A R =10kΩ T =25°C ±12 ±13.5 L A Maximumpeakoutput V R ≥10kΩ ±12 V OM voltageswing L T =Fullrange A R ≥2kΩ ±10 L A Large-signaldifferential VO=±10V TA=25°C 35 200 V/mV VD voltageamplification RL≥2kΩ TA=Fullrange 15 B Unity-gainbandwidth 3 MHz 1 r Inputresistance 1012 Ω i V =V Common-moderejection IC ICR(min) CMRR V =0 T =25°C 80 86 dB ratio O A R =50Ω S V =±9Vto±15V Supply-voltagerejection CC k V =0 T =25°C 80 86 dB SVR ratio(ΔV /ΔV ) O A CC± IO R =50Ω S Supplycurrent I V =0;noload T =25°C 1.4 2.5 mA CC (eachamplifier) O A V /V Crosstalkattenuation A =100 T =25°C 120 dB O1 O2 VD A (1) InputbiascurrentsofanFET-inputoperationalamplifierarenormaljunctionreversecurrents,whicharetemperaturesensitive,as showninFigure1.Pulsetechniquesthatmaintainthejunctiontemperatureasclosetotheambienttemperatureaspossiblemustbe used. (2) Allcharacteristicsaremeasuredunderopen-loopconditionswithzerocommon-modevoltage,unlessotherwisespecified.Fullrangeis T =–55°Cto+125°C. A 18 SubmitDocumentationFeedback Copyright©1978–2017,TexasInstrumentsIncorporated ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M www.ti.com SLOS080N–SEPTEMBER1978–REVISEDJULY2017 6.16 Switching Characteristics: TL07xM V =±15V,T =25°C CC± A PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V =10V R =2kΩ SR Slewrateatunitygain I L 5 13 V/μs C =100pF SeeFigure21 L V =20V R =2kΩ 0.1 μs t Rise-timeovershootfactor I L r CL=100pF SeeFigure21 20% Equivalentinputnoise f=1kHz 18 nV/√Hz V R =20Ω n voltage S f=10Hzto10kHz 4 μV I Equivalentinputnoisecurrent R =20Ω f=1kHz 0.01 pA/√Hz n S Vrms=6V I A =1 THD Totalharmonicdistortion R ≥2kΩ VD 0.003% L RS≤1kΩ f=1kHz 6.17 Switching Characteristics: TL07xC, TL07xAC, TL07xBC, TL07xI V =±15V,T =25°C CC± A PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V =10V R =2kΩ SR Slewrateatunitygain I L 8 13 V/μs C =100pF SeeFigure21 L V =20V R =2kΩ 0.1 μs t Rise-timeovershootfactor I L r CL=100pF SeeFigure21 20% Equivalentinputnoise f=1kHz 18 nV/√Hz V R =20Ω n voltage S f=10Hzto10kHz 4 μV I Equivalentinputnoisecurrent R =20Ω f=1kHz 0.01 pA/√Hz n S Vrms=6V I A =1 THD Totalharmonicdistortion R ≥2kΩ VD 0.003% L RS≤1kΩ f=1kHz Copyright©1978–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M SLOS080N–SEPTEMBER1978–REVISEDJULY2017 www.ti.com 6.18 Typical Characteristics Dataathighandlowtemperaturesareapplicableonlywithintheratedoperatingfree-airtemperaturerangesofthevarious devices. Table1.TypicalCharacteristics:TableofGraphs FIGURE I Inputbiascurrent versusfree-airtemperature Figure1 IB Figure2 versusfrequency Figure3 Figure4 V Maximumpeakoutputvoltage OM versusfree-airtemperature Figure5 versusloadresistance Figure6 versussupplyvoltage Figure7 Largesignaldifferentialvoltage versusfree-airtemperature Figure8 A VD amplification versusloadresistance Figure9 Phaseshift versusfrequency Figure9 Normalizedunity-gainbandwidth versusfree-airtemperature Figure10 Normalizedphaseshift versusfree-airtemperature Figure10 CMRR Common-moderejectionratio versusfree-airtemperature Figure11 Inputoffsetvoltagechange versuscommon-modevoltage Figure20 versusfree-airtemperature Figure13 I Supplycurrent CC versussupplyvoltage Figure12 P Totalpowerdissipation versusfree-airtemperature Figure14 D Normalizedslewrate versusfree-airtemperature Figure15 V Equivalentinputnoisevoltage versusfrequency Figure16 n THD Totalharmonicdistortion versusfrequency Figure17 Large-signalpulseresponse versustime Figure18 V Outputvoltage versuselapsedtime Figure19 O 20 SubmitDocumentationFeedback Copyright©1978–2017,TexasInstrumentsIncorporated ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M www.ti.com SLOS080N–SEPTEMBER1978–REVISEDJULY2017 6.18.1 TypicalCharacteristics 100 ±15 VCC±=±15 V VCC±=±15 V RL= 10 kΩ V TA= 25°C − ±12.5 See Figure 2 e g ent−nA 10 oltaput V ±10 VCC±=±10 V Bias Curr 1 Peak Out ±7.5 ut m np mu ±5 VCC±=±5 V −I xi IIBIIB0.1 −MMaM ±2.5 OO VV 0.01 0 −75 −50 −25 0 25 50 75 100 125 100 1 k 10 k 100 k 1 M 10 M TA−Free-Air Temperature−°C f−Frequency−Hz Figure1.InputBiasCurrentvsFree-AirTemperature Figure2.MaximumPeakOutputVoltagevsFrequency ±15 ge−V ±12.5 VCC±=±15 V STRAeLe== F 22i5 gk°uCΩre 2 a oltV ut ±10 p Out VCC±=±10 V ak ±7.5 e P m u m ±5 xi Ma VCC±=±5 V − MM ±2.5 VOVO 8 0 100 1 k 10 k 100 k 1 M 10 M f−Frequency−Hz Figure3.MaximumPeakOutputVoltagevsFrequency Figure4.MaximumPeakOutputVoltagevsFrequency ±15 ±15 oltage−VV ±12.5 RRLL== 120 k ΩkΩ oltage−VV ±12.5 VTSAeCeC= ± F2=i5g°±uC1r5e V2 ut ±10 ut ±10 p p ut ut O O Peak ±7.5 Peak ±7.5 m m u u m ±5 m ±5 Maxi Maxi VVOM−OM ±2.5 VCC±=8±15 V VOVM−OM ±2.5 8 See Figure 2 0 0 −75 −50 −25 0 25 50 75 100 125 0.1 0.2 0.4 0.7 1 2 4 7 10 TA−Free-Air Temperature−°C RL−Load Resistance−kΩ Figure5.MaximumPeakOutputVoltagevsFree-Air Figure6.MaximumPeakOutputVoltagevsLoad Temperature Resistance Copyright©1978–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M SLOS080N–SEPTEMBER1978–REVISEDJULY2017 www.ti.com Typical Characteristics (continued) ±15 1000 −V RTAL== 2150° CkΩ 400 e ±12.5 oltagm Peak Output V ±±71.05 ge-Signal Differential mplification−V/mV 1224000000 u ar A xim ±5 −L age 10 OM−MaOM ±2.5 AVDAVDVolt 4 VVCOC=±±=1±01 V5 V VV 2 RL= 2 kΩ 0 1 0 2 4 6 8 10 12 14 16 −75 −50 −25 0 25 50 75 100 125 |VCC±|−Supply Voltage−V TA−Free-Air Temperature−°C Figure7.MaximumPeakOutputVoltagevsSupply Figure8.Large-SignalDifferentialVoltageAmplificationvs Voltage Free-AirTemperature 1.3 1.03 h 1.2 Unity-Gain Bandwidth 1.02 dt andwi 1.1 1.01 Shift n B se d Unity-Gai 1 Phase Shift 1 malized Pha alize 0.9 0.99 Nor m Nor 0.8 VRCLC=± 2= k±Ω15 V 0.98 f = B1for Phase Shift 0.7 0.97 −75 −50 −25 0 25 50 75 100 125 TA−Free-Air Temperature−°C Figure9.Large-SignalDifferentialVoltageAmplification Figure10.NormalizedUnity-GainBandwidthandPhase andPhaseShiftvsFrequency ShiftvsFree-AirTemperature 89 2 −dB VRCLC=± 1=0± k1Ω5 V mA 1.8 TNAo =S 2ig5n°Cal ction Ratio 8878 Amplifier− 11..46 No Load Reje Per 1.2 Mode 86 urrent 1 mon- 85 ply C 0.8 Com Sup 0.6 − − 0.4 MRR 84 ICCCC± 0.2 C I 83 0 −75 −50 −25 0 25 50 75 100 125 0 2 4 6 8 10 12 14 16 TA−Free-Air Temperature−°C |VCC±|−Supply Voltage−V Figure11.Common-ModeRejectionRatiovsFree-Air Figure12.SupplyCurrentPerAmplifiervsSupplyVoltage Temperature 22 SubmitDocumentationFeedback Copyright©1978–2017,TexasInstrumentsIncorporated ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M www.ti.com SLOS080N–SEPTEMBER1978–REVISEDJULY2017 Typical Characteristics (continued) 2 250 A VCC±=±15 V VCC±=±15 V Amplifier−mPer 1111....2468 NNoo LSoigandal ssipation−mW112257020505 TNNL0oo7 SL4oigandal nt Di upply Curre 00..168 TotalPower11027055 TL072 S − CC−±C 0.4 PD 50 TL071 IIC 0.2 25 0 0 −75 −50 −25 0 25 50 75 100 125 −75 −50 −25 0 25 50 75 100 125 TA−Free-Air Temperature−°C TA−Free-AirTemperature−°C Figure13.SupplyCurrentPerAmplifiervsFree-Air Figure14.TotalPowerDissipationvsFree-Air Temperature Temperature nV/HznV/Hz 50 VARCVSDC=±= = 2 10±01Ω5 V e− 40 TA= 25°C g a olt V e 30 s oi N ut p n 20 nt I e al v qui 10 E − n V 0 10 40 100 400 1 k 4 k 10 k 40 k100 k f−Frequency−Hz Figure15.NormalizedSlewRatevsFree-AirTemperature Figure16.EquivalentInputNoiseVoltagevsFrequency 1 VCC±=±15 V 6 VCC±=±15 V stortion−% 00..14 AVTAVI(RD=M = S2 1)5=°C 6 V oltages−Vut V 24 Output RTCALL=== 22150 k°0CΩ pF onic Di 0.04 d Outp 0 m n Har ut a otaTl 0.01 −Inp −2 − O Input D 0.004 V TH nd −4 a VI 0.001 −6 100 400 1 k 4 k 10 k 40 k100 k 0 0.5 1 1.5 2 2.5 3 3.5 f−Frequency−Hz t−Time−µs Figure17.TotalHarmonicDistortionvsFrequency Figure18.Voltage-FollowerLarge-SignalPulseResponse Copyright©1978–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M SLOS080N–SEPTEMBER1978–REVISEDJULY2017 www.ti.com Typical Characteristics (continued) 10 VCCr = r15 V 8 6 4 V) 2 m O ( 0 VI -2 -4 -6 -8 -10 -13 -11 -9 -7 -5 -3 -1 1 3 5 7 9 11 13 15 17 VCM (V) D003 Figure19.OutputVoltagevsElapsedTime Figure20.VIOvsVCM 24 SubmitDocumentationFeedback Copyright©1978–2017,TexasInstrumentsIncorporated ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M www.ti.com SLOS080N–SEPTEMBER1978–REVISEDJULY2017 6.1 Parameter Measurement Information − OUT + VI CL= 100 pF RL= 2 kΩ Figure21. Unity-GainAmplifier 10 kΩ 1 kΩ VI − OUT + RL CL= 100 pF Figure22. Gain-of-10InvertingAmplifier Figure23. InputOffset-VoltageNullCircuit Copyright©1978–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M SLOS080N–SEPTEMBER1978–REVISEDJULY2017 www.ti.com 7 Detailed Description 7.1 Overview The JFET-input operational amplifiers in the TL07xx series are similar to the TL08x series, with low input bias and offset currents, and a fast slew rate. The low harmonic distortion and low noise make the TL07xx series ideally suited for high-fidelity and audio preamplifier applications. Each amplifier features JFET inputs (for high inputimpedance)coupledwithbipolaroutputstagesintegratedonasinglemonolithicchip. The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized for operation from −40°C to +85°C. The M-suffix devices are characterized for operation over the full military temperaturerangeof −55°Cto+125°C. 7.2 Functional Block Diagram VCC+ IN+ IN− 64Ω 128Ω OUT 64Ω C1 18 pF 1080Ω 1080Ω VCC− OFFSET OFFSET N1 N2 TL071 Only All component values shown are nominal. COMPONENT COUNT† COMPONENT TL071 TL072 TL074 TYPE RReessiissttoorrss 1111 2222 4444 TTrraannssiissttoorrss 1144 2288 5566 JJFFEETT 22 44 66 DDiiooddeess 11 22 44 CCaappaacciittoorrss 11 22 44 epi-FET 1 2 4 †Includes bias and trim circuitry 26 SubmitDocumentationFeedback Copyright©1978–2017,TexasInstrumentsIncorporated ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M www.ti.com SLOS080N–SEPTEMBER1978–REVISEDJULY2017 7.3 Feature Description 7.3.1 TotalHarmonicDistortion Harmonic distortions to an audio signal are created by electronic components in a circuit. Total harmonic distortion(THD)isameasureofharmonicdistortionsaccumulatedbyasignalinanaudiosystem. Thesedevices have a very low THD of 0.003% meaning that the TL07x device adds little harmonic distortion when used in audiosignalapplications. 7.3.2 SlewRate The slew rate is the rate at which an operational amplifier can change the output when there is a change on the input.Thesedeviceshavea13-V/μsslewrate. 7.4 Device Functional Modes Thesedevicesarepoweredonwhenthesupplyisconnected. Thesedevicescanbeoperatedasasingle-supply operationalamplifierordual-supplyamplifierdependingontheapplication. Copyright©1978–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 27 ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M SLOS080N–SEPTEMBER1978–REVISEDJULY2017 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 8.1 Application Information Atypicalapplicationforanoperationalamplifierisaninvertingamplifier.Thisamplifiertakesapositivevoltageon the input, and makes the voltage a negative voltage. In the same manner, the amplifier makes negative voltages positive. 8.2 Typical Application RF Vsup+ RI V OUT + V IN Vsup- Copyright © 2016, Texas Instruments Incorporated Figure24. InvertingAmplifier 8.2.1 DesignRequirements The supply voltage must be selected so the supply voltage is larger than the input voltage range and output range. For instance, this application scales a signal of ±0.5 V to ±1.8 V. Setting the supply at ±12 V is sufficient toaccommodatethisapplication. 8.2.2 DetailedDesignProcedure Determinethegainrequiredbytheinvertingamplifier: VOUT A = V VIN (1) 1.8 A = =-3.6 V -0.5 (2) Once the desired gain is determined, select a value for RI or RF. Selecting a value in the kilohm range is desirable because the amplifier circuit uses currents in the milliamp range. This ensures the part does not draw too much current. This example uses 10 kΩ for RI which means 36 kΩ is used for RF. This is determined by Equation3. RF A = - V RI (3) 28 SubmitDocumentationFeedback Copyright©1978–2017,TexasInstrumentsIncorporated ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M www.ti.com SLOS080N–SEPTEMBER1978–REVISEDJULY2017 Typical Application (continued) 8.2.3 ApplicationCurve 2 VIN 1.5 VOUT 1 0.5 s t 0 ol V -0.5 -1 -1.5 -2 0 0.5 1 1.5 2 Time (ms) Figure25. InputandOutputVoltagesoftheInvertingAmplifier 8.3 Unity Gain Buffer – U1 TL072 + VIN + VOUT + 10 k 12 Copyright © 2017, Texas Instruments Incorporated Figure26. Single-SupplyUnityGainAmplifier 8.3.1 DesignRequirements • V must be within valid range per Recommended Operating Conditions. This example uses a value of 12 V CC forV . CC • Input voltage must be within the recommended common-mode range, as shown in Recommended Operating Conditions.Thevalidcommon-moderangeis4Vto12V(V +4VtoV . CC– CC+ • Outputislimitedbyoutputrange,whichistypically1.5Vto10.5V,orV +1.5VtoV –1.5V. CC– CC+ 8.3.2 DetailedDesignProcedure • Avoidinputvoltagevaluesbelow1Vtopreventphasereversalwhereoutputgoeshigh. • Avoid input values below 4 V to prevent degraded V that results in an apparent gain greater than 1. This IO maycauseinstabilityinsomesecond-orderfilterdesigns. Copyright©1978–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 29 ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M SLOS080N–SEPTEMBER1978–REVISEDJULY2017 www.ti.com Unity Gain Buffer (continued) 8.3.3 ApplicationCurves 12 1.5 10 1 8 0.5 V) V) UT ( 6 n (V/ 0 O ai V G 4 -0.5 2 -1 0 -1.5 0 2 4 6 8 10 12 0 2 4 6 8 10 12 VIN (V) VIN (V) D001 D002 Figure27.OutputVoltagevsInputVoltage Figure28.GainvsInputVoltage 8.4 System Examples Figure29.0.5-HzSquare-WaveOscillator VCC+ – R1 R2 Input + Output C3 VCC– R1=R2=2R3=1.5MW R3 C3 C1 C1 C1=C2= =110pF 2 1 f = =1kHz o 2pR1C1 Figure30.High-QNotchFilter 30 SubmitDocumentationFeedback Copyright©1978–2017,TexasInstrumentsIncorporated ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M www.ti.com SLOS080N–SEPTEMBER1978–REVISEDJULY2017 System Examples (continued) Figure31.100-kHzQuadratureOscillator Figure32.ACAmplifier Copyright©1978–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 31 ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M SLOS080N–SEPTEMBER1978–REVISEDJULY2017 www.ti.com 9 Power Supply Recommendations CAUTION Supplyvoltageslargerthan36Vforasingle-supplyoroutsidetherangeof ±18Vfora dual-supplycanpermanentlydamagethedevice(seetheAbsoluteMaximumRatings). Place 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high- impedancepowersupplies.Formoredetailedinformationonbypasscapacitorplacement,seeLayout. 10 Layout 10.1 Layout Guidelines Forbestoperationalperformanceofthedevice,usegoodPCBlayoutpractices,including: • Noise can propagate into analog circuitry through the power pins of the circuit as a whole, as well as the operational amplifier. Bypass capacitors are used to reduce the coupled noise by providing low impedance powersourceslocaltotheanalogcircuitry. – Connect low-ESR, 0.1-μF ceramic bypass capacitors between each supply pin and ground, placed as close to the device as possible. A single bypass capacitor from V+ to ground is applicable for single- supplyapplications. • Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes. A ground plane helps distribute heat and reduces EMI noise pickup. Take care to physically separate digital and analog grounds, paying attention to the flow of the ground current. For more detailed information, see CircuitBoardLayoutTechniques. • To reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If it is not possible to keep them separate, it is much better to cross the sensitive trace perpendicular as opposedtoinparallelwiththenoisytrace. • Place the external components as close to the device as possible. Keeping RF and RG close to the inverting inputminimizesparasiticcapacitance,asshowninLayoutExample. • Keep the length of input traces as short as possible. Always remember that the input traces are the most sensitivepartofthecircuit. • Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly reduce leakagecurrentsfromnearbytracesthatareatdifferentpotentials. 32 SubmitDocumentationFeedback Copyright©1978–2017,TexasInstrumentsIncorporated ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M www.ti.com SLOS080N–SEPTEMBER1978–REVISEDJULY2017 10.2 Layout Example Place components close to device and to each other to reduce parasitic errors Run the input traces as far away from the supply lines RF as possible NC NC VS+ Use low-ESR, ceramic RG bypass capacitor GND IN1(cid:237) VCC+ VIN IN1+ OUT RIN VCC(cid:237) NC GND Only needed for dual-supply operation GND VS- (or GND for single supply) VOUT Ground (GND) plane on another layer Figure33. OperationalAmplifierBoardLayoutforNoninvertingConfiguration RIN VIN + VOUT RG RF Figure34. OperationalAmplifierSchematicforNoninvertingConfiguration Copyright©1978–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 33 ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M SLOS080N–SEPTEMBER1978–REVISEDJULY2017 www.ti.com 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 RelatedDocumentation Forrelateddocumentation,seethefollowing: CircuitBoardLayoutTechniques (SLOA089) 11.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources,toolsandsoftware,andquickaccesstosampleorbuy. Table2.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER ORDERNOW DOCUMENTS SOFTWARE COMMUNITY TL071 Clickhere Clickhere Clickhere Clickhere Clickhere TL071A Clickhere Clickhere Clickhere Clickhere Clickhere TL071B Clickhere Clickhere Clickhere Clickhere Clickhere TL072 Clickhere Clickhere Clickhere Clickhere Clickhere TL072A Clickhere Clickhere Clickhere Clickhere Clickhere TL072B Clickhere Clickhere Clickhere Clickhere Clickhere TL072M Clickhere Clickhere Clickhere Clickhere Clickhere TL074 Clickhere Clickhere Clickhere Clickhere Clickhere TL074A Clickhere Clickhere Clickhere Clickhere Clickhere TL074B Clickhere Clickhere Clickhere Clickhere Clickhere TL074M Clickhere Clickhere Clickhere Clickhere Clickhere 11.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 11.4 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 11.5 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 11.6 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 34 SubmitDocumentationFeedback Copyright©1978–2017,TexasInstrumentsIncorporated ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

TL071,TL071A,TL071B TL072,TL072A,TL072B,TL074,TL074A,TL074B,TL072M,TL074M www.ti.com SLOS080N–SEPTEMBER1978–REVISEDJULY2017 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowserbasedversionsofthisdatasheet,refertothelefthandnavigation. Copyright©1978–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 35 ProductFolderLinks:TL071 TL071A TL071BTL072 TL072A TL072B TL074 TL074A TL074B TL072M TL074M

PACKAGE OPTION ADDENDUM www.ti.com 28-Jul-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) Ball material (3) (4/5) (6) 81023052A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 81023052A TL072MFKB 8102305HA ACTIVE CFP U 10 1 TBD Call TI N / A for Pkg Type -55 to 125 8102305HA TL072M 8102305PA ACTIVE CDIP JG 8 1 TBD SNPB N / A for Pkg Type -55 to 125 8102305PA TL072M 81023062A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 81023062A TL074MFKB 8102306CA ACTIVE CDIP J 14 1 TBD SNPB N / A for Pkg Type -55 to 125 8102306CA TL074MJB 8102306DA ACTIVE CFP W 14 1 TBD Call TI N / A for Pkg Type -55 to 125 8102306DA TL074MWB JM38510/11905BPA ACTIVE CDIP JG 8 1 TBD SNPB N / A for Pkg Type -55 to 125 JM38510 /11905BPA M38510/11905BPA ACTIVE CDIP JG 8 1 TBD SNPB N / A for Pkg Type -55 to 125 JM38510 /11905BPA TL071ACD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 071AC & no Sb/Br) TL071ACDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 071AC & no Sb/Br) TL071ACDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 071AC & no Sb/Br) TL071ACP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TL071ACP & no Sb/Br) TL071BCD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 071BC & no Sb/Br) TL071BCDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 071BC & no Sb/Br) TL071BCP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TL071BCP & no Sb/Br) TL071CD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL071C & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 28-Jul-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) Ball material (3) (4/5) (6) TL071CDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL071C & no Sb/Br) TL071CDRE4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL071C & no Sb/Br) TL071CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL071C & no Sb/Br) TL071CP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TL071CP & no Sb/Br) TL071CPE4 ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TL071CP & no Sb/Br) TL071CPSR ACTIVE SO PS 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 T071 & no Sb/Br) TL071ID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 TL071I & no Sb/Br) TL071IDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 TL071I & no Sb/Br) TL071IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 TL071I & no Sb/Br) TL071IP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type -40 to 85 TL071IP & no Sb/Br) TL072ACD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 072AC & no Sb/Br) TL072ACDE4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 072AC & no Sb/Br) TL072ACDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 072AC & no Sb/Br) TL072ACDRE4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 072AC & no Sb/Br) TL072ACDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 072AC & no Sb/Br) TL072ACP ACTIVE PDIP P 8 50 Pb-Free NIPDAU N / A for Pkg Type 0 to 70 TL072ACP (RoHS) TL072ACPE4 ACTIVE PDIP P 8 50 Pb-Free NIPDAU N / A for Pkg Type 0 to 70 TL072ACP (RoHS) Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 28-Jul-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) Ball material (3) (4/5) (6) TL072BCD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 072BC & no Sb/Br) TL072BCDE4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 072BC & no Sb/Br) TL072BCDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 072BC & no Sb/Br) TL072BCDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 072BC & no Sb/Br) TL072BCDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 072BC & no Sb/Br) TL072BCP ACTIVE PDIP P 8 50 Pb-Free NIPDAU N / A for Pkg Type 0 to 70 TL072BCP (RoHS) TL072BCPE4 ACTIVE PDIP P 8 50 Pb-Free NIPDAU N / A for Pkg Type 0 to 70 TL072BCP (RoHS) TL072CD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL072C & no Sb/Br) TL072CDE4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL072C & no Sb/Br) TL072CDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL072C & no Sb/Br) TL072CDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL072C & no Sb/Br) TL072CDRE4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL072C & no Sb/Br) TL072CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL072C & no Sb/Br) TL072CP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TL072CP & no Sb/Br) TL072CPE4 ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TL072CP & no Sb/Br) TL072CPSR ACTIVE SO PS 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 T072 & no Sb/Br) TL072CPSRE4 ACTIVE SO PS 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 T072 & no Sb/Br) Addendum-Page 3

PACKAGE OPTION ADDENDUM www.ti.com 28-Jul-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) Ball material (3) (4/5) (6) TL072CPSRG4 ACTIVE SO PS 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 T072 & no Sb/Br) TL072CPWR ACTIVE TSSOP PW 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 T072 & no Sb/Br) TL072CPWRE4 ACTIVE TSSOP PW 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 T072 & no Sb/Br) TL072CPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 T072 & no Sb/Br) TL072ID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 TL072I & no Sb/Br) TL072IDE4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 TL072I & no Sb/Br) TL072IDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 TL072I & no Sb/Br) TL072IDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 TL072I & no Sb/Br) TL072IDRE4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 TL072I & no Sb/Br) TL072IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 TL072I & no Sb/Br) TL072IP ACTIVE PDIP P 8 50 Pb-Free NIPDAU N / A for Pkg Type -40 to 85 TL072IP (RoHS) TL072IPE4 ACTIVE PDIP P 8 50 Pb-Free NIPDAU N / A for Pkg Type -40 to 85 TL072IP (RoHS) TL072MFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 81023052A TL072MFKB TL072MJG ACTIVE CDIP JG 8 1 TBD SNPB N / A for Pkg Type -55 to 125 TL072MJG TL072MJGB ACTIVE CDIP JG 8 1 TBD SNPB N / A for Pkg Type -55 to 125 8102305PA TL072M TL072MUB ACTIVE CFP U 10 1 TBD Call TI N / A for Pkg Type -55 to 125 8102305HA TL072M TL074ACD ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL074AC & no Sb/Br) TL074ACDE4 ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL074AC & no Sb/Br) Addendum-Page 4

PACKAGE OPTION ADDENDUM www.ti.com 28-Jul-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) Ball material (3) (4/5) (6) TL074ACDR ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL074AC & no Sb/Br) TL074ACDRE4 ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL074AC & no Sb/Br) TL074ACDRG4 ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL074AC & no Sb/Br) TL074ACN ACTIVE PDIP N 14 25 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TL074ACN & no Sb/Br) TL074ACNE4 ACTIVE PDIP N 14 25 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TL074ACN & no Sb/Br) TL074ACNSR ACTIVE SO NS 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL074A & no Sb/Br) TL074BCD ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL074BC & no Sb/Br) TL074BCDE4 ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL074BC & no Sb/Br) TL074BCDR ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL074BC & no Sb/Br) TL074BCDRE4 ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL074BC & no Sb/Br) TL074BCDRG4 ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL074BC & no Sb/Br) TL074BCN ACTIVE PDIP N 14 25 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TL074BCN & no Sb/Br) TL074BCNE4 ACTIVE PDIP N 14 25 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TL074BCN & no Sb/Br) TL074CD ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL074C & no Sb/Br) TL074CDBR ACTIVE SSOP DB 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 T074 & no Sb/Br) TL074CDG4 ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL074C & no Sb/Br) TL074CDR ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM 0 to 70 TL074C & no Sb/Br) Addendum-Page 5

PACKAGE OPTION ADDENDUM www.ti.com 28-Jul-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) Ball material (3) (4/5) (6) TL074CDRG4 ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL074C & no Sb/Br) TL074CN ACTIVE PDIP N 14 25 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TL074CN & no Sb/Br) TL074CNE4 ACTIVE PDIP N 14 25 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 TL074CN & no Sb/Br) TL074CNSR ACTIVE SO NS 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL074 & no Sb/Br) TL074CNSRG4 ACTIVE SO NS 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 TL074 & no Sb/Br) TL074CPW ACTIVE TSSOP PW 14 90 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 T074 & no Sb/Br) TL074CPWR ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 T074 & no Sb/Br) TL074CPWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 T074 & no Sb/Br) TL074CPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 T074 & no Sb/Br) TL074ID ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 TL074I & no Sb/Br) TL074IDE4 ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 TL074I & no Sb/Br) TL074IDG4 ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 TL074I & no Sb/Br) TL074IDR ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 TL074I & no Sb/Br) TL074IDRE4 ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 TL074I & no Sb/Br) TL074IDRG4 ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 TL074I & no Sb/Br) TL074IN ACTIVE PDIP N 14 25 Green (RoHS NIPDAU N / A for Pkg Type -40 to 85 TL074IN & no Sb/Br) TL074MFK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 TL074MFK TL074MFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 81023062A TL074MFKB Addendum-Page 6

PACKAGE OPTION ADDENDUM www.ti.com 28-Jul-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) Ball material (3) (4/5) (6) TL074MJ ACTIVE CDIP J 14 1 TBD SNPB N / A for Pkg Type -55 to 125 TL074MJ TL074MJB ACTIVE CDIP J 14 1 TBD SNPB N / A for Pkg Type -55 to 125 8102306CA TL074MJB TL074MWB ACTIVE CFP W 14 1 TBD Call TI N / A for Pkg Type -55 to 125 8102306DA TL074MWB (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 7

PACKAGE OPTION ADDENDUM www.ti.com 28-Jul-2020 OTHER QUALIFIED VERSIONS OF TL072, TL072M, TL074, TL074M : •Catalog: TL072, TL074 •Enhanced Product: TL072-EP, TL072-EP, TL074-EP, TL074-EP •Military: TL072M, TL074M NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product •Enhanced Product - Supports Defense, Aerospace and Medical Applications •Military - QML certified for Military and Defense Applications Addendum-Page 8

PACKAGE MATERIALS INFORMATION www.ti.com 28-Dec-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TL071ACDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL071BCDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL071CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL071CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL071IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL072ACDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL072BCDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL072CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL072CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL072CPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1 TL072IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL072IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL074ACDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TL074ACNSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 TL074BCDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TL074CDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TL074CDRG4 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TL074CPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 28-Dec-2019 Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TL074IDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TL071ACDR SOIC D 8 2500 340.5 338.1 20.6 TL071BCDR SOIC D 8 2500 340.5 338.1 20.6 TL071CDR SOIC D 8 2500 340.5 338.1 20.6 TL071CDR SOIC D 8 2500 367.0 367.0 35.0 TL071IDR SOIC D 8 2500 340.5 338.1 20.6 TL072ACDR SOIC D 8 2500 340.5 338.1 20.6 TL072BCDR SOIC D 8 2500 340.5 338.1 20.6 TL072CDR SOIC D 8 2500 340.5 338.1 20.6 TL072CDR SOIC D 8 2500 367.0 367.0 35.0 TL072CPWR TSSOP PW 8 2000 367.0 367.0 35.0 TL072IDR SOIC D 8 2500 367.0 367.0 35.0 TL072IDR SOIC D 8 2500 340.5 338.1 20.6 TL074ACDR SOIC D 14 2500 333.2 345.9 28.6 TL074ACNSR SO NS 14 2000 367.0 367.0 38.0 TL074BCDR SOIC D 14 2500 333.2 345.9 28.6 TL074CDR SOIC D 14 2500 333.2 345.9 28.6 PackMaterials-Page2

PACKAGE MATERIALS INFORMATION www.ti.com 28-Dec-2019 Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TL074CDRG4 SOIC D 14 2500 333.2 345.9 28.6 TL074CPWR TSSOP PW 14 2000 367.0 367.0 35.0 TL074IDR SOIC D 14 2500 333.2 345.9 28.6 PackMaterials-Page3

PACKAGE OUTLINE U0010A CFP - 2.03 mm max height SCALE 1.400 CERAMIC FLATPACK .27 MAX .045 MAX .010 .002 PIN 1 ID GLASS .005 MIN TYP TYP 1 10 8X .050 .005 .27 MAX GLASS 10X .017 .002 5 6 +.019 5X .32 .01 .241 5X .32 .01 -.003 .005 .001 +.013 .067 -.012 .045 .026 4225582/A 01/2020 NOTES: 1. All linear dimensions are in inches. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. www.ti.com

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PACKAGE OUTLINE J0014A CDIP - 5.08 mm max height SCALE 0.900 CERAMIC DUAL IN LINE PACKAGE PIN 1 ID A 4X .005 MIN (OPTIONAL) [0.13] .015-.060 TYP [0.38-1.52] 1 14 12X .100 [2.54] 14X .014-.026 14X .045-.065 [0.36-0.66] [1.15-1.65] .010 [0.25] C A B .754-.785 [19.15-19.94] 7 8 B .245-.283 .2 MAX TYP .13 MIN TYP [6.22-7.19] [5.08] [3.3] SEATING PLANE C .308-.314 [7.83-7.97] AT GAGE PLANE .015 GAGE PLANE [0.38] 0 -15 14X .008-.014 TYP [0.2-0.36] 4214771/A 05/2017 NOTES: 1. All controlling linear dimensions are in inches. Dimensions in brackets are in millimeters. Any dimension in brackets or parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This package is hermitically sealed with a ceramic lid using glass frit. 4. Index point is provided on cap for terminal identification only and on press ceramic glass frit seal only. 5. Falls within MIL-STD-1835 and GDIP1-T14. www.ti.com

EXAMPLE BOARD LAYOUT J0014A CDIP - 5.08 mm max height CERAMIC DUAL IN LINE PACKAGE (.300 ) TYP [7.62] SEE DETAIL B SEE DETAIL A 1 14 12X (.100 ) [2.54] SYMM 14X ( .039) [1] 7 8 SYMM LAND PATTERN EXAMPLE NON-SOLDER MASK DEFINED SCALE: 5X .002 MAX (.063) [0.05] [1.6] METAL ALL AROUND ( .063) SOLDER MASK [1.6] OPENING METAL .002 MAX SOLDER MASK (R.002 ) TYP [0.05] OPENING [0.05] ALL AROUND DETAIL A DETAIL B SCALE: 15X 13X, SCALE: 15X 4214771/A 05/2017 www.ti.com

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PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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MECHANICAL DATA MCER001A – JANUARY 1995 – REVISED JANUARY 1997 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE 0.400 (10,16) 0.355 (9,00) 8 5 0.280 (7,11) 0.245 (6,22) 1 4 0.065 (1,65) 0.045 (1,14) 0.063 (1,60) 0.020 (0,51) MIN 0.310 (7,87) 0.015 (0,38) 0.290 (7,37) 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0°–15° 0.015 (0,38) 0.100 (2,54) 0.014 (0,36) 0.008 (0,20) 4040107/C 08/96 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification. E. Falls within MIL STD 1835 GDIP1-T8 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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PACKAGE OUTLINE PW0008A TSSOP - 1.2 mm max height SCALE 2.800 SMALL OUTLINE PACKAGE C 6.6 TYP SEATING PLANE 6.2 PIN 1 ID A 0.1 C AREA 6X 0.65 8 1 3.1 2X 2.9 NOTE 3 1.95 4 5 0.30 8X 0.19 4.5 1.2 MAX B 0.1 C A B 4.3 NOTE 4 (0.15) TYP SEE DETAIL A 0.25 GAGE PLANE 0.15 0.75 0 - 8 0.05 0.50 DETAIL A TYPICAL 4221848/A 02/2015 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT PW0008A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 8X (1.5) 8X (0.45) SYMM (R0.05) 1 TYP 8 SYMM 6X (0.65) 5 4 (5.8) LAND PATTERN EXAMPLE SCALE:10X SOOPLEDNEINRG MASK METAL MSOELTDAEL RU NMDAESRK SOOPLEDNEINRG MASK 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS NOT TO SCALE 4221848/A 02/2015 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN PW0008A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 8X (1.5) SYMM (R0.05) TYP 8X (0.45) 1 8 SYMM 6X (0.65) 5 4 (5.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:10X 4221848/A 02/2015 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,65 0,15 M 0,22 28 15 0,25 0,09 5,60 8,20 5,00 7,40 Gage Plane 1 14 0,25 A 0°–(cid:1)8° 0,95 0,55 Seating Plane 2,00 MAX 0,05 MIN 0,10 PINS ** 14 16 20 24 28 30 38 DIM A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 4040065/E 12/01 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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