THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 th 3-Channel HDTV Video Amplifier With 5 -Order Filters and 6-dB Gain FEATURES 1 • 3HDTVVideoAmplifiersforY'P' P' 720pand DESCRIPTION B R 1080i,G'B'R'(R'G'B'),VGA/SVGA/XGA Fabricated using the Silicon-Germanium (SiGe) • IntegratedLow-PassFilters BiCom-III process, the THS7316 is a low power – 5th-Order36-MHz(–3dB)ButterworthFilter single-supply 3-V to 5-V, 3-channel integrated video buffer. It incorporates a 5th-order modified – –1dBPassbandBandwidthat31MHz Butterworth filter which is useful as a DAC – 30dBAttenuationat74MHz reconstruction filter or an ADC anti-aliasing filter. The • VersatileInputBiasing 36-MHz filter is a perfect choice for HDTV video which includes Y'P' P' 720p/1080i, G'B'R' (R'G'B'), – DC-CoupledWith140-mVInputShift B R andVGA/SVGA/XGAsignals. – AC-CoupledwithSync-TipClamp As part of the THS7316 flexibility, the input can be – AllowsAC-CoupledWithBiasing configured for ac or dc coupled inputs. The DC + • Built-in6-dBGain(2V/V) 140-mV input offset shift to allow for a full sync • 3-Vto5-VSingleSupplyOperation dynamic range at the output with 0-V input. The AC coupled modes include a transparent sync-tip clamp • Rail-to-RailOutput: option for signals with sync such as Y’ or Green with – OutputSwingsWithin100mVFromthe sync. AC-coupled biasing for P’ /P’ /Non-sync B R RailsAllowingACorDCOutputCoupling channels can be achieved by adding an external resistor. – SupportsDriving2LinesperChannel • Low18.3-mAat3.3-VTotalQuiescentCurrent The THS7316 is the perfect choice for all output • LowDifferentialGain/Phaseof0.1%/0.1(cid:176) buffer applications. Its rail-to-rail output stage with 6-dB gain allows for both ac and dc line driving. The • SOIC-8Package ability to drive 2 video lines per channel, or 75-Ω loads, allows for maximum flexibility as a video line APPLICATIONS driver. The 18.3-mA total quiescent current makes it • SetTopBoxOutputVideoBuffering an excellent choice for USB powered, portable, or • PVR/DVDROutputBuffering otherpowersensitivevideoapplications. • USB/PortableLowPowerVideoBuffering The THS7316 is available in a small SOIC-8 package thatisRoHScompliant. 3.3 V Y’/ G’Out 75W DAC/ Y’/ G’ 75W Encoder THS7316 R P’ / B’Out B 1 CH.1 IN CH.1 OUT 8 75W HDTV 720p/1080i P’B/ B’ 2 CH.2 IN CH.2 OUT 7 Y’P’ P’ B R R 3 CH.3 IN CH.3 OUT 6 75W G’B’R’ VGA 4 VS+ GND 5 SVGA P’ / R’ P’ / R’Out R R XGA 75W R 3.3 V 75W Figure1.3.3-VSingle-SupplyDC-Input/DCOutputCoupledVideoLineDriver 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsof TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2007–2008,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage. ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemore susceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications. PACKAGING/ORDERINGINFORMATION PACKAGEDDEVICES PACKAGETYPE(1) TRANSPORTMEDIA,QUANTITY THS7316D Rails,75 SOIC-8 THS7316DR TapeandReel,2500 (1) Forthemostcurrentpackageandorderinginformation,seethePackageOptionAddendumattheendofthisdocument,orseetheTI Websiteatwww.ti.com. ABSOLUTE MAXIMUM RATINGS overoperatingfree-airtemperaturerange(unlessotherwisenoted) (1) VALUE UNIT Supplyvoltage,V toGND 5.5 V S+ V Inputvoltage –0.4VtoV V I S+ I Outputcurrent ±90 mA O Continuouspowerdissipation SeeDissipationRatingTable T Maximumjunctiontemperature,anycondition(2) 150 (cid:176) C J T Maximumjunctiontemperature,continuousoperation,longtermreliability(3) 125 (cid:176) C J T Storagetemperaturerange –65to150 (cid:176) C stg HBM 2000 ESDratings CDM 1500 V MM 200 (1) Stressesabovethoselistedunderabsolutemaximumratingsmaycausepermanentdamagetothedevice.Thesearestressratings onlyandfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderrecommendedoperating conditionsisnotimplied.Exposuretoabsolutemaximumratedconditionsforextendedperiodsmaydegradedevicereliability. (2) Theabsolutemaximumjunctiontemperatureunderanyconditionislimitedbytheconstraintsofthesiliconprocess. (3) Theabsolutemaximumjunctiontemperatureforcontinuousoperationislimitedbythepackageconstraints.Operationabovethis temperaturemayresultinreducedreliabilityand/orlifetimeofthedevice. DISSIPATION RATINGS POWERRATING(1) PACKAGE ((cid:176) Cq J/CW) ((cid:176) Cq J/AW) (TJ=125(cid:176) C) T =25(cid:176) C T =85(cid:176) C A A SOIC-8(D) 16.8 130(2) 769mW 308mW (1) Powerratingisdeterminedwithajunctiontemperatureof125(cid:176) C.Thisisthepointwhereperformancestartstodegradeandlong-term reliabilitystartstobereduced.ThermalmanagementofthefinalPCBshouldstrivetokeepthejunctiontemperatureatorbelow125(cid:176) C forbestperformanceandreliability. (2) ThisdatawastakenwiththeJEDECHigh-KtestPCB.FortheJEDEClow-KtestPCB,theq is196(cid:176) C/W. JA RECOMMENDED OPERATING CONDITIONS MIN MAX UNIT V Supplyvoltage 3 5 V S+ T Ambienttemperature –40 85 (cid:176) C A 2 SubmitDocumentationFeedback Copyright©2007–2008,TexasInstrumentsIncorporated ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 FUNCTIONALDIAGRAM +Vs 140 mV gm+ Level - Shift Channel 1 6dB Channel 1 Input Sync-Tip LPF Output 800 kW Clamp 5-Pole (DC Restore) 36-MHz +Vs 140 mV gm+ Level - Shift Channel 2 6dB Channel 2 LPF Input Sync-Tip Output 800 kW Clamp 5-Pole (DC Restore) 36-MHz +Vs 140 mV + gm Level - Shift Channel 3 6dB Channel 3 LPF Input Sync-Tip Output 800 kW Clamp 5-Pole (DC Restore) 36-MHz 3 V to 5 V PIN CONFIGURATION SOIC-8(D) (TOPVIEW) THS7316 CH.1 IN 1 8 CH.1 OUT CH.2 IN 2 7 CH.2 OUT CH.3 IN 3 6 CH.3 OUT V 4 5 GND S+ TERMINALFUNCTIONS TERMINAL I/O DESCRIPTION NAME NO.SOIC-8 CH.1–INPUT 1 I VideoInput–Channel1 CH.2–INPUT 2 I VideoInput–Channel2 CH.3–INPUT 3 I VideoInput–Channel3 +Vs 4 I PositivePowerSupplyPin–connectto3Vto5V. GND 5 I GroundPinforallinternalcircuitry. CH.3–OUTPUT 6 O VideoOutput–Channel3 CH.2–OUTPUT 7 O VideoOutput–Channel2 CH.1–OUTPUT 8 O VideoOutput–Channel1 Copyright©2007–2008,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 ELECTRICAL CHARACTERISTICS V = 3.3 V: S+ R =150ΩtoGND–ReferenceFigure2andFigure3(unlessotherwisenoted) L TYP OVERTEMPERATURE PARAMETER TESTCONDITIONS 0(cid:176)Cto –40(cid:176)Cto MIN/ 25(cid:176)C 25(cid:176)C 70(cid:176)C 85(cid:176)C UNITS MAX/ TYP ACPERFORMANCE Small-signalbandwidth(–3dB) VO –0.2VPP(1) 36 31/43 30/44 30/44 MHz Min/Max Large-signalbandwidth(–3dB) VO –2VPP(1) 36 31/43 30/44 30/44 MHz Min/Max –1dBPassbandbandwidth 31 MHz Typ Attenuation f=27MHz(2) 0.3 –0.3/2.4 –0.35/2.4 –0.4/2.6 dB Min/Max Withrespectto100kHz f=74MHz(2) 30 20 19 19 dB Min Groupdelay f=100kHz 16.2 ns Typ Groupdelayvariation f=27MHz 5.4 ns Typ withrespectto100kHz Channel-to-channeldelay 0.3 ns Typ Differentialgain NTSC/PAL 0.1/ Typ 0.15% Differentialphase NTSC/PAL 0.1/0.1 (cid:176) Typ Totalharmonicdistortion f=1MHz;VO=2VPP –70 dB Typ Signaltonoiseratio NoWeighting,100kHzto37.5MHz 67 dB Typ Channel-to-channelcrosstalk f=1MHz –61 dB Typ ACGain–Allchannels 6 5.7/6.3 5.65/6.35 5.65/6.35 dB Min/Max OutputImpedance f=10MHz 0.5 Ω Typ DCPERFORMANCE Biasedoutputvoltage VI=0V 285 210/370 200/380 190/390 mV Min/Max Inputvoltagerange DCinput,limitedbyoutput –0.1/1.46 V Typ Synctipclampchargecurrent VI=–0.1V 360 m A Typ Inputresistance 800 kΩ Typ Inputcapacitance 2 pF Typ OUTPUTCHARACTERISTICS RL=150Ωto1.65V 3.15 V Typ RL=150ΩtoGND 3.1 2.85 2.75 2.75 V Min Highoutputvoltageswing RL=75Ωto1.65V 3.1 V Typ RL=75ΩtoGND 3.0 V Typ RL=150Ωto1.65V(VI=–0.15V) 0.14 V Typ RL=150ΩtoGND(VI=–0.15V) 0.08 0.17 0.2 0.21 V Max Lowoutputvoltageswing RL=75Ωto1.65V(VI=–0.15V) 0.3 V Typ RL=75ΩtoGND(VI=–0.15V) 0.1 V Typ Outputcurrent(sourcing) RL=10Ωto1.65V 80 mA Typ Outputcurrent(sinking) RL=10Ωto1.65V 70 mA Typ POWERSUPPLY Maximumoperatingvoltage 3.3 5.5 5.5 5.5 V Max Minimumoperatingvoltage 3.3 2.85 2.85 2.85 V Min Maximumquiescentcurrent VI=0V 18.3 22.5 23 23.4 mA Max Minimumquiescentcurrent VI=0V 18.3 14 13.6 13.1 mA Min PowerSupplyRejection(+PSRR) 52 dB Typ (1) TheMin/Maxvalueslistedforthisspecificationarespecifiedbydesignandcharacterizationonly. (2) 3.3-VSupplyFilterspecificationsarespecifiedby100%testingat5-Vsupplyalongwithdesignandcharacterizationonly. 4 SubmitDocumentationFeedback Copyright©2007–2008,TexasInstrumentsIncorporated ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 ELECTRICAL CHARACTERISTICS V = 5 V: S+ R =150ΩtoGND–ReferenceFigure2andFigure3(unlessotherwisenoted) L TYP OVERTEMPERATURE PARAMETER TESTCONDITIONS 0(cid:176)Cto –40(cid:176)Cto MIN/ 25(cid:176)C 25(cid:176)C 70(cid:176)C 85(cid:176)C UNITS MAX/ TYP ACPERFORMANCE Small-signalbandwidth(–3dB) VO –0.2VPP(1) 36 31/43 30/44 30/44 MHz Min/Max Large-signalbandwidth(–3dB) VO –2VPP(1) 36 31/43 30/44 30/44 MHz Min/Max –1dBPassbandbandwidth 31 MHz Typ Attenuation f=27MHz 0.3 –0.3/2.4 –0.35/2.5 –0.4/2.6 dB Min/Max Withrespectto100kHz f=74MHz 30 20 19 19 dB Min Groupdelay f=100kHz 16.1 ns Typ Groupdelayvariation f=27MHz 5.4 ns Typ withrespectto100kHz Channel-to-channeldelay 0.3 ns Typ Differentialgain NTSC/PAL 0.1/ Typ 0.15% Differentialphase NTSC/PAL 0.1/0.1 (cid:176) Typ Totalharmonicdistortion f=1MHz;VO=2VPP –70 dB Typ Signaltonoiseratio NoWeighting,100kHzto37.5MHz 67 dB Typ Channel-to-channelcrosstalk f=1MHz –62 dB Typ ACGain–Allchannels 6 5.7/6.3 5.65/6.35 5.65/6.35 dB Min/Max OutputImpedance f=10MHz 0.5 Ω Typ DCPERFORMANCE Biasedoutputvoltage VI=0V 290 210/370 200/380 190/390 mV Min/Max Inputvoltagerange Limitedbyoutput –0.1/2.3 V Typ Synctipclampchargecurrent VI=–0.1V 380 m A Typ Inputresistance 800 kΩ Typ Inputcapacitance 2 pF Typ OUTPUTCHARACTERISTICS RL=150Ωto2.5V 4.85 V Typ RL=150ΩtoGND 4.7 4.2 4.1 4.1 V Min Highoutputvoltageswing RL=75Ωto2.5V 4.7 V Typ RL=75ΩtoGND 4.5 V Typ RL=150Ωto2.5V(VI=–0.15V) 0.19 V Typ RL=150ΩtoGND(VI=–0.15V) 0.09 0.23 0.26 0.27 V Max Lowoutputvoltageswing RL=75Ωto2.5V(VI=–0.15V) 0.35 V Typ RL=75ΩtoGND(VI=–0.15V) 0.1 V Typ Outputcurrent(sourcing) RL=10Ωto2.5V 90 mA Typ Outputcurrent(sinking) RL=10Ωto2.5V 85 mA Typ POWERSUPPLY Maximumoperatingvoltage 5 5.5 5.5 5.5 V Max Minimumoperatingvoltage 5 2.85 2.85 2.85 V Min Maximumquiescentcurrent VI=0V 19.3 23 25 26 mA Max Minimumquiescentcurrent VI=0V 19.3 14.7 14.2 13.8 mA Min PowerSupplyRejection(+PSRR) 52 dB Typ (1) TheMin/Maxvalueslistedforthisspecificationarespecifiedbydesignandcharacterizationonly. Copyright©2007–2008,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 DUT RTERM RLOAD 1 CH.1IN CH.1OUT8 2 CH.2IN CH.2OUT7 RSOURCE RTERM 34 VCSH+.3IN CH.3GONUDT56 RLOAD 0.1mF VSOURCE RTERM RLOAD + +VS 100mF Figure2.DCCoupledInputandOutputTestCircuit 470mF CIN + RTERM DUT 0.1mF RLOAD CIN 1 CH.1IN CH.1OUT8 470mF + 2 CH.2IN CH.2OUT7 RSOURCE RTERM CIN 34 CVSH+.3IN CH.3GONUDT56 0.1mF RLOAD 0.1mF +470mF VSOURCE RTERM + RLOAD +VS 100mF 0.1mF Figure3.ACCoupledInputandOutputTestCircuit 6 SubmitDocumentationFeedback Copyright©2007–2008,TexasInstrumentsIncorporated ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 TYPICAL CHARACTERISTICS SMALL-SIGNALGAINvsFREQUENCY PHASEvsFREQUENCY 10 45 0 0 B −45 d −10 Gain− −20 RL= 150W|| 13 pF o− −−19305 Signal −30 RL= 75W|| 13 pF Phase −180 mall- −40 −225 V = 3.3 V S −270 S −50 VS= 3.3 V VO- 200 mVPP VO= 200 mVPP −315 RL= 150W|| 13 pF −60 −360 0.1 1 10 100 1k 0.1 1 10 100 f−Frequency−MHz f−Frequency−MHz Figure4. Figure5. SMALL-SIGNALGAINvsFREQUENCY GROUPDELAYvsFREQUENCY 6.5 25 6.0 dB 5.5 Gain− 5.0 RL= 150W|| 13 pF −ns 20 Signal 44..05 RL= 75W|| 13 pF p Delay all- ou 15 Sm 3.5 Gr VS= 3.3 V 3.0 VS= 3.3 V VO= 200 mVPP VO= 200 mVPP RL= 150W|| 13 pF 2.5 10 1 10 100 0.1 1 10 100 f−Frequency−MHz f−Frequency−MHz Figure6. Figure7. SMALL-SIGNALFREQUENCYRESPONSEvs LARGE-SIGNALFREQUENCYRESPONSE CAPACITIVELOADING 10 10 0 0 B −10 d −10 Signal Gain−dB −−−432000 VLoSa=d 3=. 31 5V0W|| 13 pF VO= 0.2 VPP mall-Signal Gain− −−−432000 VVLoSOa==d 32=.0 310 5V m0VWP|P| CL CL= 13 pF S C = 5 pF L −50 −50 V = 2 V O PP C = 20 pF L −60 −60 1 10 100 1k 1 10 100 1k f−Frequency−MHz f−Frequency−MHz Figure8. Figure9. Copyright©2007–2008,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 TYPICAL CHARACTERISTICS (continued) 2ndHARMONICDISTORTIONvs 3rdHARMONICDISTORTIONvs OUTPUTVOLTAGE OUTPUTVOLTAGE -20 -20 dB -30 VLoSa=d 3=. 31 5V0W|| 13 pF dB -30 VLoSa=d 3=. 31 5V0W|| 13 pF F = 8 MHz − F = 8 MHz − monic Distortion ---564000 F = 16 MHz monic Distortion ---645000 F = 16 MHz F = 4 MHz 2nd Order Har --8700 F = 4 MHz F = 2 MHz F = 1 MHz 3rd Order Har ---978000 F = 1 MHzF = 2 MHz -90 -100 0.5 1 1.5 2 2.5 3 0.5 1 1.5 2 2.5 3 VO−Output Voltage−VPP VO−Output Voltage−VPP Figure10. Figure11. CROSSTALKvsFREQUENCY SMALL-SIGNALGAINvsFREQUENCY −30 10 V = 3.3 V S −40 VO= 1 VPP 0 dB RL= 150W|| 13 pF dB −10 Gain− −50 Ch.1 <-> Ch.2 Gain− −20 RL= 150W|| 13 pF gnal −60 gnal −30 RL= 75W|| 13 pF Si Si mall- −70 Ch.2 <-> Ch.3 mall- −40 S S −80 Ch.1 <-> Ch.3 −50 VS= 5 V V = 200 mV O PP −90 −60 0.1 1 10 100 1k 0.1 1 10 100 1k f−Frequency−MHz f−Frequency−MHz Figure12. Figure13. PHASEvsFREQUENCY SMALL-SIGNALGAINvsFREQUENCY 45 6.5 0 6.0 −45 dB 5.5 o −90 ain− 5.0 RL= 150W|| 13 pF − −135 G Phase −180 Signal 44..05 RL= 75W|| 13 pF −225 all- −270 VS= 5 V Sm 3.5 −315 VROL=- 210500 mWV||P 1P3 pF 3.0 VVSO== 52 0V0 mVPP −360 2.5 0.1 1 10 100 1 10 100 f−Frequency−MHz f−Frequency−MHz Figure14. Figure15. 8 SubmitDocumentationFeedback Copyright©2007–2008,TexasInstrumentsIncorporated ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 TYPICAL CHARACTERISTICS (continued) GROUPDELAYvsFREQUENCY LARGE-SIGNALFREQUENCYRESPONSE 25 10 0 −10 s 20 B n d − − −20 Group Delay 15 V = 5 V Signal Gain −−4300 VLoSa=d 5= V150W|| 13 pF VO= 0.2 VPP S VO= 200 mVPP −50 V = 2 V R = 150W|| 13 pF O PP L 10 −60 0.1 1 10 100 1 10 100 1k f−Frequency−MHz f−Frequency−MHz Figure16. Figure17. SMALL-SIGNALFREQUENCYRESPONSEvs 2ndHARMONICDISTORTIONvs CAPACITIVELOADING OUTPUTVOLTAGE 10 -20 VS= 5 V F = 8 MHz 0 dB -30 Load = 150W|| 13 pF − B n Small-Signal Gain−d −−−−−5432100000 VVLoSOa==d 52= 0 V105 m0VWP|P| CL CL= 5 pF CL= 13 pF d Order Harmonic Distortio -----7648500000 F = 16 MHz CL= 20 pF 2n F = 4 MHz F = 2 MHz F = 1 MHz −60 -90 1 10 100 1k 0.5 1 1.5 2 2.5 3 3.5 4 4.5 f−Frequency−MHz V −Output Voltage−V O PP Figure18. Figure19. 3rdHARMONICDISTORTIONvs OUTPUTVOLTAGE CROSSTALKvsFREQUENCY -20 −30 VS= 5 V F = 8 MHz VS= 5 V dB -30 Load = 150W|| 13 pF −40 VO= 1 VPP on− -40 dB RL= 150W|| 13 pF storti -50 F = 16 MHz F = 4 MHz ain− −50 Ch.1 <-> Ch.2 Di G monic -60 Signal −60 er Har --7800 F = 2 MHz Small- −70 Ch.2 <-> Ch.3 Ord −80 Ch.1 <-> Ch.3 3rd -90 F = 1 MHz -100 −90 0.5 1 1.5 2 2.5 3 3.5 4 4.5 0.1 1 10 100 1k V −Output Voltage−V f−Frequency−MHz O PP Figure20. Figure21. Copyright©2007–2008,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 TYPICAL CHARACTERISTICS (continued) QUIESCENTCURRENTvsTEMPERATURE VOLTAGEGAINvsTEMPERATURE 20 6.1 6.08 V = 5 V S V = 3.3 V mA 19.5 B 6.06 VSS= 5 V − d 6.04 nt − urre 19 Gain 6.02 escent C 18.5 VS= 3.3 V Voltage 5.986 ui − 5.96 Q V − 18 A 5.94 Q I 5.92 17.5 5.9 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 TA−AmbientTemperature−oC TA−AmbientTemperature−oC Figure22. Figure23. ATTENUATIONat27MHzvsTEMPERATURE ATTENUATIONat74MHzvsTEMPERATURE 0.7 33 0.6 32 dB VS= 5 V dB VS= 5 V − 0.5 − z z 31 H H M M 7 0.4 4 2 7 30 at at n 0.3 n o o ati ati 29 u 0.2 u n n e e Att 0.1 Att 28 0 27 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 T −AmbientTemperature−oC T −AmbientTemperature−oC A A Figure24. Figure25. 10 SubmitDocumentationFeedback Copyright©2007–2008,TexasInstrumentsIncorporated ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 APPLICATION INFORMATION The THS7316 is targeted for standard definition video output buffer applications. Although it can be used for numerousotherapplications,the needs and requirements of the video signal is an important design parameter of the THS7316. Built on the Silicon Germanium (SiGe) BiCom-3 process, the THS7316 incorporates many featuresnottypicallyfoundinintegratedvideopartswhileconsuminglowpower. TheTHS7316hasthefollowingfeatures: • Single-Supply3-Vto5-Voperationwithlowtotalquiescentcurrentof18.3-mAat3.3-Vand19.3-mAat5-V. • InputconfigurationacceptingDC+Levelshift,ACSync-TipClamp. • AC-Biasingisaccomplishedwiththeuseofanexternalpull-upresistortothepositivepowersupply. • 5th-OrderLowPassFilterforDACreconstructionorADCimagerejection: – 36-MHzforHDTV,Y'P' P' 720p/1080i,G'B'R'(R'G'B'),andComputerVGA/SVGA/XGAsignals. B R – CanalsobeusedforSDTV(480i,576i,CVBS,S-Video),andEDTV(480pand576p)signalsifdesired. • Internal fixed gain of 2 V/V (6 dB) buffer that can drive up to 2 video lines per channel with dc coupling or traditionalaccoupling. • Signal flow-through configuration using an 8-pin SOIC package that complies with the latest (RoHS compatible)andGreenmanufacturingrequirements. OPERATING VOLTAGE The THS7316 is designed to operate from 3-V to 5-V over a –40(cid:176) C to 85(cid:176) C temperature range. The impact on performance over the entire temperature range is negligible due to the implementation of thin film resistors and highquality–lowtemperaturecoefficientcapacitors. The power supply pins should have a 0.1-m F to 0.01-m F capacitor placed as close as possible to these pins. Failure to do so may result in the THS7316 outputs ringing or have an oscillation. Additionally, a large capacitor, such as 22 m F to 100 m F, should be placed on the power supply line to minimize interference with 50/60 Hz line frequencies. INPUT VOLTAGE The THS7316 input range allows for an input signal range from –0.3 V to about (V – 1.5 V). But, due to the s+ internal fixed gain of 2 V/V (6 dB) and the internal level shift of nominally 140-mV, the output is generally the limiting factor for the allowable linear input range. For example, with a 5-V supply, the linear input range is from –0.3 V to 3.5 V. However, due to the gain and level shift, the linear output range limits the allowable linear input rangetobefromabout–0.1Vto2.3V. INPUT OVERVOLTAGE PROTECTION The THS7316 is built using a high-speed complementary bipolar and CMOS process. The internal junction breakdown voltages are low for these small geometry devices. These breakdowns are reflected in the Absolute Maximum Ratings table. All input and output device pins are protected with internal ESD protection diodes to the powersupplies,asshowninFigure26. +Vs External Input/ Internal Output Circuitry Pin Figure26.InternalESDProtection Copyright©2007–2008,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 These diodes provide moderate protection to input overdrive voltages above and below the supplies as well. The protectiondiodescantypicallysupport30-mAofcontinuouscurrentwhenoverdriven. TYPICAL CONFIGURATION and VIDEO TERMINOLOGY A typical application circuit using the THS7316 as a video buffer is shown in Figure 27. It shows a DAC (or encoder such as the THS8200) driving the three input channels of the THS7316. Although these channels show HDTV Y'P' P' (sometimes labeled Y'C' C' ) signals of a 720p or 1080i system, they can also be G'B'R' (R'G'B') B R B R signalsorothervariations. Note that the Y' term is used for the luma channels throughout this document rather than the more common luminance (Y) term. The reason is to account for the definition of luminance as stipulated by the CIE – International Commission on Illumination. Video departs from true luminance since a nonlinear term, gamma, is added to the true RGB signals to form R'G'B' signals. These R'G'B' signals are then used to mathematically createluma(Y').Thusluminance(Y)isnotmaintainedprovidingadifferenceinterminology. This rationale is also used for the chroma (C') term. Chroma is derived from the non-linear R'G'B' terms and thus it is nonlinear. Chrominance (C) is derived from linear RGB giving the difference between chroma (C') and chrominance (C). The color difference signals (P' / P' / U' / V') are also referenced this way to denote the B R nonlinear(gammacorrected)signals. R'G'B' (commonly mislabeled RGB) is also called G’B’R’ (again commonly mislabeled as GBR) in professional video systems. The SMPTE component standard stipulates that the luma information is placed on the first channel, the blue color difference is placed on the second channel, and the red color difference signal is placed onthethirdchannel.ThisisconsistentwiththeY'P' P' nomenclature.Becausetheluma channel (Y') carries the B R sync information and the green channel (G') also carries the sync information, it makes logical sense that G' be placed first in the system. Since the blue color difference channel (P' ) is next and the red color difference B channel (P' ) is last, then it also makes logical sense to place the B' signal on the second channel and the R' R signal on the third channel, respectively . Thus hardware compatibility is better achieved when using G'B'R' rather than R'G'B'. Note that for many G'B'R' systems sync is embedded on all three channels, but may not alwaysbethecaseinallsystems. 3.3 V Y’ Out 330mF 75W + DAC/ Y’ 75W Encoder THS7316 R P’ Out B 1 CH.1 IN CH.1 OUT 8 330mF 75W HDTV + 720p/1080i P’B 2 CH.2 IN CH.2 OUT 7 Y’P’ P’ B R R 3 CH.3 IN CH.3 OUT 6 75W G’B’R’ VGA 4 VS+ GND 5 SVGA P’ P’ Out XGA R 0.1mF 330mF 75W R R + 75W 22mF 3 V to 5 V Figure27.TypicalHDTVY'/P' /P' InputsFromDC-CoupledEncoder/DAC B R WithAC-CoupledLineDriving 12 SubmitDocumentationFeedback Copyright©2007–2008,TexasInstrumentsIncorporated ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 INPUT MODE OF OPERATION – DC The inputs to the THS7316 allows for both ac-coupled and dc-coupled inputs. Many DACs or Video Encoders can be dc connected to the THS7316. One of the drawbacks to dc coupling is when 0-V is applied to the input. Although the input of the THS7316 allows for a 0-V input signal with no issues, the output swing of a traditional amplifier cannot yield a 0-V signal resulting in possible clipping. This is true for any single-supply amplifier due to the limitations of the output transistors. Both CMOS and bipolar transistors cannot go to 0-V while sinking current. This trait of a transistor is also the same reason why the highest output voltage is always less than the powersupplyvoltagewhensourcingcurrent. This output clipping can reduce the sync amplitudes (both horizontal and vertical sync amplitudes) on the video signal. A problem occurs if the receiver of this video signal uses an AGC loop to account for losses in the transmission line. Some video AGC circuits derive gain from the horizontal sync amplitude. If clipping occurs on the sync amplitude, then the AGC circuit can increase the gain too much – resulting in too much amplitude gain correction.Thismayresultinapicturewithanoverlybrightdisplaywithtoomuchcolorsaturation. It is good engineering design practice to ensure saturation/clipping does not take place. Transistors always take a finite amount of time to come out of saturation. This saturation could possibly result in timing delays or other aberrationsonthesignals. To eliminate saturation/clipping problems, the THS7316 has a dc + 140-mV input shift feature. This feature takes the input voltage and adds an internal +140-mV shift to the signal. Since the THS7316 also has a gain of 6 dB (2 V/V), the resulting output with a 0-V applied input signal is about 280-mV. The THS7316 rail-to-rail output stage can create this output level while connected to a typical video load. This ensures that no saturation / clipping of the sync signals occur. This is a constant shift regardless of the input signal. For example, if a 1-V input is applied,theoutputisat2.28-V. Because the internal gain is fixed at 6 dB, the gain dictates what the allowable linear input voltage range can be without clipping concerns. For example, if the power supply is set to 3-V, the maximum output is about 2.9-V whiledrivingasignificant amount of current. Thus, to avoid clipping, the allowable input is ((2.9 V / 2) – 0.14 V) = 1.31 V. This is true for up to the maximum recommended 5-V power supply that allows about a ((4.9V / 2) – 0.14 V)=2.31Vinputrangewhileavoidingclippingontheoutput. The input impedance of the THS7316 in this mode of operation is dictated by the internal 800-kΩ pull-down resistor. This is shown in Figure 28. Note that the internal voltage shift does not appear at the input pin, only the outputpin. +Vs Internal Circuitry Input + 800kW - 140 mV Level Shifter Figure28.EquivalentDCInputModeCircuit Copyright©2007–2008,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 INPUT MODE OF OPERATION – AC SYNC TIP CLAMP Some video DACs or encoders are not referenced to ground but rather to the positive power supply. These DACs typically only sink current rather than the more traditional current sourcing DAC where the resistor is referenced to ground. The resulting video signals can be too high of a voltage for a dc-coupled video buffer to function properly. To account for this scenario the THS7316 incorporates a sync-tip clamp circuit. This function requires a capacitor (nominally 0.1 m F) to be in series with the input. Note, while the term sync-tip-clamp is used throughout this document, it should be noted that the THS7316 is better termed as a dc-restoration circuit based onhowthisfunctionisperformed.Thiscircuitisanactiveclampcircuitandnotapassivediodeclampfunction. The input to the THS7316 has an internal control loop which sets the lowest input applied voltage to clamp at ground (0-V). By setting the reference at 0-V, the THS7316 allows a dc-coupled input to also function. Hence, the STC is considered transparent since it does not operate unless the input signal goes below ground. The signal then goes through the same 140-mV level shifter resulting in an output voltage low level of 280-mV. If the input signal tries to go below the 0-V, the internal control loop of the THS7316 will source up to 3-mA of current to increase the input voltage level on the THS7316 input side of the coupling capacitor. As soon as the voltage goesabovethe0-Vlevel,theloopstopssourcingcurrentandbecomeshighimpedance. One of the concerns about the sync-tip-clamp level is how the clamp reacts to a sync edge that has overshoot—common in VCR signals or reflections found in poor PCB layouts. Ideally the STC should not react to the overshoot voltage of the input signal. Otherwise, this could result in clipping on the rest of the video signal as itmayraisethebiasvoltagetoomuch. To help minimize this input signal overshoot problem, the control loop in the THS7316 has an internal low-pass filter as shown in Figure 29. This filter reduces the response time of the STC circuit. This delay is a function of how far the voltage is below ground, but in general it is about a 80-ns delay. The effect of this filter is to slow down the response of the control loop so as not to clamp on the input overshoot voltage, but rather the flat portionofthesyncsignal. Asaresultof this delay, the sync may have an apparent voltage shift. The amount of shift is dependant upon the amount of droop in the signal as dictated by the input capacitor and the STC current flow. Because the sync is primarily for timing purposes with syncing occurring on the edge of the sync signal, this shift is transparent in mostsystems. While this feature may not fully eliminate overshoot issues on the input signal for excessive overshoot and/or ringing, the STC system should help minimize improper clamping levels. As an additional method to help minimize this issue, an external capacitor (ex: 10 pF to 47 pF) to ground in parallel with the external termination resistorscanhelpfilterovershootproblems. It should be noted that this STC system is dynamic and does not rely upon timing in any way. It only depends on the voltage appearing at the input pin at any given point in time. The STC filtering helps minimize level shift problems associated with switching noises or very short spikes on the signal line. This helps ensure a very robustSTCsystem. +Vs +Vs STC LPF Comparator Internal Circuitry + Input - Pin Input + 0.1mF - 800kW 140 mV Level Shifter Figure29.EquivalentACSyncTipClampInputCircuit When the AC Sync-Tip-Clamp (STC) operation is used, there must also be some finite amount of discharge bias 14 SubmitDocumentationFeedback Copyright©2007–2008,TexasInstrumentsIncorporated ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 current. As previously described, if the input signal goes below the 0-V clamp level, the internal loop of the THS7316 will source current to increase the voltage appearing at the input pin. As the difference between the signal level and the 0-V reference level increases, the amount of source current increases proportionally—supplying up to 3-mA of current. Thus the time to re-establish the proper STC voltage can be fast.Ifthedifferenceissmall,thenthesourcecurrentisalsosmalltoaccountforminorvoltagedroop. But, what happens if the input signal goes above the 0-V input level? The problem is the video signal is always above this level, and must not be altered in any way. But if the Sync level of the input signal is above this 0-V level,thentheinternaldischarge(sink)currentwilldischargetheac-coupledbiassignaltotheproper0-Vlevel. This discharge current must not be large enough to alter the video signal appreciably, or picture quality issues mayarise.Thisisoftenseenbylookingatthetilt(akadroop)ofaconstantlumasignalbeingapplied and looking at the resulting output level. The associated change in luma level from the beginning of the video line to the end ofthevideolineistheamountoflinetilt(droop). If the discharge current is small, the amount of tilt is low which is good. But, the amount of time for the system to capture the sync signal could be too long. This is also termed hum rejection. Hum arises from the ac line voltage frequencyof50-Hzor60-Hz.Thevalueofthedischargecurrentandtheac-couplingcapacitorcombinetodictate thehumrejectionandtheamountoflinetilt. To allow for both dc-coupling and ac-coupling in the same part, the THS7316 incorporates an 800-kΩ resistor to ground. Although a true constant current sink is preferred over a resistor, there are significant issues when the voltage is near ground. This can cause the current sink transistor to saturate and cause potential problems with the signal. This resistor is large enough as to not impact a dc-coupled DAC termination. For discharging an ac-coupled source, Ohm’s Law is used. If the video signal is 1 V, then there is 1 V / 800 kΩ = 1.25-m A of discharge current. If more hum rejection is desired or there is a loss of sync occurring, then decrease the 0.1-m F input coupling capacitor. A decrease from 0.1 m F to 0.047 m F increases the hum rejection by a factor of 2.1. Alternatively an external pull-down resistor to ground may be added which decreases the overall resistance, and ultimatelyincreasesthedischargecurrent. To ensure proper stability of the AC STC control loop, the source impedance must be less than 1-kΩ with the inputcapacitorinplace.Otherwise,thereisapossibilityofthe control loop to ring and this ringing may appear on the output of the THS7316. Because most DACs or encoders use resistors to establish the voltage, which are typicallylessthan300-Ω,thenmeetingthe<1-kΩrequirementisdone.But,if the source impedance looking from the THS7316 input perspective is high, then add a 1-kΩ resistor to GND to ensure proper operation of the THS7316. INPUT MODE OF OPERATION – AC BIAS Sync tip clamps work well for signals that have horizontal and/or vertical syncs associated with them. But, some video signals do not have a sync embedded within the signal – such as Chroma or the P’ and P’ channels of a B R 480i/480p/576i/576p signal; or the bottom of the sync is not the lowest possible level of the video signal – such as the P’ and P’ channels of a 720p and 1080i signal. If ac-coupling of these signals is desired, then a dc bias B R is required to properly set the dc operating point within the THS7316. This function is easily accomplished with theTHS7316byaddinganexternalpull-upresistortothepositivepowersupplyasshowninFigure30. Copyright©2007–2008,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 3.3 V 3.3 V Internal R PU Circuitry 3.01 MW Input + Input Cin Pin 800 kW - 140 mV Level Shifter (1) R denotesanexternalPull-upResistor PU Figure30.AC-BiasInputModeCircuitConfiguration Thedcvoltageappearingattheinputpinisapproximatelyequalto: V =V +· (800k‚ (800k+R )) DC S PU The THS7316 allowable input range is approximately (V + – 1.5 V) which allows for a wide input voltage range. S As such, the input dc-bias point is flexible with the output dc-bias point being the primary factor. For example, if the output dc-bias point is desired to be 1.65 V on a 3.3-V supply, then the input dc-bias point should be (1.65 V – 280 mV) /2 = 0.685 V. Thus, the pull-up resistor calculates to about 3.01-MΩ resulting in 0.693 V. If the input dc-bias point is desired to be 0.685 V with a 5-V power supply, then the pull-up resistor calculates to about 5.1MΩ. The internal 800-kΩ resistor has approximately a ±20% variance. As such, the calculations should take this into account. For the 0.693 V example above using an ideal 3.01-MΩ resistor, the input dc-bias voltage is about 0.693V±0.11V. One other issue that must be taken into account is that the dc-bias point is a function of the power supply. As such, there may be an impact on power supply rejection (PSRR) on the system. To help reduce the impact, the inputcapacitorcombinedwiththepull-upresistancefunctionsasalow-passfilter.Additionally,thetime to charge the capacitor to the final dc-bias point is also a function of the pull-up resistor and the input capacitor. Lastly, the inputcapacitorformsahigh-passfilter with the parallel impedance of the pull-up resistor and the 800-kΩ resistor. It is good to have this high pass filter at about 3-Hz to minimize any potential droop on a P' , P' , or non-sync B R signals. A 0.1-m F input capacitor with a 3.01-MΩ pull-up resistor equates to about a 2.5-Hz high-pass corner frequency. This mode of operation is recommended for use with chroma (C'), P’ , P' , U', V', and non-sync B' and/or R' B R signals. OUTPUT MODE OF OPERATION – DC COUPLED The THS7316 incorporates a rail-to-rail output stage that can be used to drive the line directly without the need for large ac-coupling capacitors as shown in Figure 31. This offers the best line tilt and field tilt (or droop) performance since there is no ac-coupling occurring. Remember that if the input is ac-coupled, then the resulting tiltduetotheinputac-couplingisseen on the output regardless of the output coupling. The 80-mA output current drive capability of the THS7316 was designed to drive two video lines per channel simultaneously – essentially a 75-Ωload–whilekeepingtheoutputdynamicrangeaswideaspossible. 16 SubmitDocumentationFeedback Copyright©2007–2008,TexasInstrumentsIncorporated ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 3.3 V Y’/ G’Out 75W DAC/ Y’/ G’ 75W Encoder THS7316 R P’ / B’Out B 1 CH.1 IN CH.1 OUT 8 75W HDTV 720p/1080i P’B/ B’ 2 CH.2 IN CH.2 OUT 7 Y’P’ P’ B R R 3 CH.3 IN CH.3 OUT 6 75W G’B’R’ VGA 4 VS+ GND 5 SXVGGAA P’R / R’ 0.1mF 75WP’R/ R’Out R + 75W 22mF 3 V to 5 V Figure31.TypicalHDTVY'P' P' /G'B'R'SystemwithDC-CoupledLineDriving B R One concern of dc-coupling is if the line is terminated to ground. If the ac-bias input configuration is used, the output of the THS7316 will have a dc-bias on the output. With 2 lines terminated to ground, this creates a dc-current path to exist which results in a slightly decreased high output voltage swing and resulting in an increase in power dissipation of the THS7316. While the THS7316 was designed to operate with a junction temperature of up to 125(cid:176) C, care must be taken to ensure that the junction temperature does not exceed this level or else long term reliability could suffer. Although this configuration only adds less than 10 mW of power dissipation per channel, the overall low power dissipation of the THS7316 design minimizes potential thermal issuesevenwhenusingtheSOICpackageathighambienttemperatures. Another concern of dc coupling is the blanking level voltage of the video signal. The EIA specification dictates that the blanking level shall be 0 V ±1 V. While there is some question as to whether this voltage is at the output of the amplifier or at the receiver, it is generally regarded to be measured at the receiver side of a system as the rest of the specification voltage requirements are given with doubly terminated connections present. With the rail-to-rail output swing capability, combined with the 140-mV input level shift, meeting this requirement is accomplished. Thus, elimination of the large output ac-coupling capacitor can be done while still meeting the EIA specification.ThiscansavesignificantPCBareaandcosts. Note that the THS7316 can drive the line with dc-coupling regardless of the input mode of operation. The only requirement is to make sure the video line has proper termination in series with the output – typically 75-Ω. This helps isolate capacitive loading effects from the THS7316 output. Failure to isolate capacitive loads may result in instabilities with the output buffer potentially causing ringing or oscillations to appear. The stray capacitance appearingdirectlyattheTHS7316outputpinsshouldbekeptbelow20-pF. OUTPUT MODE OF OPERATION – AC COUPLED The most common method of coupling the video signal to the line is with the use of a large capacitor. This capacitor is typically between 220-m F and 1000-m F, although 330-m F is common. This value of this capacitor must be this large to minimize the line tilt (droop) and/or field tilt associated with ac-coupling as described previously in this document. AC-coupling is done for several reasons, but the most common reason is to ensure full inter-operability with the receiving video system. This ensures that regardless of the reference dc voltage used on the transmit side, the receive side will re-establish the dc reference voltage to its own requirements, and meetsEIAspecifications. Like the dc-output mode of operation, each line should have a 75-Ω source termination resistor in series with the ac-coupling capacitor. If 2 lines are to be driven, it is best to have each line use its own capacitor and resistor rather than sharing these components as shown in Figure 32. This helps ensure line-to-line dc isolation and the potentialproblemsasstipulatedpreviously.Usingasingle1000-m Fcapacitorfor2-linescanbedone, but there is achanceforinterferencetobecreatedbetweenthetworeceivers. Copyright©2007–2008,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 Due to the edge rates and frequencies of operation, it is recommended – but not required – to place a 0.1-m F to 0.01-m F capacitor in parallel with the large 220-m F to 1000-m F capacitor. These large value capacitors are most commonly aluminum electrolytic. These capacitors have significantly large ESR (equivalent series resistance), and their impedance at high frequencies is large due to the associated inductances involved with the leads and construction. The small 0.1-m F to 0.01-m F capacitors help pass these high frequency (>1 MHz) signals with much lowerimpedancethanthelargecapacitors. Although it is common to use the same capacitor values for all the video lines, the frequency bandwidth of the chroma signal in a S-Video system are not required to go as low – or as high of a frequency – as the luma channels.Thusthecapacitorvaluesofthechromaline(s)canbesmaller–suchas0.1-m F. Y’ 330mf Out1 (NoteA) 75W + 75W Y’ 330mf Out2 (NoteA) 75W 3.3 V + 3.3 V R 0.1mF 75W P’ Y’ 330mf B Out1 DAC/ 3.3V 3.3 V THS7316 (NoteA) 75W Encoder + 3.01 MW R 0.1mF 1 CH.1 IN CH.1 OUT 8 75W 7Y20’HPpD’/1TP0V8’0i P’B 3.3V3.01 MW3.3 V 23 CCHH..23 IINN CCHH..32 OOUUTT 76 (3N3o0temAf) 75W OPu’tB2 G’BB’R’R R 0.1mF 4 VS+ GND 5 + P’ R 0.1mF 75W P’ 330mf R Out1 + (NoteA) 75W + 22mF 3.3 V 75W P’ 330mf R Out2 (NoteA) 75W + 75W A. Duetothehighfrequencycontentofthevideosignal,itisrecommended,butnotrequired,toadda0.1-m For0.01-m F capacitorinparallelwiththeselargecapacitors. B. CurrentsinkingDAC/Encodershown.Seetheapplicationnotes. Figure32.Typical480i/576iY'P' P' AC-InputSystemDriving2AC-CoupledVideoLines B R 18 SubmitDocumentationFeedback Copyright©2007–2008,TexasInstrumentsIncorporated ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 LOW PASS FILTER Each channel of the THS7316 incorporates a 5th-Order Low Pass Filter. These video reconstruction filters minimize DAC images from being passed onto the video receiver. Depending on the receiver design, failure to eliminate these DAC images can cause picture quality problems due to aliasing of the ADC. Another benefit of the filter is to smooth out aberrations in the signal which some DACs can have if their own internal filtering is not good.Thishelpswithpicturequalityandhelpsinsurethesignalmeetsvideobandwidthrequirements. Each filter in the THS7316 is associated with a Butterworth characteristic. The benefit of the Butterworth response is that the frequency response is flat with a relatively steep initial attenuation at the corner frequency. The problem is that the group delay rises near the corner frequency. Group delay is defined as the change in phase (radians/second) divided by a change in frequency. An increase in group delay corresponds to a time domainpulseresponsethathasovershootandsomepossibleringingassociatedwiththeovershoot. The use of other type of filters, such as elliptic or chebyshev, are not recommended for video applications due to their very large group delay variations near the corner frequency resulting in significant overshoot and ringing. While these elliptic or chebyshev filters may help meet the video standard specifications with respect to amplitude attenuation, their group delay is beyond the standard specifications. Coupled with the fact that video can go from a white pixel to a black pixel over and over again, ringing can occur. Ringing typically causes a display to have ghosting or fuzziness appear on the edges of a sharp transition. However, a Bessel filter has an ideal group delay response, but the rate of attenuation is typically too low for acceptable image rejection. Thus theButterworthfilterisarespectablecompromiseforbothattenuationandgroupdelay. The THS7316 filters have a nominal corner (-3dB) frequency at 36-MHz and a –1 dB passband typically at 31-MHz. This 36-MHz filter is ideal for High Definition (HD) 720p and 1080i signals. For systems that oversample significantly, the THS7316 can also be useful for Standard Definition (SD) NTSC and PAL signals such as 480i/576i Y'P' P' , Y'U'V', and broadcast G’B’R’ (R’G’B’) signals. It can also be useful with Enhanced Definition B R (ED)signalsincluding480p/576pY'P' P' ,Y'U'V',broadcastG’B’R’(R’G’B’)signals,andcomputervideosignals. B R The 36-MHz -3dB corner frequency was designed to allow a maximally flat video signal while achieving 30-dB of attenuation at 74.25-MHz – a common sampling frequency between the DAC/ADC 2nd and 3rd Nyquist zones found in many video systems. This is important because any signal appearing around this frequency can appear in the baseband due to aliasing effects of an analog to digital converter found in a receiver. Keep in mind that DAC images do not stop at 74.25 MHz, they continue around the sampling frequencies of 148.5 MHz, 222.75-MHz, 297-MHz, etc. Because of these multiple images that an ADC can fold down into the baseband signal, the low pass filter must also eliminate these higher order images. The THS7316 has over 50-dB attenuation at 148.5-MHz, over 50-dB attenuation at 222.75-MHz, and about 55-dB attenuation at 297-MHz. Attenuation to 1-GHz is at least 36-dB which makes sure that images do not effect the desired video baseband signal. The 36-MHz filter frequency was chosen to account for process variations in the THS7316. To ensure the required video frequencies are not affected, the filter corner frequency must be high enough to allow component variations. The other consideration is the attenuation must be large enough to ensure the anti-aliasing / reconstruction filtering is enough to meet the system demands. Thus, the filter frequencies were not arbitrarily selected. Copyright©2007–2008,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 BENEFITS OVER PASSIVE FILTERING Two key benefits of using an integrated filter system, such as the THS7316, over a passive system is PCB area and filter variations. The small SOIC-8 package (3-video channels) is much smaller over a passive RLC network, especially a 5-pole passive network. Additionally, inductors have at best ±10% tolerances (normally ±15% to ±20% is common) and capacitors typically have ±10% tolerances. Using a Monte Carlo analysis shows that the filter corner frequency (–3 dB), flatness (–1 dB), Q factor (or peaking), and channel-to-channel delay has wide variations. This can lead to potential performance and quality issues in mass-production environments. The THS7316solvesmostoftheseproblemsbyusingthecornerfrequencyasessentiallytheonlyvariable. One concern about an active filter in an integrated circuit is the variation of the filter characteristics when the ambient temperature and the subsequent die temperature changes. To minimize temperature effects, the THS7316 uses low temperature coefficient resistors and high quality – low temperature coefficient capacitors found in the BiCom-3 process. The filters have been specified by design to account for process variations and temperature variations to maintain proper filter characteristics. This maintains a low channel-to-channel time delaywhichisrequiredforpropervideosignalperformance. Another benefit of a THS7316 over a passive RLC filter are the input and output impedances. The input impedance presented to the DAC varies significantly with a passive network and may cause voltage variations over frequency. The THS7316 input impedance is 800 kΩ and only the 2-pF input capacitance plus the PCB trace capacitance impacting the input impedance. As such, the voltage variation appearing at the DAC output is bettercontrolledwiththeTHS7316. On the output side of the filter, a passive filter will again have a impedance variation over frequency. The THS7316 is an op-amp which approximates an ideal voltage source. A voltage source is desirable because the output impedance is very low and can source and sink current. To properly match the transmission line characteristic impedance of a video line, a 75-Ω series resistor is placed on the output. To minimize reflections and to maintain a good return loss, this output impedance must maintain a 75-Ω impedance. A passive filter impedance variation is not specified while the THS7316 has approximately 0.5-Ω of output impedance at 10MHz.Thus,thesystemismatchedbetterwithaTHS7316comparedtoapassivefilter. One last benefit of the THS7316 over a passive filter is power dissipation. A DAC driving a video line must be able to drive a 37.5-Ω load - the receiver 75-Ω resistor and the 75-Ω impedance matching resistor next to the DAC to maintain the source impedance requirement. This forces the DAC to drive at least 1.25-V peak (100% Saturation CVBS) / 37.5 Ω = 33.3 mA. A DAC is a current steering element and this amount of current flows internallytotheDACeveniftheoutputis 0-V. Thus, power dissipation in the DAC may be high - especially when 6-channels are being driven. Using the THS7316, with a high input impedance and the capability to drive up to 2-video lines per channel, can reduce the DAC power dissipation significantly. This is because the resistance the DAC is driving can be substantially increased. It is common to set this in a DAC by a current setting resistor on the DAC. Thus, the resistance can be 300-Ω or more - substantially reducing the current drive demands from the DAC and saving substantial amount of power. For example, a 3.3-V 6-Channel DAC dissipates 660 mW just for the steering current capability (6 ch x 33.3 mA x 3.3 V) if it needs to drive 37.5-Ω load. With a 300-Ω load, the DACpowerdissipationduetocurrentsteeringcurrentwouldonlybe82.5mW(6chX4.16mAX3.3V). 20 SubmitDocumentationFeedback Copyright©2007–2008,TexasInstrumentsIncorporated ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 EVALUATION MODULE To evaluate the THS7316, an evaluation module (EVM) is available. This allows for testing of the THS7316 in many different systems. Inputs and outputs include RCA connectors for consumer grade interconnections, or BNC connectors for higher level lab grade connections. Several unpopulated component pads are found on the EVMtoallowfordifferentinputandoutputconfigurationsasdictatedbytheuser. Figure 33 shows the schematic of the THS7316 EVM. Figure 34 and Figure 35 shows the top layer and bottom layer of the EVM which incorporates standard high-speed layout practices. The bill of materials is shown in Table1assuppliedfromTexasInstruments. + + + + Figure33.THS7316DEVM Copyright©2007–2008,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 Figure34.TopView Figure35.BottomView 22 SubmitDocumentationFeedback Copyright©2007–2008,TexasInstrumentsIncorporated ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 Bill of Materials Table1.THS7316DEVM MANUFACTURERPART DISTRIBUTORPART ITEM REFDES QTY DESCRIPTION SMDSIZE NUMBER NUMBER (DIGI-KEY) 1 FB1 1 BEAD,FERRITE,2.5A,330OHM 0805 (TDK)MPZ2012S331A 445-1569-1-ND 2 C16 1 CAP,100m F,TAN,10V,10%,LOESR C (AVX) (DIGI-KEY) TPSC107K010R0100 478-1765-1-ND 3 C17,C18,C19 3 OPEN 0603 4 C15 1 CAP,0.1m F,CERAMIC,16V,X7R 0603 (AVX)0603YC104KAT2A (GARRETT) 0603YC104KAT2A C1,C2,C3,C12, 5 6 OPEN 0805 C13,C14 6 C5 1 CAP,0.01m F,CERAMIC,100V,X7R 0805 (AVX)08051C103KAT2A (DIGI-KEY) 478-1358-1-ND 7 C7,C9,C11 3 CAP,0.1m F,CERAMIC,50V,X7R 0805 (AVX)08055C104KAT2A (DIGI-KEY) 478-1395-1-ND 8 C4 1 CAP,1m F,CERAMIC,16V,X7R 0805 (TDK)C2012X7R1C105K (DIGI-KEY) 445-1358-1-ND 9 C6,C8,C10 3 CAP,ALUM,470m F,10V,20% F (CORNELL) (NEWARK)97C7597 AFK477M10F24B RX1,RX2,RX3, 10 6 OPEN 0603 RX4,RX5,RX6 R4,R5,R6,R7,R8, (DIGI-KEY) 11 9 RESISTOR,0OHM 0805 (ROHM)MCR10EZHJ000 R9,Z1,Z2,Z3 RHM0.0ACT-ND R1,R2,R3,R10, (DIGI-KEY) 12 6 RESISTOR,75OHM,1/8W,1% 0805 (ROHM)MCR10EZHF75.0 R11,R12 RHM75.0CCT-ND JACK,BANANARECEPTANCE,0.25" 13 J9,J10 2 (SPC)813 (NEWARK)39N867 DIA.HOLE J1,J2,J3,J6,J7, (AMPHENOL) 14 6 CONNECTOR,BNC,JACK,75OHM (NEWARK)93F7554 J8 31-5329-72RFX 15 J4,J5 2 CONNECTOR,RCA,JACK,R/A (CUI)RCJ-32265 (DIGI-KEY)CP-1446-ND 16 TP1,TP2,TP3 3 TESTPOINT,RED (KEYSTONE)5000 (DIGI-KEY)5000K-ND 17 TP4,TP5 2 TESTPOINT,BLACK (KEYSTONE)5001 (DIGI-KEY)5001K-ND 18 U1 1 IC,THS7316 D (TI)THS7316D 19 4 STANDOFF,4-40HEX,0.625"LENGTH (KEYSTONE)1808 (NEWARK)89F1934 20 4 SCREW,PHILLIPS,4-40,.250" (BF)PMS4400031PH (DIGI-KEY)H343-ND 21 1 BOARD,PRINTEDCIRCUIT EDGE#6483761REV.A EVALUATIONBOARD/KITIMPORTANTNOTICE TexasInstruments(TI)providestheenclosedproduct(s)underthefollowingconditions: Thisevaluationboard/kitisintendedforuseforENGINEERINGDEVELOPMENT,DEMONSTRATION,OREVALUATIONPURPOSES ONLYandisnotconsideredbyTItobeafinishedend-productfitforgeneralconsumeruse.Personshandlingtheproduct(s)musthave electronicstrainingandobservegoodengineeringpracticestandards.Assuch,thegoodsbeingprovidedarenotintendedtobecomplete intermsofrequireddesign-,marketing-,and/ormanufacturing-relatedprotectiveconsiderations,includingproductsafetyandenvironmental measurestypicallyfoundinendproductsthatincorporatesuchsemiconductorcomponentsorcircuitboards.Thisevaluationboard/kitdoes notfallwithinthescopeoftheEuropeanUniondirectivesregardingelectromagneticcompatibility,restrictedsubstances(RoHS),recycling (WEEE),FCC,CEorUL,andthereforemaynotmeetthetechnicalrequirementsofthesedirectivesorotherrelateddirectives. Shouldthisevaluationboard/kitnotmeetthespecificationsindicatedintheUser’sGuide,theboard/kitmaybereturnedwithin30daysfrom thedateofdeliveryforafullrefund.THEFOREGOINGWARRANTYISTHEEXCLUSIVEWARRANTYMADEBYSELLERTOBUYER ANDISINLIEUOFALLOTHERWARRANTIES,EXPRESSED,IMPLIED,ORSTATUTORY,INCLUDINGANYWARRANTYOF MERCHANTABILITYORFITNESSFORANYPARTICULARPURPOSE. Theuserassumesallresponsibilityandliabilityforproperandsafehandlingofthegoods.Further,theuserindemnifiesTIfromallclaims arisingfromthehandlingoruseofthegoods.Duetotheopenconstructionoftheproduct,itistheuser’sresponsibilitytotakeanyandall appropriateprecautionswithregardtoelectrostaticdischarge. EXCEPTTOTHEEXTENTOFTHEINDEMNITYSETFORTHABOVE,NEITHERPARTYSHALLBELIABLETOTHEOTHERFORANY INDIRECT,SPECIAL,INCIDENTAL,ORCONSEQUENTIALDAMAGES. TIcurrentlydealswithavarietyofcustomersforproducts,andthereforeourarrangementwiththeuserisnotexclusive. Copyright©2007–2008,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLink(s):THS7316

THS7316 www.ti.com SLOS521A–MARCH2007–REVISEDJANUARY2008 EVALUATIONBOARD/KITIMPORTANTNOTICE(continued) TIassumesnoliabilityforapplicationsassistance,customerproductdesign,softwareperformance,orinfringementofpatentsor servicesdescribedherein. PleasereadtheUser’sGuideand,specifically,theWarningsandRestrictionsnoticeintheUser’sGuidepriortohandlingtheproduct.This noticecontainsimportantsafetyinformationabouttemperaturesandvoltages.ForadditionalinformationonTI’senvironmentaland/or safetyprograms,pleasecontacttheTIapplicationengineerorvisitwww.ti.com/esh. NolicenseisgrantedunderanypatentrightorotherintellectualpropertyrightofTIcoveringorrelatingtoanymachine,process,or combinationinwhichsuchTIproductsorservicesmightbeorareused. FCCWarning Thisevaluationboard/kitisintendedforuseforENGINEERINGDEVELOPMENT,DEMONSTRATION,OREVALUATIONPURPOSES ONLYandisnotconsideredbyTItobeafinishedend-productfitforgeneralconsumeruse.Itgenerates,uses,andcanradiateradio frequencyenergyandhasnotbeentestedforcompliancewiththelimitsofcomputingdevicespursuanttopart15ofFCCrules,whichare designedtoprovidereasonableprotectionagainstradiofrequencyinterference.Operationofthisequipmentinotherenvironmentsmay causeinterferencewithradiocommunications,inwhichcasetheuserathisownexpensewillberequiredtotakewhatevermeasuresmay berequiredtocorrectthisinterference. MailingAddress:TexasInstruments,PostOfficeBox655303,Dallas,Texas75265 Copyright2008,TexasInstrumentsIncorporated EVMWARNINGSANDRESTRICTIONS ItisimportanttooperatethisEVMwithintheinputvoltagerangeof2.85Vto5.5Vsinglesupplyandtheoutputvoltagerangeof0Vto5.5 V. Exceedingthespecifiedinputrangemaycauseunexpectedoperationand/orirreversibledamagetotheEVM.Iftherearequestions concerningtheinputrange,pleasecontactaTIfieldrepresentativepriortoconnectingtheinputpower. Applyingloadsoutsideofthespecifiedoutputrangemayresultinunintendedoperationand/orpossiblepermanentdamagetotheEVM. PleaseconsulttheEVMUser'sGuidepriortoconnectinganyloadtotheEVMoutput.Ifthereisuncertaintyastotheloadspecification, pleasecontactaTIfieldrepresentative. Duringnormaloperation,somecircuitcomponentsmayhavecasetemperaturesgreaterthan85C.TheEVMisdesignedtooperate properlywithcertaincomponentsabove85Caslongastheinputandoutputrangesaremaintained.Thesecomponentsincludebutarenot limitedtolinearregulators,switchingtransistors,passtransistors,andcurrentsenseresistors.Thesetypesofdevicescanbeidentified usingtheEVMschematiclocatedintheEVMUser'sGuide.Whenplacingmeasurementprobesnearthesedevicesduringoperation, pleasebeawarethatthesedevicesmaybeverywarmtothetouch. MailingAddress:TexasInstruments,PostOfficeBox655303,Dallas,Texas75265 Copyright2008,TexasInstrumentsIncorporated 24 SubmitDocumentationFeedback Copyright©2007–2008,TexasInstrumentsIncorporated ProductFolderLink(s):THS7316

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) HPA00191DR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 7316 & no Sb/Br) THS7316D ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 7316 & no Sb/Br) THS7316DG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 7316 & no Sb/Br) THS7316DR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 7316 & no Sb/Br) THS7316DRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 7316 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) THS7316DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) THS7316DR SOIC D 8 2500 367.0 367.0 35.0 PackMaterials-Page2

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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