Product Sample & Technical Tools & Support & Folder Buy Documents Software Community THS3122,THS3125 SLOS382E–SEPTEMBER2001–REVISEDMAY2015 THS312x Low-Noise, High-Speed, 450-mA Current Feedback Amplifiers 1 Features 3 Description • LowNoise: The THS3122 and THS3125 are low-noise, high- 1 speed current feedback amplifiers, with high output – 2.9-pA/√HzNoninvertingCurrentNoise current drive. This makes them ideal for any – 10.8-pA/√HzInvertingCurrentNoise application that requires low distortion over a wide – 2.2-nV/√HzVoltageNoise frequency with heavy loads. The THS3122 and THS3125 can drive four serially-terminated video – 128-MHz,–3-dBBW(R =50Ω,R =470Ω) L F lines while maintaining a differential gain error less – 1550-V/µsSlewRate(G=2,RL=50Ω) than0.03%. • HighOutputCurrent:450mA The high output drive capability of the THS3122 and • HighSpeed: THS3125 enables the devices to drive 50-Ω loads – 128-MHz,–3-dBBW(R =50Ω,R =470Ω) with low distortion over a wide range of output L F voltages: – 1550-V/µsSlewRate(G=2,R =50Ω) L • –80-dBcTHDat2V – 26-V OutputVoltage,R =50Ω PP PP L • –75-dBcTHDat8V PP – –80dBc(1MHz,2V ,G=2) PP The THS3122 and THS3125 operate from ±5-V to • WideOutputSwing: ±15-V supply voltages while drawing as little as – 26-VPPOutputVoltage,RL=50Ω 7.2mA of supply current per channel. The THS3125 – –80dBc(1MHz,2V ,G=2) offers a low-power shutdown mode, reducing the PP supply current to only 370 µA. The THS3122 and – 370-µAShutdownSupplyCurrent THS3125 are packaged in SOIC, HSOP, and • LowDistortion: HTSSOPpackages. – –80dBc(1MHz,2V ,G=2) PP DeviceInformation(1) – 370-µAShutdownSupplyCurrent • Low-PowerShutdownMode(THS3125) PARTNUMBER PACKAGE BODYSIZE(NOM) SOIC(8) 4.90mm×3.91mm – 370-µAShutdownSupplyCurrent THS3122 HSOP(8) 4.89mm×3.90mm • StandardSOIC,HSOP PowerPAD™,and SOIC(14) 8.65mm×3.91mm HTSSOPPowerPADPackages THS3125 HTSSOP(14) 5.00mm×4.40mm 2 Applications (1) Forallavailablepackages,seethepackageoptionaddendum attheendofthedatasheet. • VideoDistribution • Instrumentation • LineDrivers • MotorDrivers • PiezoDrivers Voltage Noise and Current Noise vs THS3122 THS3125 Frequency SOIC (D) and SOIC (D) and 100 HSOP(SOIC PowerPAD, DDA) Package HTSSOPPowerPAD (PWP) Package V =±5 V to±15 V (Top View) (Top View) CC T = +25°C HzHz A ÖnV/ÖpA/ In− 1 OUT 1 8 VCC+ 1 OUT 1 14 VCC+ -Noise-Noise 10 In+ 11 IINN+− 23 76 22 OINU−T 11 IINN+− 23 1132 22 OINU−T Voltage Current Vn VCC− 4 5 2 IN+ VNCC/C− 45 1110 2N /ICN+ -Vn-In REF 6 9 SHUTDOWN N/C 7 8 N/C 1 0.01 0.1 1 10 100 f−Frequency−kHz 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

THS3122,THS3125 SLOS382E–SEPTEMBER2001–REVISEDMAY2015 www.ti.com Table of Contents 1 Features.................................................................. 1 7.11 TypicalCharacteristics:TableOfGraphs...............7 2 Applications........................................................... 1 7.12 TypicalCharacteristics............................................8 3 Description............................................................. 1 8 DetailedDescription............................................ 14 4 RevisionHistory..................................................... 2 8.1 Overview.................................................................14 8.2 FeatureDescription.................................................14 5 DeviceOptions....................................................... 3 8.3 DeviceFunctionalModes........................................16 6 PinConfigurationandFunctions......................... 3 9 ApplicationandImplementation........................ 18 7 Specifications......................................................... 4 9.1 ApplicationInformation............................................18 7.1 AbsoluteMaximumRatings .....................................4 10 Layout................................................................... 22 7.2 DissipationRatingsTable.........................................4 10.1 LayoutGuidelines.................................................22 7.3 RecommendedOperatingConditions.......................4 11 DeviceandDocumentationSupport................. 26 7.4 ElectricalCharacteristics:DynamicPerformance.....5 7.5 ElectricalCharacteristics:NoiseandDistortion 11.1 RelatedLinks........................................................26 Performance...............................................................5 11.2 CommunityResources..........................................26 7.6 ElectricalCharacteristics:DCPerformance..............6 11.3 Trademarks...........................................................26 7.7 ElectricalCharacteristics:InputCharacteristics.......6 11.4 ElectrostaticDischargeCaution............................26 7.8 ElectricalCharacteristics:OutputCharacteristics.....6 11.5 Glossary................................................................26 7.9 ElectricalCharacteristics:PowerSupply..................7 12 Mechanical,Packaging,andOrderable 7.10 ElectricalCharacteristics:ShutdownCharacteristics Information........................................................... 26 (THS3125Only).........................................................7 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionD(February2011)toRevisionE Page • AddedmissingminussigntotemperaturerangeinAvailableOptionstable ........................................................................ 3 • ChangedInputOffsetparametermaximumvaluesinElectricalCharateristicsforDCPerformance.................................... 6 • AddedDetailedDescriptionsection...................................................................................................................................... 14 • AddedApplicationandImplementationsection.................................................................................................................... 18 • ChangeApplicationInformationsection............................................................................................................................... 18 ChangesfromRevisionC(July2010)toRevisionD Page • Changedoutputcurrent(absolutemaximum)from275mAto550mA................................................................................. 4 ChangesfromRevisionB(October,2009)toRevisionC Page • CorrectedREFpinnameforTHS3125showninfront-pagefigure....................................................................................... 1 • DeletedShutdownpininputlevelsparametersandspecificationsfromRecommendedOperatingConditionstable...........4 • UpdatedShutdownCharacteristicstabletestconditions;changedGNDtoREF,correctedV notations.......................7 SHDN • AddedV andV parametersandspeciificationstoShutdownCharacteristicstable................................................... 7 REF SHDN • RevisedsecondandfourthparagraphsofSavingPowerwithShutdownFunctionalitysection.......................................... 14 • UpdatedequationinPower-DownReferencePinOperationsectionthatdescribesusablerangeattheREFpin.............15 • RevisedparagraphinPower-DownReferencePinOperationthatdiscussesbehaviorofunterminatedREFpin..............15 2 SubmitDocumentationFeedback Copyright©2001–2015,TexasInstrumentsIncorporated ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 www.ti.com SLOS382E–SEPTEMBER2001–REVISEDMAY2015 5 Device Options(1) PACKAGEDDEVICE EVALUATION TA SOIC-8 HSOP-8PowerPAD SOIC-14 HTSSOP-14 MODULES (D) (DDA) (D) (PWP) 0°Cto+70°C THS3122CD THS3122CDDA THS3125CD THS3125CPWP THS3122EVM, –40°Cto+85°C THS3122ID THS3122IDDA THS3125ID THS3125IPWP THS3125EVM (1) Forthemostcurrentpackageandorderinginformation,seethePackageOptionAddendumlocatedattheendofthisdatasheet. 6 Pin Configuration and Functions THS3122:DandDDAPackages THS3125:DandPWPPackages SOIC-8andHSOP-8 SOIC-14andHTSSOP-14 TopView TopView 1 OUT 1 8 VCC+ 1 OUT 1 14 VCC+ 1 INí 2 7 2 OUT 1 INí 2 13 2 OUT 1 IN+ 3 6 2 INí 1 IN+ 3 12 2 INí VCCí 4 5 2 IN+ VCCí 4 11 2 IN+ N/C 5 10 N/C REF 6 9 SHUTDOWN N/C 7 8 N/C PinFunctions PIN I/O DESCRIPTION NAME THS3122 THS3125 1IN+ 3 3 I Noninvertingamplifier1input 1IN– 2 2 I Invertingamplifier1input 1OUT 1 1 O Amplifier1output 2IN+ 5 11 I Noninvertingamplifier2input 2IN– 6 12 I Invertingamplifier2input 2OUT 7 13 O Amplifier2output N/C — 5,7,8,10 — Nointernalconnection. SHUTDOWN — 9 I Shutdowncontrol.Logiclow=active;logichigh=powerdown. REF — 6 I Referenceforshutdownthresholdcontrol V 8 14 P Positivepowersupply CC+ V 4 4 P Negativepowersupply CC– Copyright©2001–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 SLOS382E–SEPTEMBER2001–REVISEDMAY2015 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT Supplyvoltage,V toV 33 V CC+ CC– Inputvoltage –V +V V CC CC Differentialinputvoltage –4 +4 V Outputcurrent(2) 550 mA Totalpowerdissipationat(orbelow)+25°Cfree-airtemperature SeeDissipationRatingsTable Maximumjunctiontemperature 150 °C Commercial 0 70 °C Operatingfree-airtemperature,T A Industrial –40 +85 °C Commercial –65 +125 °C Storagetemperature,T stg Industrial –65 +125 °C (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) TheTHS3122andTHS3125mayincorporateaPowerPADontheundersideofthechip.Thispadactsasaheatsinkandmustbe connectedtoathermallydissipatingplaneforproperpowerdissipation.Failuretodosomayresultinexceedingthemaximumjunction temperaturewhichcouldpermanentlydamagethedevice.SeeTITechnicalBriefSLMA002formoreinformationaboututilizingthe PowerPADthermally-enhancedpackage. 7.2 Dissipation Ratings Table T =+25°C PACKAGE θ A JA POWERRATING D-8 95°C/W(1) 1.32W DDA 67°C/W 1.87W D-14 66.6°C/W(1) 1.88W PWP 37.5°C/W 3.3W (1) ThesedataweretakenusingtheJEDECproposedhigh-KtestPCB. FortheJEDEClow-KtestPCB,theθ is168°C/WfortheD-8 JA packageand122.3°C/WfortheD-14package. 7.3 Recommended Operating Conditions MIN NOM MAX UNIT Dualsupply ±5 ±15 V Supplyvoltage,V toV CC+ CC– Singlesupply 10 30 V C-suffix 0 +70 °C Operatingfree-airtemperature,T A I-suffix –40 +85 °C 4 SubmitDocumentationFeedback Copyright©2001–2015,TexasInstrumentsIncorporated ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 www.ti.com SLOS382E–SEPTEMBER2001–REVISEDMAY2015 7.4 Electrical Characteristics: Dynamic Performance Overoperatingfree-airtemperaturerange,T =+25°C,V =±15V,R =750Ω,andR =100Ω(unlessotherwisenoted). A CC F L PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V =±5V 138 MHz CC R =50Ω R =50Ω,G=1 L F V =±15V 160 MHz CC Small-signalbandwidth(–3dB) V =±5V 126 MHz CC R =50Ω R =470Ω,G=2 L F V =±15V 128 MHz CC BW V =±5V 20 MHz CC Bandwidth(0.1dB) R =470Ω,G=2 F V =±15V 30 MHz CC V =4V V =±5V 47 MHz O(PP) CC Fullpowerbandwidth G=–1 V =20V V =±15V 64 MHz O(PP) CC V =10V V =±15V 1550 V/µs O PP CC SR Slewrate(1),G=8 G=2,R =680Ω V =±5V 500 V/µs F CC V =5V O PP V =±15V 1000 V/µs CC V =2V V =±5V 53 ns O PP CC t Settlingtimeto0.1% G=–1 s V =5V V =±15V 64 ns O PP CC (1) Slewrateisdefinedfromthe25%tothe75%outputlevels. 7.5 Electrical Characteristics: Noise and Distortion Performance Overoperatingfree-airtemperaturerange,T =+25°C,V =±15V,R =750Ω,andR =100Ω(unlessotherwisenoted). A CC F L PARAMETER TESTCONDITIONS MIN TYP MAX UNIT G=2,RF=470Ω,VCC=±15V, VO(PP)=2V –80 dBc f=1MHz V =8V –75 dBc O(PP) THD Totalharmonicdistortion G=2,RF=470Ω,VCC=±5V, VO(PP)=2V –77 dBc f=1MHz V =5V –76 dBc O(PP) V Inputvoltagenoise V =±5V,±15V f=10kHz 2.2 nV/√Hz n CC Inputcurrent NoninvertingInput VCC=±5V,±15V f=10kHz 2.9 pA/√Hz I n noise InvertingInput V =±5V,±15V f=10kHz 10.8 pA/√Hz CC V =±5V –67 dBc CC Crosstalk G=2,f=1MHz,V =2V O PP V =±15V –67 dBc CC G=2,R =150Ω V =±5V 0.01% L CC 40IREmodulation, Differentialgainerror ±100IRERamp V =±15V 0.01% CC NTSCandPAL G=2,R =150Ω V =±5V 0.011 degrees L CC 40IREmodulation Differentialphaseerror ±100IRERamp V =±15V 0.011 degrees CC NTSCandPAL Copyright©2001–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 SLOS382E–SEPTEMBER2001–REVISEDMAY2015 www.ti.com 7.6 Electrical Characteristics: DC Performance Overoperatingfree-airtemperaturerange,T =+25°C,V =±15V,R =750Ω,andR =100Ω(unlessotherwisenoted). A CC F L PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V Inputoffsetvoltage VIC=0V,VO=0V, TA=+25°C 6 ±20 mV IO VCC=±5V,VCC=±15V TA=fullrange ±25 mV Channeloffsetvoltagematching VIC=0V,VO=0V, TA=+25°C 1 3 mV VCC=±5V,VCC=±15V TA=fullrange 4 mV V =0V,V =0V, Offsetdrift IC O T =fullrange 10 µV/°C V =±5V,V =±15V A CC CC IN-Inputbiascurrent VIC=0V,VO=0V, TA=+25°C 6 23 µA VCC=±5V,VCC=±15V TA=fullrange 30 µA I IB IN+Inputbiascurrent VIC=0V,VO=0V, TA=+25°C 0.33 2 µA VCC=±5V,VCC=±15V TA=fullrange 3 µA I Inputoffsetcurrent VIC=0V,VO=0V, TA=+25°C 5.4 22 µA IO VCC=±5V,VCC=±15V TA=fullrange 30 µA Z Open-looptransimpedance V =±5V,V =±15V R =1kΩ 1 MΩ OL CC CC L 7.7 Electrical Characteristics: Input Characteristics Overoperatingfree-airtemperaturerange,T =+25°C,V =±15V,R =750Ω,andR =100Ω(unlessotherwisenoted). A CC F L PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V =±5V T =fullrange ±2.5 ±2.7 V CC A V Inputcommon-modevoltagerange ICR V =±15V T =fullrange ±12.5 ±12.7 V CC A T =+25°C 58 62 dB A V =±5V,V =–2.5Vto+2.5V CC I T =fullrange 56 dB A CMRR Common-moderejectionratio T =+25°C 63 67 dB A V =±15V,V =–12.5Vto+12.5V CC I T =fullrange 60 dB A IN+ 1.5 MΩ R Inputresistance I IN– 15 Ω C Inputcapacitance 2 pF I 7.8 Electrical Characteristics: Output Characteristics Overoperatingfree-airtemperaturerange,T =+25°C,V =±15V,R =750Ω,andR =100Ω(unlessotherwisenoted). A CC F L PARAMETER TESTCONDITIONS MIN TYP MAX UNIT G=4, V =1.06V,V =±5V, R =1kΩ T =+25°C 4.1 V I CC L A T =+25°C 3.8 4 V A G=4, V =1.025V,V =±5V, R =50Ω I CC L T =fullrange 3.7 V A V Outputvoltageswing O G=4, V =3.6V,V =±15V, R =1kΩ T =+25°C 14.2 V I CC L A T =+25°C 12 13.3 V A G=4, V =3.325V,V =±15V, R =50Ω I CC L T =fullrange 11.5 V A G=4, V =1.025V,V =±5V, R =10Ω T =+25°C 200 280 mA I CC L A I Outputcurrentdrive O G=4, V =3.325V,V =±15V, R =25Ω T =+25°C 360 440 mA I CC L A r Outputresistance Openloop T =+25°C 14 Ω o A 6 SubmitDocumentationFeedback Copyright©2001–2015,TexasInstrumentsIncorporated ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 www.ti.com SLOS382E–SEPTEMBER2001–REVISEDMAY2015 7.9 Electrical Characteristics: Power Supply Overoperatingfree-airtemperaturerange,T =+25°C,V =±15V,R =750Ω,andR =100Ω(unlessotherwisenoted). A CC F L PARAMETER TESTCONDITIONS MIN TYP MAX UNIT T =+25°C 7.2 9 mA A V =±5V CC T =fullrange 10 mA A I Quiescentcurrent(perchannel) CC T =+25°C 8.4 10.5 mA A V =±15V CC T =fullrange 11.5 mA A T =+25°C 53 60 dB A V =±5V±1V CC T =fullrange 50 dB A PSRR Power-supplyrejectionratio T =+25°C 60 69 dB A V =±15V±1V CC T =fullrange 55 dB A 7.10 Electrical Characteristics: Shutdown Characteristics (THS3125 Only) Overoperatingfree-airtemperaturerange,T =+25°C,V =±15V,R =750Ω,andR =100Ω(unlessotherwisenoted). A CC F L PARAMETER TESTCONDITIONS MIN TYP MAX UNIT ICC(SHDN) Shutdownquiescentcurrent(perchannel) REF=0V,VCC=±5Vto±15V VSHDN=3.3V 370 500 µA tDIS Disabletime(1) REF=0V,VCC=±5Vto±15V 500 µs tEN Enabletime(1) REF=0V,VCC=±5Vto±15V 200 µs IIL(SHDN) Shutdownpinlowlevelleakagecurrent REF=0V,VCC=±5Vto±15V VSHDN=0V 18 25 µA IIH(SHDN) Shutdownpinhighlevelleakagecurrent REF=0V,VCC=±5Vto±15V VSHDN=3.3V 110 130 µA VREF REFpinvoltagelevel VCC– VCC+–4 V Enable REF+0.8 V VSHDN SHUTDOWNpinvoltagelevel Disable REF+2 V (1) DisableandenabletimesaredefinedasthetimefromwhentheshutdownsignalisappliedtotheSHDNpintowhenthesupplycurrent hasreachedhalfofitsfinalvalue. 7.11 Typical Characteristics: Table Of Graphs TITLE FIGURE Small-signalclosed-loopgain vsFrequency Figure1toFigure10 Small-andlarge-signaloutput vsFrequency Figure11,Figure12 vsFrequency Figure13toFigure15 Harmonicdistortion vsPeak-to-peakoutputvoltage Figure16,Figure17 V ,I Voltagenoiseandcurrentnoise vsFrequency Figure18 n n CMRR Common-moderejectionratio vsFrequency Figure19 Crosstalk vsFrequency Figure20 Z Outputimpedance vsFrequency Figure21 o SR Slewrate vsOutputvoltagestep Figure22 vsFree-airtemperature Figure24 V Inputoffsetvoltage IO vsCommon-modeinputvoltage Figure24 I Inputbiascurrent vsFree-airtemperature Figure25 B V Outputvoltage vsLoadcurrent Figure26 O vsFree-airtemperature Figure27 Quiescentcurrent vsSupplyvoltage Figure28 I Shutdownsupplycurrent vsFree-airtemperature Figure29 CC Differentialgainandphaseerror vs75-Ωseriallyterminatedloads Figure30,Figure31 Shutdownresponse Figure32 Small-signalpulseresponse Figure33,Figure34 Large-signalpulseresponse Figure35,Figure36 Copyright©2001–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 SLOS382E–SEPTEMBER2001–REVISEDMAY2015 www.ti.com 7.12 Typical Characteristics 6 3 B 3 RF = 330 W B 0 Gain − d −03 RF = 680 W Gain − d −−63 RRFF = = 6 58000 W W Small Signal Closed Loop −−−−−−−−22211174185296 GVRCL = C= − =51 0±, 5W V, RF = 500 W Small Signal Closed Loop −−−−−−−2221117418529 GVRCL = C= − =51 0±, 1W5 V, RF = 330 W −30 −30 0.1 1 10 100 1000 0.1 1 10 100 1000 f − Frequency − MHz f − Frequency − MHz Figure1.Small-SignalClosed-LoopGainvsFrequency Figure2.Small-SignalClosed-LoopGainvsFrequency 2 3 Small Signal Closed Loop Gain − dB −−−−−0154321 GVRCL = C= 1 =5, 0± 5W V, RFR RF=F =7 = 54 057 60W0 W W Small Signal Closed Loop Gain − dB −−−0963 GVRCL = C= 1 =5, 0± 1W5 V, RF =R 5F6 =0 7W5R0F W = 470 W −6 −12 0.1 1 10 100 1000 0.1 1 10 100 1000 f − Frequency − MHz f − Frequency − MHz Figure3.Small-SignalClosed-LoopGainvsFrequency Figure4.Small-SignalClosed-LoopGainvsFrequency 9 9 Gain − dB 6 RF = 500 W RF = 430 W Gain − dB 3 RF = 500 W RF = 430 W Closed Loop 03 RF = 470 W Closed Loop 06 RF = 470 W mall Signal −3 GVC =C 2=, ±5 V, mall Signal −3 GVC =C 2=, ±15 V, S RL = 50 W S RL = 50 W −6 −6 0.1 1 10 100 1000 0.1 1 10 100 1000 f − Frequency − MHz f − Frequency − MHz Figure5.Small-SignalClosed-LoopGainvsFrequency Figure6.Small-SignalClosed-LoopGainvsFrequency 8 SubmitDocumentationFeedback Copyright©2001–2015,TexasInstrumentsIncorporated ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 www.ti.com SLOS382E–SEPTEMBER2001–REVISEDMAY2015 Typical Characteristics (continued) 15 15 B 12 RF = 200 W B 12 RF = 200 W Gain − d 69 RF = 270 W Gain − d 69 RF = 270 W Small Signal Closed Loop −−−−−110352963 GVRCL = C= 4 =5, 0± 5W V, RF = 390 W Small Signal Closed Loop −−−−−110352963 GVRCL = C= 4 =5, 0± 1W5 V, RF = 390 W −18 −18 0.1 1 10 100 1000 0.1 1 10 100 1000 f − Frequency − MHz f − Frequency − MHz Figure7.Small-SignalClosed-LoopGainvsFrequency Figure8.Small-SignalClosed-LoopGainvsFrequency 15 15 B 12 B 12 RF = 200 W − d RF = 200 W − d n 9 n 9 p Gai 6 p Gai 6 RF = 470 W osed Loo 03 RF = 470 W osed Loo 03 RF = 560 W al Cl −3 RF = 560 W al Cl −3 n n g g Small Si −−96 VRCL C= =5 0± 5W V, Small Si −−96 VRCL C= =5 0± 1W5 V, −12 −12 0.1 1 10 100 1000 0.1 1 10 100 1000 f − Frequency − MHz f − Frequency − MHz Figure9.Small-SignalClosed-LoopGainvsFrequency Figure10.Small-SignalClosed-LoopGainvsFrequency 18 18 dB 12 4 VPP GRL = = 2 6, 8V0C CW ,= R ±L5 = V 5,0 W dB 12 4 VPP GRL = = 2 6, 8V0C CW ,=R L± 1=5 5 V0, W ut − 2 VPP ut − 2 VPP p 6 p 6 ut ut nal O 0 1 VPP nal O 0 1 VPP g g Si 0.5 VPP Si 0.5 VPP ge −6 ge −6 Lar 0.25 VPP Lar 0.25 VPP d −12 d −12 n n mall a −18 0.125 VPP mall a −18 0.125 VPP S S −24 −24 0.1 1 10 100 1000 0.1 1 10 100 1000 f − Frequency − MHz f − Frequency − MHz Figure11.Small-andLarge-SignalOutputvsFrequency Figure12.Small-andLarge-SignalOutputvsFrequency Copyright©2001–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 SLOS382E–SEPTEMBER2001–REVISEDMAY2015 www.ti.com Typical Characteristics (continued) 0 0 −10 G = 2, −10 G = 2, VCC = ±5 V, VCC = ±15 V, Distortion − dB −−−−54320000 VRROFL (==P P54)07 = 0W 2W 5V,t,h Harmonic 3rd Harmonic Distortion − dB −−−−54320000 VRROFL (==P P54)07 = 0W 2W V,,3rd Harmon2icnd Harmonic monic −−7600 2nd Harmonic monic −−7600 5th Harmonic Har −80 Har −80 −90 4th Harmonic −90 4th Harmonic −100 −100 0.1 1 10 100 0.1 1 10 100 f − Frequency − MHz f − Frequency − MHz Figure13.HarmonicDistortionvsFrequency Figure14.HarmonicDistortionvsFrequency 0 0 G = 2, G = 2, −10 VCC = ±15 V, −10 VCC = ±5 V, n − dB −−3200 VRROFL (==P P54)07 = 0W 8W V,, n − dB −−3200 fRR =FL 1== M5407H 0Wz W,, ortio −40 ortio −40 monic Dist −−−765000 3rd Harmonic 2nd Harmonic monic Dist −−−765000 2nd 3Hrda rHmaornmiconic5th Harmonic ar 5th Harmonic ar H −80 H −80 −90 −90 4th Harmonic 4th Harmonic −100 −100 0.1 1 10 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 f − Frequency − MHz VPP − Peak-to-Peak Output Voltage − V Figure15.HarmonicDistortionvsFrequency Figure16.HarmonicDistortionvsPeak-to-PeakOutput Voltage 0 100 G = 2, VCC = ±5 V to ±15 V −10 VCC = ±15 V, Hz Hz TA = 25°C −20 f = 1 MHz, ortion − dB −−4300 RRFL == 5407 0W W , Noise − nV/ Noise −pA/ In− Harmonic Dist −−−−87650000 3rd Harmo2nnicd Harmonic5th Harmonic V− Voltage n − Current In10 Vn In+ −90 4th Harmonic −100 1 0 1 2 3 4 5 6 7 8 9 0.01 0.1 1 10 100 VPP − Peak-to-Peak Output Voltage − V f − Frequency − kHz Figure17.HarmonicDistortionvsPeak-to-PeakOutput Figure18.VoltageNoiseandCurrentNoisevsFrequency Voltage 10 SubmitDocumentationFeedback Copyright©2001–2015,TexasInstrumentsIncorporated ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 www.ti.com SLOS382E–SEPTEMBER2001–REVISEDMAY2015 Typical Characteristics (continued) B 80 0 − d G = 2, Ratio 70 VCC = ±15 V −10 VRCF C= =4 7±05 WV,, ±15 V on 60 −20 RL = 50 W, de Rejecti 4500 VCC = ±5 V alk − dBc −−4300 on-Mo 30 Crosst −50 m G = 2, RR − Com 1200 RRTAFL === 254507° 0CW, W , −−7600 M 0 −80 C 0.1 1 10 100 1000 0.1 1 10 100 1000 f − Frequency − MHz f − Frequency − MHz Figure19.Common-ModeRejectionRatiovsFrequency Figure20.CrosstalkvsFrequency 100 1800 VRCF C= =1 ±k5W V,, ±15 V 1600 GRF = = 2 4,70 W , WOutput Impedance − 101 msSR − Slew Rate − V/ 111024680000000000 RTAL == 2550° W,C VCC = ±15 V − O 0.1 400 VCC = ±5 V Z 200 0.01 0 0.1 1 10 100 1000 0 1 2 3 4 5 6 7 8 9 10 f − Frequency − MHz VO − Output Voltage Step − V Figure21.OutputImpedancevsFrequency Figure22.SlewRatevsOutputVoltageStep 0 2 e − mV 21 VVRCCL CM= ==1 0±001 V 5W, V, ge − mV 1.51 VRTACL C== =21 50±°01C 5W, V, g a ut Offset Volta 43 put Offset Volt −00..505 p n − In 5 − IO −1 VIO 6 VI−1.5 7 −2 −40 −15 10 35 60 85 −15 −10 −5 0 5 10 15 TA − Free-Air Temperature − °C VCM − Common-Mode Input Voltage − V Figure23.InputOffsetVoltagevsFree-AirTemperature Figure24.InputOffsetVoltagevsCommon-ModeInput Voltage Copyright©2001–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 SLOS382E–SEPTEMBER2001–REVISEDMAY2015 www.ti.com Typical Characteristics (continued) 12 15 10 VCC = ±15 V, IIB+ A 14 murrent − 68 VCC = ±15 V, IIB− age − V 13 − Input Bias CIIB 024 VCC =V ±C5C V=, ±II5B +V, IIB− − Output VoltVO 1121 TVRACF C== =23 53±°01C 5W, V, −2 10 −40 −15 10 35 60 85 0 50 100 150 200 250 300 350 400 450 TA − Free-Air Temperature − °C IL − Load Current − mA Figure25.InputBiasCurrentvsFree-AirTemperature Figure26.OutputVoltagevsLoadCurrent 12 12 el n Chan 10 VCC = ±15 V 10 85 °C er A P m ent − mA/ 68 VCC = ±5 V Current − 68 −2450 °°CC urr nt C e cent 4 uiesc 4 Quies 2 − QC 2 − C IC IC 0−40 −15 10 35 60 85 00 2.5 5 7.5 10 12.5 15 TA − Free-Air Temperature − °C VCC − Supply Voltage − ±V Figure27.QuiescentCurrentvsFree-AirTemperature Figure28.QuiescentCurrentvsSupplyVoltage 450 0.08 0.35 mAupply Current − 223340505000000 VRSFD = =7 530.3 W V VCC = V±C15C V= ±5 V al Gain Error − % 0000....00004567 VG4±N01CT = 0CSI 0R 2C= E,I R± MGE5 aoVRidn,au mElarptrioorn Phase Error 0000....122355°hase Error − Degree Shutdown S 11055000 Differenrti 000...000123 00..015 Differential P 0 0 0 −40 −15 10 35 60 85 1 2 3 4 5 6 7 8 TA − Free-Air Temperature − °C 75 W Serially Terminated Loads Figure29.ShutdownSupplyCurrentvsFree-Air Figure30.DifferentialPhaseandGainErrorvs75-Ω Temperature Serially-TerminatedLoads 12 SubmitDocumentationFeedback Copyright©2001–2015,TexasInstrumentsIncorporated ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 www.ti.com SLOS382E–SEPTEMBER2001–REVISEDMAY2015 Typical Characteristics (continued) 0.3 V 5 − ge 4 0.2 olta 3 V V ut Voltage − 0.10 − Output VO012 − OutpVO−0.1 VGC =C 2=, ±5 V, 112.5 n Pulse − V −0.2 RF = 470 W , 0.5 ow RL = 50 W 0 utd −0.3 Sh 0 100 200 300 400 500 600 0 1 2 3 4 5 6 7 8 9 10 t − Time − ns t − Time − ns Figure31.DifferentialPhaseandGainErrorvs75-Ω Figure32.THS3125ShutdownResponse Serially-TerminatedLoads 0.3 0.3 0.2 0.2 V V − − ge 0.1 ge 0.1 a a olt olt V V ut 0 ut 0 p p ut ut O O − −0.1 − −0.1 VO VCC = ±5 V, VO VCC = ±15 V, G = 2, G = 2, −0.2 RF = 470 W , −0.2 RF = 470 W , RL = 50 W RL = 50 W −0.3 −0.3 0 100 200 300 400 500 600 0 100 200 300 400 500 600 t − Time − ns t − Time − ns Figure33.THS3125ShutdownResponse Figure34.Small-SignalPulseResponse 3 3 2 2 − Output Voltage − VVO −011 VGC =C 2=, ±5 V, − Output Voltage − VVO −011 VGC =C 2=, ±15 V, −2 RF = 470 W , −2 RF = 470 W , RL = 50 W RL = 50 W −3 −3 0 100 200 300 400 500 600 0 100 200 300 400 500 600 t − Time − ns t − Time − ns Figure35.Large-SignalPulseResponse Figure36.Large-SignalPulseResponse Copyright©2001–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 SLOS382E–SEPTEMBER2001–REVISEDMAY2015 www.ti.com 8 Detailed Description 8.1 Overview The THS3122 and THS3125 family of dual-channels, bipolar-input, high-speed current feedback amplifiers offers a low-noise of 2.2 nV/√Hz with a high output current drive of 450 mA. This performance is ideal for any applicationthatrequireslowdistortionoverawiderangeoffrequencieswithheavyloads. 8.2 Feature Description 8.2.1 MaximumSlewRateForRepetitiveSignals The THS3125 and THS3122 are recommended for high slew rate pulsed applications where the internal nodes of the amplifier have time to stabilize between pulses. It is recommended to have at least 20-ns delay between pulses. The THS3125 and THS3122 are not recommended for applications with repetitive signals (sine, square, sawtooth, or other) that exceed 900 V/µs. Using the part in these applications results in excessive current draw fromthepowersupplyandpossibledevicedamage. Forapplicationswithhighslewrate,repetitivesignals,theTHS3091 andTHS3095(singleversions),orTHS3092 andTHS3096(dualversions)arerecommended. 8.2.2 SavingPowerwithShutdownFunctionalityandSettingThresholdLevelswiththeReferencePin The THS3125 features a shutdown pin (SHUTDOWN) that lowers the quiescent current from 8.4 mA/amp down to370µA/amp,idealforreducingsystempower. The shutdown pin of the amplifier defaults to the REF pin voltage in the absence of an applied voltage, putting the amplifier in the normal on mode of operation. To turn off the amplifier in an effort to conserve power, the shutdown pin can be driven towards the positive rail. The threshold voltages for power-on and power-down (or shutdown) are relative to the supply rails and are given in the Electrical Characteristics: Shutdown Characteristics (THS3125 Only) table. Below the Enable threshold voltage, the device is on. Above the Disable thresholdvoltage,thedeviceisoff.Behaviorbetweenthesethresholdvoltagesisnotspecified. Note that this shutdown functionality is self-defining: the amplifier consumes less power in shutdown mode. The shutdown mode is not intended to provide a high-impedance output. In other words, the shutdown functionality is not intended to allow use as a 3-state bus driver. When in shutdown mode, the impedance looking back into the output of the amplifier is dominated by the feedback and gain setting resistors, but the output impedance of the deviceitselfvariesdependingonthevoltageappliedtotheoutputs. As with most current feedback amplifiers, the internal architecture places some limitations on the system when in shutdown mode. Most notably is the fact that the amplifier actually turns on if there is a ±0.7 V or greater difference between the two input nodes (IN+ and IN–) of the amplifier. If this difference exceeds ±0.7 V, the output of the amplifier creates an output voltage equal to approximately [(IN+ – IN–) – 0.7V] × Gain. Also, if a voltage is applied to the output while in shutdown mode, the IN– node voltage is equal to V × R /(R + O(applied) G F R ) . For low gain configurations and a large applied voltage at the output, the amplifier may actually turn on G becauseofthebehaviordescribedhere. Thetimedelaysassociatedwithturningthedeviceonandoffarespecifiedasthetimeittakesfortheamplifierto reach either 10% or 90% of the final output voltage. The time delays are in the order of microseconds because theamplifiermovesinandoutofthelinearmodeofoperationinthesetransitions. 14 SubmitDocumentationFeedback Copyright©2001–2015,TexasInstrumentsIncorporated ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 www.ti.com SLOS382E–SEPTEMBER2001–REVISEDMAY2015 Feature Description (continued) 8.2.3 Power-DownReferencePinOperation In addition to the shutdown pin, the THS3125 features a reference pin (REF) which allows the user to control the enable or disable power-down voltage levels applied to the SHUTDOWN pin. In most split-supply applications, the reference pin is connected to ground. In either case, the user must be aware of voltage-level thresholds that apply to the shutdown pin. Table 1 shows examples and illustrate the relationship between the reference voltage andthepower-downthresholds.Inthetable,thethresholdlevelsarederivedbythefollowingequations: SHUTDOWN≤ REF+0.8Vforenable SHUTDOWN≥ REF+2Vfordisable WheretheusablerangeattheREFpinis: V ≤V ≤ (V – 4V) CC– REF CC+ The recommended mode of operation is to tie the REF pin to midrail, therefore setting the enable/disable thresholdstoV +0.8VandV =2V,respectively. (midrail) (midrail) Table1.ShutdownThresholdVoltageLevels SUPPLYVOLTAGE(V) REFERENCEPINVOLTAGE(V) ENABLELEVEL(V) DISABLELEVEL(V) ±15,±5 0 0.8 2.0 ±15 2.0 2.8 4.0 ±15 –2.0 –1.2 0 ±5 1.0 1.8 3.0 ±5 –1.0 –0.2 1.0 +30 15.0 15.8 17 +10 5.0 5.8 7.0 Note that if the REF pin is left unterminated, it floats to the positive rail and falls outside of the recommended operating range given above V ≤ V ≤ (V – 4V). As a result, it no longer serves as a reliable reference CC– REF CC+ for the SHUTDOWN pin, and the enable/disable thresholds given above no longer apply. If the SHUTDOWN pin is also left unterminated, it floats to the positive rail and the device is disabled. If balanced, split supplies are used(±V )andtheREFandSHUTDOWNpinsaregrounded,thedeviceisenabled. S Copyright©2001–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 SLOS382E–SEPTEMBER2001–REVISEDMAY2015 www.ti.com 8.3 Device Functional Modes 8.3.1 Wideband,NoninvertingOperation The THS3125 and THS3122 are unity gain stable 130-MHz current-feedback operational amplifiers, designed to operatefroma±5-Vto ±15-Vpowersupply. Figure 37 shows the THS3125 in a noninverting gain of 2-V/V configuration used to generate the typical characteristic curves. Most of the curves were characterized using signal sources with 50-Ω source impedance andwithmeasurementequipmentthatpresentsa50-Ω loadimpedance. +15 V +V S + 50-WSource 0.1mF 6.8mF VI 49.9W THS3125 49.9W 470W 50-WLoad R F 470W R G + -15 V -VS 0.1mF 6.8mF Figure37. Wideband,NoninvertingGainConfiguration Current-feedback amplifiers are highly dependent on the feedback resistor R for maximum performance and F stability. Table 2 shows the optimal gain setting resistors R and R at different gains to give maximum F G bandwidth with minimal peaking in the frequency response. Higher bandwidths can be achieved, at the expense of added peaking in the frequency response, by using even lower values for R . Conversely, increasing R F F decreasesthebandwidth,butstabilityisimproved. Table2.RecommendedResistorValuesForOptimumFrequencyResponse THS3125andTHS3122R andR VALUESFORMINIMALPEAKINGWITHR =50Ω,±5-Vto±15-VPOWERSUPPLY F G L GAIN(V/V) R (Ω) R (Ω) G F 1 — 560 2 470 470 4 66.5 200 8.3.2 Wideband,InvertingOperation Figure 38 shows the THS3125 in a typical inverting gain configuration where the input and output impedances fromFigure37areretainedinaninvertingcircuitconfiguration. +15 V +V S + 0.1mF 6.8mF 49.9W THS3125 R 50-WSource 470GW 470W 50-WLoad V I 56.2W RF R M + -15 V -VS 0.1mF 6.8mF Figure38. Wideband,InvertingGainConfiguration 16 SubmitDocumentationFeedback Copyright©2001–2015,TexasInstrumentsIncorporated ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 www.ti.com SLOS382E–SEPTEMBER2001–REVISEDMAY2015 8.3.3 Single-SupplyOperation The THS3125 and THS3122 have the capability to operate from a single supply voltage ranging from 10 V to 30 V. When operating from a single power supply, biasing the input and output at mid-supply allows for the maximum output voltage swing. The circuits in Figure 39 show inverting and noninverting amplifiers configured forsingle-supplyoperation. +V S 50-WSource VI 49.9W R THS3125 T 49.9W 50-WLoad R +VS/2 470FW R G 470W +V /2 R S F 470W +V R S 50-WSource 470GW VI 49.9W 56.2W THS3125 R T 50-WLoad +V /2 +V /2 S S Figure39. DC-Coupled,Single-SupplyOperation Copyright©2001–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 SLOS382E–SEPTEMBER2001–REVISEDMAY2015 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information 9.1.1 VideoDistribution The wide bandwidth, high slew rate, and high output drive current of the THS3125 and THS3122 match the demands for video distribution to deliver video signals down multiple cables. To ensure high signal quality with minimal degradation of performance, a 0.1-dB gain flatness should be at least 7x the passband frequency to minimize group delay variations from the amplifier. A high slew rate minimizes distortion of the video signal, and supportscomponentvideoandRGBvideosignalsthatrequirefasttransitiontimesandfastsettlingtimesforhigh signalquality.Figure40illustratesatypicalvideodistributionamplifierapplicationconfiguration. 470W 470W +15 V 75-WTransmission Line 75W VO(1) V I 75W 75W -15 V nlines 75W VO(n) 75W Figure40. VideoDistributionAmplifierApplication 9.1.2 DrivingCapacitiveLoads Applications such as FET drivers and line drivers can be highly capacitive and cause stability problems for high- speedamplifiers. Figure 41 through Figure 47 show recommended methods for driving capacitive loads. The basic idea is to use a resistororferritechiptoisolatethephaseshiftathighfrequencycausedbythecapacitiveloadfromtheamplifier feedbackpath.SeeFigure41forrecommendedresistorvaluesversuscapacitiveload. 60 W) e ( 50 c n a sist 40 e R RISO 30 d e d 20 n e m m 10 o c e R 0 10 100 C -Capacitive Load (pF) L Figure41. RecommendedR vsCapacitiveLoad ISO 18 SubmitDocumentationFeedback Copyright©2001–2015,TexasInstrumentsIncorporated ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 www.ti.com SLOS382E–SEPTEMBER2001–REVISEDMAY2015 Application Information (continued) Placingasmallseriesresistor,R ,betweentheamplifieroutputandthecapacitiveload,asshowninFigure42, ISO isaneasywayofisolatingtheloadcapacitance. R F +V S RG 5R.1I1SOW 100-WLoad 1mF -VS +V S 49.9W Figure42. ResistorToIsolateCapacitiveLoad Using a ferrite chip in place of R , as Figure 43 shows, is another approach of isolating the output of the ISO amplifier. The ferrite impedance characteristic versus frequency is useful to maintain the low frequency load independence of the amplifier while isolating the phase shift caused by the capacitance at high frequency. Use a ferritewithsimilarimpedancetoR ,20Ωto50 Ω,at100MHzandlowimpedanceatdc. ISO R F +V S RG Ferrite Bead 100-WLoad 1mF -VS +V S 49.9W Figure43. FerriteBeadToIsolateCapacitiveLoad Figure 44 shows another method used to maintain the low-frequency load independence of the amplifier while isolating the phase shift caused by the capacitance at high frequency. At low frequency, feedback is mainly from theload side of R . At high frequency, the feedback is mainly via the 27-pF capacitor. The resistor R in series ISO IN with the negative input is used to stabilize the amplifier and should be equal to the recommended value of R at F unity gain. Replacing R with a ferrite of similar impedance at about 100 MHz as shown in Figure 45 gives IN similarresultswithreduceddcoffsetandlowfrequencynoise. Copyright©2001–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 SLOS382E–SEPTEMBER2001–REVISEDMAY2015 www.ti.com Application Information (continued) R F 27 pF +V S R 560W G 100-WLoad 5.11W R IN 1mF -V S +V S 49.9W Figure44. FeedbackTechniqueWithInputResistorForCapacitiveLoad R F 27 pF +V Ferrite S RG Bead 100-WLoad 5.11W F IN 1mF -V S +V S 49.9W Figure45. FeedbackTechniqueWithInputFerriteBeadForCapacitiveLoad 20 SubmitDocumentationFeedback Copyright©2001–2015,TexasInstrumentsIncorporated ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 www.ti.com SLOS382E–SEPTEMBER2001–REVISEDMAY2015 Application Information (continued) Figure 46 shows a configuration that uses two amplifiers in parallel to double the output drive current to larger capacitive loads. This technique is used when more output current is needed to charge and discharge the load fasteraswhendrivinglargeFETtransistors. R F +V S R G 5.11W 24.9W -V S R F +V S 1 nF +V S R G 5.11W 24.9W -V S Figure46. ParallelAmplifiersForHigherOutputDrive Figure 47 shows a push-pull FET driver circuit typical of ultrasound applications with isolation resistors to isolate thegatecapacitancefromtheamplifier. +V +V S S 5.11W -V S R F 2R G R F +V S 5.11W -V -V S S Figure47. PowerfetDriveCircuit Copyright©2001–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 SLOS382E–SEPTEMBER2001–REVISEDMAY2015 www.ti.com 10 Layout 10.1 Layout Guidelines 10.1.1 Printed-CircuitBoardLayoutTechniquesForOptimalPerformance Achieving optimum performance with high-frequency amplifiers such as the THS3125 and THS3122 requires careful attention to board layout parasitic and external component types. Recommendations that optimize performanceinclude: • Minimize parasitic capacitance to any ac ground for all of the signal I/O pins. Parasitic capacitance on the output and input pins can cause instability. To reduce unwanted capacitance, a window around the signal I/O pins should be opened in all of the ground and power planes around those pins. Otherwise, ground and powerplanesshouldbeunbrokenelsewhereontheboard. • Minimize the distance [0.25 inch, (6,4 mm)] from the power-supply pins to high-frequency 0.1-µF and 100-pF decoupling capacitors. At the device pins, the ground and power plane layout should not be in close proximity to the signal I/O pins. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. The power-supply connections should always be decoupled with these capacitors. Larger (6.8 µF or more) tantalum decoupling capacitors, effective at lower frequencies, should also be used on the main supply pins. These capacitors may be placed somewhat farther from the device and may be sharedamongseveraldevicesinthesameareaoftheprintedcircuitboard(PCB). • Careful selection and placement of external components preserve the high-frequency performance of the THS3125 and THS3122. Resistors should be a very low reactance type. Surface-mount resistors work best andallowatighteroveralllayout.Again,keeptheleadsandPCBtracelengthasshortaspossible.Neveruse wirebound type resistors in a high-frequency application. Because the output pin and inverting input pins are the most sensitive to parasitic capacitance, always position the feedback and series output resistors, if any, as close as possible to the inverting input pins and output pins. Other network components, such as input termination resistors, should be placed close to the gain-setting resistors. Even with a low parasitic capacitance that shunts the external resistors, excessively high resistor values can create significant time constants that can degrade performance. Good axial metal-film or surface-mount resistors have approximately 0.2 pF in shunt with the resistor. For resistor values greater than 2.0 kΩ, this parasitic capacitance can add a pole and/or a zero that can affect circuit operation. Keep resistor values as low as possible,consistentwithloaddrivingconsiderations. • Connections to other wideband devices on the board may be made with short direct traces or through onboard transmission lines. For short connections, consider the trace and the input to the next device as a lumped capacitive load. Relatively wide traces [0.05 inch (1,3 mm) to 0.1 inch (2,54 mm)] should be used, preferably with ground and power planes opened up around them. Estimate the total capacitive load and determine if isolation resistors on the outputs are necessary. Low parasitic capacitive loads (less than 4 pF) may not need an R because the THS3125 and THS3122 are nominally compensated to operate with a 2-pF S parasitic load. Higher parasitic capacitive loads without an R are allowed as the signal gain increases (thus S increasing the unloaded phase margin). If a long trace is required, and the 6-dB signal loss intrinsic to a doubly-terminated transmission line is acceptable, implement a matched-impedance transmission line using microstrip or stripline techniques (consult an ECL design handbook for microstrip and stripline layout techniques). A 50-Ω environment is not necessary onboard, and in fact, a higher impedance environment improves distortion as shown in the distortion versus load plots. With a characteristic board trace impedance basedonboardmaterialandtracedimensions,amatchingseriesresistorintothetracefromtheoutputofthe THS3125/THS3122 is used as well as a terminating shunt resistor at the input of the destination device. Remember also that the terminating impedance is the parallel combination of the shunt resistor and the input impedance of the destination device: this total effective impedance should be set to match the trace impedance. If the 6-dB attenuation of a doubly-terminated transmission line is unacceptable, a long trace can be series-terminated at the source end only. Treat the trace as a capacitive load in this case. This configuration does not preserve signal integrity as well as a doubly-terminated line. If the input impedance of the destination device is low, there is some signal attenuation as a result of the voltage divider formed by the seriesoutputintotheterminatingimpedance. • Socketing a high-speed device such as the THS3125 and THS3122 is not recommended. The additional lead length and pin-to-pin capacitance introduced by the socket can create an extremely troublesome parasitic network which can make it almost impossible to achieve a smooth, stable frequency response. Best results areobtainedbysolderingtheTHS3125/THS3122amplifiersdirectlyontotheboard. 22 SubmitDocumentationFeedback Copyright©2001–2015,TexasInstrumentsIncorporated ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 www.ti.com SLOS382E–SEPTEMBER2001–REVISEDMAY2015 Layout Guidelines (continued) 10.1.2 PowerPADDesignConsiderations The THS3125 and THS3122 are available in a thermally-enhanced PowerPAD family of packages. These packages are constructed using a downset leadframe upon which the die is mounted [see Figure 48(a) and Figure 48(b)]. This arrangement results in the lead frame being exposed as a thermal pad on the underside of the package [see Figure 48(c)]. Because this thermal pad has direct thermal contact with the die, excellent thermal performance can be achieved by providing a good thermal path away from the thermal pad. Note that devicessuchastheTHS312xhavenoelectricalconnectionbetweenthePowerPADandthedie. DIE (a)Side View Thermal Pad DIE (b)End View (c)Bottom View Figure48. ViewsOfThermally-EnhancedPackage The PowerPAD package allows for both assembly and thermal management in one manufacturing operation. During the surface-mount solder operation (when the leads are being soldered), the thermal pad can also be soldered to a copper area underneath the package. Through the use of thermal paths within this copper area, heatcanbeconductedawayfromthepackageintoeitheragroundplaneorotherheatdissipatingdevice. The PowerPAD package represents a breakthrough in combining the small area and ease of assembly of surfacemountwiththe,heretofore,awkwardmechanicalmethodsofheatsinking. Copyright©2001–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 SLOS382E–SEPTEMBER2001–REVISEDMAY2015 www.ti.com Layout Guidelines (continued) 10.1.3 PowerPADLayoutConsiderations 0.205 (5,21) 0.060 (1,52) 0.017 (0,432) 0.013 Pin 1 (0,33) 0.075 0.094 (1,91) (2,39) 0.030 (0,76) 0.025 (0,64) 0.010 0.040 (0,254) (1,01) 0.035 vias (0,89) Top View Dimensionsareininches(millimeters). Figure49. DGNPowerPADPCBEtchandViaPattern Although there are many ways to properly heatsink the PowerPAD package, the following steps illustrate the recommendedapproach. 1. PCBwithatopsideetchpatternasshowninFigure49. 2. Place five holes in the area of the thermal pad. These holes should be 0.01 inch (0,254 mm) in diameter. Keepthemsmallsothatsolderwickingthroughtheholesisnotaproblemduringreflow. 3. Additionalviasmaybeplacedanywherealongthethermalplaneoutsideofthethermalpadarea.Thesevias help dissipate the heat generated by the THS3125/THS3122 IC. These additional vias may be larger than the 0.01-inch (0,254-mm) diameter vias directly under the thermal pad. They can be larger because they are notinthethermalpadareatobesolderedsothatwickingisnotaproblem. 4. Connect all holes to the internal ground plane. Note that the PowerPAD is electrically isolated from the silicon and all leads. Connecting the PowerPAD to any potential voltage, such as V , is acceptable as there S– isnoelectricalconnectiontothesilicon. 5. When connecting these holes to the ground plane, do not use the typical web or spoke via connection methodology. Web connections have a high thermal resistance connection that is useful for slowing the heat transfer during soldering operations. This resistance makes the soldering of vias that have plane connections easier. In this application; however, low thermal resistance is desired for the most efficient heat transfer. Therefore, the holes under the THS3125/THS3122 PowerPAD package should make the connection to the internalgroundplanewithacompleteconnectionaroundtheentirecircumferenceoftheplated-throughhole. 6. The top-side solder mask should leave the terminals of the package and the thermal pad area with its five holes exposed. The bottom-side solder mask should cover the five holes of the thermal pad area. This configurationpreventssolderfrombeingpulledawayfromthethermalpadareaduringthereflowprocess. 7. ApplysolderpastetotheexposedthermalpadareaandalloftheICterminals. 8. With these preparatory steps in place, the IC is simply placed in position and run through the solder reflow operation as any standard surface-mount component. This procedure results in a part that is properly installed. 24 SubmitDocumentationFeedback Copyright©2001–2015,TexasInstrumentsIncorporated ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 www.ti.com SLOS382E–SEPTEMBER2001–REVISEDMAY2015 Layout Guidelines (continued) 10.1.4 PowerDissipationAndThermalConsiderations The THS3125 and THS3122 incorporate automatic thermal shutoff protection. This protection circuitry shuts down the amplifier if the junction temperature exceeds approximately +160°C. When the junction temperature reduces to approximately +140°C, the amplifier turns on again. However, for maximum performance and reliability, the designer must take care to ensure that the design does not exceed a junction temperature of +125°C. Between +125°C and +150°C, damage does not occur, but the performance of the amplifier begins to degrade and long-term reliability suffers. The thermal characteristics of the device are dictated by the package andthePCB.Maximumpowerdissipationforagivenpackagecanbecalculatedusingthefollowingformula. T -T P = max A DMax q JA where: • P isthemaximumpowerdissipationintheamplifier(W) DMax • T istheabsolutemaximumjunctiontemperature(°C) max • T istheambienttemperature(°C) A θ =θ +θ JA JC CA where: • θ isthethermalcoefficientfromthesiliconjunctionstothecase(°C/W) JC • θ isthethermalcoefficientfromthecasetoambientair(°C/W) CA For systems where heat dissipation is more critical, the THS3125 and THS3122 are also available in an 8-pin MSOP with PowerPAD package that offers even better thermal performance. The thermal coefficient for the PowerPADpackagesaresubstantiallyimprovedoverthetraditionalSOIC.Maximumpowerdissipationlevelsare depicted in Figure 50 for the available packages. The data for the PowerPAD packages assume a board layout that follows the PowerPAD layout guidelines discussed above and detailed in the PowerPAD application note (literature number SLMA002). Figure 50 also illustrates the effect of not soldering the PowerPAD to a PCB. The thermal impedance increases substantially, which may cause serious heat and performance issues. Always solderthePowerPADtothePCBforoptimumperformance. W) 4.0 on ( 3.5 TJ= +125°C ati sip 3.0 s q = 58.4°C/W Di 2.5 JA er w o 2.0 m P qJA= 95°C/W 1.5 u m xi 1.0 a M - 0.5 Max qJA= 158°C/W PD 0 -40 -20 0 20 40 60 80 100 T -Free-Air Temperature (°C) A ResultsshownarewithnoairflowandPCBsizeof3in×3in(76,2mm×76,2mm). • θ =58.4°C/Wfor8-pinMSOPwithPowerPAD(DGNpackage) JA • θ =95°C/Wfor8-pinSOICHigh-KtestPCB(Dpackage) JA • θ =158°C/Wfor8-pinMSOPwithPowerPADwithoutsolder JA Figure50. MaximumPowerDissipationvsAmbientTemperature When determining whether or not the device satisfies the maximum power dissipation requirement, it is important to not only consider quiescent power dissipation, but also dynamic power dissipation. Often times, this type of dissipation is difficult to quantify because the signal pattern is inconsistent, but an estimate of the RMS power dissipationcanprovidevisibilityintoapossibleproblem. Copyright©2001–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLinks:THS3122 THS3125

THS3122,THS3125 SLOS382E–SEPTEMBER2001–REVISEDMAY2015 www.ti.com 11 Device and Documentation Support 11.1 Related Links Table 3 lists quick access links. Categories include technical documents, support and community resources, toolsandsoftware,andquickaccesstosampleorbuy. Table3.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER SAMPLE&BUY DOCUMENTS SOFTWARE COMMUNITY THS3122 Clickhere Clickhere Clickhere Clickhere Clickhere THS3125 Clickhere Clickhere Clickhere Clickhere Clickhere 11.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 11.3 Trademarks PowerPAD,E2EaretrademarksofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 11.4 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage. ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemore susceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications. 11.5 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 26 SubmitDocumentationFeedback Copyright©2001–2015,TexasInstrumentsIncorporated ProductFolderLinks:THS3122 THS3125

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) THS3122CD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 3122C & no Sb/Br) THS3122CDDA ACTIVE SO PowerPAD DDA 8 75 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 3122C & no Sb/Br) THS3122ID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 3122I & no Sb/Br) THS3122IDDA ACTIVE SO PowerPAD DDA 8 75 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 3122I & no Sb/Br) THS3125CPWP ACTIVE HTSSOP PWP 14 90 Green (RoHS NIPDAU Level-2-260C-1 YEAR 0 to 70 HS3125C & no Sb/Br) THS3125ID ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 THS3125I & no Sb/Br) THS3125IPWP ACTIVE HTSSOP PWP 14 90 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 HS3125I & no Sb/Br) THS3125IPWPR ACTIVE HTSSOP PWP 14 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 HS3125I & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) THS3125IPWPR HTSSOP PWP 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) THS3125IPWPR HTSSOP PWP 14 2000 350.0 350.0 43.0 PackMaterials-Page2

GENERIC PACKAGE VIEW DDA 8 PowerPAD TM SOIC - 1.7 mm max height PLASTIC SMALL OUTLINE Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4202561/G

PACKAGE OUTLINE DDA0008B PowerPAD T M SOIC - 1.7 mm max height SCALE 2.400 PLASTIC SMALL OUTLINE C 6.2 TYP 5.8 SEATING PLANE A PIN 1 ID 0.1 C AREA 6X 1.27 8 1 5.0 2X 4.8 3.81 NOTE 3 4 5 0.51 8X 0.31 B 4.0 1.7 MAX 3.8 0.25 C A B NOTE 4 0.25 TYP 0.10 SEE DETAIL A 4 5 EXPOSED THERMAL PAD 0.25 3.4 9 2.8 GAGE PLANE 0.15 0 - 8 1.27 0.00 1 8 0.40 DETAIL A 2.71 TYPICAL 2.11 4214849/A 08/2016 PowerPAD is a trademark of Texas Instruments. NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MS-012. www.ti.com

EXAMPLE BOARD LAYOUT DDA0008B PowerPAD T M SOIC - 1.7 mm max height PLASTIC SMALL OUTLINE (2.95) NOTE 9 SOLDER MASK (2.71) DEFINED PAD SOLDER MASK OPENING SEE DETAILS 8X (1.55) 1 8 8X (0.6) (3.4) SYMM 9 (1.3) SOLDER MASK TYP OPENING (4.9) NOTE 9 6X (1.27) 5 4 (R0.05) TYP SYMM METAL COVERED ( 0.2) TYP BY SOLDER MASK VIA (1.3) TYP (5.4) LAND PATTERN EXAMPLE SCALE:10X 0.07 MAX 0.07 MIN ALL AROUND ALL AROUND SOLDER MASK METAL SOLDER MASK METAL UNDER OPENING OPENING SOLDER MASK NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS PADS 1-8 4214849/A 08/2016 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 8. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature numbers SLMA002 (www.ti.com/lit/slma002) and SLMA004 (www.ti.com/lit/slma004). 9. Size of metal pad may vary due to creepage requirement. 10. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. www.ti.com

EXAMPLE STENCIL DESIGN DDA0008B PowerPAD T M SOIC - 1.7 mm max height PLASTIC SMALL OUTLINE (2.71) BASED ON 0.125 THICK STENCIL 8X (1.55) (R0.05) TYP 1 8 8X (0.6) (3.4) SYMM 9 BASED ON 0.125 THICK STENCIL 6X (1.27) 5 4 METAL COVERED SYMM BY SOLDER MASK SEE TABLE FOR DIFFERENT OPENINGS FOR OTHER STENCIL (5.4) THICKNESSES SOLDER PASTE EXAMPLE EXPOSED PAD 100% PRINTED SOLDER COVERAGE BY AREA SCALE:10X STENCIL SOLDER STENCIL THICKNESS OPENING 0.1 3.03 X 3.80 0.125 2.71 X 3.40 (SHOWN) 0.150 2.47 X 3.10 0.175 2.29 X 2.87 4214849/A 08/2016 NOTES: (continued) 11. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 12. Board assembly site may have different recommendations for stencil design. www.ti.com

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PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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